Manufacturing method of packaging structure

Abstract

The invention provides a manufacturing method of a packaging structure. Specifically, the manufacturing method comprises the following steps: (a) providing a copper foil; (b) electroplating the copper foil to form a cavity sacrificial column; (c) laminating a dielectric material to form a dielectric layer, wherein the dielectric layer exposes the end surfaces of the cavity sacrificial columns; (d) forming a circuit layer on the dielectric layer; (e) etching to remove the cavity sacrifice columns to form a through cavity; (f) forming a bonding pad on the circuit layer; and (g) mounting the back surface of the component on the copper foil in the through cavity, and bonding the terminal of the component and the bonding pad by a lead. By the adoption of the manufacturing method, the component is directly attached to the copper foil, the copper foil becomes a large-area radiator and can rapidly take away heat generated during operation of the component, and the heat dissipation performance of the embedded packaging structure is greatly improved.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor packaging technology, and in particular to a method for manufacturing a packaging structure. Background Art

[0002] With the development and progress of electronic technology, the functions of electronic products are becoming more and more powerful, and the appearance of electronic products is evolving towards being short, light and thin, which has promoted the development of the packaging structure of electronic products towards a highly integrated and miniaturized direction, and embedded packaging of components such as chips has emerged. At the same time, the performance of electronic components is also developing towards high frequency, high speed and high power, resulting in a rapid increase in heat flux density per unit area. As we all know, as the operating environment temperature rises, the operating speed of electronic components decreases and the loss increases; at the same time, the reliability of electronic products is relatively reduced when they operate in a high temperature environment for a long time. If the heat generated by high-frequency, high-speed and high-power electronic components cannot be dissipated in time, the performance and reliability of electronic products will be seriously affected. Therefore, under the general trend of high frequency, high speed and high power, how to reasonably optimize the design of embedded packaging substrates and packaging bodies and improve the heat dissipation performance of embedded packaging structures is an important topic at present. Summary of the invention

[0003] In view of this, an object of the present disclosure is to provide a method for manufacturing a packaging structure.

[0004] Based on the above objectives, the present disclosure provides a method for manufacturing a packaging structure, comprising:

[0005] (a) providing a copper foil;

[0006] (b) electroplating a cavity sacrificial column on the copper foil;

[0007] (c) pressing a dielectric material to form a dielectric layer, wherein the dielectric layer exposes an end surface of the cavity sacrificial column;

[0008] (d) forming a circuit layer on the dielectric layer;

[0009] (e) etching away the cavity sacrificial column to form a through cavity;

[0010] (f) forming a bonding pad on the circuit layer;

[0011] (g) mounting the back side of the component on the copper foil in the through cavity, and wire bonding the terminal of the component to the bonding pad.

[0012] In some embodiments, the distance between the end surface of the terminal and the end surface of the bonding pad and the copper foil is the same.

[0013] In some embodiments, before step (f), the method further includes: forming a conductive column on the circuit layer.

[0014] In some embodiments, it also includes:

[0015] (h) forming a packaging layer, wherein the packaging layer exposes an end surface of the conductive pillar.

[0016] In some embodiments, it also includes:

[0017] (i) A solder layer is formed on the end surface of the via.

[0018] In some embodiments, before step (b), the method further includes: forming a protective layer on the copper foil; wherein the protective layer is located between the cavity sacrificial column and the copper foil.

[0019] In some embodiments, the material of the protection layer includes one or more of nickel, titanium, and tin.

[0020] In some embodiments, step (e) comprises:

[0021] (e1) laminating, exposing, and developing to form a photoresist layer exposing the sacrificial column in the cavity;

[0022] (e2) vacuum etching the cavity sacrificial column to form a through cavity;

[0023] (e3) removing the photoresist layer.

[0024] In some embodiments, step (f) comprises:

[0025] A surface treatment layer is formed on the circuit layer.

[0026] In some embodiments, the surface treatment layer is formed by a nickel-palladium-gold process.

[0027] From the above, it can be seen that the present disclosure provides a method for manufacturing a packaging structure, the manufacturing method comprising: (a) providing a copper foil; (b) electroplating a cavity sacrificial column on the copper foil; (c) pressing a dielectric material to form a dielectric layer, the dielectric layer exposing the end face of the cavity sacrificial column; (d) forming a circuit layer on the dielectric layer; (e) etching away the cavity sacrificial column to form a through cavity; (f) forming a bonding pad on the circuit layer; (g) mounting the back of the component on the copper foil in the through cavity, and wire bonding the terminal of the component to the bonding pad. With such a manufacturing method, the components are directly mounted on the copper foil, and the copper foil becomes a large-area heat sink that can quickly take away the heat generated by the components during operation, greatly improving the heat dissipation performance of the embedded packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings, the thickness and shape of some layers and regions may be exaggerated for better understanding and ease of description.

[0029] Figure 1(a) to Figure 1(j) A schematic cross-sectional view of an intermediate structure in each step of a method for manufacturing a packaging structure provided by an embodiment of the present disclosure;

[0030] Figure 2 A schematic diagram of a packaging structure provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0031] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0032] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0033] In the related technology, embedded packaging is to mount components such as chips on a polymer frame or core board with a preset cavity, and then achieve packaging by pressing dielectric materials. Due to the limitations of the heat dissipation characteristics of organic polymer materials, it is difficult to fundamentally solve the heat dissipation problem of high-frequency, high-speed, and high-power embedded products.

[0034] In order to solve the heat dissipation problem of embedded products, the technology of pre-processing cavities on metal (such as copper) plates, mounting chips and other components in the pre-processed cavities, and then packaging them by pressing dielectric materials has attracted much attention. However, such a solution has a complex processing process and high cost.

[0035] In view of this, the embodiments of the present disclosure provide a method for manufacturing a packaging structure. The manufacturing method includes (a) providing a copper foil; (b) electroplating a cavity sacrificial column on the copper foil; (c) pressing a dielectric material to form a dielectric layer, wherein the dielectric layer exposes the end face of the cavity sacrificial column; (d) forming a circuit layer on the dielectric layer; (e) etching and removing the cavity sacrificial column to form a through cavity; (f) forming a bonding pad on the circuit layer; (g) mounting the back of the component on the copper foil in the through cavity, and wire bonding the terminal of the component to the bonding pad. With such a manufacturing method, the components are directly mounted on the copper foil, and the copper foil becomes a large-area heat sink that can quickly take away the heat generated by the components during operation, greatly improving the heat dissipation performance of the embedded packaging structure.

[0036] Figure 1(a) to Figure 1(j) The cross-sectional schematic diagram of the intermediate structure of each step of the manufacturing method of a packaging structure provided by the embodiment of the present disclosure. Figure 1(a) to Figure 1(j) , the production method comprises:

[0037] First, a copper foil 100 is provided (step (a), as shown in Fig. 1 (a). Here, the thickness of the copper foil 100 may be 200 μm.

[0038] Next, a protective layer 101 and a cavity sacrificial column 102 are formed by electroplating on the copper foil 100—step (b), as shown in FIG1(b). Optionally, the protective layer 101 is a metal etching protective layer, and the material of the protective layer 101 is selected from one or more of nickel, titanium and tin. Optionally, the cavity sacrificial column 102 can be a copper column.

[0039] In some embodiments, step (b) specifically includes: applying a film on a surface of the copper foil 100, exposing and developing to form a first layer, then electroplating to form a protective layer 101, then electroplating to form a cavity sacrificial column 102, and finally removing the first layer to obtain the protective layer 101 and the cavity sacrificial column 102.

[0040] Then, the dielectric material is pressed to form a dielectric layer 201, and the dielectric layer 201 exposes the end surface of the cavity sacrificial column 102 - step (c), as shown in Figure 1 (c). It should be noted that the technical effect of exposing the end surface of the cavity sacrificial column 102 can be achieved by mechanical grinding.

[0041] Next, a circuit layer 203 is formed on the dielectric layer 201—step (d), as shown in FIG. 1( d ).

[0042] In some embodiments, step (d) specifically includes: making a metal seed layer 202 on the dielectric layer 201, then laminating, exposing, and developing to form a second layer, then electroplating, and finally removing the second layer and etching the metal seed layer 202 to form a circuit layer 203.

[0043] Then, the cavity sacrificial pillar 102 is etched away to form a through cavity—step (e), as shown in FIG. 1( e ).

[0044] In some embodiments, step (e) may include: (e1) laminating, exposing, and developing to form a photoresist layer exposing the cavity sacrificial column 102, then (e2) vacuum etching the cavity sacrificial column 102 to form a through cavity, and finally (e3) removing the photoresist layer. Here, the protective layer 101 can prevent the copper foil 100 from being etched, thereby protecting the copper foil 100.

[0045] Next, a solder resist layer 301 is made—step (f), as shown in FIG1(f). Here, the solder resist layer 301 exposes a portion of the circuit layer 203. It should be noted that the solder resist layer 301 may not overlap with the subsequent bonding pads 304 and the conductive pillars 302.

[0046] In some embodiments, step (f) includes: first performing solder mask silk screen printing, followed by exposure, development, nitrogen baking, and finally UV curing to form the solder mask layer 301.

[0047] Then, a stump 302 is formed on the circuit layer 203—step (g), as shown in FIG1(g). Optionally, the stump 302 is made by electroplating. Specifically, the making of the stump 302 may include laminating, exposing, developing to form a third layer, then electroplating, and finally removing the third layer.

[0048] Next, a surface treatment layer 303 is formed on the circuit layer 203 and the conductive pillar 302, and a bonding pad 304 is formed on the circuit layer 203 after the surface treatment—step (h), as shown in FIG. 1(h).

[0049] Optionally, the surface treatment layer 303 is formed by a nickel-palladium-gold process (ENEPIG).

[0050] Then, the back of the component 401 is mounted on the protective layer 101 that penetrates the cavity, and the terminal of the component 401 and the bonding pad 304 are wire-bonded (step (i), as shown in Figure 1 (i)). The component 401 is directly in contact with the copper foil 100, which is convenient for quickly taking away the heat generated by the component 401 during operation, thereby improving the heat dissipation performance of the embedded package structure.

[0051] In some embodiments, the component 401 may be mounted using adhesive materials such as epoxy resin, which is not limited in the present disclosure.

[0052] Optionally, by controlling the depth of the through cavity and the thickness of the bonding pad 304, the distance between the end face of the terminal of the component 401 and the end face of the bonding pad 304 and the copper foil 100 is made the same. In other words, the end face of the terminal of the component 401 and the end face of the bonding pad 304 are located at the same height, thereby reducing the inductance loss caused by the lead arc and improving the stability of the overall performance of the packaging structure.

[0053] The component 401 may be an active component (such as a transistor, an IC component, a logic circuit component, a power amplifier), or a passive component (such as a capacitor, an inductor, a resistor), which is not limited in the present disclosure.

[0054] Next, a plastic encapsulation material is used for encapsulation to form an encapsulation layer 501—step (j), as shown in FIG1(j). Here, the encapsulation layer is ground to expose the end surface of the conductive pillar 302.

[0055] Finally, a solder layer 402 is formed on the end surface of the conductive pillar 302 to serve as a pin of the package structure—step (k), as shown in FIG. 1( j).

[0056] like Figure 2 The encapsulation structure prepared by the above steps (a) to (k) is shown. Figure 2 As shown, the package structure includes a copper foil 100, a dielectric layer 201, a circuit layer 203, a bonding pad 304 (bond finger) and a component 401; wherein the dielectric layer 201 and the circuit layer 203 are sequentially arranged on the copper foil 100; the dielectric layer 201 includes a through cavity, and the component 401 is arranged on the copper foil 100 in the through cavity; the bonding pad 304 is arranged on the circuit layer 203, and the terminal of the component 401 is connected to the bonding pad 304 through a lead. Further, a conductive column 302 and a packaging layer 501 are also arranged on the circuit layer 203, and the conductive column 302 can be a copper column. The packaging layer 501 exposes the end face of the conductive column 302. Optionally, a solder layer 402 is arranged on the end face of the conductive column 302. Therefore, the conductive column 302 is used as the pin of the package structure, which can increase the layout flexibility of the package structure.

[0057] In some embodiments, a protective layer 101 is provided between the copper foil 100 and the component 401. The material of the protective layer 101 is metal. The protective layer 101 can protect the copper foil 100 from being etched during the manufacturing process of the packaging structure, and does not affect the heat dissipation of the component 401 through the copper foil 100.

[0058] In some embodiments, the distance between the end surface of the component 401 terminal and the end surface of the bonding pad 304 and the copper foil 100 is the same. In such a structure, the curvature of the lead between the component 401 terminal and the bonding pad 304 is small, thereby reducing the inductance loss caused by the lead arc and improving the stability of the overall performance of the packaging structure.

[0059] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0060] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A method for manufacturing a packaging structure, characterized in that: include: (a) providing a copper foil; (b) electroplating a cavity sacrificial column on the copper foil; (c) pressing a dielectric material to form a dielectric layer, wherein the dielectric layer exposes an end surface of the cavity sacrificial column; (d) forming a circuit layer on the dielectric layer; (e) etching away the cavity sacrificial column to form a through cavity; (f) forming a bonding pad on the circuit layer; (g) mounting the back side of the component on the copper foil in the through cavity, and wire bonding the terminal of the component to the bonding pad.

2. The method according to claim 1, characterized in that: The distance between the end surface of the terminal and the end surface of the bonding pad and the copper foil is the same.

3. The method according to claim 1, characterized in that: Before step (f), the method further includes: forming a conducting column on the circuit layer.

4. The method according to claim 3, characterized in that: Also includes: (h) forming a packaging layer, wherein the packaging layer exposes an end surface of the conductive pillar.

5. The method according to claim 4, characterized in that: Also includes: (i) A solder layer is formed on the end surface of the via.

6. The method according to claim 1, characterized in that: Before step (b), the method further includes: forming a protective layer on the copper foil; wherein the protective layer is located between the cavity sacrificial column and the copper foil.

7. The manufacturing method according to claim 6, characterized in that: The material of the protection layer includes one or more of nickel, titanium and tin.

8. The manufacturing method according to claim 1, characterized in that: Step (e) comprises: (e1) laminating, exposing, and developing to form a photoresist layer exposing the sacrificial column in the cavity; (e2) vacuum etching the cavity sacrificial column to form a through cavity; (e3) removing the photoresist layer.

9. The manufacturing method according to claim 1, characterized in that: Step (f) comprises: A surface treatment layer is formed on the circuit layer.

10. The manufacturing method according to claim 9, characterized in that: The surface treatment layer is formed by using a nickel-palladium-gold process.

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