Kyber and SM3 fused post quantum cryptography encryption system, method and device

Abstract

The invention provides a Kyber and SM3 fused post quantum cryptography encryption system, method and device. The control logic module controls the execution round number of SM3 in the Hash module according to the random number length required by the NTT module in different modes; the interception unit intercepts the effective length of each round of hash value; the filling unit fills the input message of each round of SM3; the Hash module determines the number of rounds required to be executed by the SM3 according to the lengths of the hash values required by different modes, and intercepts the effective length of each round of hash value; the NTT module is used for calculating polynomial multiplication in the Kyber algorithm; the NTT module comprises a butterfly unit and a control unit, the butterfly unit is used for calculation of modular addition, modular subtraction and modular reduction, and the control unit determines an operation mode of the NTT module; and the sampling module comprises a sampling rejection unit and a central binomial distribution sampling unit, the sampling rejection unit is used for sampling to obtain a public matrix, and the central binomial distribution sampling unit is used for sampling to obtain a noise vector. The scheme meets the safety standard of China and is reliable in safety.

Description

Technical Field

[0001] The present application relates to the technical field of post-quantum cryptography applications, and in particular to a post-quantum cryptography encryption system, method and device integrating Kyber and SM3. Background Art

[0002] With the rapid advancement of quantum computing technology, traditional cryptographic algorithms, especially those that rely on complex mathematical problems, are facing the risk of being cracked by quantum computers. The quantum algorithm proposed by Peter Shor, a professor in the Department of Mathematics at the Massachusetts Institute of Technology, can crack integer factorization and discrete logarithm problems in a short period of time, which shows that the traditional cryptographic system based on these classical number theory problems is no longer safe. The currently widely used public key cryptography system is built on these problems, so it also faces serious security challenges. PQC (Post Quantum Cryptography) is an emerging encryption method that aims to prevent the potential threat of quantum computers to existing cryptographic systems. It is particularly important to study post-quantum cryptography, which is a key measure to ensure information security and respond to the threat of quantum computers.

[0003] So far, NIST (National Institute of Standards and Technology) has successfully completed four rounds of rigorous selection processes for post-quantum cryptographic algorithms, an initiative aimed at addressing the potential threat posed by future quantum computing technology to existing cryptographic systems. In this process, NIST officially announced the first four standardized PQC algorithms, among which CRYSTALS-Kyber stood out with its unique advantages and became the only encryption algorithm selected in the batch, while the other three focused on signature functions, providing more diverse choices for the field of information security. The Kyber algorithm is a post-quantum encryption algorithm whose security is based on the MLWE problem (Module Learning With Errors).

[0004] With the in-depth research and rapid development of quantum computing technology around the world, the transformation of traditional cryptographic algorithms to PQC algorithms has become an irreversible trend in the field of information security. Against this background, many scientific research institutions and enterprises at home and abroad have devoted themselves to this transformation wave, and are committed to developing cryptographic algorithms that meet quantum security standards and have high performance.

[0005] In the selection of encryption algorithms, although CRYSTALS-Kyber performs well in terms of security, it is not the best choice to directly use it as the standard for my country's domestic encryption algorithms due to the dual considerations of national information security and actual application performance. Therefore, it is particularly important to conduct in-depth research and develop domestic encryption algorithms with independent intellectual property rights, which can not only enhance my country's independent innovation capabilities in the field of information security, but also better adapt to the needs of specific domestic application scenarios, and provide strong support for building a more secure and reliable information environment. Summary of the invention

[0006] This application shows a post-quantum cryptographic encryption system, method and device that integrates Kyber and SM3.

[0007] In the first aspect, the present application shows a post-quantum cryptographic encryption system integrating Kyber and SM3, and the filling unit comprises: a control logic module, an interception unit, a filling unit, a hash module, an NTT module, a sampling module, a storage module and an interface module; wherein,

[0008] The control logic module is used to transmit the internal instruction signal of the processor and control the reception of external data, and determine the number of rounds of the SM3 algorithm in the hash module according to the length of the hash value required in different modes when generating the Kyber key;

[0009] The interception unit is used to intercept the effective length of each round of hash value;

[0010] The padding unit is used to pad the input message of each round of the SM3 algorithm, and add a count value of a set length to the front end of the input message, where the size of the count value is the number of rounds executed by the SM3 algorithm;

[0011] The hash module is used to determine the number of rounds required to execute the SM3 algorithm according to the length of the hash value required for different modes when generating the Kyber key under the control of the control logic module, and the interception unit intercepts the effective length of each round of hash value to ensure that the output hash value is a random number that meets the required length;

[0012] The NTT module is used for calculating polynomial multiplication in the Kyber algorithm; the NTT module includes a butterfly unit and a control unit, the butterfly unit is used for calculating modular addition, modular subtraction and modular reduction, and the control unit is used to control the operation mode of the NTT module and control the butterfly unit to input the correct polynomial coefficients;

[0013] The sampling module includes a rejection sampling unit and a central binomial distribution sampling unit, wherein the rejection sampling unit is used to sample and obtain a public matrix, and the central binomial distribution sampling unit is used to sample and obtain a noise vector;

[0014] The storage module is used for data caching;

[0015] The interface module is used to provide an input and output interface.

[0016] Optionally, the hash module includes a padding grouping unit, a message expansion unit and an iterative compression unit; wherein,

[0017] The padding grouping unit is used to pad the input message so that its length becomes a multiple of 512;

[0018] The message expansion unit is used to divide the filled message into a plurality of groups according to each group of 512 bits, expand each group to generate an expansion result with 132 32-bit words as content, and iterate the expansion result;

[0019] The iterative compression unit is used to output a hash value of a required length based on the iterative result of the message expansion unit.

[0020] Optionally, the NTT module further includes:

[0021] Modular multiplier for pipelined K 2 -RED modular reduction algorithm implements modular multiplication operations in butterfly computing;

[0022] Ping-Pong RAM structure, used to store the input and output of the butterfly unit;

[0023] A plurality of ROMs are used to store rotation factors corresponding to the butterflies in the butterfly unit.

[0024] Optionally, the filling unit is specifically used to use an 8-bit number at the front end of the input message as a count value, and the size of the count value is the number of rounds executed by the SM3 algorithm.

[0025] Optionally, the operation mode of the filling unit includes encryption and decryption.

[0026] In a second aspect, the present application shows a post-quantum cryptographic encryption method integrating Kyber and SM3, wherein a padding unit is applied to the above system, and the method comprises:

[0027] In the key generation stage, the random number input from the outside is obtained and the random number seeds ρ and σ are obtained through the SM3 algorithm. ρ is used for rejection sampling to obtain the public matrix A, and σ is sampled through the central binomial distribution to obtain the noise vectors s and e.

[0028] Expression-based Calculate the post-quantum cryptographic key and generate the public key and private key;

[0029] In the encryption phase, the public key, message m and random vector are input. The public key is decoded to obtain the seed ρ and vector t. The seed ρ is used to obtain the public matrix A through rejection sampling. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution;

[0030] Through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext according to the vectors u and v;

[0031] In the decryption stage, the key and ciphertext are input, and the key and ciphertext are decoded and decompressed respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to achieve post-quantum cryptographic encryption and decryption.

[0032] Optionally, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation stage, the filling unit further includes:

[0033] The random number input from the outside is padded to make the length a multiple of 512.

[0034] Optionally, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ by using the SM3 algorithm in the key generation stage, the filling unit further includes:

[0035] Truncate the effective length of each round of hash value.

[0036] In a third aspect, the present application shows a post-quantum cryptographic encryption device integrating Kyber and SM3, the device comprising:

[0037] The key generation unit is used to obtain the random number input from the outside and obtain the random number seeds ρ and σ through the SM3 algorithm during the key generation phase. ρ is used to reject sampling to obtain the public matrix A. σ is sampled through the central binomial distribution to obtain the noise vectors s and e. Based on the expression Calculate the post-quantum cryptographic key and generate the public key and private key;

[0038] The encryption unit is used to input the public key, the message m and the random vector in the encryption stage. The public key is decoded to obtain the seed ρ and the vector t. The seed ρ is obtained by rejection sampling to obtain the public matrix A. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution; through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext according to the vectors u and v;

[0039] The decryption unit is used to input the key and ciphertext in the decryption stage, decode and decompress the key and ciphertext respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to achieve post-quantum cryptographic encryption and decryption.

[0040] In a fourth aspect, the present application illustrates an electronic device, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to execute the method described in any of the above aspects.

[0041] In a fifth aspect, the present application illustrates a non-temporary computer-readable storage medium, which, when instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute a method as described in any of the above aspects.

[0042] In a sixth aspect, the present application illustrates a computer program product. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device is enabled to execute the method described in any of the above aspects.

[0043] The technical solution provided by this application may have the following beneficial effects:

[0044] The post-quantum cryptographic encryption scheme that integrates the Kyber algorithm and the SM3 algorithm provided in this application can effectively avoid random number repetition by supplementing a count value of a preset length at the front end of the input message, and uses an interception unit to convert the random number into a one-to-one mapping true random number with the same length and no repetition corresponding to different modes. Therefore, compared with the traditional post-quantum cryptographic algorithm using a hash function based on the Keccak algorithm, it meets my country's security standards while ensuring security and performance, and the domestically produced SM3 is safer and more controllable;

[0045] By adding interception units and padding units in the hash module, the length of the input and output hash values ​​of the SM3 module can be flexibly controlled, ensuring that the required random numbers can be generated efficiently and accurately, greatly reducing the waste of hardware resources; the SM3 hardware implementation solution provided in this application greatly reduces resource consumption and reduces clock cycles; the NTT system based on radix-4 has better performance, higher frequency and greater throughput. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1A structural diagram of a post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application.

[0047] Figure 2 Schematic diagram of the working principle of the hash module in the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application.

[0048] Figure 3 A structural diagram of the NTT module in the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application.

[0049] Figure 4 A flowchart of the post-quantum cryptographic encryption method that integrates Kyber and SM3 provided in this application.

[0050] Figure 5 A structural diagram of a post-quantum cryptographic encryption device that integrates Kyber and SM3 provided in this application.

[0051] Figure 6 A block diagram of an electronic device provided in this application.

[0052] Figure 7 A block diagram of another electronic device provided by the present application. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0054] Post-Quantum Magic ("PQMagic" for short) is the first high-performance and secure post-quantum cryptographic algorithm library in China that supports FIPS203, 204 and 205 standards. As the first high-performance and secure post-quantum cryptographic algorithm library in China that fully supports FIPS203, 204 and 205 international standards, the PQMagic algorithm library not only demonstrates the cutting-edge nature of technological innovation, but also deeply integrates a profound understanding of localized security needs. This algorithm library is not only compatible with internationally advanced post-quantum cryptographic technology, but also exclusively supports the high-performance domestically developed algorithms-Aigis-Enc and Aigis-Sig (recognized by PKC 2020) and the latest version of SPHINCS-Alpha (debuted at the CRYPTO 2023 conference), which significantly improves the efficiency and security of cryptographic operations.

[0055] The following first describes in detail the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided by this application.

[0056] Embodiment 1

[0057] Reference Figure 1 , is a structural diagram of a post-quantum cryptographic encryption system integrating Kyber and SM3 provided by the present application, wherein the system comprises: a control logic module 10, an interception unit 20, a filling unit 30, a hash module 40, an NTT module 50, a sampling module 60, a storage module 70 and an interface module ( Figure 1 not shown).

[0058] The control logic module 10 is used to transmit the internal instruction signal of the processor and control the reception of external data, and determine the number of rounds of the SM3 algorithm in the hash module according to the length of the hash value required in different modes when generating the Kyber key.

[0059] The interception unit 20 is used to intercept the effective length of each round of hash value.

[0060] The padding unit 30 is used to pad the input message of each round of the SM3 algorithm, and add a count value of a set length to the front end of the input message. The size of the count value is the number of rounds executed by the SM3 algorithm, so that the input message of each round is different and the output hash value is also different.

[0061] The hash module 40 provides data integrity verification and security authentication based on the improved SM3 algorithm, and is used to determine the number of rounds required to execute the SM3 algorithm according to the length of the hash value required for different modes when generating the Kyber key under the control of the control logic module 10, and the effective length of the hash value of each round is intercepted by the interception unit 20 to ensure that the output hash value is a random number that meets the required length.

[0062] The NTT module 50 is used for the calculation of polynomial multiplication in the Kyber algorithm; the NTT module 50 includes a butterfly unit and a control unit, the butterfly unit is used for the calculation of modular addition, modular subtraction and modular reduction, and the control unit is used to control the operation mode of the NTT module 50, and control the butterfly unit to input the correct polynomial coefficients. It should be noted that NTT (Number-Theoretic Transform) is a generalization of the classic DFT (Discrete Fourier Transform) of a finite field. Through a lot of work, NTT is basically able to perform fast convolution on integer sequences and ensure that there is no rounding error. Convolution is very useful when multiplying large numbers or long polynomials, and NTT is faster than other methods such as Karatsuba multiplication in an asymptotic sense.

[0063] The sampling module 60 includes a rejection sampling unit and a central binomial distribution sampling unit. The rejection sampling unit is used to sample to obtain a public matrix, and the central binomial distribution sampling unit is used to sample to obtain a noise vector.

[0064] The storage module 70 is used for data caching.

[0065] The interface module is used to provide an input and output interface.

[0066] In one embodiment, the hash module 40 includes a padding grouping unit, a message expansion unit, and an iterative compression unit. Figure 2 As shown, it is a schematic diagram of the working principle of the hash module in the post-quantum cryptographic encryption system integrating Kyber and SM3 provided by the present application, wherein the padding grouping unit is used to pad the input message so that its length becomes a multiple of 512; the message expansion unit is used to divide the padded message into several groups according to each group of 512 bits, expand each group to generate an expansion result with 132 32-bit words as the content, and iterate the expansion result; the iterative compression unit is used to output a hash value of the required length based on the iterative result of the message expansion unit.

[0067] In a specific implementation, the input message may be padded as follows: a "1" bit is added to the end of the message, then a certain number of "0" bits are added, and finally a 64-bit message length is added.

[0068] In one case, see Figure 3 , is a structural diagram of the NTT module in the post-quantum cryptographic encryption system integrating Kyber and SM3 provided by the present application, wherein the NTT module 50 further includes: a modular multiplier for 2 -RED modular reduction algorithm realizes modular multiplication operation in butterfly calculation; Ping-Pong RAM structure is used to store the input and output of butterfly unit; a certain number of ROMs are used to store the rotation factors corresponding to the butterfly in the butterfly unit.

[0069] In one case, the filling unit 30 is specifically used to use an 8-bit number at the front end of the input message as a count value, and the size of the count value is the number of rounds executed by the SM3 algorithm.

[0070] In one case, the operation mode of the padding unit 30 includes encryption and decryption.

[0071] The post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application is based on the PQmagic design concept and proposes a modified Kyber hardware structure. This structure uses the national secret algorithm SM3 algorithm to replace the hash function SHA-3 algorithm in Kyber on the basis of the Kyber algorithm proposed by NIST, showing better performance. Ultimately, it greatly saves the resource consumption of the entire Kyber hardware structure and improves the overall performance.

[0072] The post-quantum cryptographic encryption scheme provided in the present application, which integrates the Kyber algorithm and the SM3 algorithm, can effectively avoid the repetition of random numbers by supplementing a count value of a preset length at the front end of the input message, and uses an interception unit to convert the random numbers into true random numbers with the same length and non-repetitive one-to-one mapping corresponding to different patterns. Therefore, compared with the traditional post-quantum cryptographic algorithm using a hash function based on the Keccak algorithm, it meets my country's security standards while ensuring security and performance, and the domestically produced SM3 is safer and more controllable.

[0073] It should be noted that the SM3 algorithm in the hash module is mainly used to provide data integrity verification and security authentication. The message digest value it outputs is 256 bits (32 bytes) long, the message group length is 512 bits, and it can resist various known attack methods, including collision attacks, pre-image attacks, etc. It includes a message filling unit, a message expansion module, and an iterative compression module. Compared with the original keccak-based hash function, the SM3 algorithm processes a smaller data length in each round of iteration, but requires more rounds of iterations, so it can reduce the consumption of hardware resources. Compared with the traditional SM3 module, because the length of its output hash value is fixed, Kyber needs to use a variety of random numbers of different lengths.

[0074] By adding interception units and padding units in the hash module, the length of the input and output hash values ​​of the SM3 module can be flexibly controlled, ensuring that the required random numbers can be generated efficiently and accurately, greatly reducing the waste of hardware resources; the SM3 hardware implementation solution provided in this application greatly reduces resource consumption and reduces clock cycles; the NTT system based on radix-4 has better performance, higher frequency and greater throughput.

[0075] In order to facilitate the clear reading of this application document, the working principles of the hash module and the NTT module are explained in detail here. Figure 2 and Figure 3 .

[0076] Part 1: How the hash module works, see Figure 2 .

[0077] The workflow of the hash module based on SM3 mainly includes three parts: padding grouping, message expansion and iterative compression.

[0078] (1) Padding group: pad the input message M so that its length becomes a multiple of 512. The padding method is to add a "1" bit at the end of the message, then add a certain number of "0" bits, and finally add a 64-bit message length. The padded message is called M'.

[0079] (2) Message expansion: The padded message is called M′ and is divided into several groups of 512 bits each:

[0080] M′=B (0) B (1) …B (n-1)

[0081] Each packet B(i) is then expanded to generate 132 32-bit words:

[0082] W0,W1,W2,…,W 67 ,…,W0′,W1′,…,W 63 '

[0083] Next, iterate M′ in the following way:

[0084] FORj=16TO 67

[0085]

[0086] END FOR

[0087] FORj=0TO 63

[0088]

[0089] END FOR

[0090] (3) Iterative compression:

[0091] Let A, B, C, D, E, F, G, H be word registers, SS1, SS2, TT1, TT2 be intermediate variables, and the compression function be V (i+1) =CF(V (i) , B (i) ), 0≤i≤n-1.

[0092] The calculation process is described as follows:

[0093]

[0094]

[0095] The final output is a 256-bit hash value V(n).

[0096] It should be noted that the relevant operation symbols in step (2) message expansion and (3) iterative compression can be found in existing assembly languages ​​such as microcontrollers, FPGAs and other existing technologies, and will not be repeated here.

[0097] In the analysis of the above algorithm, the message expansion function and compression function of the SM3 algorithm need to be executed 64 rounds. This design executes the message expansion function and the compression function in parallel. In a single round of calculation, the loop expansion method is used to merge multiple single-step calculations to further improve the throughput. The algorithm operation logic is optimized to reduce the logic depth, shorten the critical path, and then increase the clock frequency of the algorithm to optimize the algorithm performance; at the same time, by reusing logic resources, the resource consumption of the algorithm is further reduced. Although the above merging operation will increase the delay of the combinational logic and reduce the maximum operating frequency of the system, this method can greatly reduce the number of cycles consumed and increase the throughput of the system.

[0098] Compared with the traditional SM3 module, this design innovatively adds interception and padding modules to meet the requirements of different lengths of random numbers for algorithms such as Kyber. The hash value length of the traditional SM3 output is fixed, but in this design, the external control logic flexibly controls the number of rounds executed by SM3 according to the required random number length in different modes. The interception module is responsible for extracting the valid part from the hash value of each round of SM3 to ensure that the output random number accurately matches the required length.

[0099] The padding module adds an 8-bit count value to the front of each round of input messages, indicating the current round number. This design innovation ensures that the input messages of each round are different, and thus the output hash values ​​are also different. This mechanism avoids the duplication problem that may occur when the traditional SM3 module is running in multiple rounds, and improves the diversity and security of random number generation.

[0100] This improvement not only enhances the flexibility of SM3, enabling it to better adapt to different application scenarios, but also ensures efficient and accurate random number generation through interception and padding mechanisms, greatly reducing the waste of hardware resources. This innovative application provides new possibilities for promoting the use of SM3 in a variety of encryption algorithms.

[0101] Part 2: Working principle of NTT module, see Figure 3 .

[0102] The radix-4NTT-based polynomial multiplier design incorporates several key components, including a novel butterfly unit, a K-based 2-RED modular multiplier, Ping-Pong RAM structure (used to store the input and output of the butterfly unit), five ROMs (read-only memories for storing rotation factors), and a sophisticated control unit for generating the necessary control signals. In particular, compared with the traditional design, the butterfly unit used in this design successfully eliminates the delay of modular multiplication calculation and realizes the full parallelization of all modular multiplication operations in the butterfly calculation. Given that the modular multiplication operation is the most time-consuming part of the calculation, reducing the number of modular multiplications in each butterfly calculation by half significantly reduces the overall delay of the butterfly unit. For K 2 -RED modular multiplier, this paper adopts the correction value selector method, these correction values ​​are pre-calculated and stored, can be stored in a lookup table (LUT) or directly integrated into the data path, and intelligent selection is performed based on the sign bit. Compared with traditional modular multiplication algorithms such as Montgomery modular reduction and Barrett modular reduction, K 2 -RED modular multiplier shows better performance. The built-in address generator of the control unit can efficiently manage the input signal and read and write addresses to ensure the smooth operation of ping-pong storage. At the same time, the control unit is also responsible for determining the operation mode including encryption and decryption, and further, it can also cover multiple modes such as NTT, INTT and PWM.

[0103] In the implementation of radix-4NTT, input data is loaded from memory for calculation at each stage, and then the intermediate results are written back to memory. This process is iterated until the entire NTT process is completed. The control unit is responsible for generating control signals that manage various aspects of the NTT system, including address generation logic, butterfly unit control signals, and read and write signals. The address generator is responsible for generating appropriate polynomial coefficient sequence numbers to ensure a conflict-free memory mapping scheme.

[0104] After introducing the application After integrating the post-quantum cryptographic encryption system of Kyber and SM3, the post-quantum cryptographic encryption method integrating Kyber and SM3 applied to this system is explained.

[0105] Embodiment 2

[0106] See also Figure 4 , is a flow chart of a post-quantum cryptographic encryption method integrating Kyber and SM3 provided by the present application. The present application shows a post-quantum cryptographic encryption method integrating Kyber and SM3. The filling unit is applied to Figure 1 The system, the method comprises:

[0107] Step S101: In the key generation stage, obtain the random number input from the outside and obtain the random number seeds ρ and σ through the SM3 algorithm. ρ is used to reject sampling to obtain the public matrix A, and σ is sampled through the central binomial distribution to obtain the noise vectors s and e.

[0108] Step S102: Based on the expression Calculate the post-quantum cryptographic key and generate the public key and private key.

[0109] Step S103: In the encryption phase, a public key, a message m, and a random vector are input. The public key is decoded to obtain a seed ρ and a vector t. The seed ρ is obtained by rejection sampling to obtain a public matrix A. T , the random vector r is input into the sampling module and the vectors r, e1 and e2 are obtained through central binomial distribution sampling.

[0110] Step S104: Through number theory transformation NTT and its inverse transformation INTT, and according to the expression Vectors u and v are obtained by calculation, and ciphertext is generated according to the vectors u and v.

[0111] Step S105: In the decryption phase, the key and ciphertext are input, and the key and ciphertext are decoded and decompressed to obtain the vector s T and u, v; the number theory transformation NTT and its inverse transformation INTT are calculated to obtain Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to achieve post-quantum cryptographic encryption and decryption.

[0112] In one case, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ by the SM3 algorithm in step S101, the filling unit further includes:

[0113] The random number input from the outside is padded to make the length a multiple of 512.

[0114] In one case, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ by the SM3 algorithm in step S101, the filling unit further includes:

[0115] Truncate the effective length of each round of hash value.

[0116] As can be seen from the above, the post-quantum cryptography implementation method that fuses Kyber and SM3 demonstrates unique advantages compared to traditional post-quantum cryptography algorithms that rely on hash functions based on the Keccak algorithm, while ensuring equivalent security and performance. In particular, the domestic SM3 hash function not only complies with national security standards but also performs excellently in terms of security and controllability, providing a more solid and reliable guarantee for national information security. Based on the current SM3 algorithm, this design innovates on the traditional SM3 module by adding an interception and padding unit to meet the requirements of algorithms such as Kyber for random numbers of different lengths. The number of rounds of SM3 execution is determined by external control logic. The interception unit ensures that the length of the output random number precisely matches the requirements, and the padding unit adds an 8-bit count value before the input message to ensure the uniqueness of each round of hash value. This design improves the flexibility of SM3 and the efficiency of random number generation, reduces the consumption of hardware resources, and enhances the security and applicability of the system. The performance of the post-quantum cryptography scheme of the present invention implemented on the FPGA platform significantly reduces the resource consumption compared to the Kyber scheme proposed by NIST without sacrificing speed.

[0117] It should be noted that for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should be aware that this application is not limited by the described action sequence because, according to this application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all optional embodiments, and the actions involved are not necessarily essential to this application.

[0118] Corresponding to the post-quantum cryptography encryption method that fuses Kyber and SM3 of this application, this application provides a post-quantum cryptography encryption device that fuses Kyber and SM3.

[0119] Embodiment 3

[0120] As Figure 5 shown, it is a structural diagram of a post-quantum cryptography encryption device that fuses Kyber and SM3 provided by this application. The device includes:

[0121] A key generation unit 310, which is used in the key generation stage to obtain externally input random numbers and obtain random number seeds ρ and σ through the SM3 algorithm. ρ is used to reject samples to obtain a public matrix A, σ samples a noise vector s and e through a central binomial distribution, and calculates a post-quantum cryptography key based on the expression t = ⋯°仆e, and generates a public key and a private key;

[0122] The encryption unit 320 is used to input a public key, a message m, and a random vector in the encryption phase. The public key is decoded to obtain a seed ρ and a vector t. The seed ρ is rejected and the public matrix AT is obtained. The random vector r is input to the sampling module and the vector r is obtained by sampling the central binomial distribution. e1 and e2; by number theory transformation NTT and its inverse transformation INTT, and according to the expression u = stop servant e1, v = + e2 + m, vectors u and v are calculated, and ciphertext is generated according to the vectors u and v;

[0123] The decryption unit 330 is used to input the key and ciphertext in the decryption stage, decode and decompress the key and ciphertext respectively to obtain vectors sT and u, v; calculate su through number theory transformation NTT and its inverse transformation INTT, then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to realize post-quantum cryptographic encryption and decryption.

[0124] In one case, the device further includes a padding unit for padding the externally input random number to a multiple of 512 before the key generation unit 310 obtains the externally input random number and obtains the random number seeds ρ and σ through the SM3 algorithm.

[0125] In one case, the device further includes a truncation unit for truncation of the effective length of each round of hash values ​​before the key generation unit 310 obtains the random number input from the outside and obtains the random number seeds ρ and σ through the SM3 algorithm.

[0126] From the above, it can be seen that the post-quantum cryptographic encryption scheme that integrates the Kyber algorithm and the SM3 algorithm provided by the present application can effectively avoid random number repetition by supplementing a count value of a preset length at the front end of the input message, and uses an interception unit to convert the random number into a one-to-one mapping true random number with the same length and no repetition corresponding to different modes. Therefore, compared with the traditional post-quantum cryptographic algorithm using a hash function based on the Keccak algorithm, it meets my country's security standards while ensuring security and performance, and the domestically produced SM3 is safer and more controllable;

[0127] By adding interception units and padding units in the hash module, the length of the input and output hash values ​​of the SM3 module can be flexibly controlled, ensuring that the required random numbers can be generated efficiently and accurately, greatly reducing the waste of hardware resources; the SM3 hardware implementation solution provided in this application greatly reduces resource consumption and reduces clock cycles; the NTT system based on radix-4 has better performance, higher frequency and greater throughput.

[0128] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0129] Embodiment 4

[0130] Optionally, an embodiment of the present application further provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, the various processes of the above-mentioned method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0131] The embodiment of the present application also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, each process of the above method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it is not repeated here. The computer-readable storage medium is, for example, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0132] Figure 6 The present application provides a block diagram of an electronic device 800. For example, the electronic device 800 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0133] Reference Figure 6 , the electronic device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output (I / O) interface 812 , a sensor component 814 , and a communication component 816 .

[0134] The processing component 802 generally controls the overall operation of the electronic device 800, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the above method. In addition, the processing component 802 may include one or more modules to facilitate the interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate the interaction between the multimedia component 808 and the processing component 802.

[0135] The memory 804 is configured to store various types of data to support operations on the device 800. Examples of such data include instructions for any application or method operating on the electronic device 800, contact data, phone book data, messages, images, videos, etc. The memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0136] The power supply component 806 provides power to the various components of the electronic device 800. The power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 800.

[0137] The multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and the rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0138] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), and when the electronic device 800 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 804 or sent via the communication component 816. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0139] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: home button, volume button, start button, and lock button.

[0140] The sensor assembly 814 includes one or more sensors for providing various aspects of status assessment for the electronic device 800. For example, the sensor assembly 814 can detect the open / closed state of the device 800, the relative positioning of components, such as the display and keypad of the electronic device 800, and the sensor assembly 814 can also detect the position change of the electronic device 800 or a component of the electronic device 800, the presence or absence of contact between the user and the electronic device 800, the orientation or acceleration / deceleration of the electronic device 800, and the temperature change of the electronic device 800. The sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 814 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0141] The communication component 816 is configured to facilitate wired or wireless communication between the electronic device 800 and other devices. The electronic device 800 can access a wireless network based on a communication standard, such as WiFi, a carrier network (such as 2G, 3G, 4G or 5G), or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast operation information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0142] In an exemplary embodiment, the electronic device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0143] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, and the instructions can be executed by a processor 820 of an electronic device 800 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0144] Embodiment 5

[0145] Figure 7 This is a block diagram of another electronic device 1900 provided in the present application. For example, the electronic device 1900 may be provided as a server.

[0146] Reference Figure 7 , the electronic device 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0147] The electronic device 1900 may also include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output (I / O) interface 1958. The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeB SD™ or the like.

[0148] Embodiment 6

[0149] In a sixth aspect, the present application illustrates a computer program product. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device is enabled to execute the method described in any of the above aspects.

[0150] It should be noted that, in this article, the terms "comprise", "include" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0151] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0152] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

[0153] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the present application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0154] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0155] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0156] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0157] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0158] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard drives, ROM, RAM, magnetic disks, or optical disks.

[0159] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A post-quantum cryptographic encryption system integrating Kyber and SM3, characterized in that: The system includes: a control logic module, an interception unit, a filling unit, a hash module, an NTT module, a sampling module, a storage module and an interface module; wherein, The control logic module is used to transmit the internal instruction signal of the processor and control the reception of external data, and determine the number of rounds of the SM3 algorithm in the hash module according to the length of the hash value required in different modes when generating the Kyber key; The interception unit is used to intercept the effective length of each round of hash value; The padding unit is used to pad the input message of each round of the SM3 algorithm, and add a count value of a set length to the front end of the input message, where the size of the count value is the number of rounds executed by the SM3 algorithm; The hash module is used to determine the number of rounds required to execute the SM3 algorithm according to the length of the hash value required for different modes when generating the Kyber key under the control of the control logic module, and the interception unit intercepts the effective length of each round of hash value to ensure that the output hash value is a random number that meets the required length; The NTT module is used for calculating polynomial multiplication in the Kyber algorithm; the NTT module includes a butterfly unit and a control unit, the butterfly unit is used for calculating modular addition, modular subtraction and modular reduction, and the control unit is used to control the operation mode of the NTT module and control the butterfly unit to input the correct polynomial coefficients; The sampling module includes a rejection sampling unit and a central binomial distribution sampling unit, wherein the rejection sampling unit is used to sample and obtain a public matrix, and the central binomial distribution sampling unit is used to sample and obtain a noise vector; The storage module is used for data caching; The interface module is used to provide an input and output interface.

2. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The hash module includes a filling grouping unit, a message expansion unit and an iterative compression unit; wherein, The padding grouping unit is used to pad the input message so that its length becomes a multiple of 512; The message expansion unit is used to divide the filled message into a plurality of groups according to each group of 512 bits, expand each group to generate an expansion result with 132 32-bit words as content, and iterate the expansion result; The iterative compression unit is used to output a hash value of a required length based on the iterative result of the message expansion unit.

3. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The NTT module further includes: Modular multiplier for pipelined K 2 -RED modular reduction algorithm implements modular multiplication operations in butterfly computing; Ping-Pong RAM structure, used to store the input and output of the butterfly unit; A plurality of ROMs are used to store rotation factors corresponding to the butterflies in the butterfly unit.

4. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The filling unit is specifically used to use an 8-bit number at the front end of the input message as a count value, and the size of the count value is the number of rounds executed by the SM3 algorithm.

5. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The operating modes include encryption and decryption.

6. A post-quantum cryptographic encryption method integrating Kyber and SM3, characterized in that: Applied to the system according to any one of claims 1 to 5, the method comprises: In the key generation stage, the random number input from the outside is obtained and the random number seeds ρ and σ are obtained through the SM3 algorithm. ρ is used for rejection sampling to obtain the public matrix A, and σ is sampled through the central binomial distribution to obtain the noise vectors s and e. Based on the expression t=A°serve, the post-quantum cryptographic key is calculated to generate a public key and a private key; In the encryption phase, the public key, message m and random vector are input. The public key is decoded to obtain the seed ρ and vector t. The seed ρ is used to obtain the public matrix A through rejection sampling. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution; Through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext according to the vectors u and v; In the decryption stage, the key and ciphertext are input, and the key and ciphertext are decoded and decompressed respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to achieve post-quantum cryptographic encryption and decryption.

7. The post-quantum cryptographic encryption method integrating Kyber and SM3 according to claim 6, characterized in that: Before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation stage, the following steps are also included: The random number input from the outside is padded to make the length a multiple of 512.

8. The post-quantum cryptographic encryption method integrating Kyber and SM3 according to claim 6, characterized in that: Before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation stage, the following steps are also included: Truncate the effective length of each round of hash value.

9. A post-quantum cryptographic encryption device integrating Kyber and SM3, characterized in that: The device comprises: The key generation unit is used to obtain the random number input from the outside and obtain the random number seeds ρ and σ through the SM3 algorithm during the key generation phase. ρ is used to reject sampling to obtain the public matrix A. σ is sampled through the central binomial distribution to obtain the noise vectors s and e. Based on the expression Calculate the post-quantum cryptographic key and generate the public key and private key; The encryption unit is used to input the public key, the message m and the random vector in the encryption stage. The public key is decoded to obtain the seed ρ and the vector t. The seed ρ is obtained by rejection sampling to obtain the public matrix A. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution; through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext according to the vectors u and v; The decryption unit is used to input the key and ciphertext in the decryption stage, decode and decompress the key and ciphertext respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to achieve post-quantum cryptographic encryption and decryption.

10. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the computer program implements the method according to any one of claims 6 to 8 when executed by the processor.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 8 to 8 is implemented.

12. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device implements the method as claimed in any one of claims 6 to 8.

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