Underground pipeline path detection equipment

Abstract

This application belongs to the field of pipeline detection technology, and particularly relates to an underground pipeline path detection device, including a transmitting device and a receiving device. The transmitting device includes a processing module, a full-bridge drive circuit, and a boost circuit. The full-bridge drive circuit receives SVPWM signals and rectifies them into sinusoidal signals. The boost circuit boosts the sinusoidal signals to generate an output signal and couples the output signal to the pipeline under test. The receiving device detects electromagnetic wave changes in the pipeline under test and calculates the path and depth of the pipeline. The transmitting device also includes a sampling circuit, which samples the current and voltage signals of the output signal and outputs them to the processing module. The processing module adjusts the SVPWM signal based on the current and voltage signals of the output signal. This application, by setting a sampling circuit in the transmitting device to sample the current and voltage signals of the output signal and feeding them back to the processing module, allows the processing module to adjust the SVPWM signal based on these feedback signals, ensuring that the SVPWM signal is at its optimal output power.

Description

Technical Field

[0001] This application relates to the field of underground pipeline detection technology, and in particular to an underground pipeline path detection device. Background Technology

[0002] With the acceleration of urbanization, the application of underground pipelines and cables (including power cables, communication optical cables, water supply pipelines, etc.) in urban construction is becoming increasingly widespread. The underground environment is complex, with interference factors such as geological structures, groundwater systems, and existing building foundations. Because pipelines are buried deep underground, they are difficult to observe directly, posing significant challenges to maintenance and management. Traditional detection methods, such as detectors based on electromagnetic induction, suffer from inaccurate positioning and are easily affected by surrounding metal structures and geomagnetic variations, leading to errors in the detection results. Furthermore, these detectors are complex to operate, and the data acquisition, analysis, and interpretation processes are time-consuming and labor-intensive, making them unsuitable for modern pipeline management needs.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] In view of at least one of the above technical problems, this application provides an underground pipeline path detection device.

[0005] This application provides an underground pipeline path detection device, including: a transmitting device and a receiving device;

[0006] The transmitting device includes: a processing module, a full-bridge drive circuit, and a boost circuit. The processing module is used to output SVPWM signals. The full-bridge drive circuit receives SVPWM signals and rectifies them into sine wave signals. The boost circuit boosts the sine wave signals to generate output signals and couples the output signals to the pipeline under test.

[0007] The receiving device detects changes in electromagnetic waves in the pipeline under test and calculates the path and depth of the pipeline under test.

[0008] The transmitting device also includes a sampling circuit, which samples the current signal and voltage signal of the output signal and outputs them to the processing module. The processing module adjusts the SVPWM signal according to the current signal and voltage signal of the output signal to make the SVPWM signal at the optimal output power.

[0009] One of the above technical solutions has at least one of the following advantages or beneficial effects: This application sets up a sampling circuit in the transmitting device to sample the current and voltage signals of the output signal and feeds them back to the processing module. The processing module adjusts the SVPWM signal according to these feedback signals to make the SVPWM signal at the optimal output power. This closed-loop power control mechanism can ensure that the transmitting device always operates at the optimal power, avoiding inaccurate detection or energy waste caused by excessive or insufficient power.

[0010] In some possible implementations, the processing module includes: a PID modulation unit, a power factor calculation unit, and a signal output unit. The PID modulation unit acquires the current of the output signal and modulates the current of the output signal into a target current. The PID modulation unit acquires the voltage of the output signal and modulates the voltage of the output signal into a target voltage. The power factor calculation unit calculates the power factor based on the target current and the target voltage. The signal output unit determines the optimal output power based on the power factor and outputs an SVPWM signal.

[0011] In some possible implementations, when the power factor is 1, the signal output unit calculates the target power based on the target current and target voltage, and the target power is the optimal output power;

[0012] When the power factor is not 1, the signal output unit recalculates the output frequency and calculates the optimal output power based on that output frequency.

[0013] In some possible implementations, the PID modulation unit modulates the current and voltage of the output signal based on the PID algorithm.

[0014] In some possible implementations, the full-bridge drive circuit includes: a first drive circuit, a first rectifier circuit, a second drive circuit, and a second rectifier circuit. The first terminal of the first drive circuit is connected to the processing module, the first terminal of the first rectifier circuit is connected to the second terminal of the first drive circuit, the second terminal of the first rectifier circuit is connected to the boost circuit, the first terminal of the second drive circuit is connected to the processing module, the first terminal of the second rectifier circuit is connected to the second terminal of the second drive circuit, and the second terminal of the second rectifier circuit is connected to the boost circuit.

[0015] In some possible implementations, the first driving circuit includes: a first field-effect transistor and a second field-effect transistor, the gate of the first field-effect transistor and the gate of the second field-effect transistor are connected to the processing module, the source of the first field-effect transistor and the drain of the second field-effect transistor are connected to the first rectifier circuit, the drain of the first field-effect transistor is connected to a 5V power supply, and the source of the second field-effect transistor is grounded.

[0016] The second driving circuit includes a third field-effect transistor and a fourth field-effect transistor. The gates of the third and fourth field-effect transistors are connected to the processing module. The source and drain of the third and fourth field-effect transistors are connected to the second rectifier circuit. The drain of the third field-effect transistor is connected to a 5V power supply, and the source of the fourth field-effect transistor is grounded.

[0017] In some possible implementations, the first rectifier circuit includes: a first inductor and a first capacitor, the first terminal of the first inductor being connected to the gate of the first field-effect transistor and the gate of the second field-effect transistor, the second terminal of the first inductor being connected to the boost circuit, the first terminal of the first capacitor being connected to the second terminal of the first inductor, and the second terminal of the first capacitor being grounded.

[0018] The second rectifier circuit includes: a second inductor and a second capacitor. The first end of the second inductor is connected to the gate of the third field-effect transistor and the gate of the fourth field-effect transistor. The second end of the second inductor is connected to the boost circuit. The first end of the second capacitor is connected to the second end of the second inductor. The second end of the second capacitor is grounded.

[0019] In some possible implementations, the boost circuit includes a boost converter and a sampling resistor. The boost converter is used to boost the sine wave signal by 8 times. One end of the boost converter is connected to the first rectifier circuit and the second rectifier circuit respectively, and the other end of the boost converter is coupled to the pipeline under test through the sampling resistor.

[0020] In some possible implementations, the sampling circuit includes: a first amplifier circuit;

[0021] The first amplifier circuit includes: a first operational amplifier, a thirteenth resistor, a first resistor, a second resistor, and a third resistor. The first terminal of the first operational amplifier is connected to the first terminal of the sampling resistor through the thirteenth resistor. The second terminal of the first operational amplifier is connected to the second terminal of the sampling resistor through the first resistor. The third terminal of the first operational amplifier is connected to the second terminal of the first operational amplifier through the second resistor. The third terminal of the first operational amplifier is connected to the processing module. One end of the third resistor is connected to the first terminal of the first operational amplifier, and the other end of the third resistor is grounded.

[0022] In some possible implementations, the sampling circuit includes: a second amplifier circuit;

[0023] The second amplifier circuit includes: a second operational amplifier, a tenth resistor, a ninth resistor, an eleventh resistor, and a twelfth resistor. The first terminal of the second operational amplifier is connected to one end of the sampling resistor through the tenth resistor. The second terminal of the second operational amplifier is grounded through the ninth resistor. The third terminal of the second operational amplifier is connected to the second terminal of the second operational amplifier through the eleventh resistor. The third terminal of the second operational amplifier is connected to the processing module. One end of the twelfth resistor is connected to the first terminal of the second operational amplifier, and the other end of the twelfth resistor is grounded.

[0024] The present application will be further described below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 A diagram illustrating the usage status of an underground pipeline path detection device provided in an embodiment of this application;

[0027] Figure 2 for Figure 1 A schematic diagram of the structure of the launch device;

[0028] Figure 3 for Figure 2 A schematic diagram of the processing module;

[0029] Figure 4 for Figure 1 A schematic diagram of the structure of the launch device;

[0030] Figure 5 for Figure 4 Circuit diagram of the central transmitting device; Detailed Implementation

[0031] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0032] Figure 1 A diagram showing the usage status of the underground pipeline path detection equipment provided in this application embodiment.

[0033] like Figure 1 As shown, this embodiment provides an underground pipeline path detection device, including a transmitting device 100 and a receiving device 200. During operation, the transmitting device 100 is clamped onto the pipeline to be detected and activated. The transmitting device 100 couples an output signal to the pipeline. On the ground, the receiving device 200 is walked around. The receiving device 200 detects changes in the electromagnetic waves of the pipeline to be detected, thereby calculating the path and depth of the pipeline.

[0034] The following is a description of the specific structure of underground pipeline path detection equipment.

[0035] Figure 2 for Figure 1 A schematic diagram of the structure of the launch device 100.

[0036] like Figure 2 As shown, the transmitting device 100 includes: a processing module 110, a full-bridge drive circuit 120, and a boost circuit 130. The processing module 110 is used to output an SVPWM signal. The full-bridge drive circuit 120 receives the SVPWM signal and rectifies it into a sine wave signal. The boost circuit 130 boosts the sine wave signal to generate an output signal and couples the output signal to the pipeline under test. The receiving device 200 detects the electromagnetic wave changes of the pipeline under test and calculates the path and depth of the pipeline under test. The transmitting device 100 also includes: a sampling circuit 140. The sampling circuit 140 samples the current signal and voltage signal of the output signal and outputs them to the processing module 110. The processing module 110 adjusts the SVPWM signal according to the current signal and voltage signal of the output signal to make the SVPWM signal at the optimal output power.

[0037] This application incorporates a sampling circuit 140 within the transmitting device 100 to sample the current and voltage signals of the output signal and feeds them back to the processing module 110. The processing module 110 adjusts the SVPWM signal based on these feedback signals, ensuring that the SVPWM signal operates at its optimal output power. This closed-loop power control mechanism ensures that the transmitting device 100 always operates at optimal power, avoiding inaccurate detection or energy waste caused by excessively high or low power.

[0038] Furthermore, since the pipelines to be detected are typically located 5m to 10cm underground in urban or suburban areas, the receiving device 200 on the ground can only sense very weak electromagnetic changes. Therefore, to accurately detect the pipeline path and depth, the electromagnetic field characteristics generated by the transmitting device 100 exciting the pipeline need to be sufficiently obvious and have a sufficiently large amplitude. SVPWM modulation technology can generate arbitrary waveform signals and has advantages such as a wide modulation frequency range, high frequency accuracy, and high efficiency, making it very suitable as an excitation source for underground pipeline detectors. The basic principle of SVPWM modulation is the principle of area equivalence, that is, when narrow pulses with equal impulse but different shapes are applied to an inertial element, their effects are basically the same. In other words, through a series of narrow pulse signals with different shapes, the integral of the corresponding time is equal (equal area), and the final effect is the same. Therefore, SVPWM is to input a pulse sequence with equal amplitude to equivalently represent a sine wave, so the output pulse time width basically changes according to a sine law; specifically, the processing module 110 calculates the required sine wave and then calculates the modulation pulse width according to the principle of area equivalence, thereby achieving the effect of digital modulation.

[0039] In this embodiment, the receiving device 200 may include, but is not limited to, a sensor module. The sensor module employs an antenna array composed of three high-sensitivity resonant coils, where one tangential antenna is used to locate the cable center position and perform trough measurements, and two normal antennas are used to calculate the cable depth and perform peak measurements. Through these three antennas, electromagnetic waves from the pipeline under test are received, and the signals are ultimately calculated to locate the pipeline position.

[0040] Figure 3 for Figure 2 A schematic diagram of the structure of the processing module 110.

[0041] like Figure 3 As shown, in some embodiments, the processing module 110 includes: a PID modulation unit 111, a power factor calculation unit 112, and a signal output unit 113. The PID modulation unit 111 acquires the current of the output signal and modulates the current of the output signal into a target current. The PID modulation unit 111 also acquires the voltage of the output signal and modulates the voltage of the output signal into a target voltage. The power factor calculation unit 112 calculates the power factor based on the target current and the target voltage. The signal output unit 113 determines the optimal output power based on the power factor and outputs an SVPWM signal.

[0042] The PID modulation unit 111 is connected to the sampling circuit 140 and is used to acquire the current and voltage of the output signal, and then modulate them into the target current and target voltage. It is worth noting that the PID modulation unit 111 modulates the current and voltage of the output signal based on a PID algorithm. Since pipeline detection is usually an outdoor operation, the energy consumption of the detection device needs to be considered, and for safety reasons, the voltage output by the transmitting device 100 cannot be too high to avoid safety accidents. Therefore, the transmitting device 100 uses a PID algorithm to maintain a constant output, limiting the maximum output voltage to 40V (target voltage) and the maximum output current to 0.5A (target current).

[0043] Specifically, the output of the PID modulation unit 111 can be expressed as:

[0044] u(t)=Kp*e(t)+Ki*∫e(t)dt+Kd*de(t) / dt

[0045] Where u(t) is the output of PID modulation unit 111, e(t) is the current error value, ∫e(t)dt is the integral of the error, de(t) / dt is the derivative (rate of change) of the error, and Kp, Ki, and Kd are control parameters that need to be adjusted according to the specific control system and control requirements.

[0046] In this PID algorithm, the proportional (P) part generates a control output proportional to the current error value. A larger proportional coefficient (Kp) results in a faster response to the error, but an excessively large coefficient can cause system oscillations. The integral (I) part considers the cumulative effect of the error, generating the control output by integrating the error. The integral coefficient (Ki) adjusts the magnitude of the integral action. Integral action helps eliminate steady-state errors, but improper setting can lead to slow system response or overshoot. The derivative (D) part generates the control output based on the rate of change of the error, responding to the speed of error change. The derivative coefficient (Kd) adjusts the magnitude of the derivative action. Derivative action helps predict future error trends, thus improving system stability and response speed, but improper setting can amplify noise or cause system instability.

[0047] Meanwhile, since the types and lengths of cables vary and the types of loads are different, the optimal output power can be achieved by adjusting the output frequency and selecting the most suitable output frequency based on the power factor to achieve the best energy transmission effect, thus ensuring the safety of the device, accurate path detection, and reasonable power consumption.

[0048] When the power factor is 1, the signal output unit 113 calculates the target power based on the target current and target voltage. The target power is the optimal output power, which is 20W.

[0049] When the power factor is not 1, the signal output unit 113 recalculates the output frequency and calculates the optimal output power based on the output frequency.

[0050] For example, when the access cable length is 22000 meters and the transmission frequency is 512 Hz: the output voltage Vth = 40V, the output frequency is F = 512 Hz, the transformer inductance of the transmitter is 0.0121H, the transmitter output impedance Zth = 20 + 2pi * F * 0.012120 = 20 + j39Ω. The load impedance ZL = RL + JXL = 20 - j39Ω, the output power P = |Vth|^2 * RL / (RL + Rth)^2 = 40^2 / (4 * 20) = 20W, and the power factor Pf = COS(θV - θI) = 1.

[0051] Since the power factor is 1, there is no need to adjust the output frequency; P = 20W is the optimal output power.

[0052] Where ZL is the load impedance, RL is the real part of the load impedance, ZXL is the imaginary part of the load impedance, Zth is the Thevenin impedance at the transmitter output port, Rth is the real part of the port impedance, Jth is the imaginary part of the port impedance, Vth is the output voltage, and Pmax is the maximum power transmitted to the load. The load receives the maximum transmitted power when the sum of the load impedance and the transmitter impedance is a purely real number. The imaginary part of the load impedance, JXL, must be equal to the conjugate of the imaginary part of the Thevenin impedance, J*th, i.e., JXL = J*th = -Jth.

[0053] When the access cable length is 220 meters and the transmission frequency is 512 Hz: the output voltage Vth = 40V, the output frequency is F = 512 Hz, the transformer inductance of the transmitter is L = 0.0121H, the transmitter output impedance Zth = 20 + j39Ω, the load impedance ZL = RL + JXL = 0.02 - j3.9e+3, and the output power S = |Vth|^2 * ZL / (ZL ​​+ Zth)^2 = 40^2 * (0.02 - j3.88e+3) / (20 + j39 + 2.02 - j3.92e+3)^2 =

[0054] 0.0047 + 0.4121i (W), active power = 0.0047 W, power factor Pf = COS(θV - θI)

[0055] =COS(arctan((-3.92e+3) / 20+0.02))=0.005, the power factor is less than 1 and the output frequency needs to be adjusted.

[0056] At this point, JXL can be calculated from Pf as -j3.92E+03, i.e., JXL = 1 / (2*π*F*C), and C = 1 / 2*π*F*JXL = 7.92e-08(F). To make the power factor 1, i.e., Jth = -JXL = 0, 2*π*F*L = 1 / (2*π*F*C), F = {1 / [(2*π)^2*C*L]}^0.5 = {1 / [(2*π)^2*7.92e-08*0.0121]}^0.5 =

[0057] 5141.2 Hz. Therefore, simply adjusting the output frequency to 5141.2 Hz will achieve the optimal output power.

[0058] When the access cable length is 220 meters and the transmission frequency is adjusted to 5141.2 Hz: the output voltage Vth = 40V, the output frequency is F = 5141.2 Hz, the transmitter transformer inductance is 0.0121H, the transmitter output impedance Zth = 20 + j390Ω, the load impedance ZL = RL + JXL = 0.02 - j390Ω, the output power P = |Vth|^2 * RL / (RL + Rth)^2 = 40^2 * 0.02 / (0.02 + 20)^2 = 0.0798W, and the power factor Pf = COS(θV - θI) = 1.

[0059] Since the power factor is 1, there is no need to adjust the output frequency, and P = 0.0798W is the optimal output power.

[0060] Figure 4 for Figure 1 A schematic diagram of the launch device.

[0061] like Figure 4 As shown, in some embodiments, the full-bridge drive circuit 120 includes: a first drive circuit 121, a first rectifier circuit 122, a second drive circuit 123, and a second rectifier circuit 124. The first terminal of the first drive circuit 121 is connected to the processing module 110, the first terminal of the first rectifier circuit 122 is connected to the second terminal of the first drive circuit 121, the second terminal of the first rectifier circuit 122 is connected to the boost circuit 130, the first terminal of the second drive circuit 123 is connected to the processing module 110, the first terminal of the second rectifier circuit 124 is connected to the second terminal of the second drive circuit 123, and the second terminal of the second rectifier circuit 124 is connected to the boost circuit 130.

[0062] In the full-bridge drive circuit 120, the processing module 110 controls the first drive circuit 121 and the second drive circuit 123 separately, allowing for more flexible adjustment of the SVPWM signal input and precise control of the characteristics of the rectified sinusoidal signal, such as amplitude and frequency. Furthermore, the first rectifier circuit 122 and the second rectifier circuit 124 convert the SVPWM signal output by the processing module 110 into a sinusoidal signal. This rectification method helps convert the pulse width modulation signal into a sinusoidal form more suitable for transmission in underground pipeline path detection. Sinusoidal signals exhibit better stability and anti-interference capabilities during transmission, reducing signal distortion and ensuring effective signal propagation in complex underground electromagnetic environments.

[0063] Figure 5 for Figure 4 Circuit diagram of the transmitting device.

[0064] like Figure 5As shown, in some embodiments, the first driving circuit 121 includes: a first field-effect transistor Q1 and a second field-effect transistor Q2. The gate of the first field-effect transistor Q1 and the gate of the second field-effect transistor Q2 are connected to the processing module 110. The source of the first field-effect transistor Q1 and the drain of the second field-effect transistor Q2 are connected to the first rectifier circuit 122. The drain of the first field-effect transistor Q1 is connected to a 5V power supply, and the source of the second field-effect transistor Q2 is grounded.

[0065] The second driving circuit 123 includes a third field-effect transistor Q3 and a fourth field-effect transistor Q4. The gates of the third field-effect transistor Q3 and the fourth field-effect transistor Q4 are connected to the processing module 110. The source of the third field-effect transistor Q3 and the drain of the fourth field-effect transistor Q4 are connected to the second rectifier circuit 124. The drain of the third field-effect transistor Q3 is connected to a 5V power supply, and the source of the fourth field-effect transistor Q4 is grounded.

[0066] The processing module 110 controls the on and off states of the first field-effect transistor Q1, the second field-effect transistor Q2, the third field-effect transistor Q3, and the fourth field-effect transistor Q4 through a common gate, thereby precisely adjusting the signals input to the first and second rectifier circuits 124.

[0067] The first rectifier circuit 122 includes: a first inductor L1 and a first capacitor C1. The first end of the first inductor L1 is connected to the gate of the first field-effect transistor Q1 and the gate of the second field-effect transistor Q2. The second end of the first inductor L1 is connected to the boost circuit 130. The first end of the first capacitor C1 is connected to the second end of the first inductor L1. The second end of the first capacitor C1 is grounded.

[0068] The second rectifier circuit 124 includes: a second inductor L2 and a second capacitor C2. The first end of the second inductor L2 is connected to the gate of the third field-effect transistor Q3 and the gate of the fourth field-effect transistor Q4. The second end of the second inductor L2 is connected to the boost circuit 130. The first end of the second capacitor C2 is connected to the second end of the second inductor L2. The second end of the second capacitor C2 is grounded.

[0069] The boost circuit 130 includes a boost converter T1 and a sampling resistor R8. The boost converter T1 is used to boost the sine wave signal by 8 times. One end of the boost converter T1 is connected to the first rectifier circuit 122 and the second rectifier circuit 124 respectively. The other end of the boost converter T1 is coupled to the pipeline under test through the sampling resistor R8.

[0070] The sampling circuit 140 includes: a first amplifier circuit 141;

[0071] The first amplifier circuit 141 includes: a first operational amplifier U1, a thirteenth resistor R13, a first resistor R1, a second resistor R2, and a third resistor R3. The first terminal of the first operational amplifier U1 is connected to the first terminal of the sampling resistor R8 through the thirteenth resistor R13. The second terminal of the first operational amplifier U1 is connected to the second terminal of the sampling resistor R8 through the first resistor R1. The third terminal of the first operational amplifier U1 is connected to the second terminal of the first operational amplifier U1 through the second resistor R2. The third terminal of the first operational amplifier U1 is connected to the processing module 110. One end of the third resistor R3 is connected to the first terminal of the first operational amplifier U1, and the other end of the third resistor R3 is grounded. The first amplifier circuit 141 can effectively suppress common-mode interference signals and improve signal quality in application scenarios such as underground pipeline path detection, where complex electromagnetic environments may exist.

[0072] The sampling circuit 140 includes: a second amplifier circuit 142;

[0073] The second amplifier circuit 142 includes: a second operational amplifier U2, a tenth resistor R10, a ninth resistor R9, an eleventh resistor R11, and a twelfth resistor R12. The first terminal of the second operational amplifier U2 is connected to one end of the sampling resistor R8 through the tenth resistor R10. The second terminal of the second operational amplifier U2 is grounded through the ninth resistor R9. The third terminal of the second operational amplifier U2 is connected to the second terminal of the second operational amplifier U2 through the eleventh resistor R11. The third terminal of the second operational amplifier U2 is connected to the processing module 110. One end of the twelfth resistor R12 is connected to the first terminal of the second operational amplifier U2, and the other end of the twelfth resistor R12 is grounded. The second amplifier circuit 142 can effectively suppress common-mode interference signals, improving signal quality in applications such as underground pipeline path detection where complex electromagnetic environments may exist.

[0074] In the description of the embodiments of this application, unless otherwise stated, " / " means "or", for example, A / B can mean A or B; "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. In addition, in the description of the embodiments of this application, "multiple" means two or more.

[0075] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0076] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this application.

[0077] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments of this application, depending on actual needs.

[0078] The above are merely preferred embodiments of this application and do not constitute any limitation on this application. Any person skilled in the art can make many possible variations and modifications to the technical solution of this application, or modify it into equivalent embodiments, without departing from the scope of the technical solution of this application. Therefore, all equivalent changes made based on the shape, structure, and principle of this application without departing from the content of the technical solution of this application should be covered within the protection scope of this application.

Claims

1. An underground pipeline path detection device, characterized in that, include: Transmitting and receiving devices; The transmitting device includes: a processing module, a full-bridge drive circuit, and a boost circuit. The processing module is used to output an SVPWM signal. The full-bridge drive circuit receives the SVPWM signal and rectifies it into a sine wave signal. The boost circuit boosts the sine wave signal to generate an output signal and couples the output signal to the pipeline under test. The receiving device detects changes in electromagnetic waves of the pipeline under test and calculates the path and depth of the pipeline under test. The transmitting device further includes a sampling circuit, which samples the current signal and voltage signal of the output signal and outputs them to the processing module. The processing module adjusts the SVPWM signal according to the current signal and voltage signal of the output signal to make the SVPWM signal at the optimal output power.

2. The underground pipeline path detection device according to claim 1, characterized in that, The processing module includes a PID modulation unit, a power factor calculation unit, and a signal output unit. The PID modulation unit acquires the current of the output signal and modulates the current of the output signal into a target current. The PID modulation unit also acquires the voltage of the output signal and modulates the voltage of the output signal into a target voltage. The power factor calculation unit calculates the power factor based on the target current and the target voltage. The signal output unit determines the optimal output power based on the power factor and outputs an SVPWM signal.

3. The underground pipeline path detection device according to claim 2, characterized in that, When the power factor is 1, the signal output unit calculates the target power based on the target current and the target voltage, and the target power is the optimal output power; When the power factor is not 1, the signal output unit recalculates the output frequency and calculates the optimal output power based on the output frequency.

4. The underground pipeline path detection device according to claim 2, characterized in that, The PID modulation unit modulates the current and voltage of the output signal based on the PID algorithm.

5. The underground pipeline path detection device according to claim 1, characterized in that, The full-bridge drive circuit includes: a first drive circuit, a first rectifier circuit, a second drive circuit, and a second rectifier circuit. The first terminal of the first drive circuit is connected to the processing module. The first terminal of the first rectifier circuit is connected to the second terminal of the first drive circuit. The second terminal of the first rectifier circuit is connected to the boost circuit. The first terminal of the second drive circuit is connected to the processing module. The first terminal of the second rectifier circuit is connected to the second terminal of the second drive circuit. The second terminal of the second rectifier circuit is connected to the boost circuit.

6. The underground pipeline path detection device according to claim 5, characterized in that, The first driving circuit includes a first field-effect transistor and a second field-effect transistor. The gates of the first field-effect transistor and the second field-effect transistor are connected to the processing module. The source of the first field-effect transistor and the drain of the second field-effect transistor are connected to the first rectifier circuit. The drain of the first field-effect transistor is connected to a 5V power supply, and the source of the second field-effect transistor is grounded. The second driving circuit includes a third field-effect transistor and a fourth field-effect transistor. The gates of the third and fourth field-effect transistors are connected to the processing module. The source and drain of the third and fourth field-effect transistors are connected to the second rectifier circuit. The drain of the third field-effect transistor is connected to a 5V power supply, and the source of the fourth field-effect transistor is grounded.

7. The underground pipeline path detection device according to claim 6, characterized in that, The first rectifier circuit includes: a first inductor and a first capacitor. The first end of the first inductor is connected to the gate of the first field-effect transistor and the gate of the second field-effect transistor. The second end of the first inductor is connected to the boost circuit. The first end of the first capacitor is connected to the second end of the first inductor. The second end of the first capacitor is grounded. The second rectifier circuit includes: a second inductor and a second capacitor. The first end of the second inductor is connected to the gate of the third field-effect transistor and the gate of the fourth field-effect transistor. The second end of the second inductor is connected to the boost circuit. The first end of the second capacitor is connected to the second end of the second inductor. The second end of the second capacitor is grounded.

8. The underground pipeline path detection device according to claim 5, characterized in that, The boost circuit includes a boost converter and a sampling resistor. The boost converter is used to boost the sine wave signal by 8 times. One end of the boost converter is connected to the first rectifier circuit and the second rectifier circuit respectively, and the other end of the boost converter is coupled to the pipeline under test through the sampling resistor.

9. The underground pipeline path detection device according to claim 8, characterized in that, The sampling circuit includes: a first amplifier circuit; The first amplification circuit includes: a first operational amplifier, a thirteenth resistor, a first resistor, a second resistor, and a third resistor. The first terminal of the first operational amplifier is connected to the first terminal of the sampling resistor through the thirteenth resistor. The second terminal of the first operational amplifier is connected to the second terminal of the sampling resistor through the first resistor. The third terminal of the first operational amplifier is connected to the second terminal of the first operational amplifier through the second resistor. The third terminal of the first operational amplifier is connected to the processing module. One end of the third resistor is connected to the first terminal of the first operational amplifier, and the other end of the third resistor is grounded.

10. The underground pipeline path detection device according to claim 8, characterized in that, The sampling circuit includes: a second amplifier circuit; The second amplifier circuit includes a second operational amplifier, a tenth resistor, a ninth resistor, an eleventh resistor, and a twelfth resistor. The first terminal of the second operational amplifier is connected to one end of the sampling resistor through the tenth resistor. The second terminal of the second operational amplifier is grounded through the ninth resistor. The third terminal of the second operational amplifier is connected to the second terminal of the second operational amplifier through the eleventh resistor. The third terminal of the second operational amplifier is connected to the processing module. One end of the twelfth resistor is connected to the first terminal of the second operational amplifier, and the other end of the twelfth resistor is grounded.

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