Manufacturing method of silicon-based liquid crystal device

In the manufacturing process of silicon-based liquid crystal devices, a first chemical mechanical grinding process and a second reflective dielectric layer deposition process are used to form a flat and smooth reflective mirror surface, which solves the problem of poor flatness and reflectivity uniformity of the reflective mirror surface, and improves the optical yield and stability of the product.

CN119689742APending Publication Date: 2025-03-25SIEN (QINGDAO) INTEGRATED CIRCUITS CO LTD
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Patent Information

Application Number
CN202411865941.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

During the mirror manufacturing process of existing silicon-based liquid crystal devices, due to the large channel depth and width, the thickness of the reflective dielectric layer is loaded, resulting in poor uniformity of the reflectivity at the wafer level, which seriously affects the optical yield of the product.

Method used

The first chemical mechanical grinding process is used to remove most of the first reflective dielectric layer on the passivation layer, followed by etching, second reflective dielectric layer deposition and second chemical mechanical grinding process to form a flat and smooth reflective mirror surface.

Benefits of technology

Through this method, the primary chemical mechanical grinding process in the prior art cannot eliminate the problem of depression on the reflective mirror surface, improve the flatness of the reflective mirror surface and the uniformity of the thickness of the reflective film, improve the uniformity of the reflective rate, and thus improve the optical yield and optical performance stability of the product.

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Abstract

The invention provides a manufacturing method of a silicon-based liquid crystal device, which comprises the following steps of: removing most of a first reflection dielectric layer on a passivation layer by adopting a first chemical mechanical grinding process, and further sequentially executing etching, second reflection dielectric layer deposition and a second chemical mechanical grinding process, the problem that in the prior art, when a passivation layer is thinned to the required thickness by adopting a one-time chemical mechanical grinding process, sunken parts on the reflection mirror surface cannot be eliminated can be solved, the formed reflection mirror surface is flat and smooth, the thickness uniformity of a reflection increasing film is greatly improved, and therefore the uniformity of the reflectivity of the reflection mirror surface on the wafer level is improved, and the product yield is improved. And thus, the optical yield and the optical performance stability of the product are improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device manufacturing, and in particular to a method for manufacturing a silicon-based liquid crystal device. Background Art

[0002] Liquid Crystal On Silicon (LCoS) devices are widely used in the fields of optical imaging, laser projection and optical communication. They generally have a silicon substrate and a conductive glass substrate bonded together, and a liquid crystal layer injected between the silicon substrate and the conductive glass substrate. The conductive glass substrate contains a transparent electrode, and the silicon substrate contains a CMOS drive circuit and a reflective mirror.

[0003] Please refer to Figure 1 The manufacturing process of the reflective mirror of the silicon-based liquid crystal device includes: depositing a reflective electrode layer 101 (for example, aluminum) and a passivation layer 102 (also a reflection enhancement film, for example, a stack of silicon oxide and silicon nitride) on a silicon substrate 100, patterning the passivation layer 102 and the reflective layer 101 by photolithography and etching processes to form a reflective electrode, filling a reflective dielectric layer 104 (for example, silicon oxide, etc.) in the trench 103 between the reflective electrodes and performing chemical mechanical polishing (CMP) on the top surface of the reflective dielectric layer 104 until the thickness of the passivation layer 102 is reduced to a required thickness to obtain the required reflective mirror.

[0004] An ideal LCOS device should be flat, smooth, and have high reflectivity and uniformity, so as to ensure good liquid crystal arrangement and consistency of liquid crystal layer thickness without distorting light. This requires that the reflective mirror surface must be quite flat in order to accurately control the reflected light path.

[0005] However, in the above-mentioned manufacturing process of the reflective mirror, due to the large depth-width ratio of the trench 103, the thickness of the reflective dielectric layer 104 to be filled is relatively thick, which will cause the thickness of the reflective dielectric layer 104 to produce a loading effect accumulation at the center and edge of the wafer level during the deposition process. In addition, during the subsequent CMP, the selectivity of the reflective dielectric layer 104 and the passivation layer 102 is not high, resulting in the reflective dielectric layer 104 still having the loading effect after CMP. This will cause the reflectivity levels of the reflective mirror surfaces in different areas on the wafer to vary greatly, seriously affecting the optical yield of the product. Summary of the invention

[0006] The object of the present invention is to provide a method for manufacturing a silicon-based liquid crystal device, which can improve the flatness of the reflective mirror surface and improve the optical yield of the product.

[0007] To achieve the above object, the present invention provides a method for manufacturing a liquid crystal on silicon device, which comprises the following steps:

[0008] Depositing a reflective electrode layer and a passivation layer on a silicon substrate, and etching the passivation layer and the reflective electrode layer to form reflective electrodes separated by channels;

[0009] Depositing a first reflective dielectric layer on the passivation layer, wherein the first reflective dielectric layer fills the trench;

[0010] Grinding the top of the first reflective dielectric layer using a first chemical mechanical polishing process to remove most of the first reflective dielectric layer on the passivation layer;

[0011] Etching and removing the first reflective dielectric layer remaining on the passivation layer, while leaving the first reflective dielectric layer of corresponding thickness in the trench;

[0012] Depositing a second reflective dielectric layer on the passivation layer, wherein the second reflective dielectric layer fills the trench;

[0013] The top of the first reflective dielectric layer is ground by a second chemical mechanical grinding process until the thickness of the passivation layer is reduced to a required thickness to form a required reflective mirror surface.

[0014] Optionally, after etching away the first reflective dielectric layer remaining on the passivation layer, a top surface of the first reflective dielectric layer remaining in the trench is higher than a top surface of the passivation layer remaining after the second chemical mechanical polishing process.

[0015] Optionally, after etching away the first reflective dielectric layer remaining on the passivation layer, a top surface of the first reflective dielectric layer remaining in the trench is lower than a top surface of the passivation layer remaining after the second chemical mechanical polishing process, and after the second chemical mechanical polishing process, the first reflective dielectric layer and the second reflective dielectric layer remain in the trench.

[0016] Optionally, after the first reflective dielectric layer remaining on the passivation layer is etched away, a top surface of the first reflective dielectric layer remaining in the trench has a depression, and the deposited second reflective dielectric layer fills the depression.

[0017] Optionally, the top surface of the deposited second reflective dielectric layer is recessed at the recess, and the lowest recessed point of the top surface of the second reflective dielectric layer is higher than the top surface of the passivation layer remaining after the second chemical mechanical polishing process; or, the second reflective dielectric layer has fluidity during the deposition process so as to fill the recess and have a flat top surface after the deposition is completed.

[0018] Optionally, a plurality of reflective dielectric films with different densities are deposited on the passivation layer to form the second reflective dielectric layer, and the density of the bottom reflective dielectric film in the second reflective dielectric layer is close to or the same as that of the first reflective dielectric layer.

[0019] Optionally, the density of the reflective dielectric film in the second reflective dielectric layer increases first and then decreases.

[0020] Optionally, the second reflective dielectric layer has three layers of reflective dielectric films, and the reflective dielectric film located in the middle layer of the second reflective dielectric layer has the thickest thickness and a density that is the same as or close to that of the top layer of the passivation layer.

[0021] Optionally, the first chemical mechanical polishing process uses the top surface of the passivation layer as the polishing stop point, or after the first chemical mechanical polishing process, the remaining first reflective dielectric layer does not expose the top surface of the passivation layer; the polishing stop point of the second chemical mechanical polishing process is captured by at least one of a time signal, a friction force signal and an optical signal, and in the second chemical mechanical polishing process, the selectivity of the second reflective dielectric layer relative to the passivation layer is as small as possible.

[0022] Optionally, the manufacturing method further comprises at least one of the following (1) to (10):

[0023] (1) The material of the reflective electrode layer includes at least one of aluminum, silver, magnesium, copper, titanium, tantalum, gold and zinc;

[0024] (2) The passivation layer and the reflective dielectric layer filled in the trench constitute an anti-reflection film;

[0025] (3) The passivation layer comprises at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum pentoxide, hafnium oxide, titanium nitride, tantalum nitride, zinc oxide and magnesium fluoride;

[0026] (4) the first reflective dielectric layer comprises at least one of silicon oxide, tetraethyl orthosilicate, high-density plasma silicon dioxide, oxygen-rich silicon dioxide and doped silicon glass;

[0027] (5) The first reflective dielectric layer is formed by a high aspect ratio filling process, a plasma enhanced vapor deposition process or a high density plasma vapor deposition process;

[0028] (6) the second reflective dielectric layer comprises at least one of silicon oxide, tetraethyl orthosilicate, high-density plasma silicon dioxide, oxygen-rich silicon dioxide and doped silicon glass;

[0029] (7) The second reflective dielectric layer is formed by a high aspect ratio filling process, a plasma enhanced chemical vapor deposition process or a high density plasma chemical vapor deposition process;

[0030] (8) The deposition thickness of the second reflective dielectric layer is less than the deposition thickness of the first reflective dielectric layer;

[0031] (9) removing the first reflective dielectric layer remaining on the passivation layer by dry etching, wet etching, or a combination of dry etching and wet etching;

[0032] (10) When wet etching to remove the first reflective dielectric layer remaining on the passivation layer, the etchant used includes hydrofluoric acid or ammonia water; when dry etching to remove the first reflective dielectric layer remaining on the passivation layer, the etching gas used includes at least one of chlorine, argon and hydrogen.

[0033] Compared with the prior art, the technical solution of the present invention uses a first chemical mechanical polishing process to remove most of the first reflective dielectric layer on the passivation layer, and then further performs etching, second reflective dielectric layer deposition and a second chemical mechanical polishing process in sequence. This can avoid the problem in the prior art that the depression on the reflective mirror surface cannot be eliminated when the passivation layer is thinned to the required thickness using a single chemical mechanical polishing process, so that the formed reflective mirror surface is flat and smooth, and the thickness uniformity of the anti-reflection film is greatly improved, thereby improving the uniformity of the reflectivity of the reflective mirror surface at the wafer level, thereby improving the optical yield and optical performance stability of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0035] Figure 1 It is a schematic diagram of the device cross-sectional structure during the manufacturing process of the reflective mirror surface of the existing silicon-based liquid crystal device.

[0036] Figure 2 The figure is a schematic flow chart of a method for manufacturing a liquid crystal on silicon device according to an embodiment of the present invention.

[0037] Figure 3 to Figure 4 The present invention is a schematic cross-sectional view of a device in a method for manufacturing a liquid crystal on silicon device according to an embodiment of the present invention.

[0038] Figure 5 FIG. 4 is a schematic cross-sectional view of another exemplary device in a method for manufacturing a liquid crystal on silicon device according to an embodiment of the present invention.

[0039] Figure 6 It is another exemplary device cross-sectional schematic diagram in a method for manufacturing a liquid crystal on silicon device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0040] In the following description, a large number of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described. It should be understood that the present invention can be implemented in different forms and should not be interpreted as being limited to the embodiments proposed here. On the contrary, providing these embodiments will make the disclosure thorough and complete, and the scope of the present invention will be fully conveyed to those skilled in the art. The same reference numerals represent the same elements from beginning to end. It should be understood that when an element is referred to as "connected to", "coupled" other elements, it can be directly connected to other elements, or there can be intervening elements. On the contrary, when an element is referred to as "directly connected to" other elements, there is no intervening element. When used here, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates another way. It should also be understood that the term "comprising" is used to identify the presence of features, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, steps, operations, elements, components and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0041] The technical solution proposed by the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0042] Please refer to Figure 2 An embodiment of the present invention provides a method for manufacturing a liquid crystal on silicon device, which comprises the following steps:

[0043] S1, depositing a reflective electrode layer and a passivation layer on a silicon substrate, and etching the passivation layer and the reflective electrode layer to form reflective electrodes separated by channels;

[0044] S2, depositing a first reflective dielectric layer on the passivation layer, wherein the first reflective dielectric layer fills the trench;

[0045] S3, grinding the top of the first reflective dielectric layer using a first chemical mechanical polishing process to remove most of the first reflective dielectric layer on the passivation layer;

[0046] S4, etching and removing the first reflective dielectric layer remaining on the passivation layer, while leaving the first reflective dielectric layer of corresponding thickness in the trench;

[0047] S5, depositing a second reflective dielectric layer on the passivation layer, wherein the second reflective dielectric layer fills the trench;

[0048] S6, using a second chemical mechanical polishing process to polish the top of the first reflective dielectric layer until the thickness of the passivation layer is reduced to a required thickness to form a required reflective mirror surface.

[0049] Please refer to Figure 3 In step S1, first, a silicon substrate 100 is provided. The silicon substrate 100 may be a silicon substrate processed by a CMOS process. The CMOS process may form a driving circuit (not shown) including structures such as a CMOS tube in the silicon substrate 100. The surface layer of the silicon substrate may be an interlayer dielectric material layer that buries the driving circuit and other structures. The top surface of the interlayer dielectric material layer has been flattened by a chemical mechanical polishing process. The material may be any suitable dielectric material such as a low-k dielectric having a dielectric constant k less than that of silicon oxide. Then, any suitable process such as evaporation, electron beam evaporation, plasma jet deposition or sputtering deposition may be selected to deposit a reflective electrode layer 101 on the silicon substrate 100, and further a passivation layer 102 may be deposited on the reflective electrode layer 101 by any suitable deposition process such as chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD) or high density plasma chemical vapor deposition (HDPCVD). Afterwards, a patterned photoresist (not shown) is formed on the passivation layer 102 by a photolithography process (including photoresist coating, exposure, development, etc.), and the patterned photoresist is used to define the shape and spacing of the reflective electrode (or the reflective mirror). The patterned photoresist is used as a mask, and any appropriate etching process is adopted to sequentially etch the passivation layer 102 and the reflective electrode layer 101 until the reflective electrode layer 101 is opened, thereby forming a plurality of reflective electrodes (or reflective mirror arrays) separated from each other by the trenches 103. After the reflective electrode is formed, the patterned photoresist is removed by any appropriate stripping process to expose the top surface of the passivation layer 102 again.

[0050] The reflective electrode layer 101 may be made of any suitable reflective electrode material in the art, for example, may include at least one of aluminum, silver, magnesium, copper, titanium, tantalum, gold and zinc. The reflective electrode layer 101 may be a single-layer material film formed by a single metal or alloy, or may be a stacked structure formed by multiple layers of different material films. As an example, the reflective electrode layer 101 is aluminum.

[0051] The passivation layer 102 may be a single-layer material film formed of a single material, or a laminated structure formed of multiple layers of different material films. It is necessary to select a dielectric material that can protect the surface of the reflective electrode layer 101 and improve the total reflection effect of the reflective electrode layer 101, so as to improve the reflectivity of the reflective mirror surface finally formed. For example, the passivation layer 102 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum pentoxide, hafnium oxide, titanium nitride, tantalum nitride, zinc oxide, and magnesium fluoride. As an example, the passivation layer 102 includes a silicon dioxide layer 102a and a silicon nitride layer 102b stacked in sequence.

[0052] Please continue to refer to Figure 3 In step S2, a first reflective dielectric layer 104 is deposited on the passivation layer 102 and in the trench 103 by any suitable deposition process such as a high aspect ratio filling (HARP) process, a plasma enhanced vapor deposition (PECVD) process or a high density plasma vapor deposition (HDP CVD) process, and the deposition thickness of the first reflective dielectric layer 104 is at least enough to fill the trench 103. Among them, the first reflective dielectric layer 104 needs to select a dielectric material that has good filling performance to ensure that no voids are formed during the process of filling the trench 103, can achieve isolation between the reflective electrodes, and can also improve the reflective effect of the reflective mirror surface finally formed. For example, the first reflective dielectric layer 104 may include at least one of silicon oxide, tetraethyl orthosilicate (TEOS), high density plasma silicon dioxide (HDP SiO2), oxygen-rich silicon dioxide (SRO) and doped silicon glass (such as fluorosilicate glass FSG, borosilicate glass BSG, phosphorus silicon glass PSG, borophosphorus silicon glass BPSG, etc.). As an example, the first reflective dielectric layer 104 is formed by a high-density plasma chemical vapor deposition process, and its material is high-density plasma silicon dioxide (HDP SiO2). Due to the existence of the channel 103 and the center and edge loading effects at the wafer level during the deposition process, the first reflective dielectric layer 104 has a recess (dishing) 103a at the channel 103 after deposition is completed.

[0053] Please continue to refer to Figure 3 In step S3, a first chemical mechanical polishing (CMP1) process is used to polish the top surface of the deposited first reflective dielectric layer 104 to remove most of the first reflective dielectric layer 104 on the passivation layer 102. During the CMP1 process, the selectivity of the first reflective dielectric layer 104 to the passivation layer 102 (for example, the silicon nitride layer 102b) is not high, and the CMP1 cannot eliminate the loading effect of the first reflective dielectric layer 104. Therefore, when the polishing stops, the remaining first reflective dielectric layer 104 still retains a recess 103a at the trench 103.

[0054] In one example, CMP1 uses the top surface of the passivation layer 102 as the grinding stop point. When grinding stops, the remaining first reflective dielectric layer 104 mainly fills the trench 103, and partially remains on the passivation layer 102 due to the load effect of CMP1, so as to expose most of the top surface of the passivation layer 102.

[0055] In another example, the grinding stop point of CMP1 is captured by at least one of a time signal, a friction signal, and an optical signal. When the grinding stops, the remaining first reflective dielectric layer 104 is mainly filled in the trench 103, and a relatively thin thickness (e.g., ), and the top surface of the passivation layer 102 is not exposed, that is, at this time, the remaining first reflective dielectric layer 104 on the passivation layer 102 is relatively thin (for example etc.) films.

[0056] Please refer to Figure 4 In step S4, the first reflective dielectric layer 104 remaining on the passivation layer 102 is etched away by any suitable etching process such as dry etching, wet etching, or a combination of dry etching and wet etching with a high etching selectivity of the first reflective dielectric layer 104 relative to the passivation layer 102 (for example, the silicon nitride layer 102b), so as to expose the clean top surface of the passivation layer 102 and achieve preliminary surface planarization. At this time, the first reflective dielectric layer 104 at the channel 103 still retains the recess 103a.

[0057] In one example, when the first reflective dielectric layer 104 remaining on the passivation layer 102 is removed by wet etching, the etchant used includes but is not limited to hydrofluoric acid or ammonia water.

[0058] In another example, when the first reflective dielectric layer 104 remaining on the passivation layer 102 is removed by dry etching, the etching gas used includes but is not limited to at least one of chlorine, argon and hydrogen.

[0059] In addition, it should be understood that the drop height of the top surface of the remaining first reflective dielectric layer 104 at the trench 103 depends on the over-etching amount set in step S4.

[0060] Please continue to refer to Figure 4In step S5, a second reflective dielectric layer 105 can be deposited on the passivation layer 102 and the first reflective dielectric layer 104 of the trench 103 by any suitable deposition process such as a high aspect ratio filling (HARP) process, a plasma enhanced chemical vapor deposition (PECVD) process, or a high density plasma chemical vapor deposition (HDP CVD) process. The deposition thickness of the second reflective dielectric layer 105 can fill the trench 103, so as to fill the recess 103a on the top surface of the first reflective dielectric layer 104, so as to achieve surface flattening again, and provide a surface foundation that is as flat as possible for the next chemical mechanical polishing.

[0061] Among them, the second reflective dielectric layer 105 needs to select a dielectric material that has good filling performance, ensures that no voids are formed during the process of filling the trench 103, can achieve isolation between the reflective electrodes, and can also improve the reflective effect of the reflective mirror surface finally formed. The second reflective dielectric layer 105 can be a single material to form a single-layer film structure, or it can be a composite structure formed by stacking multiple different material films. Further optionally, the material of the second reflective dielectric layer 105 can be selected from at least one of silicon oxide, tetraethyl orthosilicate (TEOS), high-density plasma silicon dioxide (HDP SiO2), oxygen-rich silicon dioxide (SRO) and doped silicon glass (such as fluorosilicate glass FSG, borosilicate glass BSG, phosphorus silicate glass PSG, borophosphorus silicate glass BPSG, etc.).

[0062] In an example, see Figure 4 The top surface of the second reflective dielectric layer 105 deposited in step S5 is still recessed at the recess 103a (i.e., the channel), and the lowest recessed point of the top surface of the second reflective dielectric layer 105 is higher than the top surface of the passivation layer 102 remaining after the second chemical mechanical polishing process (CMP2) in the subsequent step S6, thereby ensuring that the reflective mirror surface is flat after the CMP2 in the subsequent step S6.

[0063] In another example, see Figure 5 In the process of depositing the second reflective dielectric layer 105 in step S5, at least the top layer of the deposited second reflective dielectric layer 105 has fluidity during the deposition process, so that after the deposition is completed, the second reflective dielectric layer 105 not only fills the trench (i.e. fills the recess 103a) but also has a flat top surface.

[0064] Optionally, refer to Figure 5In step S5, a required second reflective dielectric layer 105 is formed by depositing multiple layers of reflective dielectric films with different densities on the passivation layer 102, and the density of the bottom reflective dielectric film 105a in the second reflective dielectric layer 105 is close to or the same as that of the first reflective dielectric layer 104, thereby ensuring the adhesion between the reflective dielectric film 105a and the first reflective dielectric layer 104. Further optionally, the top reflective dielectric film 105c in the second reflective dielectric layer 105 may have a certain fluidity during the deposition process, thereby making the top surface of the second reflective dielectric layer 105 flat after the deposition of the top reflective dielectric film 105c, providing a better process surface for CMP2 in the subsequent step S6, and avoiding the top surface from being concave after CMP2.

[0065] In an example, see Figure 5 In step S5, not only are multiple layers of reflective dielectric films with different densities deposited on the passivation layer 102 to form the desired second reflective dielectric layer 105, but also the density of the reflective dielectric films in the second reflective dielectric layer 105 increases first and then decreases. For example, not only are reflective dielectric films 105a, 105b, and 105c with different densities deposited in sequence on the passivation layer 102 to form the desired second reflective dielectric layer 105. Among them, the density of the reflective dielectric film 105a at the bottom layer is close to or the same as that of the first reflective dielectric layer 104, and the thickness is relatively thin, thereby ensuring the conformal coverage capability of the deposited reflective dielectric film 105a, and having good adhesion to the first reflective dielectric layer 104. Among the reflective dielectric films 105a, 105b, and 105c, the reflective dielectric film 105b located in the middle layer is the thickest and has the highest density. The density of the reflective dielectric film 105b can be the same as or close to the density of the top layer (i.e., the silicon nitride layer 102b) of the passivation layer 102, thereby ensuring the grinding effect of CMP2 in the subsequent step S6 and avoiding the formation of depressions on the reflective mirror surface finally formed. The reflective dielectric film 105c located in the top layer can have the smallest density and a thinner thickness, thereby facilitating the smooth start of CMP2 in the subsequent step S6. In other embodiments, in order to ensure that the surface is as flat as possible after grinding, the lowest surface of the reflective dielectric film 105c at the trench 103 is higher than the surface height of the reflective dielectric film 105a located above the passivation layer 102, so as to ensure that sufficient consumption resistance is provided at the trench 103 during the grinding process, so as to obtain a flat surface as much as possible.

[0066] Please continue to refer to Figure 4In step S6, the second reflective dielectric layer 105 is polished by a second chemical mechanical polishing (CMP2) process, and the polishing stop point of CMP2 is captured by at least one of a time signal, a friction force signal, and an optical signal, so that when the polishing stops, the thickness H of the passivation layer 102 can be reduced to a required thickness h, thereby forming a required reflective mirror surface. In the CMP2 process, the selectivity of the second reflective dielectric layer 105 relative to the passivation layer 102 is as small as possible to avoid defects such as depressions on the reflective mirror surface formed after the CMP2 process.

[0067] In addition, when multiple reflective dielectric films with different densities are deposited on the passivation layer 102 to form the required second reflective dielectric layer 105 in step S5, the different densities of these reflective dielectric films can be used to control the polishing speed of CMP2 and improve the polishing effect of CMP2.

[0068] In an example, see Figure 4 In step S4, the passivation layer 102 (for example, the silicon nitride layer 102b) is used as an etching stop layer, and a suitable over-etching amount is set to completely remove the first reflective dielectric layer 104 on the passivation layer 102, and to prevent the top surface of the first reflective dielectric layer 104 at the trench 103 from dropping too much, so as to control the top surface of the first reflective dielectric layer 104 at the trench 103 to be above the top surface of the passivation layer 102 that needs to be retained in the end when etching is completed, that is, the height of the lowest point of the top surface of the first reflective dielectric layer 104 at the trench 103 is higher than h when etching is completed. In this example, after executing steps S5 and S6, the only remaining reflective dielectric layer at the trench 103 is the first reflective dielectric layer 104, so the flat and smooth reflective mirror surface finally obtained is composed of the top surface of the passivation layer 102 and the top surface of the first reflective dielectric layer 104, and the passivation layer 102 and the first reflective dielectric layer 104 filled in the trench constitute an anti-reflection film, which can improve the total reflection effect of the reflective electrode layer 101, thereby improving the reflectivity.

[0069] In another example, see Figure 6In step S4, the passivation layer 102 (for example, the silicon nitride layer 102b) is used as an etching stop layer, and a sufficiently large over-etching amount is set, so that not only the first reflective dielectric layer 104 on the passivation layer 102 is completely removed, but also the top surface of the first reflective dielectric layer 104 at the trench 103 is lowered to be lower than the top surface of the passivation layer 102 that is ultimately required to be retained, that is, after etching, the top surface height of the first reflective dielectric layer 104 at the trench 103 is lower than h. In this example, after executing steps S5 and S6, the remaining reflective dielectric layer at the trench 103 is composed of the first reflective dielectric layer 104 and the second reflective dielectric layer 105 stacked together, so the flat and smooth reflective mirror surface finally obtained is composed of the top surface of the passivation layer 102 and the top surface of the second reflective dielectric layer 105, and the passivation layer 102 and the first reflective dielectric layer 104 and the second reflective dielectric layer 105 filled in the trench constitute an anti-reflection film, which can improve the total reflection effect of the reflective electrode layer 101, thereby improving the reflectivity.

[0070] Subsequently, other manufacturing steps of the silicon-based liquid crystal device can be further completed, such as bonding the silicon substrate formed with a reflective mirror surface to a conductive glass substrate with a transparent electrode, and injecting a liquid crystal layer between the silicon substrate and the conductive glass substrate, and performing packaging and testing, etc. This is not the focus of the present invention and can refer to conventional technologies in the field, so it will not be described in detail here.

[0071] In summary, the method for manufacturing a silicon-based liquid crystal device of the present invention uses a first chemical mechanical polishing process to remove most of the first reflective dielectric layer on the passivation layer, and then further performs etching, second reflective dielectric layer deposition and a second chemical mechanical polishing process in sequence. This can avoid the problem in the prior art that the depression on the reflective mirror surface cannot be eliminated when the passivation layer is thinned to a required thickness using a single chemical mechanical polishing process, so that the formed reflective mirror surface is flat and smooth, and the thickness uniformity of the anti-reflection film is greatly improved, thereby improving the uniformity of the reflectivity of the reflective mirror surface at the wafer level, thereby improving the optical yield and optical performance stability of the product.

[0072] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for manufacturing a liquid crystal on silicon device, characterized in that: include: Depositing a reflective electrode layer and a passivation layer on a silicon substrate, and etching the passivation layer and the reflective electrode layer to form reflective electrodes separated by channels; Depositing a first reflective dielectric layer on the passivation layer, wherein the first reflective dielectric layer fills the trench; Grinding the top of the first reflective dielectric layer using a first chemical mechanical polishing process to remove most of the first reflective dielectric layer on the passivation layer; Etching and removing the first reflective dielectric layer remaining on the passivation layer, while leaving the first reflective dielectric layer of corresponding thickness in the trench; Depositing a second reflective dielectric layer on the passivation layer, wherein the second reflective dielectric layer fills the trench; The top of the first reflective dielectric layer is ground by a second chemical mechanical grinding process until the thickness of the passivation layer is reduced to a required thickness to form a required reflective mirror surface.

2. The manufacturing method according to claim 1, characterized in that After the first reflective dielectric layer remaining on the passivation layer is removed by etching, a top surface of the first reflective dielectric layer remaining in the trench is higher than a top surface of the passivation layer remaining after the second chemical mechanical polishing process.

3. The manufacturing method according to claim 1, characterized in that: After etching away the first reflective dielectric layer remaining on the passivation layer, a top surface of the first reflective dielectric layer remaining in the trench is lower than a top surface of the passivation layer remaining after the second chemical mechanical polishing process, and after the second chemical mechanical polishing process, the first reflective dielectric layer and the second reflective dielectric layer remain in the trench.

4. The manufacturing method according to claim 1, characterized in that: After the first reflective dielectric layer remaining on the passivation layer is removed by etching, a top surface of the first reflective dielectric layer remaining in the trench has a depression, and the deposited second reflective dielectric layer fills the depression.

5. The manufacturing method according to claim 4, characterized in that: The top surface of the deposited second reflective dielectric layer is recessed at the recess, and the lowest recessed point of the top surface of the second reflective dielectric layer is higher than the top surface of the passivation layer remaining after the second chemical mechanical polishing process; or, the second reflective dielectric layer has fluidity during the deposition process so as to fill the recess and have a flat top surface after the deposition is completed.

6. The manufacturing method according to any one of claims 1 to 5, characterized in that: A plurality of reflective dielectric films with different densities are deposited on the passivation layer to form the second reflective dielectric layer, and the density of the bottom reflective dielectric film in the second reflective dielectric layer is close to or the same as that of the first reflective dielectric layer.

7. The manufacturing method according to claim 6, characterized in that: The density of the reflective dielectric film in the second reflective dielectric layer increases first and then decreases.

8. The manufacturing method according to claim 7, characterized in that: The second reflective dielectric layer has three layers of reflective dielectric films, and the reflective dielectric film located in the middle layer of the second reflective dielectric layer has the thickest thickness and a density that is the same as or close to that of the top layer of the passivation layer.

9. The manufacturing method according to claim 1, characterized in that: The first chemical mechanical polishing process uses the top surface of the passivation layer as a polishing stop point, or after the first chemical mechanical polishing process, the remaining first reflective dielectric layer does not expose the top surface of the passivation layer; The polishing stop point of the second chemical mechanical polishing process is captured by at least one of a time signal, a friction force signal and an optical signal, and the selection ratio of the second reflective dielectric layer to the passivation layer in the second chemical mechanical polishing process is as small as possible.

10. The manufacturing method according to any one of claims 1 to 5 and 7 to 9, characterized in that: Also includes at least one of the following (1) to (10): (1) The material of the reflective electrode layer includes at least one of aluminum, silver, magnesium, copper, titanium, tantalum, gold and zinc; (2) The passivation layer and the reflective dielectric layer filled in the trench constitute an anti-reflection film; (3) The passivation layer comprises at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum pentoxide, hafnium oxide, titanium nitride, tantalum nitride, zinc oxide and magnesium fluoride; (4) the first reflective dielectric layer comprises at least one of silicon oxide, tetraethyl orthosilicate, high-density plasma silicon dioxide, oxygen-rich silicon dioxide and doped silicon glass; (5) The first reflective dielectric layer is formed by a high aspect ratio filling process, a plasma enhanced vapor deposition process or a high density plasma vapor deposition process; (6) the second reflective dielectric layer comprises at least one of silicon oxide, tetraethyl orthosilicate, high-density plasma silicon dioxide, oxygen-rich silicon dioxide and doped silicon glass; (7) The second reflective dielectric layer is formed by a high aspect ratio filling process, a plasma enhanced chemical vapor deposition process or a high density plasma chemical vapor deposition process; (8) The deposition thickness of the second reflective dielectric layer is less than the deposition thickness of the first reflective dielectric layer; (9) removing the first reflective dielectric layer remaining on the passivation layer by dry etching, wet etching, or a combination of dry etching and wet etching; (10) When wet etching to remove the first reflective dielectric layer remaining on the passivation layer, the etchant used includes hydrofluoric acid or ammonia water; when dry etching to remove the first reflective dielectric layer remaining on the passivation layer, the etching gas used includes at least one of chlorine, argon and hydrogen.