Pulse width error compensation method and device based on encoder and related equipment

Abstract

The invention relates to a pulse width error compensation method and device based on an encoder and related equipment, and the method comprises the steps: determining a pulse width error ratio according to the offset after the pulse width error offset of a pulse is calculated, and compensating the calculated current rotating speed according to the pulse width error ratio. Wherein the current rotating speed can be the rotating speed obtained through calculation according to an M / T method, and due to the fact that the current rotating speed is compensated, the accuracy and precision of speed measurement are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of error compensation, and in particular to a pulse width error compensation method based on an encoder and related equipment. Background Art

[0002] In the motor speed control system, the encoder is a commonly used speed sensor. However, due to factors such as grating processing technology and installation, the encoder pulse generally has mechanical errors, which reduces the speed measurement accuracy and affects the performance of the speed control system.

[0003] The traditional M / T method (the most typical pulse speed measurement methods are frequency measurement (M method) and period measurement (T method)) can provide high speed measurement accuracy, but at low speeds, the encoder pulse period is long and is easily affected by pulse width errors. The method based on the estimated speed algorithm in the prior art improves the response speed of the speed regulation system, but the estimated speed is not accurate and is not verified, so it cannot effectively solve the encoder pulse width error problem. Summary of the invention

[0004] In view of this, an object of the present invention is to provide a pulse width error compensation method, device and related equipment based on an encoder, so as to overcome the problem that the encoder pulse width error cannot be effectively solved at present.

[0005] To achieve the above objectives, the present invention adopts the following technical solutions:

[0006] In a first aspect, the present application provides a pulse width error compensation method based on an encoder, comprising:

[0007] According to the parameter information of the encoder operation, the pulse width error offset of the pulse is calculated;

[0008] determining a pulse width error ratio based on the pulse width error offset;

[0009] The current rotation speed of the motor calculated according to a preset algorithm is determined, and the current rotation speed is compensated according to the pulse width error ratio.

[0010] Further, the parameter information of the encoder operation includes: resolution, pulse frequency multiple; the pulse width error offset of each pulse is calculated according to the parameter information of the encoder operation, including:

[0011] Calculating the target angle of the pulse according to the resolution and the first calculation rule; and calculating the actual angle of the pulse according to the frequency multiplication number of the pulse and the second calculation rule;

[0012] The pulse width error offset is calculated according to the target angle and the actual angle.

[0013] Further, the calculating the pulse width error offset according to the target angle and the actual angle includes:

[0014] The difference between the actual angle and the target angle is used as the pulse width error offset.

[0015] Further, determining the pulse width error ratio based on the pulse width error offset includes:

[0016] The ratio of the pulse width error offset to the resolution of the preset coefficient is used as the pulse width error ratio.

[0017] Further, compensating the current rotation speed according to the pulse width error ratio includes:

[0018] Calculating a compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time;

[0019] The product of the compensation coefficient and the current rotation speed is used as the compensated rotation speed.

[0020] Further, the calculation of the compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time includes: calculating the compensation coefficient according to a compensation coefficient calculation formula; wherein the compensation coefficient calculation formula includes:

[0021]

[0022] Among them, λ i and λ i+N are the pulse width error ratios corresponding to the starting and ending positions of the sampling pulse, and N is the number of counts of the encoder pulse within the sampling pulse time.

[0023] Furthermore, it also includes:

[0024] Receive the rotation direction information of the motor;

[0025] The speed and phase of the motor are adjusted according to the compensation data and the received rotation direction information.

[0026] In a second aspect, a pulse width error compensation device based on an encoder comprises:

[0027] A first processing module is used to calculate the pulse width error offset of the pulse according to the parameter information of the encoder operation;

[0028] A second processing module, configured to determine a pulse width error ratio based on the pulse width error offset;

[0029] The third processing module is used to determine the current rotation speed of the motor calculated according to a preset algorithm, and compensate the current rotation speed according to the pulse width error ratio.

[0030] In a third aspect, a pulse width error compensation device based on an encoder includes a processor and a memory, wherein the processor is connected to the memory:

[0031] Wherein, the processor is used to call and execute the program stored in the memory;

[0032] The memory is used to store the program, and the program is at least used to execute any one of the methods described above.

[0033] Optionally, the device includes a DSP module.

[0034] In a fourth aspect, an encoder-based pulse width error compensation control system comprises: the encoder-based pulse width error compensation device according to claim 9, a data processing module, an encoder module and a motor;

[0035] The pulse width error compensation device and the data processing module are connected to the motor through a drive module and an encoder module respectively;

[0036] The data processing module is used to obtain parameter information.

[0037] Optionally, the data processing module includes an FPGA module.

[0038] In a fifth aspect, a computer-readable storage medium storing a computer program is provided, wherein the computer program, when executed, implements any of the methods described above.

[0039] In a sixth aspect, an air conditioner is provided, characterized in that it comprises the encoder-based pulse width error compensation device described above.

[0040] The present invention provides a pulse width error compensation method based on an encoder and related equipment. After calculating the pulse width error offset of the pulse, the method determines the pulse width error ratio according to the offset, thereby compensating the calculated current speed according to the pulse width error ratio. The current speed may be the speed calculated according to the M / T method, and since the current speed is compensated, the accuracy and precision of the speed measurement are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1It is a flow chart of a pulse width error compensation method based on an encoder provided by an embodiment of the present invention;

[0043] Figure 2 A pulse width error compensation device based on an encoder is provided in one embodiment of the present invention;

[0044] Figure 3 It is a structural schematic diagram of a pulse width error compensation device based on an encoder provided by an embodiment of the present invention;

[0045] Figure 4 It is a structural schematic diagram of a pulse width error compensation control system based on an encoder provided in one embodiment of the present invention. DETAILED DESCRIPTION

[0046] To make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be described in detail below. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other implementation methods obtained by ordinary technicians in this field without creative work belong to the scope of protection of the present invention.

[0047] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

[0048] It should be noted that, in the description of the present invention, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0049] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0050] In the motor speed control system, the encoder is a commonly used speed sensor. However, due to factors such as grating processing technology and installation, the encoder pulse generally has mechanical errors, which reduces the speed measurement accuracy and affects the performance of the speed control system.

[0051] The traditional M / T method (the most typical pulse speed measurement methods are frequency measurement (M method) and period measurement (T method)) can provide high speed measurement accuracy, but at low speeds, the encoder pulse period is long and is easily affected by pulse width errors. The method based on the estimated speed algorithm in the prior art improves the response speed of the speed regulation system, but the estimated speed is not accurate and is not verified, so it cannot effectively solve the encoder pulse width error problem.

[0052] Based on this, an embodiment of the present invention provides a pulse width error compensation method for an encoder and related equipment. After calculating the pulse width error offset of the pulse, the method determines the pulse width error ratio according to the offset, thereby compensating the calculated current speed according to the pulse width error ratio. The current speed may be the speed calculated according to the M / T method, and since the current speed is compensated, the accuracy and precision of the speed measurement are improved.

[0053] It is worth noting that the encoder-based pulse width error compensation method provided in the embodiment of the present invention can be integrated on a DSP module to perform compensation calculations; it can also be integrated on other devices according to the technology, which is not specifically limited in this application.

[0054] Figure 1 FIG. 1 is a flow chart of a pulse width error compensation method based on an encoder provided by an embodiment of the present invention. Figure 1 , this embodiment may include the following steps:

[0055] S101, calculating the pulse width error offset of the pulse according to the parameter information of the encoder operation;

[0056] S102, determining a pulse width error ratio based on the pulse width error offset;

[0057] S103, determining a current rotation speed of the motor calculated according to a preset algorithm, and compensating the current rotation speed according to the pulse width error ratio.

[0058] The parameter information may be the resolution of the encoder, the frequency multiplication of the pulse, etc., which may be obtained by pre-recording or real-time collection. In this embodiment, the DSP module is taken as an example to illustrate the specific compensation method, and the data collection method may be obtained through a data processing module (e.g., an FPGA module).

[0059] The preset algorithm may be the M / T method, and this embodiment is described by taking the M / T method as an example.

[0060] It can be understood that after calculating the pulse width error offset of the pulse, the method determines the pulse width error ratio according to the offset, thereby compensating the calculated current speed according to the pulse width error ratio. The current speed can be the speed calculated according to the M / T method, and the accuracy and precision of the speed measurement are improved due to the compensation.

[0061] In order to illustrate the technical solution, the present invention also provides a system embodiment.

[0062] Figure 4 is a schematic diagram of a pulse width error compensation control system based on an encoder provided by an embodiment of the present invention, see Figure 4 The encoder-based pulse width error compensation control system provided in an embodiment of the present invention may include: an encoder-based pulse width error compensation device 41, a data processing module 42, an encoder module 43 and a motor 44; the pulse width error compensation device and the data processing module are connected to the motor through a driving module 45 and an encoder module respectively; the data processing module is used to obtain parameter information.

[0063] The encoder-based pulse width error compensation device 41 may be a DSP module, and the data processing module 42 may be an FPGA module.

[0064] The FPGA module can perform phase discrimination on the encoder pulse to determine the rising and falling edges of the pulse. The specific steps can be:

[0065] 1. Detect rising and falling edges:

[0066] The FPGA receives the encoder pulse signal through a high-speed I / O port. Use edge detection logic (such as a D flip-flop) to detect the rising and falling edges of the pulse. When a rising edge is detected, one event is triggered; when a falling edge is detected, another event is triggered.

[0067] 2. Record phase information: By detecting the rising and falling edges, record the phase information of each pulse. For example, a counter can be used to record the phase change of each pulse.

[0068] The detection accuracy of pulses is ensured by using high-speed I / O ports and edge detection logic; the parallel processing capability of FPGA enables pulse phase detection to be performed efficiently in a real-time environment.

[0069] After the FPGA module performs phase detection on the encoder pulse, it performs counting processing: counting the high-frequency reference pulses and recording the number of encoder pulses at the same time, which may specifically include the following steps:

[0070] 1. High-frequency reference pulse counting: FPGA receives high-frequency reference pulse signals through high-speed I / O ports. A counter is used to count the high-frequency reference pulses. The counter is reset to zero in each sampling cycle and starts counting again.

[0071] 2. Encoder pulse counting: FPGA counts encoder pulses at the same time. Another counter is used to record the number of encoder pulses in each sampling period.

[0072] 3. Data transfer: FPGA transfers the high-frequency reference pulse count value and encoder pulse count value to DSP. Data is transferred to DSP through a high-speed communication interface (such as SPI, I2C or UART).

[0073] Subsequent usage data:

[0074] Speed ​​calculation: DSP calculates the motor speed based on the received high-frequency reference pulse count value and encoder pulse count value using the M / T method and steady-state speed measurement method.

[0075] Error compensation: DSP performs real-time compensation for the speed measured by the M / T method based on the calculated pulse width error ratio.

[0076] The FPGA can transmit the rotation direction information and the count values ​​of each counter to the DSP, so that the DSP module executes the encoder-based pulse width error compensation method provided in the above embodiment.

[0077] It can be understood that the encoder-based pulse width error compensation control system provided in the embodiment of the present invention adopts a data processing module to acquire data, providing a data basis for the pulse error compensation device, and the compensation device calculates the pulse width error offset of the pulse when performing compensation, and then determines the pulse width error ratio according to the offset, thereby compensating the calculated current speed according to the pulse width error ratio. Among them, the current speed can be the speed calculated according to the M / T method, and since it is compensated, the accuracy and precision of the speed measurement are improved.

[0078] In some embodiments, the parameter information of the encoder operation includes: resolution, pulse frequency multiple; the pulse width error offset of each pulse is calculated according to the parameter information of the encoder operation, including:

[0079] Calculating the target angle of the pulse according to the resolution and the first calculation rule; and calculating the actual angle of the pulse according to the frequency multiplication number of the pulse and the second calculation rule;

[0080] The pulse width error offset is calculated according to the target angle and the actual angle.

[0081] The first calculation rule may be:

[0082]

[0083] For each pulse i, the target angle θ can be calculated by the above formula theo ; Where n is the encoder resolution.

[0084] The second calculation rule may be:

[0085]

[0086] Calculate the actual angle θ by the above formula actual ; Mi is the pulse number corresponding to the i-th pulse, and Δt is the time to count Mi pulses.

[0087] It can be understood that the target angle and the actual angle can be accurately obtained through the resolution and the pulse frequency multiple to assist in calculating the pulse width error offset.

[0088] In some embodiments, the calculating the pulse width error offset according to the target angle and the actual angle includes:

[0089] The difference between the actual angle and the target angle is used as the pulse width error offset.

[0090] For example, the error offset θ can be calculated ei :

[0091] θ ei =θ actual -θ theo

[0092] It can be understood that by taking the difference between the two as the offset, the pulse width error offset is accurately reflected.

[0093] For example, the specific calculation process can be:

[0094] Assumption: encoder resolution n=1024.

[0095] For the 100th pulse, calculate the corresponding theoretical angle θ theo :

[0096]

[0097] Calculate the actual angle θ of the 100th pulse actual :

[0098]

[0099] Pulse width error offset:

[0101] Pulse width error ratio:

[0103] In some embodiments, determining the pulse width error ratio based on the pulse width error offset includes:

[0104] The ratio of the pulse width error offset to the resolution of the preset coefficient is used as the pulse width error ratio.

[0105] The specific calculation formula of pulse width error ratio is as follows:

[0106]

[0107] Among them, θ ei is the ith pulse width error offset, and n is the encoder resolution.

[0108] It can be understood that the pulse width error ratio can be accurately calculated through this calculation formula.

[0109] In some embodiments, compensating the current rotation speed according to the pulse width error ratio includes:

[0110] Calculating a compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time;

[0111] The product of the compensation coefficient and the current rotation speed is used as the compensated rotation speed.

[0112] It can be understood that the calculation of the compensation coefficient is used to assist in calculating the compensated rotational speed.

[0113] In some embodiments, the calculating of the compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time includes: calculating the compensation coefficient according to a compensation coefficient calculation formula; wherein the compensation coefficient calculation formula includes:

[0114]

[0115] Among them, λ i and λ i+N are the pulse width error ratios corresponding to the starting and ending positions of the sampling pulse, and N is the number of counts of the encoder pulse within the sampling pulse time.

[0116] According to the calculated pulse width error ratio, the speed measured by the M / T method is compensated in real time. The compensation formula is as follows:

[0117]

[0118] Among them, ω0 is the speed after compensation, and ω is the speed measured by the M / T method.

[0119] It is understandable that by supplementing the rotational speed, the speed measurement accuracy is improved.

[0120] In some embodiments, it also includes:

[0121] Receive the rotation direction information of the motor;

[0122] The speed and phase of the motor are adjusted according to the compensation data and the received rotation direction information.

[0123] It can be understood that the rotation direction information is sent by the FPGA module, the speed of the motor is adjusted according to the compensation data, and the phase of the motor is adjusted according to the rotation direction information.

[0124] In this embodiment, the system design is described:

[0125] A. Hardware Design:

[0126] FPGA module: The FPGA module is responsible for the phase detection and counting of the encoder pulses, and transmits the rotation direction information and the count values ​​of each counter to the DSP. The FPGA module uses high-performance FPGA chips, such as Xilinx's Spartan-6 series or Altera's Cyclone IV series.

[0127] DSP module: The DSP module is responsible for speed calculation and error compensation to complete the vector control of the motor. The DSP module uses high-performance DSP chips, such as TI's TMS320F28335 series.

[0128] Motor drive module: The motor drive module is responsible for driving the motor and uses a high-performance motor driver, such as the Siemens 6RA70 converter.

[0129] Encoder module: The encoder module is responsible for providing the motor speed signal and uses a high-resolution incremental encoder, such as the TRD-MX series.

[0130] B. Software Design:

[0131] FPGA software: FPGA software is responsible for the phase detection and counting processing of encoder pulses and is written in Verilog or VHDL. FPGA software includes pulse phase detection module, counting processing module and data transmission module.

[0132] DSP software: DSP software is responsible for speed calculation and error compensation, and completes the vector control of the motor. It is written in C language. DSP software includes speed calculation module, error compensation module and vector control module.

[0133] C. System experimental steps:

[0134] Error calibration: When the motor speed is stable at 50r / min, run for 15 minutes and calibrate the encoder pulse width error ratio. The sampling period is 0.01 seconds. During the calibration process, the motor speed is constant and the small fluctuation is the key to calibrating the pulse width error ratio. The speed will also affect the accuracy of the calibration. At low speed, the high-frequency pulse count value in the time corresponding to the encoder pulse width and the pulse width error is large, and the quantization error of the high-frequency count pulse is small; but too low a speed will reduce the anti-interference performance of the speed regulation system and increase the speed fluctuation. Therefore, the speed of the calibration process should be based on ensuring the anti-interference performance of the motor and run at a constant low speed.

[0135] Dynamic test: The given speed changes from 450r / min to 750r / min, and the motor output waveform is recorded. The dynamic waveform is the motor output waveform when the given speed changes from 450r / min to 750r / min, and the steady-state waveform is the motor output waveform when the motor is running stably at a speed of 50r / min. It can be seen from the speed waveform that the M / T method speed regulation system has good dynamics, but the speed fluctuates greatly in the steady state; the speed measurement method combining the M / T method with the steady-state speed measurement method improves the dynamics and steady-state performance of the speed regulation system.

[0136] Steady-state test: The motor runs stably at 50r / min and the motor output waveform is recorded. The experimental results show that the compensation method based on the encoder pulse width error ratio effectively suppresses the influence of the encoder pulse error on the speed regulation system without affecting the dynamic performance of the speed regulation system, and improves the dynamic and static speed measurement accuracy of the speed measurement system.

[0137] D. System optimization:

[0138] Algorithm optimization: By optimizing the pulse width error ratio calculation algorithm, the calculation accuracy and speed are improved. Specific optimization methods include using high-precision mathematical library functions, reducing calculation complexity and improving algorithm parallelism.

[0139] Hardware optimization: Improve the real-time performance and reliability of the system by optimizing the hardware design of FPGA and DSP. Specific optimization methods include using high-performance FPGA and DSP chips, optimizing hardware circuit design, and improving the anti-interference performance of hardware.

[0140] System integration: Improve the overall performance of the system by optimizing the system integration design. Specific optimization methods include optimizing the system architecture design and improving the scalability and maintainability of the system.

[0141] Through the above implementation, the present invention provides a speed measurement method based on encoder pulse width error compensation, which can effectively improve the speed measurement accuracy of the motor speed regulation system and has broad application prospects. The method can not only improve the dynamic and static speed measurement accuracy of the speed measurement system, but also improve the real-time performance and reliability of the system, and is applicable to various motor speed regulation systems.

[0142] Based on a general inventive concept, an embodiment of the present invention further provides an encoder-based pulse width error compensation device for implementing the above method embodiment.

[0143] Figure 2 A pulse width error compensation device based on an encoder is provided in one embodiment of the present invention. Figure 2 , the encoder-based pulse width error compensation device provided in this embodiment includes:

[0144] The first processing module 21 is used to calculate the pulse width error offset of the pulse according to the parameter information of the encoder operation;

[0145] A second processing module 22, configured to determine a pulse width error ratio based on the pulse width error offset;

[0146] The third processing module 23 is used to determine the current rotation speed of the motor calculated according to a preset algorithm, and compensate the current rotation speed according to the pulse width error ratio.

[0147] Furthermore, the parameter information of the encoder operation includes: resolution, pulse multiples, and a first processing module, which is specifically used to calculate the target angle of the pulse according to the resolution and the first calculation rule; and to calculate the actual angle of the pulse according to the pulse multiples and the second calculation rule; and to calculate the pulse width error offset according to the target angle and the actual angle.

[0148] Furthermore, the first processing module is specifically configured to use the difference between the actual angle and the target angle as the pulse width error offset.

[0149] Furthermore, the second processing module is specifically configured to use the ratio of the pulse width error offset to the resolution of the preset coefficient as the pulse width error ratio.

[0150] Furthermore, a third processing module is used to calculate a compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time; and to use the product of the compensation coefficient and the current rotation speed as the compensated rotation speed.

[0151] Furthermore, the third processing module is used to calculate the compensation coefficient according to the compensation coefficient calculation formula; wherein the compensation coefficient calculation formula includes:

[0152]

[0153] Among them, λ i and λ i+N are the pulse width error ratios corresponding to the starting and ending positions of the sampling pulse, and N is the number of counts of the encoder pulse within the sampling pulse time.

[0154] Furthermore, it also includes: a receiving module, used to receive the rotation direction information of the motor;

[0155] The third processing module is also used to adjust the speed and phase of the motor according to the compensation data and the received rotation direction information.

[0156] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0157] Based on a general inventive concept, an embodiment of the present invention further provides a pulse width error compensation device based on an encoder.

[0158] Figure 3 is a schematic diagram of a pulse width error compensation device based on an encoder provided by an embodiment of the present invention, see Figure 3 , the device comprises:

[0159] Memory 200 and processor 210;

[0160] The memory 200 is connected to the processor 210 and is used to store programs;

[0161] The processor 210 is used to implement the abnormal noise control method disclosed in any of the above embodiments by running the program stored in the memory 200.

[0162] Specifically, the electronic device may further include: a bus, a communication interface 220 , an input device 230 and an output device 240 .

[0163] The processor 210, the memory 200, the communication interface 220, the input device 230 and the output device 240 are connected to each other via a bus.

[0164] A bus may include a pathway that transfers information between components of a computer system.

[0165] The processor 210 may be a general-purpose processor, such as a general-purpose central processing unit (CPU), a microprocessor, etc., or an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present application. It may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0166] The processor 210 may include a main processor, and may also include a baseband chip, a modem, and the like.

[0167] The memory 200 stores a program for executing the technical solution of the present application, and may also store an operating system and other key services. Specifically, the program may include a program code, and the program code includes computer operation instructions. More specifically, the memory 200 may include a read-only memory (ROM), other types of static storage devices that can store static information and instructions, a random access memory (RAM), other types of dynamic storage devices that can store information and instructions, a disk storage, a flash, and the like.

[0168] The input device 230 may include a device for receiving data and information input by a user, such as a keyboard, a mouse, a camera, a scanner, a light pen, a voice input device, a touch screen, a pedometer, or a gravity sensor.

[0169] Output device 240 may include devices that allow information to be output to a user, such as a display screen, printer, speaker, etc.

[0170] The communication interface 220 may include any transceiver or the like to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), Wireless Local Area Network (WLAN), etc.

[0171] The processor 210 executes the program stored in the memory 200 and calls other devices, which can be used to implement the various steps of the method provided in the above embodiments of the present application.

[0172] Furthermore, an embodiment of the present application provides an air-conditioning device, which includes an encoder-based pulse width error compensation device, and the encoder-based pulse width error compensation device is configured to implement the various steps of the method provided in the above embodiment of the present application.

[0173] The air-conditioning equipment provided in this embodiment belongs to the same application concept as the method provided in the above-mentioned embodiments of this application, can execute the control method provided in any of the above-mentioned embodiments of this application, and has functional modules and beneficial effects corresponding to the execution of the above-mentioned methods. For technical details not fully described in this embodiment, please refer to the specific processing content of the method provided in the above-mentioned embodiments of this application, which will not be repeated here.

[0174] An embodiment of the present invention further provides a computer-readable storage medium storing a computer program, wherein the computer program implements any of the above methods when executed.

[0175] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0176] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0177] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A pulse width error compensation method based on an encoder, characterized in that: include: According to the parameter information of the encoder operation, the pulse width error offset of the pulse is calculated; determining a pulse width error ratio based on the pulse width error offset; The current rotation speed of the motor calculated according to a preset algorithm is determined, and the current rotation speed is compensated according to the pulse width error ratio.

2. The method according to claim 1, characterized in that: The parameter information of the encoder operation includes: resolution, pulse frequency multiple; the pulse width error offset of each pulse is calculated according to the parameter information of the encoder operation, including: Calculating the target angle of the pulse according to the resolution and the first calculation rule; and calculating the actual angle of the pulse according to the frequency multiplication number of the pulse and the second calculation rule; The pulse width error offset is calculated according to the target angle and the actual angle.

3. The method according to claim 2, characterized in that The step of calculating the pulse width error offset according to the target angle and the actual angle includes: The difference between the actual angle and the target angle is used as the pulse width error offset.

4. The method according to claim 1, characterized in that: The determining the pulse width error ratio based on the pulse width error offset comprises: The ratio of the pulse width error offset to the resolution of the preset coefficient is used as the pulse width error ratio.

5. The method according to claim 1, characterized in that The compensating the current rotation speed according to the pulse width error ratio includes: Calculating a compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time; The product of the compensation coefficient and the current rotation speed is used as the compensated rotation speed.

6. The method according to claim 5, characterized in that The step of calculating the compensation coefficient according to the pulse width error ratio and the number of pulses within the sampling pulse time includes: calculating the compensation coefficient according to a compensation coefficient calculation formula; wherein the compensation coefficient calculation formula includes: Among them, λ i and λ i+N are the pulse width error ratios corresponding to the starting and ending positions of the sampling pulse, and N is the number of counts of the encoder pulse within the sampling pulse time.

7. The method according to any one of claims 1 to 6, characterized in that: Also includes: Receive the rotation direction information of the motor; The speed and phase of the motor are adjusted according to the compensation data and the received rotation direction information.

8. A pulse width error compensation device based on an encoder, characterized in that: A first processing module is used to calculate the pulse width error offset of the pulse according to the parameter information of the encoder operation; A second processing module, configured to determine a pulse width error ratio based on the pulse width error offset; The third processing module is used to determine the current rotation speed of the motor calculated according to a preset algorithm, and compensate the current rotation speed according to the pulse width error ratio.

9. A pulse width error compensation device based on an encoder, characterized in that: The invention comprises a processor and a memory, wherein the processor is connected to the memory: Wherein, the processor is used to call and execute the program stored in the memory; The memory is used to store the program, and the program is at least used to execute the method according to any one of claims 1 to 7.

10. The device according to claim 10, characterized in that The device includes a DSP module.

11. A pulse width error compensation control system based on an encoder, characterized in that: include: The encoder-based pulse width error compensation device, data processing module, encoder module and motor as described in claim 9; The pulse width error compensation device and the data processing module are connected to the motor through a drive module and an encoder module respectively; The data processing module is used to obtain parameter information.

12. The method according to claim 11, characterized in that The data processing module includes an FPGA module.

13. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed, the method according to any one of claims 1 to 7 is implemented.

14. An air conditioner, characterized in that: Includes the encoder-based pulse width error compensation device as described in claim 9.

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