Method of forming photosensitive semiconductor component and photosensitive semiconductor component

Abstract

The present invention relates to a method of forming a photosensitive semiconductor component and a photosensitive semiconductor component, wherein the photosensitive semiconductor component has: a semiconductor substrate (10) of a first conductivity type as a collector layer; a lightly doped layer (11) of the first conductivity type over the substrate, the layer having regions of different thicknesses; a semiconductor base layer (12) of a second conductivity type over at least a partial region of the lightly doped layer (11); and an emitter layer (13) of the first conductivity type over at least a portion of the base layer (12), but not over at least a portion of a specific portion of the base layer (12), referred to as over a thinner region of the lowly doped layer (11).

Description

Technical Field

[0001] The invention relates to a photosensitive semiconductor component and a method for forming a photosensitive semiconductor component. In particular, the invention relates to a phototransistor for ambient light detection. Such components are used, for example, to adapt the brightness of an active optical display to the ambient light conditions, in other words, for example, to control the brightness of a backlight of a display in a vehicle or a mobile digital device depending on the ambient light. Background Art

[0002] The ambient light transistor therefore generates an adapted output, which should have a spectral sensitivity that is consistent with the perceptible active effect of the display, that is to say, on the one hand, the spectral range of the ambient lighting and, on the other hand, the range of human vision expressed by wavelength. The human eye is usually sensitive to wavelengths between about 400nm and 800nm. Wavelengths shorter than 400nm are ultraviolet (UV) light; wavelengths longer than 800nm ​​are infrared (IR) light. UV and IR radiation are usually not perceptible to the eye.

[0003] Typically, optical sensors do not adequately meet the needs of ambient light detection. If the sensitivity over a larger spectral range is considered, the sensitivity in the long wavelength range (700nm to 800nm, "red") is often relatively high, while the sensitivity in the short wavelength range (400nm to 500nm, "blue") is relatively low.

[0004] Fig. 9 A known design for adapting an ambient light sensor to the requirements of ambient light detection is shown. A cross section of a layered semiconductor design is shown. The semiconductor component 90 can be considered as a combination of a photodiode 98 and an amplifier transistor 99. It is a semiconductor device having n + The substrate 91 is constructed on a doped substrate. - In the upper region of layer 92, a p-doped layer 93 is diffused which serves as the anode of a diode 98. This is the base layer of a transistor 99 which is directly adjacent to it and directly connected to it. + A doped emitter layer 94 is diffused in the base layer 93 .

[0005] The detection characteristics are adapted by setting the thickness d1 of the layer 92 to a relatively small value compared to conventional photosensitive components, for example 2.5 μm to 3 μm. For comparison, conventional values ​​for the layer thickness are 10 μm to 30 μm. By setting d1 to a relatively small value, the wavelength-dependent absorption behavior of the radiation in the semiconductor material and in combination with the different doping levels (n in 91) are + , n in 92 -) can be utilized. Short wavelengths penetrate into the semiconductor in correspondingly small amounts and are essentially absorbed in the 3 µm of layer 92. Due to the low doping level of this layer, the lifetime of the generated charge carriers is relatively high, so that a correspondingly relatively high photocurrent corresponding to short-wave light (blue) is generated. In contrast, long-wave light (red) at least partially penetrates deeper into the semiconductor, i.e. comes from above into layer 91. Therefore, at a high doping level n + The absorption of red light in the substrate layer 91 reaches a significant degree. Due to the high doping level there, the recombination rate is also high and the carrier lifetime is relatively short. As a result, the conversion of long-wave (red) radiation into photocurrent is relatively small, allowing this design to compensate for the oversensitivity of known sensors to red light relative to blue light.

[0006] However, the disadvantage of this design is that, since the thickness d1 of the low-doped layer 92 is relatively small, the thickness d2 of the anode / base layer 93 must also be set relatively thin, about 1 μm. The emitter layer 94 is correspondingly thinner. Therefore, the overall thickness of the vertical transistor 99 in the vertical direction of the drawing becomes very small. This leads to great problems in obtaining components with only slightly varying characteristics. For Fig. 9 For a very flat design as shown, the characteristic values ​​of the transistors can differ from each other by a factor of 5, so the value of such components is limited. Summary of the invention

[0007] Therefore, an object of the present invention is to provide a semiconductor component and a method for manufacturing the same, so that a semiconductor component that is better suited for ambient light detection and has a less variable characteristic value can be manufactured.

[0008] This object is achieved by the following features.

[0009] In the layered design according to the invention, a highly doped substrate as collector is provided, a semiconductor layer of equal quality but lower doping is located thereon, a base layer doped in the opposite direction therein or thereon, and then an emitter layer doped like the substrate in regions therein or thereon. Viewed in a vertical section (perpendicular to the substrate surface), the low-doped layer and / or the base layer here have regions of different thicknesses arranged laterally adjacent to each other, so that the transistor part of the semiconductor component is formed in the thicker regions of the lower-doped layer and / or the base layer, and the diode part in the thinner regions.

[0010] Thus, the lower doped layer (which is thicker in the transistor region) is formed thinner in the diode region, which makes it possible to enhance the effect of partially adapting the diode to the characteristic line through the mechanism of reducing the red sensitivity described above. Conversely, in the thicker region, the transistor can also have a thicker structure as viewed in the vertical direction of the drawing, wherein the lower doped layer, as well as the base layer and the emitter layer, can be configured to be thicker in the thick region of the lower doped layer, making it simple to reduce the variation in transistor characteristics.

[0011] As a result, the base layer has thicker regions (in the transistor part) and thinner regions (in the diode part), which reduces the adverse reaction of the base doping on the photocurrent generation due to the entry of short-wave light into the lower-doped layer arranged below it. The thickness of the lower-doped layer can thus be selected to a fixed higher value than the ideal value required for red suppression, up to conventional values. The transistor part can then also be designed to be thicker and therefore have better reproducibility.

[0012] Embodiments may preferably be combined, ie both the lower doped layer and the base layer are formed as thinner regions in the diode portion, to obtain a combined effect of red reduction and blue enhancement.

[0013] A method for forming a photosensitive semiconductor component is provided, comprising the following steps: providing a semiconductor substrate of a first conductivity type as a collector layer, forming a low-doped layer of the first conductivity type on the substrate, forming a semiconductor base layer of a second conductivity type therein or thereon, and forming an emitter layer of the first conductivity type therein or thereon, so that part of the base layer area is not covered by the emitter layer, wherein the low-doped layer and / or the semiconductor base layer are formed into areas of different thicknesses, and the emitter layer is formed in an area where the low-doped layer and / or the semiconductor base layer has a maximum thickness.

[0014] More specifically, a method for forming a photosensitive semiconductor component is provided, comprising the following steps: a) providing a semiconductor substrate of a first conductivity type as a collector layer; b) forming a low-doped layer of the first conductivity type, wherein: a first region of the low-doped layer has a first thickness, formed on or within a first region of the substrate surface, the first thickness is less than a first threshold, a second region of the low-doped layer has a second thickness, formed on or within a second region of the substrate surface, the second thickness is higher than a second threshold, and the second threshold is higher than the first threshold, wherein the first region and the second region of the substrate surface are adjacent to each other on or within the substrate surface, or they include a transition on or within the substrate surface. A transition region, a transition region of a low-doped layer is formed above or within the transition region, and the doping concentration in the low-doped layer is set to be less than the doping concentration of the substrate; c) a semiconductor base layer of a second conductivity type is formed above or within the low-doped layer, the semiconductor base layer having a first base layer region located above at least a portion of the first region of the low-doped layer, a second base layer region located above at least a portion of the second region of the low-doped layer, and optionally a transition base layer region located above at least a portion of the transition region of the low-doped layer; d) an emitter layer of the first conductivity type is formed above or within the second base layer region, so that at least a portion of the first base layer region is not covered by the emitter layer.

[0015] The first region and the second region of the low-doped semiconductor layer can be manufactured in the following manner: a) first, a first semiconductor layer with a lower doping level is applied to a semiconductor substrate, preferably in an epitaxially manner; b) then, the first semiconductor layer is further doped on the first region of the substrate surface, preferably to a doping level that is either higher or lower than that of the substrate; c) then a second semiconductor layer with an even lower doping level is applied to the first semiconductor layer, preferably in an epitaxially manner.

[0016] The first region and the second region of the low-doped semiconductor layer can also be manufactured in the following manner: a) first, a first semiconductor layer with a lower doping level is applied to a semiconductor substrate, preferably by epitaxy; b) then, the second semiconductor layer is applied to the first semiconductor layer on the second region of the substrate surface, and this application is not performed on the first region of the substrate surface.

[0017] The first region and the second region of the low-doped semiconductor layer can also be manufactured in the following manner: a) first, a semiconductor layer with a lower doping level is applied to the semiconductor substrate, preferably by epitaxy, and the layer has the thickness of the second region of the low-doped semiconductor layer; b) then, the semiconductor layer on the first region of the substrate surface is removed, preferably by etching, until the thickness of the first region of the low-doped semiconductor layer is achieved.

[0018] The method as described above is also provided as follows: a) a low-doped layer is formed on a substrate to a uniform thickness or a non-uniform thickness; b) a base layer is then diffused into the low-doped layer; c) a partial area of ​​the base layer is then further deepened; d) an emitter layer is then formed in or on the deepened area of ​​the base layer.

[0019] In the above method, the first conductivity type is n-doped and the second conductivity type is p-doped. However, the opposite approach may also be adopted.

[0020] A photosensitive semiconductor component has a) a semiconductor substrate of a first conductivity type as a collector layer; b) a low-doped layer of the first conductivity type located above the substrate, the layer having regions of different thicknesses; c) a semiconductor base layer of the second conductivity type located above at least a portion of the low-doped layer; and d) an emitter layer of the first conductivity type located above at least a portion of the base layer, but the emitter layer is not located above at least a portion of a specific portion of the base layer, the specific portion being located above a thinner region of the low-doped layer.

[0021] A further photosensitive semiconductor component has a) a semiconductor substrate of a first conductivity type as a collector layer; b) a low-doped layer of the first conductivity type located above the substrate; c) a semiconductor base layer of a second conductivity type located above at least a portion of the low-doped layer, the layer having regions of different thicknesses; and d) an emitter layer of the first conductivity type located above at least a portion of the thicker region of the base layer, but not located above at least a portion of the thinner region of the base layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Embodiments of the present invention will be described below with reference to the accompanying drawings; the drawings include: Figure 1 is an example of a semiconductor component according to the present invention; Figure 2 is a schematic diagram of the first manufacturing method; Figure 3 is a schematic diagram of the second manufacturing method; Figure 4 is a schematic diagram of the third manufacturing method; Figure 5 is a cross-sectional view of another example of a semiconductor element; Figure 6 is a schematic diagram of another manufacturing method; Figure 7 is a schematic diagram of yet another manufacturing method; Figure 8 is a plan view of a wafer; Fig. 9 is an example of the prior art. DETAILED DESCRIPTION

[0023] Figure 1 FIG. 1 shows a schematic cross-sectional view of a single semiconductor component 1. Figure 8 In FIG, the cross section may be located at a position marked by arrow AA along a dotted line perpendicular to the drawing plane. Figure 1 In, and Figure 5 In the figure, it is assumed that the area where the light is incident is the surface of the semiconductor device shown at the top of the picture. The semiconductor device is usually built on a substrate 10, and its thickness t9 can be about 100μm, for example greater than 200μm, or greater than 300μm and less than 1mm, or less than 700μm.

[0024] Figure 1 The substrate 10 shown is highly n-doped (n + ). Compared with the substrate, the lower n-doping (n - ) is located above it. The p-doped base layer is marked 12, and the n + The doped emitter layer is referenced by 13 .

[0025] Figure 1 The thickening of the low-doped layer 11 and the thickening of the base layer 12 are shown in the right part of the picture, corresponding to the transistor area. The thickness of the low-doped layer (and the thickness of other layers) is here understood to be measured from the free surface 2 of the semiconductor component and thus includes the thickness of the layers thereon.

[0026] exist Figure 1 , t1 represents the thickness of the lower doped layer 11 in its thinner region; t2 is the thickness of the lower doped layer 11 in its thicker region; t3 is the thickness of the base layer in its thinner region; and t4 is the thickness of the base layer 12 in its thicker region. Figure 1 It is shown where the lower doped layer 11 is designed to be thick (right part of the figure, transistor part of the semiconductor component), the base layer 12 is also designed to be thick, and vice versa (left part of the figure, in the diode part of the semiconductor component).

[0027] exist Figure 1 In the example of FIG. 1 , different designs of the thickness of the lower doped layer 11 can be achieved by further doping a (lower) region of the lower doped layer, as will be described later. These regions are Figure 1 The region marked as 10a in FIG. 1 corresponds to the region whose doping level reaches the level of substrate 10 (n + ). In a plan view, the thick and thin regions of the lower doped layer 11 and the base layer 12 are arranged adjacent to each other in a left-to-right direction, which is also shown in FIG. Figure 1, and preferably with a transition region therebetween. On the region of the substrate marked 10-1, a first region 11-1 of smaller thickness of the lower doped layer 11 and a first region 12-1 of smaller thickness of the base layer 12 are provided. It roughly corresponds to the diode region of the semiconductor component. On the region of the substrate marked 10-2, a second region 11-2 of larger thickness of the lower doped layer 11 and / or a second region 12-2 of larger thickness of the base layer 12 are provided. It roughly corresponds to the transistor region of the semiconductor component. A transition region 10-3 with a certain thickness w can be provided between the regions 10-1 and 10-2 of the substrate, and the above-mentioned different sizes / thicknesses merge into each other therebetween. The transition region 11-3 of the lower doped layer 11 and the transition region 12-3 of the base layer are provided on the transition region 10-3 of the substrate.

[0028] Figure 1 The effect of the design shown is that the relevant dimensions adapted for red suppression are arranged in the regions 10-1, 11-1 and 12-1 which correspond substantially to the photodiodes. The thickness t1 of the lower doped layer 11 is relatively small, so that a significant part of the long wavelength is absorbed in the doped region 10a arranged therebelow, which is, for example, more highly doped to n. + The red absorption is generated in the region of high recombination, so that the contribution of long wavelength to the signal becomes smaller. Dimensions associated with enhancing the reproducibility of transistor characteristics are set in regions 10-2, 11-2, 12-2 and 13 that substantially correspond to the vertical bipolar transistors.

[0029] The thickness t2 of the lower-doped layer 11 and the thickness t4 of the base layer 12 (measured from the substrate surface 2 ) are relatively large, so that difficulties resulting from the known planar structure of the transistor in obtaining reproducible characteristic values ​​for the transistor are compensated.

[0030] It should be noted that the thicknesses t1 and t2 of different regions of the lower doped layer 11 are determined from the substrate surface 2, thereby including the thickness of the corresponding region of the base layer located thereon. The thickness t4 of the thicker portion 12-2 of the base layer 12 also includes the thickness t5 of the emitter layer 13 accordingly.

[0031] The transition regions 10-3, 11-3, 12-3 do not have their own technical functions. However, they effectively serve as regions in which adjacent regions of different sizes of the layer merge into each other. Their width w also depends on the necessity and limitations therefrom and can be very small.

[0032] refer to Figure 2 a to f, describe a method for manufacturing a semiconductor component, wherein the lower doped layer 11 has regions of different thicknesses. The method is suitable for manufacturing Figure 1 Example shown.

[0033] Typically, the described semiconductor components are not produced individually, but rather as part of a larger wafer arranged in rows next to each other, e.g. Figure 8 As indicated, for production Figure 1 and Figure 5 Examples in . Figure 8 The arrangement of a large number of semiconductor components 1 to be produced in a rectangular / square pattern is shown by way of example, which are reproduced by the manufacturing process on a larger wafer 70. The semiconductor components 1 arranged adjacent to each other are processed simultaneously in the same way by corresponding appropriate processing steps and are ultimately individualized by being cut along the blank spaces between them. Figure 2 (as well as Figure 3 , 4 6) show the steps and processes for a single semiconductor component 1 as if it were produced separately. However, in reality, in many cases, it is produced in parallel with other semiconductor components 1, such as Figure 8 shown.

[0034] Figure 2 a shows a wafer 10 composed of a semiconductor material. The semiconductor material is n-doped, in particular to n + Doping concentration.

[0035] Corresponds to Figure 2 b, with a lower doping level n - The first semiconductor layer 11 a is preferably provided in a surface-covering manner.

[0036] Corresponds to Figure 2 c, part of layer 11a is further n-doped to reach a higher n-doping concentration, which may still be lower than the n-doping concentration of substrate 10. + The concentration may be either the same or even higher. This portion which once belonged to the lower doped layer 11 thus in fact becomes part of the higher doped substrate 10, which is indicated with the reference numeral 10a.

[0037] Corresponds to Figure 2 d, with a lower doping level n - A second semiconductor layer 11b is applied to the first layer 11a. Figure 2 After the process shown in d, the lower doped layer 11 exhibits a thinner region with a thickness t1 on the left and a thicker region with a thickness t2 on the right.

[0038] Layers 11a and 11b can be provided by epitaxy. - The doping preferably already takes place during the epitaxy of these layers.

[0039] Corresponds to Figure 2 e, then the base layer 12 is formed. It is p-doped and its thickness in the thicker part of the lower doped layer 11 can be thicker than in the thinner part of the lower doped layer 11. Thus, it obtains different thicknesses t3 and t4, such as Figure 2 Here, only the thicker region 12 - 2 can be generated first, and then the thinner region 12 - 1 adjacent thereto can be generated.

[0040] It is important that the regions of the more low-doped layer 11 remain below the corresponding regions of the base layer 12, which allows a distinct spaced charge region to be formed further on the doped region 10a towards the more high-doped layers of the substrate 10.

[0041] Corresponds to Figure 2 The emitter layer 13 having a thickness t5 is finally formed in the thicker part of the base layer 12. It can be diffused in such a way that the n-doped substance is diffused into the p-doped region of the previous base layer 12. The emitter layer 13 can act as an emitter, and the substrate layer 10 can act as a collector.

[0042] In the vertical direction of the drawing, the emitter layer 13 retains a portion of the thicker portion of the base layer 12 as is, so that the vertical transistor appears as a transistor composed of n + 13. p12. n - 11 and n + 10. Figure 2 In contrast, the photodiode is formed by p12, n - 11 and n + 10a, 10.

[0043] Figure 3 Another possibility for forming a semiconductor component is shown, whose more low-doped layer 11 has regions of different thicknesses. Figure 3 The steps a and b correspond qualitatively to Figure 2 However, the thickness t1 of the first semiconductor layer 11 a is the same as the final desired thickness of the thinner region 11 - 1 of the lower doped layer 11 .

[0044] exist Figure 3 To the right of c, the lower doped n -A second semiconductor layer 11d of a certain degree is provided on the semiconductor layer 11a. The layers 11a and 11d here can also be provided in an epitaxial manner again, for example, by using a suitable mask. The second semiconductor layer 11d is manufactured so that the final desired total thickness t2 of the two layers 11a and 11d corresponds to the thickness of the thicker region 11-2 of the lower doped layer 11. The substrate surface 2 is thus no longer formed to be flat, but rather stepped.

[0045] Corresponds to Figure 3 d, then the base layer 12 is manufactured, for example by diffusing p-material into the surface from above. The base layer 12 can be made to have a smaller thickness t3 in the thinner region 11-1 of the lower doped layer 11 than in the thicker region 11-2 of the low doped layer 11, wherein the base layer 12 has a thickness t4 greater than t3 in the latter.

[0046] The manufacturing process may leave a region of the low-doped layer 11 intact, which region is to the left of the region where the base layer 12 reaches the surface 2 .

[0047] Finally, corresponding to Figure 3 e, the emitter layer 13 is formed, which can be manufactured by implanting n material from above to a desired thickness t5, t5 being less than t4.

[0048] As a result, a product with electrical characteristics corresponding to Figure 2 semiconductor components.

[0049] Figure 4 Another embodiment of a method for manufacturing a semiconductor component is shown. Figure 4 a and b correspond qualitatively to Figure 2 The corresponding contents are not further explained. However, the lower doped layer 11e is initially produced, for example by epitaxy, to have a thickness t2, which corresponds to the final desired thickness of the thicker region 11-2 of the lower doped layer 11. Thus, In this way, the generated + concentration as the collector layer and a higher doped substrate 10 having n - The lower doping layer 11 with a lower concentration is designed in a layered manner.

[0050] Corresponds to Figure 4 The base layer 12 is then formed, for example by diffusing p-type material from above into the lower doped layer 11. This process continues until a layer thickness t4 is reached, which corresponds to the final desired layer thickness of the thicker region 12-2 of the base layer 12.

[0051] For simplicity, Figure 4The following two working steps are shown in FIG. 2 , which can be performed in one of two possible sequences. On the one hand, a portion of the base layer 12 is removed, for example by etching, so that the base layer 12 in this region acquires a thickness t3 and the lower-doped layer 11 acquires a reduced thickness t1, measured from the component surface 2. On the other hand, the emitter layer t3 is generated in the region where the base layer 12 remains thicker, for example by diffusion with n-type material, and reaches a thickness t5.

[0052] Figure 5 An example is shown where the lower (n - ) The doped layer 11 has a substantially constant thickness t6, but the base layer has regions of different thicknesses, as has been qualitatively described previously.

[0053] It has been found that providing a thin base region ( Figure 5 The thickness t3 in the lower doped layer 11 also has the effect of improving the adaptability of the component characteristics, wherein negative reactions of the base doping during the process are thus reduced in the inter-charge region of the lower doped layer 11 located below. The thickness t6 of the lower doped layer 11 can therefore be selected to be higher than the ideal value required for red suppression, so that the transistor region can also be generated relatively thicker and thus have more easily reproducible characteristic values. With this structure, the effort of manufacturing the regions 11-1, 11-2 of different thicknesses of the lower doped layer 11 can be saved.

[0054] Figure 6 It is shown that the formation is qualitatively Figure 5 The method of the semiconductor component shown in FIG. 1 , wherein the lower doped layer 11 has a fixed thickness. Figure 6 a, as described above, first provides n + The doped substrate 10 .

[0055] Corresponds to Figure 6 b, with n - A layer 11 of concentration is formed thereon, for example epitaxially, and is grown to a final desired layer thickness t6.

[0056] like Figure 6 As shown in c and d, a base layer 12 is subsequently generated, which has regions with different layer thicknesses, such as Figure 6 As shown in c, a layer of uniform thickness t7 is generated in a partial region of the semiconductor (transistor region) by p-doping until the desired thicker layer thickness t7 reaches the final thickness. Figure 6 As shown in d, a shallower layer 12 - 2 with a thickness t3 is then generated in the adjacent region (diode region) with p-doping until the desired smaller layer thickness t3 reaches a second final thickness.

[0057] According to the relationship between the sizes, such as Figure 5 The emitter layer 13 can then be diffused into the thicker region of the base layer 12 as shown, or, as shown in FIG. Figure 6 As shown in e, it can also be applied independently to the thicker area of ​​the base layer until the thickness t8 is reached. The latter can also be carried out in an epitaxial manner. In such a construction method, the thickness of the emitter layer is not taken into account in the thickness of the thick area of ​​the base layer, nor in the thickness of the lower doped layer.

[0058] Figure 7 Figure 2 shows the beginning of another manufacturing process. + A doped substrate 10 is generated. A uniform n + Then, a higher activity dopant 72 (eg, phosphorus for n-doping) and / or a higher concentration dopant is diffused into the subsequent photodiode region 10-1, but not into the subsequent transistor region 10-2, so that n + The basic doping is maintained with a low-activity dopant 71 (eg arsenic, antimony for n-doping), such as Figure 7 As shown in a.

[0059] A more highly mobile dopant, such as phosphorus for n-doping or aluminum for p-doping, has a higher diffusion coefficient than other dopant substances and thus exhibits a greater diffusion tendency than other dopant substances, other things being equal.

[0060] In a next step, a low-doped layer 11 is formed thereon, for example by epitaxy. The more highly active n-dopant 72 diffuses upward into the adjacent, previously low-doped layer 11, this diffusion taking place simultaneously with the layer build-up and / or being induced separately in a step thereafter in the region 10-1 of the diode, so that, viewed vertically, the lower-doped previous layer 11 increases in the lower region 10a to a higher value, reaching approximately n-doped, due to the diffusion from below. + In this manner, the upward diffusion of doping atoms 72 results in a decrease in the thickness of the low-doped layer from t2, which is its thickness in the transistor region above substrate region 10-2, to t1, which is its thickness in the diode region above substrate region 10-1.

[0061] The subsequent process can be as follows Figure 2 Proceed as shown.

[0062] This allows transistors to be manufactured with relatively high vertical dimensions, so that their characteristic values ​​can be set sufficiently accurately. The adaptation of the component characteristics to the natural light detection is achieved by providing a thin region 12 - 2 of the base layer 12 , as has already been described further above.

[0063] Regarding the manufacturing process, it must be generally stated that it also includes the following steps, which are not shown: connecting contacts to at least the collector 10 and the emitter layer 13, individualization, packaging, bonding and other steps.

[0064] In the plan view, Figure 8 Individual regions in the semiconductor layer 12 can be islands, which allows the base regions 12 of the individual semiconductor components to be separated from each other by the lower doped regions 11 and thus to be individualized along this region. The corresponding emitter layer 13 can be arranged completely within the corresponding base layer 12 in the form of islands.

[0065] The dimension descriptions given herein are each to be understood in their own right and are optional in the combination of their selected representations, even if the conditions described below are not given in the description. As long as it is technically possible, these descriptions should be understood to be combined with each other in any desired manner.

[0066] Wafer 10 may have a thickness t9 that is greater than 100 µm, or greater than 200 µm, or greater than 300 µm, or greater than 400 µm, and less than 1 mm, or less than 800 µm.

[0067] The net layer thickness of the lower doped layer 11 (the distance between the lower edge of the base layer 12 and the upper edge of the highly doped layer 10, 10a along the vertical direction of the drawing) in its first region 11-1 and its second region 11-2 can be at least 1µm or at least 2µm, and / or at most 5µm or at most 4µm or at most 3µm.

[0068] The thickness t1 of the thin region of the lower doped layer 11 is less than the first threshold th1, while the thickness t2 of the thicker portion 11-2 of the lower doped layer 11 is greater than the second threshold th2. The first threshold th1 may be 7µm or 5µm or 4µm or 3µm or 2µm. The second threshold th2 may be 4µm or 5µm or may be generally k2 times the first threshold, where k2 is 1.1 or 1.2 or 1.5 or 2. The minimum thickness t1 of the first region 11-1 of the low doped layer 11 may be greater than k1 times the first threshold th1, where k1 is 0.1 or 0.2 or 0.3. The maximum thickness t2 of the second region 11-2 of the low doped layer 11 may be less than k3 times the second threshold th2, where k3 is 5 or 3 or 2 or 1.5.

[0069] The first base layer region 12-1 may have a thickness t3, which is less than a third threshold th3 and greater than 0.1 times or 0.2 times the third threshold t3, wherein the third threshold may be 3 mm or 2 µm or 0.2 times or 0.3 times or 0.4 times the first threshold th1. The second base layer region 12-2 may have a thickness t4, which is greater than a fourth threshold th4 and less than 3 times or 2 times or 1.5 times the fourth threshold th4, wherein the fourth threshold may be 2 µm or 3 µm or 4 µm or 1.5 times or 2 times or 3 times the third threshold th3.

[0070] The width w of the transition region 10 - 3 may be smaller than k4 times the first threshold th1 or k4 times the thickness of the first region 11 - 1 of the low-doped layer 11 , where k4 is 3 or 2 or 1 or 0.5 or 0.2.

[0071] The first base layer region 12 - 1 may have a thickness t3 that is less than k5 times the thickness t4 of the second base layer region 12 - 2 , wherein k5 may be 1 or 0.9 or 0.7 or 0.5 or 0.4.

[0072] The thickness t3 of the first region 12-1 of the base layer 12 may be k6 times the thickness t1 of the first region 11-1 of the lower doped layer 11, wherein k6 is greater than 0.2 or greater than 0.3 and / or less than 0.5 or less than 0.3 or less than 0.1 or less than 0.05.

[0073] The thickness t4 of the second region 12-2 of the base layer 12 may be k7 times the thickness t3 of the second region 11-2 of the lower doped layer 11, wherein k7 is greater than 0.1 or greater than 0.2 or greater than 0.5 or greater than 0.6, and / or less than 0.9 or less than 0.8 or less than 0.7.

[0074] The thickness t5 of the emitter layer 13 may be k8 times the thickness t4 of the second region 12 - 2 of the base layer 12 , wherein k8 is greater than 0.2 or greater than 0.4 or greater than 0.6, and / or less than 0.99 or less than 0.9 or less than 0.8 or less than 0.7.

[0075] Figure 5 The thickness t6 of the lower doped layer 11 may be thicker than a lower limit of 3 µm, 4 µm or 5 µm, and thinner than an upper limit of 15 µm, 10 µm, 8 µm or 6 µm. The thickness t7 of the thicker region of the base layer may have Figure 1 The thresholds th3 and th4 of the different thicker regions 12-2 and 12-2 formed in the base layer 12 can be referenced as follows: Figure 1 As described, or may be reduced by 20%, 30% or 40% compared thereto. Figure 5 The thickness t5 of the emitter layer 13 shown can be used as a reference Figure 1 As described, or may be reduced by 20%, 30% or 40% compared thereto. Figure 6 The thickness t8 of the emitter layer 13 shown may be thicker than a lower limit of 1 µm or 2 µm, and thinner than an upper limit of 6 µm or 5 µm or 4 µm or 3 µm.

[0076] The dimensions in plan view may be as follows: the semiconductor component may have a*b dimensions, where a may be between 0.3 mm and 1 mm, preferably approximately 0.7 mm, and b may be between 0.3 mm and 1 mm, preferably approximately 0.7 mm. The transistor portion may occupy 5% to 35%, preferably 17% to 22% of its surface; the diode may occupy 65% ​​to 95%, preferably 78% to 83% of the surface.

[0077] The following doping levels can be used: Substrate 10: n + , 10 17 –3*10 19 Low-doped layer11: n-, 5*10 12 –10 16 Base layer 12: p, 10 15 –10 18 ·Emitter layer 13: n + , 5*10 18 –10 20 .

[0078] In this specification, although the combination of features is not explicitly described, as long as the combination is technically possible, the features should be understood to be combined with each other. Features described in a specific context or in a drawing or in a claim or example should also be understood to be separated from the context, drawing, claim or example, and should be understood to be combined with other contexts, drawings, claims or examples, as long as the combination is technically possible. The description of the method steps should also be understood as a description of the resulting product, and vice versa.

[0079] In terms of the location or dimensioning of the thickness of a layer, if there are no particularly different results, this should be understood to start from the substrate surface referred to, up to the distal layer boundary. If a parameter is associated with a thickness, such as t1, this does not in itself mean that the thickness must have a constant value. If the transition between layers is not clearly delineated, the center value of the transition area can be assumed as the layer boundary. If a fixed (approximately) layer thickness is mentioned, this should be understood to mean that it can have deviations of ±10% or ±5% or ±2% from the nominal value. If a base layer is mentioned, it does not have the function of a transistor base over its entire area. It is regionally used as part of a diode, in particular as the anode of the diode.

[0080] In order to simplify the description of the invention, NPN transistors are shown in the drawings. They or individual layers are also referred to as such in the description. However, this does not exclude that the opposite structure (PNP transistor) can also be used for the invention. Different conductivity characteristics are referred to as first conductivity type and second conductivity type in the claims in a customary manner. In the drawings, the first conductivity type is n-doped and the second conductivity type is p-doped. Although only this association is described in the drawings and the description, this does not exclude the opposite arrangement, for example, the first conductivity type is p-doped and the second conductivity type is n-doped.

[0081] The names used, such as first region 10-1 of the substrate, second region 10-2 of the substrate and transition region 10-3 of the substrate, are mainly used to describe the spatial layout of the multiple regions of the various layers arranged thereon. In many embodiments, these regions cannot be distinguished on the substrate itself.

Claims

1. A method for forming a photosensitive semiconductor component, characterized in that: The steps include: providing a semiconductor substrate (10) of a first conductivity type as a collector layer, A low-doped layer (11) of a first conductivity type is formed on a substrate, wherein the doping concentration (n - ) is less than the doping concentration (n + ); forming a semiconductor base layer (12) of a second conductivity type on or within the low-doped layer (11), An emitter layer (13) of a first conductivity type is formed on or within the semiconductor base layer (12), so that part of the semiconductor base layer (12) is not covered by the emitter layer (13), The low-doped layer (11) is formed into regions of different thicknesses, including a first region (11-1) of small thickness and a second region (11-2) of large thickness, the large thickness being greater than the small thickness, and the emitter layer (13) is formed in the second region (11-2) of the low-doped layer (11); In this context, the term layer thickness is understood to mean the thickness measured from the free surface (2) of the photosensitive semiconductor component to the distal boundary of the respective layer and including the thickness of the layer above the boundary.

2. The method according to claim 1, characterized in that Reference to the thickness of a layer is understood to be measured in a vertical direction, which is perpendicular to a horizontal plane extending from the semiconductor substrate (10).

3. The method according to claim 1, characterized in that The top surface of the photosensitive semiconductor component is the area where light is incident, and the top surface is parallel to a horizontal plane extending from the semiconductor substrate (10).

4. The method according to claim 1, characterized in that The semiconductor base layer (12) is formed so as to have a first base layer region (12-1) located above at least a portion of a first region (11-1) of the low-doped layer (11) and a second base layer region (12-2) located above at least a portion of a second region (11-2) of the low-doped layer (11), the thickness of the second base layer region (12-2) being greater than the thickness of the first base layer region (12-1).

5. The method according to claim 1, characterized in that The emitter layer (13) is formed to have a thickness (t5) greater than a thickness (t3) of a portion of the semiconductor base layer (12) located on the first region (11-1) of the low-doped layer (11).

6. The method according to claim 1, characterized in that The photosensitive semiconductor component has a flat top surface.

7. A photosensitive semiconductor component, characterized in that: include: a) a semiconductor substrate (10) of a first conductivity type as a collector layer; b) a low-doped layer (11) of a first conductivity type located above the substrate, the layer having regions of different thicknesses, including a first region (11-1) of small thickness and a second region (11-2) of large thickness, the large thickness being greater than the small thickness, and the doping concentration (n - ) is less than the doping concentration (n + ); c) a semiconductor base layer (12) of a second conductivity type located above at least a portion of the low-doped layer (11); and d) an emitter layer (13) of a first conductivity type located above at least a portion of the semiconductor base layer (12), the portion of the semiconductor base layer (12) being located above the second region (11-2) of the low-doped layer (11) having a large thickness, but the emitter layer is not located above a specific portion of the semiconductor base layer (12), the specific portion being located above the first region (11-1) of the low-doped layer (11) having a small thickness; In this context, the term layer thickness is understood to mean the thickness measured from the free surface (2) of the photosensitive semiconductor component to the distal boundary of the respective layer and including the thickness of the layer above the boundary.

8. The photosensitive semiconductor device according to claim 7, characterized in that Reference to the thickness of a layer is understood to be measured in a vertical direction, which is perpendicular to a horizontal plane extending from the semiconductor substrate (10).

9. The photosensitive semiconductor device according to claim 7, characterized in that: The top surface of the photosensitive semiconductor component is the area where light is incident, and the top surface is parallel to a horizontal plane extending from the semiconductor substrate (10).

10. The photosensitive semiconductor device according to claim 7, characterized in that The semiconductor base layer comprises a first base layer region (12-1) located on at least part of a first region (11-1) of the low-doped layer (11) and a second base layer region (12-2) located on at least part of a second region (11-2) of the low-doped layer (11), wherein the thickness of the second base layer region (12-2) is greater than the thickness of the first base layer region (12-1).

11. The photosensitive semiconductor device according to claim 7, characterized in that: The emitter layer (13) has a thickness (t5) that is greater than a thickness (t3) of a portion of the semiconductor base layer (12) located on the first region (11-1) of the low-doped layer (11).

12. The photosensitive semiconductor device according to claim 7, characterized in that The photosensitive semiconductor component has a flat top surface.

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