Semiconductor sputtering equipment and method for forming compound semiconductor film

Abstract

The invention discloses semiconductor sputtering equipment and a method for forming a compound semiconductor film, and belongs to the technical field of semiconductors. The semiconductor sputtering equipment at least comprises a cavity; the at least one first target material is arranged on the first side in the cavity; the at least one second target material is arranged on the second side in the cavity; the at least one reaction gas source is used for introducing at least one reaction gas into the cavity; and the carrying table is arranged on the third side of the cavity, and a substrate is placed on the carrying table. According to the compound semiconductor sputtering equipment and the semiconductor equipment provided by the invention, a multi-component compound film can be formed through reaction.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a semiconductor sputtering device and a method for forming a compound semiconductor film. Background Art

[0002] When using semiconductor sputtering equipment to form semiconductor thin films, the target material is usually heated so that the atoms or molecules on the surface of the target material have enough energy to release. Then, the target material is bombarded with ions or neutral ions, so that the atoms or molecules on the surface of the target are sputtered onto the substrate to form a semiconductor thin film.

[0003] However, when forming semiconductor thin films, multiple factors must be considered simultaneously, including film deposition quality, particle defects, deposition efficiency, compound materials, etc. Therefore, there is still much room for improvement in current semiconductor sputtering equipment. Summary of the invention

[0004] The object of the present invention is to provide a semiconductor sputtering device and a method for forming a compound semiconductor film, which can solve the problem that the equipment used in the deposition process is relatively complicated and there are too many variables that need to be controlled in the reaction process.

[0005] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0006] The present invention provides a deposition chamber, comprising:

[0007] Cavity;

[0008] at least one first target disposed on a first side of the chamber;

[0009] at least one second target disposed on a second side of the chamber;

[0010] At least one reactive gas source for introducing at least one reactive gas into the chamber

[0011] The carrier is arranged on the third side of the cavity, and the substrate is placed on the carrier.

[0012] Cavity;

[0013] at least one first target disposed on a first side of the chamber;

[0014] at least one second target disposed on a second side of the chamber;

[0015] At least one reactive gas source for introducing at least one reactive gas into the chamber

[0016] The carrier is arranged on the third side of the cavity, and the substrate is placed on the carrier.

[0017] In one embodiment of the present invention, the first target material is disposed on the bottom wall of the chamber.

[0018] In one embodiment of the present invention, the second target material is disposed on a side wall in the cavity.

[0019] In one embodiment of the present invention, the carrier is arranged on the top wall of the cavity.

[0020] In one embodiment of the present invention, the compound semiconductor sputtering equipment further includes a susceptor, and the first target material and the second target material are arranged on the susceptor.

[0021] In one embodiment of the present invention, a first electrode is disposed in the base, and the first electrode is laid on a cross section of the base.

[0022] In one embodiment of the present invention, a magnetron is disposed in the base, and the magnetron is located on a partial cross section of the base.

[0023] In one embodiment of the present invention, the compound semiconductor sputtering equipment further comprises a pre-sputtering window, and the pre-sputtering window is allowed to rotate to a sputtering path from the second target material to the substrate.

[0024] In one embodiment of the present invention, the compound semiconductor sputtering equipment further includes a lifting structure, and the carrier is connected to the top wall of the chamber through the lifting structure.

[0025] The present invention also provides a method for forming a compound semiconductor thin film, using the semiconductor sputtering device as described in any one of the above items to form the compound semiconductor thin film.

[0026] In summary, the present invention provides a semiconductor sputtering device and a method for forming a compound semiconductor film. Multiple targets are arranged in a growth chamber, and a reaction gas is introduced so that the ions sputtered from the target react with the reaction gas to form a multi-component compound film. The present application can realize the sputtering deposition of a multi-component compound film using a reaction chamber. It can avoid the need for complex settings to form a reaction source, thereby solving the problem that the deposition process uses complex equipment and there are too many variables that need to be controlled during the reaction process.

[0027] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for describing the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 FIG. 4 is a schematic diagram of the structure of a semiconductor device in one embodiment.

[0030] Figure 2 Schematic diagram of the structure of a compound semiconductor sputtering device in one embodiment.

[0031] Figure 3 FIG. 4 is a schematic diagram of the layout of a magnetron in an embodiment.

[0032] Figure 4 FIG. 4 is a schematic diagram of the layout of a magnetron in another embodiment.

[0033] Figure 5 Schematic diagram of the structure of an electrode assembly in one embodiment.

[0034] Figure 6 Schematic diagram of the structure of the electrode assembly and the dielectric layer in one embodiment.

[0035] Figure 7 Schematic diagram of the structure of an anode sheet in one embodiment.

[0036] Figure 8 Schematic diagram of the structure of an electrostatic chuck in one embodiment.

[0037] Fig. 9 Schematic diagram of the structure of the electrode assembly and the substrate in an electrostatic chuck in one embodiment.

[0038] Fig.10 Schematic diagram of the distribution of positive and negative electrode sheets on the chuck in one embodiment.

[0039] Fig.11 Schematic diagram of the structure of a base in an electrostatic chuck in one embodiment.

[0040] Fig.12 Schematic diagram of the structure of semiconductor epitaxy in one embodiment. DETAILED DESCRIPTION

[0041] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0042] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0043] In the present invention, it should be noted that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, if the terms "first" and "second" appear, they are only used for description and distinction purposes, and cannot be understood as indicating or implying relative importance.

[0044] See also Figure 1 As shown, a semiconductor device 100 proposed in the present application can complete the transfer of wafers and the deposition of various common semiconductor films in the semiconductor device 100 provided in the present application. In one embodiment of the present invention, the semiconductor device 100 may include a physical vapor deposition device, a chemical vapor deposition device, an atomic layer deposition (ALD) device, a transfer device and / or a combination system of other semiconductor devices 100 to form a semiconductor device system.

[0045] See also Figure 1 As shown, in one embodiment of the present invention, a plurality of chambers are provided in the semiconductor device 100. Specifically, the semiconductor device 100 may include a transfer chamber, and a plurality of growth chambers provided around the transfer chamber. The growth chamber may be a physical vapor deposition chamber, or a chemical vapor deposition chamber, an atomic layer deposition (ALD) growth chamber, or other deposition working chamber. The number of transfer chambers and growth chambers may be set according to requirements.

[0046] See also Figure 1As shown, in a specific embodiment of the present invention, the semiconductor device 100 includes two transfer chambers, namely a first transfer chamber 101 and a second transfer chamber 102, and the first transfer chamber 101 and the second transfer chamber 102 are connected through a connecting channel 103. The growth chamber arranged around the first transfer chamber 101 is, for example, a plasma sputtering chamber 104, so as to realize physical deposition of semiconductor thin films on wafers. The second transfer chamber 102 is connected to the first transfer chamber 101 through two connecting channels 103, wherein one connecting channel 103 serves as a transfer path from the first transfer chamber 101 to the second transfer chamber 102, and the other connecting channel 103 serves as a transfer path from the second transfer chamber 102 to the first transfer chamber 101. The growth chamber arranged around the second transfer chamber 102 is, for example, a compound deposition chamber 105, so as to realize chemical deposition of semiconductor thin films on wafers. Among them, the compound deposition chamber 105 may, for example, include a common aluminum nitride deposition chamber, an N-type gallium nitride deposition chamber, a P-type gallium nitride deposition chamber, and an aluminum gallium nitride deposition chamber. In other embodiments, according to actual needs, more transfer chambers such as a third transfer chamber and a fourth transfer chamber may be provided in the semiconductor device 100 , and two adjacent chambers are connected through two connecting channels.

[0047] It should be noted that in some embodiments, auxiliary chambers such as cleaning chambers or preheating chambers may be provided around the transfer chamber to achieve cleaning or preheating of the semiconductor structure. In other embodiments, a robotic arm is provided in the transfer chamber to achieve the flow of wafers in each growth chamber or adjacent transfer chamber.

[0048] See also Figure 1 As shown, in one embodiment of the present invention, an inlet 106 and an outlet 107 are provided at the entrance of the transfer chamber for wafers to enter and exit. In this embodiment, the first transfer chamber 101 is used as the transfer chamber for wafers to enter and exit, that is, an inlet 106 and an outlet 107 are provided at the entrance of the first transfer chamber 101. The wafer enters the transfer chamber from the inlet 106, and the wafer is transferred out of the transfer chamber from the outlet 107. In all transfer chambers, a transfer station 108 connected to other semiconductor devices 100 is provided. Before entering other semiconductor devices 100, the wafer passes through the transfer station 108 to avoid mutual contamination between adjacent semiconductor devices 100.

[0049] It should be noted that, in other embodiments, the transfer chamber for wafers to enter and exit may also be other transfer chambers such as the second transfer chamber, the third transfer chamber or the fourth transfer chamber, and the inlet and the outlet are set at the inlet of other transfer chambers.

[0050] See also Figure 1As shown, in one embodiment of the present invention, a transition chamber (not shown) may be further provided at the entrance of the first transfer chamber 101. The transition chamber is provided between the external environment and the transfer chamber, and the transition chamber may provide a vacuum space. A wafer loading device is provided at the entrance of the transition chamber, and each wafer loading device may be provided with one, two or more wafer carriers to achieve loading of one, two or more wafers.

[0051] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, a growth chamber around the transfer chamber is a semiconductor sputtering device 200, and the semiconductor sputtering device 200 can realize the production of binary compound, ternary compound, quaternary compound or other multi-compound films.

[0052] For details, please refer to Figure 2 As shown, in one embodiment of the present invention, a semiconductor sputtering device 200 includes a chamber 201, a first target 202 disposed in the chamber 201, a second target 203 disposed in the chamber 201, a reaction gas source 204 introduced into the chamber 201, and a carrier 205. The first target 202 is disposed on the first side of the chamber 201, the second target 203 is disposed on the second side of the chamber 201, the carrier 205 is disposed on the third side of the chamber 201, and a substrate 206 is disposed on the carrier 205. The first side, the second side, and the third side represent different positions in the chamber 201, and the first target 202 on the first side and the second target 203 on the second side can be sputtered onto the surface of the substrate 206 on the carrier 205 on the third side.

[0053] It should be noted that the present application does not limit the number and position of the target materials and the reaction gas source. This embodiment is described by taking a first target material and a second target material as an example. In other embodiments, two or more first target materials and two or more second target materials may be provided in the cavity, so that the ions of the target materials can be sputtered onto the substrate, and the reaction gas source may also be provided as required.

[0054] See also Figure 2 As shown, in one embodiment of the present invention, the cavity 201 is made of high temperature resistant material, specifically alloy or other high temperature resistant material, so that the cavity 201 can withstand high temperature resistant material above 1200°C, for example.

[0055] See also Figure 2As shown, in one embodiment of the present invention, the first target material 202 is a liquid target material at room temperature, and the first target material 202 is disposed on the bottom wall inside the cavity 201, thereby ensuring that the liquid target material is stably placed. In other embodiments, if the first target material 202 is a non-liquid target material, the first target material 202 can also be disposed on the side wall inside the cavity 201, or the first target material 202 can be placed obliquely at the connection between the bottom wall and the side wall inside the cavity 201, or the first target material 202 can be placed obliquely at the connection between the top wall and the side wall inside the cavity 201.

[0056] See also Figure 2 As shown, in one embodiment of the present invention, a first pedestal 207 is provided on the bottom wall of the chamber 201, and a first target 202 is placed on the surface of the first pedestal 207. The diameter of the first target 202 is, for example, 150 mm to 400 mm. In this embodiment, the first target 202 is, for example, gallium. Gallium is liquid at room temperature. The semiconductor sputtering device 200 provided in this embodiment can realize the preparation of gallium-containing compounds. Among them, the purity of gallium is greater than or equal to 99.999%.

[0057] See also Figure 2 As shown, in one embodiment of the present invention, a first electrode 208 is provided in the first pedestal 207, and the first electrode 208 is, for example, a cathode. An electric field is formed between the first electrode 208 and the anode provided on the carrier 205, thereby causing the electrons to move toward the carrier 205. In this embodiment, in order to increase the uniformity and strength of the electric field between the first pedestal 207 and the carrier 205, the first electrode 208 is laid on the cross section of the first pedestal 207. And the orthographic projection of the first electrode 208 in the first pedestal 207 on the surface of the first pedestal 207 coincides with the first target 202, so that the electrons can be confined within the minimum range of the electric field between the first pedestal 207 and the carrier 205, thereby increasing the sputtering efficiency of the ions. That is, the diameter of the first electrode 208 in the first pedestal 207 is the same as that of the first target 202, and is, for example, 150 mm to 400 mm.

[0058] See also Figure 2 As shown, in one embodiment of the present invention, a magnetron 209 is further disposed in the first base 207. The magnetron 209 is disposed in the first base 207, and the plane where the magnetron 209 is located is parallel to the plane where the first electrode 208 is located. In this embodiment, the first base 207 is arranged in a cylindrical shape, and the cross section of the first base 207 is circular. Figure 3 and Figure 4As shown, the magnetron 209 is located in a sector-shaped cross section with the center of the first base 207 as the center and any length greater than 0 as the radius, and the central angle of the sector-shaped cross section is greater than zero. In the sector-shaped cross section, the magnetron 209 is arranged in an S shape, or the magnetron 209 covers the sector-shaped cross section. When the first base 207 rotates around the center of the first base 207 under the drive of the DC power supply 211, the first magnetron 209 rotates accordingly, and the magnetic field generated is parallel to the cross section of the first base 207. Compared with covering the cross section of the first base 207 with the magnetron 209, the magnetic field generated by arranging the magnetron 209 in the sector-shaped cross section of the first base 207 and rotating the first base 207 will be more uniform, thereby improving the uniformity of the thin film formed on the substrate 206. In some embodiments, the position and / or number of the magnetron 209 can be adjusted to adjust the magnetic field changes in the cavity accordingly.

[0059] See also Figure 2 As shown, in one embodiment of the present invention, a cooling water circuit 210 is further provided in the first base 207, and flowing cooling water is provided in the cooling water circuit 210 to ensure that the temperature of the first base 207 and the device on the first base 207 is stable within a certain range. In this embodiment, the temperature of the cooling water is, for example, 18°C ​​to 20°C.

[0060] See also Figure 2 As shown, in one embodiment of the present invention, a direct current (DC) power supply 211 and a radio frequency (RF) power supply 212 are also provided in the semiconductor sputtering device 200. The direct current (DC) power supply 211 and the radio frequency (RF) power supply 212 are electrically connected to the first electrode 208 to provide power and bias to the first electrode 208 to adjust the electric field and further adjust the path of ion sputtering. The direct current (DC) power supply 211 and the radio frequency (RF) power supply 212 can be arranged outside the cavity 201 and electrically connected to the first electrode 208 in the cavity 201 through the cavity 201. The maximum power of the direct current (DC) power supply 211 is, for example, 15000W, and the maximum power of the radio frequency (RF) power supply 212 is, for example, 8000W. During operation, the specific power of the direct current (DC) power supply 211 and the radio frequency (RF) power supply 212 can be adjusted according to actual needs.

[0061] See also Figure 2 As shown, in one embodiment of the present invention, the second target material 203 is a solid target material at room temperature, and the second target material 203 is disposed on the side wall inside the cavity 201. In other embodiments, the second target material 203 may also be disposed on the bottom wall inside the cavity 201, or the second target material 203 may be placed obliquely at the connection between the bottom wall and the side wall inside the cavity 201, or the second target material 203 may be placed obliquely at the connection between the top wall and the side wall inside the cavity 201.

[0062] See also Figure 2 As shown, in one embodiment of the present invention, in order to fix the second target 203, a second base 213 is further provided on the side wall inside the cavity 201. The second base 213 is fixed on the side wall of the cavity 201, and the second target 203 is fixed on the surface of the second base 213. The diameter of the second target 203 is, for example, 50 mm to 300 mm. In this embodiment, the first target 202 is, for example, aluminum. The purity of the aluminum is greater than or equal to 99.999%.

[0063] See also Figure 2 As shown, in one embodiment of the present invention, a first electrode 208 is provided in the second target 203, and the first electrode 208 is, for example, a cathode, and forms an electric field with the anode provided on the stage 205, thereby causing the electrons to move toward the stage 205. In this embodiment, the first electrode 208 is laid on the cross section of the second base 213. The positive projection of the first electrode 208 in the second base 213 on the surface of the second base 213 coincides with the second target 203, and the electrons can be confined within the minimum range of the electric field between the second base 213 and the stage 205, thereby increasing the sputtering efficiency of the ions. That is, the diameter of the first electrode 208 in the second base 213 is the same as that of the second target 203, and is, for example, 50 mm to 300 mm.

[0064] See also Figure 2 As shown, in one embodiment of the present invention, a magnetron 209 is further disposed in the second base 213. The magnetron 209 is disposed in the second base 213, and the plane where the magnetron 209 is located is parallel to the plane where the first electrode 208 is located. In this embodiment, the second base 213 is cylindrical, and the cross section of the second base 213 is circular. Figure 3 and Figure 4 As shown, the magnetron 209 is located in a sector-shaped cross section with the center of the second base 213 as the center and any length greater than 0 as the radius, and the central angle of the sector-shaped cross section is greater than zero. In the sector-shaped cross section, the magnetron 209 is arranged in an S shape, or the magnetron 209 covers the sector-shaped cross section. When the second base 213 rotates around the center of the second base 213 under the drive of the DC power supply 211, the second magnetron 209 rotates accordingly, and the magnetic field generated is parallel to the cross section of the second base 213. Compared with covering the cross section of the second base 213 with the magnetron 209, the magnetic field generated by arranging the magnetron 209 in the sector-shaped cross section of the second base 213 and rotating the second base 213 will be more uniform, thereby improving the uniformity of the thin film formed on the substrate 206.

[0065] See also Figure 2As shown, in one embodiment of the present invention, the semiconductor sputtering device 200 is further provided with a DC power supply 211 and a radio frequency power supply 212 electrically connected to the second first electrode 208, and the DC power supply 211 and the radio frequency power supply 212 provide power supply and bias voltage for the first electrode 208 to adjust the electric field, thereby adjusting the path of ion sputtering. Among them, the maximum power of the DC power supply 211 is, for example, 15000W, and the maximum power of the radio frequency power supply 212 is, for example, 8000W. When working, the specific power of the DC power supply 211 and the radio frequency power supply 212 can be adjusted according to actual needs.

[0066] See also Figure 2 As shown, in one embodiment of the present invention, a cooling water circuit 210 is further provided in the second base 213, and flowing cooling water is provided in the cooling water circuit 210 to ensure that the temperature of the second base 213 and the device on the second base 213 is stable within a certain range. In this embodiment, the temperature of the cooling water is, for example, 18°C ​​to 20°C.

[0067] See also Figure 2 As shown, in one embodiment of the present invention, a pre-sputtering window 214 is further provided in the semiconductor sputtering device 200, and the pre-sputtering window 214 is fixed to the side wall inside the cavity 201 through the first connecting rod 214. Specifically, the pre-sputtering window 214 is fixed to the motor 215 inside the cavity 201 through the first connecting rod 214, and the motor 215 is fixed to the side wall inside the cavity 201, and the motor 215 is arranged close to the second base 213. One end of the first connecting rod 214 is fixedly connected to the output end of the motor 215, and when the motor 215 rotates, the first connecting rod 214 rotates with the motor 215. The other end of the first connecting rod 214 is fixedly connected to the pre-sputtering window 214. And the pre-sputtering window 214 is arranged in a plate shape, and the orthographic projection of the pre-sputtering window 214 on the second target 203 covers the second target 203. In the present embodiment, the pre-sputtering window 214 is provided in the form of a circular plate, and the diameter of the pre-sputtering window 214 is larger than the diameter of the second target material 203 . Specifically, the diameter of the pre-sputtering window 214 is, for example, 70 mm to 330 mm.

[0068] See also Figure 2As shown, in one embodiment of the present invention, when the first connecting rod 214 rotates with the motor 215, the pre-sputtering window 214 also rotates with the first connecting rod 214. When the pre-sputtering window 214 rotates with the first connecting rod 214, the pre-sputtering window 214 is allowed to cut off the sputtering path from the second target 203 to the substrate 206, so that the ions generated by the second target 203 are sputtered onto the pre-sputtering window 214. Therefore, between each sputtering, the driving motor 215 is rotated, so that the pre-sputtering window 214 fixed on the first connecting rod 214 is rotated to the sputtering path from the second target 203 to the substrate 206, and at this time, the ions generated by the second target 203 are sputtered onto the pre-sputtering window 214. When the sputtering of the oxidized material on the surface of the second target 203 is completed, the motor 215 is driven to rotate so that the pre-sputtering window 214 fixed on the first connecting rod 214 rotates to a position away from the sputtering path, and the ions generated by the second target 203 can be sputtered to the surface of the substrate 206 along the sputtering path.

[0069] See also Figure 2 As shown, this embodiment is described by setting two targets inside the cavity. In other embodiments, two or more first targets 202 that are liquid at room temperature may be set on the bottom wall of the cavity, and two or more second targets 203 that are solid at room temperature may be set on the side wall, bottom wall or top wall of the cavity.

[0070] See also Figure 2 As shown, in one embodiment of the present invention, a carrier 205 is provided on the top wall of the cavity 201. A substrate 206 is placed on the surface of the carrier 205. The substrate 206 can be fixed on the carrier 205 by structural engagement, electrostatic attraction or any other fixing method. The carrier 205 is fixed on the top wall of the cavity 201 by a lifting structure 216. The lifting structure 216 can adjust the distance between the substrate 206 fixed on the carrier 205 and the top wall, thereby adjusting the distance between the substrate 206 and the target. In some embodiments, the lifting structure 216 can also rotate. When the lifting structure 216 rotates, the carrier 205 rotates around the center, so that the substrate 206 on the carrier 205 rotates, thereby making the deposited compound film more uniform.

[0071] See also Figure 2 As shown, in one embodiment of the present invention, a heating base 217 is provided on the top wall of the cavity 201. The heating base 217 is located on the side of the stage 205 away from the substrate 206, and an electric circuit is provided in the heating base 217 to adjust the temperature of the heating base 217, thereby adjusting the temperature of the substrate 206 to achieve heating of the substrate 206. In this embodiment, the heating base 217 is provided in a cylindrical shape, and the diameter of the heating base 217 is, for example, 250 mm to 350 mm, and one, two or more substrates 206 can be provided on the surface of the heating base 2052.

[0072] In different embodiments, the growth temperature (wafer temperature) in the chamber 201 may be greater than 650° C., for example, 650° C. to 1900° C. The substrate grown in the chamber 201 may be sapphire, silicon, silicon carbide, aluminum nitride or other substrates or wafers, and the size of the substrate to be coated in the chamber 201 may be, for example, 2 inches, 4 inches, 6 inches and / or 8 inches.

[0073] See also Figure 2 As shown, in one embodiment of the present invention, a second electrode 218 is further provided on the top wall of the cavity 201. The second electrode 218 is an anode electrode, and forms an electric field with the first electrode 208 provided in the first pedestal 207 and the second pedestal 213. The electrons move from the first target 202 and the second target 203 toward the substrate 206 along the electric field, and collide with the inert gas atoms to generate inert gas positive ions and new electrons. The new electrons move toward the substrate 206, and the generated inert gas ions bombard the first target 202 and the second target 203 under the action of the electric field, causing the target materials to be sputtered.

[0074] Please note that, see Figure 2 As shown, in this embodiment, the range of the straight-line distance between the center of the first target 202 and the center of the substrate 206 is, for example, 10 cm to 17 cm, that is, the range of the straight-line distance between the center of the gallium target and the center of the substrate 206 is, for example, 10 cm to 17 cm. The range of the straight-line distance between the center of the second target 203 and the center of the substrate 206 is, for example, 10 cm to 12 cm, that is, the range of the straight-line distance between the center of the aluminum target and the center of the substrate 206 is, for example, 10 cm to 12 cm. By limiting the straight-line distance between the center of the gallium target and the center of the substrate 206, and the straight-line distance between the center of the aluminum target and the center of the substrate 206, it is possible to avoid the target and the substrate 206 being too small, so that the ions sputtered from the two targets cannot react in a shorter path, and thus cannot form a compound film on the surface of the substrate 206. It is also possible to avoid the target and the substrate 206 being too large, so that the ions sputtered from the two targets react and combine together in a longer path, and then form granular protrusions on the surface of the substrate 206, affecting the quality of the formed compound film.

[0075] See also Figure 2 As shown, in one embodiment of the present invention, an air inlet pipe 219 is further provided in the semiconductor sputtering device 200, and the air inlet pipe 219 connects the external gas source and the cavity 201 to realize the supply of inert gas and reaction gas inside the cavity 201. The external gas source includes an inert gas source and a reaction gas source 204. Before the reaction, the inert gas is introduced through the air inlet pipe 219, so that the inside of the cavity 201 is close to a vacuum. At this time, the pressure inside the cavity 201 can be less than 10 -6Pa, for example, 10 -7 When the compound film is formed by reaction, the reaction gas is introduced through the gas inlet pipe 219, and the reaction gas is introduced into the cavity 201 to react with the ions sputtered from the target material to form a compound film on the surface of the substrate 206. When the reaction gas is introduced into the cavity 201, the working pressure inside the cavity 201 is set at 0.6Pa to 1.2Pa.

[0076] See also Figure 2 As shown, in one embodiment of the present invention, the air inlet pipe 219 is arranged around the carrier 205, and the air inlet pipe 219 can form a plurality of air rings, and the plurality of air rings are arranged side by side in the lifting direction of the carrier 205. The diameter of the air ring formed by the air inlet pipe 219 is larger than the diameter of the carrier 205, and the diameter of the air ring formed by the air inlet pipe 219 is, for example, 150 mm to 600 mm. On one side of each air ring close to the substrate 206, a plurality of openings (not shown in the figure) are provided, and the spacing between adjacent openings is equal, so that the openings are evenly distributed on the air ring. At this time, the inert gas or reaction gas introduced through the air inlet pipe 219 can be more evenly introduced into the chamber.

[0077] See also Figure 2 As shown, the present application does not limit the types of the inert gas source and the reactive gas source 204, and the inert gas source and the reactive gas source 204 can be introduced according to the compound film to be formed. In this embodiment, the inert gas introduced into the cavity 201 is, for example, argon, and the reactive gas introduced into the cavity 201 is, for example, nitrogen. Combined with the materials of the first target 202 and the second target 203, in this embodiment, for example, an aluminum gallium nitride film can be formed on the substrate 206. In other embodiments, the material of the target and the type of the introduced gas can be adjusted to form other compound films.

[0078] See also Figure 2 As shown, in one embodiment of the present invention, an air outlet 220 is further provided in the chamber, and the air outlet 220 is provided on the side wall of the chamber, and the air outlet 220 is located on the side of the chamber close to the bottom wall. A power device 221 is connected to the air outlet 220, and the power device 221 can extract the gas inside the chamber through the air outlet 220. A cover plate 222 is provided on one side of the air outlet 220, and the cover plate 222 is movably connected to one side of the air outlet 220. The cover plate 222 is connected to the motor 224, for example, through a second connecting rod 223. As the motor 224 rotates, the cover plate 222 is allowed to cover the air outlet 220. At the same time, as the motor 224 rotates, the cover plate 222 is also allowed to expose the air outlet 220.

[0079] See also Figure 2 and Figure 5As shown, in one embodiment of the present invention, the stage 205 fixes the substrate 206 on the stage 205, for example, by electrostatic attraction. Correspondingly, an electrode assembly 300 is provided in the stage 205. The electrode assembly 300 is located on a side close to the surface of the stage 205, and can provide a larger attraction, so that the substrate 206 is fixed on the surface of the stage 205 by electrostatic attraction.

[0080] See also Figure 5 and Figure 6 As shown, in one embodiment of the present invention, the electrode assembly 300 includes a positive electrode sheet 301 and a negative electrode sheet 302, and the positive electrode sheet 301 and the negative electrode sheet 302 are stacked. An insulating dielectric layer 303 is provided between the positive electrode sheet 301 and the negative electrode sheet 302, and on the two opposite sides of the positive electrode sheet 301 and the negative electrode sheet 302. And three layers of insulating dielectric layers 303 wrap the positive electrode sheet 301 and the negative electrode sheet 302. The dielectric layer 304 is provided on the insulating dielectric layer 303 on the side of the positive electrode sheet 301 away from the negative electrode sheet 302, and the insulating dielectric layer 303 is the surface of the carrier 205, so the substrate 206 is adsorbed on the dielectric layer. When the substrate 206 is placed on the carrier 205, the positive electrode sheet 301 is connected to the positive pole of the power supply, or the negative electrode sheet 302 is connected to the negative pole of the power supply, and an electric field can be formed between the positive electrode sheet 301 or the negative electrode sheet 302, and the dielectric layer 304. At the same time, the positive electrode sheet 301 is connected to the positive electrode of the power supply, and the negative electrode sheet 302 is connected to the negative electrode of the power supply, so that the charge can be released after the free charge is generated in the dielectric layer 304, and the desorption process can be performed faster and more stably.

[0081] See also Figure 5 and Figure 7As shown, in one embodiment of the present invention, the negative electrode sheet 302 is arranged in a sheet shape, and the cross-section of the negative electrode sheet 302 is arranged in a rectangular shape. The positive electrode sheet 301 includes a plurality of first positive electrode strips 3011 arranged side by side, and an equal spacing is arranged between adjacent first positive electrode strips 3011. One end of the plurality of first positive electrode strips 3011 is connected by a second positive electrode strip 3012. The positive electrode sheet 301 composed of a plurality of first positive electrode strips 3011 with intervals makes it possible for the substrate 206 to be within the adsorption force range of the carrier 205 (for example, the spacing between the substrate 206 and the surface of the carrier 205 is less than 0.05 mm), and when the substrate 206 is away from the surface of the carrier 205 by a preset spacing (for example, the spacing between the substrate 206 and the surface of the carrier 205 is greater than 1 mm), the adsorption force of the carrier 205 is very small. At this time, when the substrate 206 is placed on the carrier 205, the carrier 205 firmly fixes the substrate 206 by the adsorption force, and when the substrate 206 is removed from the carrier 205, as long as the preset spacing of the carrier 205 is left, the substrate 206 can be easily peeled off from the carrier 205. In this embodiment, the positive electrode sheet 301 is, for example, a positive electrode sheet 301 arranged in a comb shape. In other embodiments, the first positive electrode strip 3011 can be bent and deformed to form a positive electrode sheet 301 of other shapes, such as a fan shape, a wave shape, etc. The second positive electrode strip 3012 can realize the connection of multiple first positive electrode strips 3011.

[0082] See also Figure 5 and Figure 6 As shown, in one embodiment of the present invention, in order to enhance the spatial electric field between the positive electrode sheet 301 and the negative electrode sheet 302, the cross section of the positive electrode sheet 301 is provided with a plurality of protrusions 3013, and the spacing between the plurality of protrusions 3013 is equal. That is, a plurality of protrusions 3013 are provided on the cross section of the first positive electrode strip 3011. Specifically, in the present embodiment, for example, 4 protrusions 3013 are provided on the cross section of the positive electrode sheet 301, and the cross section of the positive electrode sheet 301 is provided in a cross shape. In other embodiments, for example, 6 protrusions 3013 or 8 protrusions 3013 may also be provided on the cross section of the positive electrode sheet 301. The cross section of the positive electrode sheet 301 is provided with a plurality of protrusions 3013, which enhances the spatial electric field and thus increases the adsorption force, and the adsorption property can be better controlled under a certain voltage. The cross section of the positive electrode sheet 301 is provided with a plurality of protrusions 3013, which changes the uniformity of the electric field. Compared with the cross section of the positive electrode sheet 301 which is arranged in a rectangular shape, the cross section of the positive electrode sheet 301 with a plurality of protrusions 3013 has a more uniform adsorption force and is not easy to break.

[0083] See also Figure 8As shown, in one embodiment of the present invention, the carrier 205 includes a chuck 2051, a base 2052 and a plurality of fixing members 2053. The chuck 2051 includes a substrate 305 and an electrode assembly 300 disposed on the substrate 305, and the base 2052 is connected to the chuck 2051. The plurality of fixing members 2053 cooperate with each other to fix the chuck 2051 and the base 2052 together.

[0084] For details, please refer to Figure 8 , Fig. 9 and Fig.10 As shown, in one embodiment of the present invention, the substrate 305 is arranged in a circular shape, the electrode assembly 300 is arranged on the substrate 305, and the negative electrode sheet 302 contact is arranged from the center of the substrate 305. The positive electrode sheet 301 is bent and arranged in a ring shape, that is, a plurality of first positive electrode strips 3011 are bent in a ring shape, and a plurality of second positive electrode strips 3012 are used to connect the first positive electrode strips 3011. The plurality of second positive electrode strips 3012 form a cross shape. The positive electrode sheet contact can be arranged at the edge of the substrate 305, and the negative electrode sheet contact can be arranged at the center of the substrate 305. At the bottom of the substrate 305, a groove plug 3051 is arranged. The negative electrode sheet contact and the positive electrode sheet contact are electrically connected to the groove plug 3051, and are connected to the outside through the groove plug 3051.

[0085] See also Figure 8 , Fig. 9 , Fig.10 and Fig.11 As shown, in one embodiment of the present invention, a protruding plug 3081 is provided on the base 2052, and the protruding plug 3081 is adapted to the groove plug 3051, allowing the protruding plug 3081 to be plugged into the groove plug 3051, thereby realizing the power supply of the electrode assembly 300. In the base 2052, an airflow layer 308, a heating layer 307 and a cooling layer 306 are also provided. The airflow layer 308 is provided on the heating layer 307, and the airflow layer 308 is heated by the heating layer 307 to realize the preheating function of the carrier 205. An airflow loop is provided in the airflow layer 308, and a heated airflow can be passed into the airflow loop as the main medium for heating. The cooling layer 306 is provided on the side of the heating layer 307 away from the airflow layer 308, and a cooling loop is provided in the cooling layer 306, so that the heating layer 307 can be quickly cooled when heating is not required.

[0086] See also Figure 8 As shown, in one embodiment of the present invention, the fixing member 2053 includes a plurality of buckles, and the plurality of buckles on both sides of the chuck 2051 and the base 2052 are buckled together to fix the chuck 2051 and the base 2052 together. The plurality of buckles can be connected by a mortise and tenon structure or other structures such as bolts.

[0087] See also Figure 8As shown, in one embodiment of the present invention, a pressure sensor (not shown in the figure) can also be provided on the retaining ring near the surface of the chuck 2051. When the pressure sensor senses that the substrate 206 on the chuck 2051 has been adsorbed, the retaining ring can be dropped for secondary fixation to prevent accidents. At the same time, if the pressure change is not obvious when the substrate 206 just enters the chuck 2051, an alarm is performed to avoid adsorption problems.

[0088] In one embodiment, by using the device of the present application, the growth rate of the film is, for example, 0.1nm / s-1.5nm / s, and for example, 0.3nm / s-1.2nm / s. In one embodiment, the full width at half maximum (FWHM) in the (002) direction of a film (such as AlN, GaN or other film) with a thickness of 1.1um to 200nm may be less than or equal to 1°, and for example, less than or equal to 0.7°. In one embodiment, the full width at half maximum (FWHM) in the (002) direction of a film (such as AlN, GaN or other film) with a thickness of 150nm to 210nm may be less than or equal to 1.5°, and for example, less than or equal to 0.9°. In one embodiment, the full width at half maximum (FWHM) in the (002) direction of a film (such as AlN, GaN or other film) with a thickness of 50nm to 100nm may be less than or equal to 0.5°, and for example, less than or equal to 0.1°. In addition, by using the device of the present application, the RMS value of the uniformity of the film can be less than or equal to 1 nm, for example less than or equal to 0.7 nm, and the number of particle defects (particles>0.3 um) on the film can be, for example, 50 to 150 particles.

[0089] In various embodiments, the temperature in the chamber can be detected, and the temperature of the components in the chamber can be controlled based on the detected temperature, so that there will not be too much temperature difference in the high temperature environment inside the reaction chamber, thereby reducing the particle problem. For example, during the growth process, the operating temperature of the substrate can be lower than the operating temperature of the target.

[0090] In one embodiment, the shield in the reaction chamber can be connected to the potential of the chamber to reduce arcing, thereby reducing the generation of particle defects.

[0091] In one embodiment, when the apparatus of the present application is a multi-target system, the grown thin film may be, for example, AlGaN, AlScN, P-type GaN, N-type GaN, or other material thin films.

[0092] In one embodiment, by using the device of the present application, the substrate for growing the thin film can have a depth-to-width ratio of 1:1 to 5:1, for example.

[0093] Referring to Figure 12, the present application also provides a semiconductor epitaxy 40, which is formed using the semiconductor device 100 provided by the present application. The semiconductor epitaxy 40 includes a substrate 400, a first buffer layer 401, and a second buffer layer 402. The first buffer layer 401 is disposed on the substrate 400, and the second buffer layer 402 is disposed on the first buffer layer 401. The first buffer layer 401 is an amorphous structure, and the second buffer layer 402 is a polycrystalline structure.

[0094] See also Fig.12 As shown, in one embodiment of the present invention, the substrate 400 can be various appropriate substrate materials. The material of the substrate 400 can be semiconductor substrate 400 materials such as silicon (Si), silicon carbide (SiC), sapphire ((Al2O3), gallium arsenide (GaAs), lithium aluminate (LiAlO2), etc. In this embodiment, the substrate 400 is, for example, a silicon (Si)-based material, such as silicon (Si) or silicon carbide (SiC) and other silicon-based materials.

[0095] See also Fig.12 As shown, in one embodiment of the present invention, at least two buffer layers in lattice form are provided on a substrate 400. Specifically, a first buffer layer 401 is an amorphous structure, a second buffer layer 402 is a polycrystalline structure, and the second buffer layer 402 is provided on the first buffer layer 401. By providing the second buffer layer 402 of the polycrystalline structure on the first buffer layer 401 of the amorphous structure, a more stable and better quality buffer layer can be obtained.

[0096] See also Fig.12 As shown, in one embodiment of the present invention, the first buffer layer 401 is an aluminum nitride (AlN) buffer layer of an amorphous structure. In this embodiment, the first buffer layer 401 can be grown using metal-organic chemical vapor deposition (MOCVD). When the first buffer layer 401 is formed using metal-organic chemical vapor deposition, trimethylaluminum (TMAl) gas can be used as an aluminum source, and ammonia (NH3) can be introduced into the reaction chamber as a nitrogen source for reaction to form an aluminum nitride buffer layer as the first buffer layer 401. And when forming the first buffer layer 401, the growth temperature range is, for example, 1000°C to 1400°C, and the growth pressure range is, for example, 10Torr to 100Torr. The specific growth temperature and range are set according to the equipment used and the quality requirements of the target film. When the first buffer layer is formed by metal-organic chemical vapor deposition, the parasitic reaction in the gas phase can be effectively reduced by precisely controlling the reaction conditions, and the generation of nanoparticles can be reduced, thereby improving the growth efficiency and quality of the film.

[0097] See also Fig.12As shown, in one embodiment of the present invention, the thickness of the formed first buffer layer 401 is in the range of 5 nm to 10 nm, specifically 5 nm, 7 nm, 8 nm or 10 nm, or 56.5 nm, 8.5 nm or 9.5 nm.

[0098] See also Fig.12 As shown, in one embodiment of the present invention, the second buffer layer 402 is an aluminum nitride buffer layer of a polycrystalline structure. In an embodiment, physical vapor deposition (PVD) can be used to grow the second buffer layer 402. When physical vapor deposition is used to form the second buffer layer 402, sputtering can be used to form aluminum nitride as the second buffer layer 402. Specifically, an aluminum nitride target material can be placed in an inert gas environment, and a high-energy ion beam or electron beam is applied to sputter atoms on the surface of the target material and deposit them on the substrate 400 to form an aluminum nitride buffer layer. The aluminum nitride buffer layer formed by sputtering has good uniformity and compactness.

[0099] See also Fig.12 As shown, in one embodiment of the present invention, the thickness of the formed second buffer layer 402 is in the range of 20 nm to 25 nm, and can be specifically 20 nm, or 21 nm, 22 nm or 25 nm.

[0100] See also Fig.12 As shown, in one embodiment of the present invention, a second buffer layer 402 of a polycrystalline structure is formed on a first buffer layer 401 of an amorphous structure. Among them, the first buffer layer 401 of an amorphous structure has a high thermal conductivity, so that the formed semiconductor device can quickly extract heat energy from the inside of the device under a high-temperature working environment, effectively reduce the working temperature, and significantly improve the stability and life of the formed semiconductor device. At the same time, the first buffer layer 401 of an amorphous structure has a low dielectric constant, which can reduce the loss during signal transmission and effectively improve the operating frequency of the device and the efficiency of signal processing. And the first buffer layer 401 of an amorphous structure has good chemical and physical stability at high temperatures, which can improve the quality of the formed buffer layer. Moreover, the lattice structure of the first buffer layer 401 of the amorphous structure is more matched with the lattice structure of the substrate 400, and the lattice structure of the second buffer layer 402 of the polycrystalline structure is more matched with the semiconductor layer formed thereon. From the first buffer layer 401 to the second buffer layer 402, the stress caused by the mismatch of the lattice constant between the substrate 400 and the semiconductor layer on the buffer layer can be gradually reduced, and the formation of dislocations and other defects can be reduced, thereby improving the stability of the overall structure.

[0101] See also Fig.12As shown, the semiconductor epitaxy 40 provided in the present application can be applied to semiconductor devices such as diodes, photodiodes, light-emitting diodes, transistors, field-effect transistors, regulators, sensors, power devices, radio frequency devices, and any semiconductor structures in these semiconductor devices.

[0102] The present invention provides a semiconductor sputtering device and a method for forming a compound semiconductor film. The semiconductor epitaxy includes a substrate, a first buffer layer arranged on the substrate, and a second buffer layer arranged on the first buffer layer. The first buffer layer is an amorphous structure, and the second buffer layer is a polycrystalline structure.

[0103] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A semiconductor sputtering device, characterized in that: At least: Cavity; at least one first target disposed on a first side of the chamber; at least one second target disposed on a second side of the chamber; At least one reactive gas source for introducing at least one reactive gas into the chamber The carrier is arranged on the third side of the cavity, and the substrate is placed on the carrier.

2. The semiconductor sputtering device according to claim 1, characterized in that: The first target material is arranged on the bottom wall in the cavity.

3. The semiconductor sputtering device according to claim 1, characterized in that: The second target material is arranged on a side wall in the cavity.

4. The semiconductor sputtering device according to claim 1, characterized in that: The carrier is arranged on the top wall of the cavity.

5. The semiconductor sputtering device according to claim 1, characterized in that: The compound semiconductor sputtering device further includes a susceptor, and the first target material and the second target material are disposed on the susceptor.

6. The semiconductor sputtering device according to claim 5, characterized in that: A first electrode is arranged in the base, and the first electrode is laid on the cross section of the base.

7. The semiconductor sputtering device according to claim 5, characterized in that: A magnetron is arranged in the base, and the magnetron is located on a partial cross section of the base.

8. The semiconductor sputtering device according to claim 1, characterized in that: The compound semiconductor sputtering apparatus further includes a pre-sputtering window, and the pre-sputtering window is allowed to rotate to a sputtering path of the second target to the substrate.

9. The semiconductor sputtering device according to claim 1, characterized in that: The compound semiconductor sputtering device further comprises a lifting structure, and the carrier is connected to the top wall of the chamber through the lifting structure.

10. A method for forming a compound semiconductor thin film, characterized in that: The compound semiconductor thin film is formed using the semiconductor sputtering apparatus according to any one of claims 1 to 9.

Images