Synchronous phase acquisition system

Abstract

The invention relates to the technical field of electrical equipment, and discloses a synchronous phase acquisition system. The system comprises a flexible current sensor which is used for measuring a current signal in a measured cable and converting the current signal into a voltage signal; the current detection module is used for restoring the voltage signal to obtain a restored voltage signal; the trigger signal processing module is used for performing zero-cross detection on the restored voltage signal to obtain a trigger signal, and performing level conversion on the trigger signal to obtain a square wave signal; the trigger signal transmitting module is used for converting the square wave signal into a wireless signal and transmitting the wireless signal to the trigger signal receiving module in a wireless mode; the trigger signal receiving module is used for receiving a wireless signal and restoring the wireless signal into a trigger signal; and the trigger signal analysis module is used for converting the trigger signal into a level trigger signal and outputting the level trigger signal to the detection terminal. The current is obtained in a non-contact mode, the current is converted into the voltage, the detection terminal is connected in a wireless mode, and the effectiveness of local detection is effectively improved.

Description

Technical Field

[0001] The present invention relates to the technical field of electrical equipment, and in particular to a synchronous phase acquisition system. Background Art

[0002] The gas-insulated switchgear (GIS), an ultra-high voltage (UHV) switchgear with a metal casing and coaxially arranged conductor, is a key power equipment that uses high-voltage SF6 gas insulation and is widely used in large power stations and substations. GIS equipment has low unit loss, little environmental impact, high operating reliability, and saves space, which has obvious advantages over open switchgear. After the ultra-high voltage GIS equipment is assembled on site, in order to verify the installation process of the equipment and ensure that there are no residual defects inside before formal commissioning, the GIS equipment will be subjected to on-site insulation assessment experiments, and partial discharge detection will be carried out on the equipment at 1.2 times the rated voltage, usually using ultra-high frequency and ultrasonic detection methods. In order to improve the diagnostic accuracy and anti-interference performance of partial discharge, it is necessary to obtain the phase of the test voltage during the detection process to generate PRPD and PRPS spectra and determine the phase correlation of the signal.

[0003] During the on-site withstand voltage test of UHV GIS, the series resonance method is usually used. The frequency of the test voltage is related to the capacitance of the GIS test sample and is distributed between 30Hz and 300Hz. In previous partial discharge detection tests, the internal synchronization method of the detection equipment is usually used to obtain partial discharge pulses. However, as the detection time increases, the internal synchronization phase will have serious deviations, causing the accumulated partial discharge pulses to lose phase correlation, making the experimental results inaccurate. Summary of the invention

[0004] In view of this, an object of the present invention is to overcome the deficiencies in the prior art and to provide a synchronous phase acquisition method, apparatus, computer equipment and readable storage medium.

[0005] The present invention provides the following technical solutions:

[0006] In a first aspect, a synchronous phase acquisition system is provided in an embodiment of the present disclosure, the system comprising a flexible current sensor, a current detection module, a trigger signal processing module, a trigger signal transmitting module, a trigger signal receiving module and a trigger signal parsing module;

[0007] The flexible current sensor is electrically connected to the current detection module, the current detection module is also electrically connected to the trigger signal processing module, the trigger signal processing module is also electrically connected to the trigger signal transmitting module, the trigger signal transmitting module is also communicatively connected to the trigger signal receiving module, and the trigger signal receiving module is also electrically connected to the trigger signal parsing module;

[0008] The flexible current sensor is used to measure the current signal in the measured cable and convert the current signal into a voltage signal;

[0009] The current detection module is used to restore the voltage signal to obtain a restored voltage signal;

[0010] The trigger signal processing module is used to perform zero-crossing detection on the restored voltage signal to obtain a trigger signal, and perform level conversion on the trigger signal to obtain a square wave signal;

[0011] The trigger signal transmitting module is used to convert the square wave signal into a wireless signal and send it to the trigger signal receiving module wirelessly;

[0012] The trigger signal receiving module is used to receive the wireless signal and restore the wireless signal to the trigger signal;

[0013] The trigger signal analysis module is used to convert the trigger signal into a level trigger signal and output the level trigger signal to the detection terminal.

[0014] Optionally, the current detection module includes a single-order RC analog low-pass filter unit, an active integral amplifier unit and an ADC acquisition unit;

[0015] The single-order RC analog low-pass filter unit is electrically connected to the flexible current sensor, the single-order RC analog low-pass filter unit is electrically connected to the active integral amplifier unit, the active integral amplifier unit is electrically connected to the ADC acquisition unit, and the ADC acquisition unit is electrically connected to the trigger signal processing module;

[0016] The single-order RC analog low-pass filter unit is used to filter the signal with a frequency higher than a preset cut-off frequency in the voltage signal to obtain a filtered voltage signal;

[0017] The active integral amplifier unit is used to condition and amplify the filtered voltage signal to obtain a conditioned and amplified first voltage signal, and to perform integral restoration on the conditioned and amplified first voltage signal to obtain the restored voltage signal;

[0018] The ADC acquisition unit is used to convert the restored voltage signal into a digital voltage signal.

[0019] Optionally, the single-order RC analog low-pass filter unit includes a first diode D1, a first resistor R1 and a first capacitor C1, the active integral amplifier unit includes a first-stage amplifier circuit, a third capacitor C3, a second-stage integral circuit, an eighth resistor R8 and a fifth capacitor C5, the first-stage amplifier circuit includes a second resistor R2, a third resistor R3, a fourth resistor R4, a second capacitor C2 and a first precision operational amplifier OP1, and the second-stage integral circuit includes a second precision operational amplifier OPA2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and a fourth capacitor C4;

[0020] The first end of the first diode D1 is electrically connected to the first end of the flexible current sensor and the first end of the first resistor R1, respectively. The second end of the first diode D1 is electrically connected to the second end of the flexible current sensor and the second end of the first capacitor C1, respectively. The second end of the first capacitor C1 is grounded. The second end of the first resistor R1 is electrically connected to the first end of the first capacitor C1 and the first end of the second resistor R2, respectively. The second end of the first capacitor C1 is electrically connected to the first end of the third resistor R3, the second end of the second resistor R2 is electrically connected to the non-inverting input end of the first precision operational amplifier OP1, the second end of the third resistor R3 is electrically connected to the inverting input end of the first precision operational amplifier OP1, the first end of the fourth resistor R4, and the first end of the second capacitor C2, the second end of the fourth resistor R4 and the second end of the second capacitor C2 are both electrically connected to the output end of the first precision operational amplifier OP1, and the first The output end of the precision operational amplifier OP1 is electrically connected to the first end of the third capacitor C3, the second end of the third capacitor C3 is electrically connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is electrically connected to the first end of the sixth resistor R6, the first end of the fourth capacitor C4, and the inverting input end of the second precision operational amplifier OPA2, the first end of the seventh resistor R7 is electrically connected to the non-inverting input end of the second precision operational amplifier OPA2, the second end of the seventh resistor R7 is grounded, the second end of the sixth resistor R6 and the second end of the fourth capacitor C4 are both electrically connected to the output end of the second precision operational amplifier OP2, the output end of the second precision operational amplifier OP2 is electrically connected to the first end of the eighth resistor R8, the second end of the eighth resistor R8 is electrically connected to the first end of the fifth capacitor C5 and the input end of the ADC acquisition unit, and the output end of the ADC acquisition unit is electrically connected to the trigger signal processing module.

[0021] Optionally, the trigger signal processing module includes an in-phase amplification unit, a hysteresis zero-crossing comparison unit and a level conversion unit;

[0022] The in-phase amplification unit is electrically connected to the ADC acquisition unit, the in-phase amplification unit is electrically connected to the hysteresis zero-crossing comparison unit, the hysteresis zero-crossing comparison unit is electrically connected to the level conversion unit, and the level conversion unit is electrically connected to the trigger signal transmission module;

[0023] The in-phase amplifier unit is used to condition and amplify the digital voltage signal to obtain a conditioned and amplified second voltage signal;

[0024] The hysteresis zero-crossing comparison unit is used to perform zero-crossing detection on the conditioned and amplified second voltage signal to obtain the trigger signal;

[0025] The level conversion unit is used to perform level conversion on the trigger signal to obtain the square wave signal.

[0026] Optionally, the in-phase amplification unit includes an eighth resistor R8, a sixth capacitor C6, a third precision operational amplifier OPA3, a ninth resistor R9, a tenth resistor R10 and a seventh capacitor C7, the hysteresis zero-crossing comparison unit includes a third-stage amplification circuit, a second diode D2 and a fourteenth resistor R14, the third-stage amplification circuit includes a fourth precision operational amplifier OPA4, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13 and an eighth capacitor C8, and the level conversion unit includes a first MOS tube Q1, a twentieth resistor R20, a twenty-first resistor R21, and a twenty-second resistor R22;

[0027] The first end of the eighth resistor R8 is electrically connected to the output end of the ADC acquisition unit, the second end of the eighth resistor R8 is electrically connected to the first end of the sixth capacitor C6 and the non-inverting input end of the third precision operational amplifier OPA3, the second end of the sixth capacitor C6 and the first end of the ninth resistor R9 are both grounded, the second end of the ninth resistor R9 is electrically connected to the inverting input end of the third precision operational amplifier OP3, the first end of the tenth resistor R10, and the first end of the seventh capacitor C7, the second end of the tenth resistor R10 and the second end of the seventh capacitor C7 are both electrically connected to the output end of the third precision operational amplifier OP3, the output end of the third precision operational amplifier OP3 is electrically connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11 is electrically connected to the first end of the thirteenth resistor R13, the first end of the eighth capacitor C8, and the non-inverting input end of the fourth precision operational amplifier OPA4, the second end of the thirteenth resistor R13, the first end of the eighth capacitor C8, and the non-inverting input end of the fourth precision operational amplifier OPA4, Both ends are electrically connected to the output end of the fourth precision operational amplifier OPA4, the first end of the twelfth resistor R12 is electrically connected to the inverting input end of the fourth precision operational amplifier OPA4, the second end of the twelfth resistor R12 is grounded, the output end of the fourth precision operational amplifier OPA4 is electrically connected to the first end of the second diode D2, the second end of the second diode D2 is electrically connected to the first end of the fourteenth resistor R14, the first end of the twentieth resistor R20 is electrically connected to the second end of the fourteenth resistor R14 and the drain of the first MOS tube Q1 respectively, the second end of the twentieth resistor R20 is connected to a high voltage power supply, the gate of the first MOS tube Q1 is electrically connected to the first end of the twenty-first resistor R21, the source of the first MOS tube Q1 is electrically connected to the first end of the twenty-second resistor R22, the second end of the twenty-first resistor R21 and the second end of the twenty-second resistor R22 are both connected to the low voltage power supply, and the first end of the twenty-second resistor R22 is electrically connected to the trigger signal transmitting module.

[0028] Optionally, the trigger signal transmission module includes a first main control and a first wireless transceiver module;

[0029] The first main control is electrically connected to the level conversion unit, the first main control is connected to the first wireless transceiver module, and the first wireless transceiver module is communicatively connected to the trigger signal receiving module;

[0030] The first master control is used to receive the trigger signal and generate a sine wave signal with the same frequency as the trigger signal;

[0031] The first wireless transceiver module is used to collect the sinusoidal wave signal, modulate the sinusoidal wave signal into the wireless signal, and send the wireless signal to the trigger signal receiving module wirelessly.

[0032] Optionally, the first main control includes a DAC module, and the first wireless transceiver module includes an ADC converter, a first MCU chip and a first radio frequency IC chip;

[0033] The DAC module is electrically connected to the first end of the 22nd resistor R22, the DAC module is connected to the ADC converter, the ADC converter is communicatively connected to the first MCU chip, and the first MCU chip is communicatively connected to the first RF IC chip.

[0034] Optionally, the trigger signal receiving module includes a second main control and a second wireless transceiver module;

[0035] The second wireless transceiver module is communicatively connected to the first wireless transceiver module, the second wireless transceiver module is communicatively connected to the second main control, and the second main control is electrically connected to the trigger signal analysis module;

[0036] The second wireless transceiver module is used to receive the wireless signal and demodulate the wireless signal into the sine wave signal;

[0037] The second master control is used to restore the sinusoidal wave signal to the trigger signal.

[0038] Optionally, the second main control includes a PWM module, an ADC module, a power port, a data port Data and a general purpose input and output port GPIO, and the second wireless transceiver module includes a DAC converter, a second MCU chip and a second RF IC chip;

[0039] The second RF IC chip is communicatively connected to the first RF IC chip, the second RF IC chip is communicatively connected to the second MCU chip, the second MCU chip is communicatively connected to the DAC converter, the DAC converter is connected to the ADC module, the ADC module is communicatively connected to the PWM module, the data port Data and the general input and output port GPIO are electrically connected to the trigger signal analysis module, the power port is connected to the low-voltage power supply, and the second master control is grounded.

[0040] Optionally, the trigger signal analysis module includes a common-phase level converter, and the common-phase level converter includes a first port A, a second port B, an output enable port OE, a high-voltage power port VCCB, and a low-voltage power port VCCA;

[0041] The high-voltage power port VCCB is connected to the high-voltage power supply, the low-voltage power port VCCA is connected to the low-voltage power supply, the in-phase level converter is grounded, the first port A is electrically connected to the data port Data, the output enable port OE is electrically connected to the general input and output port GPIO, and the second port B outputs a level trigger signal.

[0042] Beneficial effects of this application:

[0043] The synchronous phase acquisition system provided in the embodiment of the present application obtains the output current of the frequency converter cabinet during the experiment in a contactless manner in the ultra-high voltage GIS on-site withstand voltage test system, converts the current waveform into a voltage analog quantity, and then connects to the detection terminal by wireless communication, thereby effectively improving the effectiveness of local detection.

[0044] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work. In each of the drawings, similar components are numbered similarly.

[0046] Figure 1 A schematic diagram of the structure of a synchronous phase acquisition system provided in an embodiment of the present application is shown;

[0047] Figure 2 A schematic diagram of a synchronous phase acquisition system for partial discharge monitoring in an on-site insulation test of an ultra-high voltage GIS provided in an embodiment of the present application is shown;

[0048] Figure 3 A circuit diagram of a current detection module provided in an embodiment of the present application is shown;

[0049] Figure 4 A circuit diagram of a trigger signal processing module provided in an embodiment of the present application is shown;

[0050] Figure 5 A schematic diagram of the working process of a trigger signal transmitting module provided in an embodiment of the present application is shown;

[0051] Figure 6 A schematic diagram of the working process of a trigger signal receiving module provided in an embodiment of the present application is shown;

[0052] Figure 7 A circuit diagram of a trigger signal analysis module provided in an embodiment of the present application is shown.

[0053] Description of main component symbols:

[0054] 100-synchronous phase acquisition system; 110-flexible current sensor; 120-current detection module; 130-trigger signal processing module; 140-trigger signal transmitting module; 150-trigger signal receiving module; 160-trigger signal analysis module; 121-single-order RC analog low-pass filter unit; 122-active integral amplifier unit; 123-ADC acquisition unit; 131-in-phase amplifier unit; 132-hysteresis zero-crossing comparison unit; 133-level conversion unit; 141-first main control; 142-first wireless transceiver module; 151-second main control; 152-second wireless transceiver module; 161-in-phase level converter. DETAILED DESCRIPTION

[0055] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0056] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "electrically connected to" another element, it may be directly electrically connected to the other element or there may be a central element at the same time. In contrast, when an element is referred to as being "directly on" another element, there is no intermediate element. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0057] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "electrically connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed electrical connection, a detachable electrical connection, or an integrated one; it can be a mechanical electrical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0058] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of the template are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0060] Example

[0061] like Figure 1 As shown, it is a structural schematic diagram of a synchronous phase acquisition system 100 in an embodiment of the present application. The synchronous phase acquisition system 100 provided in the embodiment of the present application includes a flexible current sensor 110, a current detection module 120, a trigger signal processing module 130, a trigger signal transmitting module 140, a trigger signal receiving module 150 and a trigger signal parsing module 160. The flexible current sensor 110 is electrically connected to the current detection module 120, the current detection module 120 is also electrically connected to the trigger signal processing module 130, the trigger signal processing module 130 is also electrically connected to the trigger signal transmitting module 140, the trigger signal transmitting module 140 is also communicatively connected to the trigger signal receiving module 150, and the trigger signal receiving module 150 is also electrically connected to the trigger signal parsing module 160.

[0062] The flexible current sensor 110 is used to measure the current signal in the measured cable and convert the current signal into a voltage signal.

[0063] Understandably, the pulse phase under AC voltage is an important characteristic parameter in partial discharge detection and diagnosis. Therefore, in the on-site handover test, in order to obtain accurate phase information, such as Figure 2 As shown, in this embodiment, a flexible current coil sensor is used to detect the cable current input at the electrical connection cable between the frequency converter cabinet and the excitation transformer in the field withstand voltage test system. The flexible current coil sensor is a non-contact current detection sensor, and its structure consists of an air-core annular coil uniformly wound on a non-magnetic material. When the current signal of the measured cable passes through the center of the annular coil, an alternating magnetic field is generated, and a voltage signal is generated in the coil at this time. The corresponding voltage is the differential of the measured current passing through the coil with respect to time.

[0064] The flexible current coil sensor is fixed on the cable under test by cable ties to measure current. Compared with the traditional current transformer CT with an iron core, the flexible coil can realize real-time current measurement and has a fast response. At the same time, since the coil is made of non-ferromagnetic material, the output of the coil will not be saturated due to the large current on the primary side and there is no magnetization current error. In addition, the sensor is light in weight, has strong resistance to external electromagnetic interference, and produces almost no phase error. It ensures electrical safety when turned on and there is no danger of secondary open circuit.

[0065] Exemplarily, this embodiment uses a flexible current sensor 110 with a dynamic current range of 1A to 1kA, a sensitivity of 100uV / A (at a frequency of 50Hz), a bandwidth range of 1Hz to 100kHz (3dB), a zero drift as low as 0.1mV, a linearity of 0.2%, a sensitivity error of less than 0.5%, and an inner diameter of 150mm to adapt to the AC current test scenarios ranging from a few amperes to several hundred amperes. The specific model of the flexible current sensor 110 can be selected according to actual conditions, and the embodiment of the present application does not limit this.

[0066] The current detection module 120 is used to restore the voltage signal to obtain a restored voltage signal.

[0067] Specifically, the current detection module 120 includes a single-order RC analog low-pass filter unit 121, an active integral amplifier unit 122 and an ADC acquisition unit 123; the single-order RC analog low-pass filter unit 121 is electrically connected to the flexible current sensor 110, the single-order RC analog low-pass filter unit 121 is electrically connected to the active integral amplifier unit 122, the active integral amplifier unit 122 is electrically connected to the ADC acquisition unit 123, and the ADC acquisition unit 123 is electrically connected to the trigger signal processing module 130. The single-order RC analog low-pass filter unit 121 is used to filter the signal with a frequency higher than the preset cut-off frequency in the voltage signal to obtain a filtered voltage signal; the active integral amplifier unit 122 is used to condition and amplify the filtered voltage signal to obtain a conditioned and amplified first voltage signal, and to integrate and restore the conditioned and amplified first voltage signal to obtain a restored voltage signal; the ADC acquisition unit 123 is used to convert the restored voltage signal into a digital voltage signal.

[0068] Further, the single-order RC analog low-pass filter unit 121 includes a first diode D1, a first resistor R1 and a first capacitor C1, the active integral amplifier unit 122 includes a first-stage amplifier circuit, a third capacitor C3, a second-stage integral circuit, an eighth resistor R8 and a fifth capacitor C5, the first-stage amplifier circuit includes a second resistor R2, a third resistor R3, a fourth resistor R4, a second capacitor C2 and a first precision operational amplifier OP1, and the second-stage integral circuit includes a second precision operational amplifier OPA2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and a fourth capacitor C4;

[0069] The first end of the first diode D1 is electrically connected to the first end of the flexible current sensor 110 and the first end of the first resistor R1, respectively. The second end of the first diode D1 is electrically connected to the second end of the flexible current sensor 110 and the second end of the first capacitor C1, respectively. The second end of the first capacitor C1 is grounded. The second end of the first resistor R1 is electrically connected to the first end of the first capacitor C1 and the first end of the second resistor R2, respectively. The second end of the first capacitor C1 is electrically connected to the first end of the third resistor R3, the second end of the second resistor R2 is electrically connected to the non-inverting input terminal of the first precision operational amplifier OP1, the second end of the third resistor R3 is electrically connected to the inverting input terminal of the first precision operational amplifier OP1, the first end of the fourth resistor R4, and the first end of the second capacitor C2, the second end of the fourth resistor R4 and the second end of the second capacitor C2 are both electrically connected to the output terminal of the first precision operational amplifier OP1, and the first precision operational amplifier OP1 is electrically connected to the output terminal of the first precision operational amplifier OP1. The output end of the amplifier OP1 is electrically connected to the first end of the third capacitor C3, the second end of the third capacitor C3 is electrically connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is electrically connected to the first end of the sixth resistor R6, the first end of the fourth capacitor C4, and the inverting input end of the second precision operational amplifier OPA2, the first end of the seventh resistor R7 is electrically connected to the non-inverting input end of the second precision operational amplifier OPA2, the second end of the seventh resistor R7 is grounded, the second end of the sixth resistor R6 and the second end of the fourth capacitor C4 are both electrically connected to the output end of the second precision operational amplifier OP2, the output end of the second precision operational amplifier OP2 is electrically connected to the first end of the eighth resistor R8, the second end of the eighth resistor R8 is electrically connected to the first end of the fifth capacitor C5 and the input end of the ADC acquisition unit 123, and the output end of the ADC acquisition unit 123 is electrically connected to the trigger signal processing module 130.

[0070] Understandably, since the voltage output by the front-end flexible current sensor 110 is the differential of the measured current with respect to time, if there is a part of the high-frequency component in the measured current, the flexible current sensor 110 will generate a large voltage signal and then drown out the fundamental signal. Therefore, the flexible current sensor 110 needs to be designed with an active integral amplifier unit 122 for conditioning. The current detection module 120 includes a single-order RC analog low-pass filter unit 121, an active integral amplifier unit 122 and an ADC acquisition unit 123. The circuit diagram is shown in FIG. Figure 3 As shown. The first resistor R1 and the first capacitor C1 in the single-order RC analog low-pass filter unit 121 can effectively prevent out-of-band noise and interference from coupling into the relevant frequency band. In this embodiment, the effective frequency range of the measured current is 30Hz to 300Hz. By setting the values ​​of the first resistor R1 and the first capacitor C1, a relatively low cut-off frequency of 720Hz of the analog low-pass filter is achieved, that is, 2.5 times higher than the highest signal frequency, thereby ensuring that the signal frequency band is flat and the out-of-band harmful frequency signal is sufficiently attenuated. The active integral amplifier unit 122 is composed of a first-stage amplifier circuit, a third capacitor C3, a second-stage integral circuit, an eighth resistor R8 and a fifth capacitor C5. The first-stage amplifier circuit is composed of a second resistor R2, a third resistor R3, a fourth resistor R4, a second capacitor C2 and a first precision operational amplifier OP1. The first-stage amplifier circuit conditions and amplifies the tiny voltage signal of the flexible current sensor 110 to obtain a conditioned and amplified first voltage signal. Since there is a DC bias in the actual operational amplifier, in order to avoid the influence of the DC bias on the real signal, the third capacitor C3 of the intermediate stage is set to AC coupling to suppress the DC component from entering the second-stage integration circuit, thereby improving the stability of the entire system. The second-stage integration circuit is composed of a second precision operational amplifier OPA2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and a fourth capacitor C4. The second-stage integration circuit integrates and restores the first voltage signal after conditioning and amplification to obtain the restored voltage signal. Among them, the sixth resistor R6 provides a discharge circuit for the integration capacitor, stabilizes the integration performance, and prevents the instability caused by the integration circuit due to long-term integration. The eighth resistor R8 and the fifth capacitor C5 play a filtering role. Finally, the restored voltage signal is input to the ADC acquisition unit 123, and the restored voltage signal is converted into a digital voltage signal.

[0071] The trigger signal processing module 130 is used to perform zero-crossing detection on the restored voltage signal to obtain a trigger signal, and perform level conversion on the trigger signal to obtain a square wave signal.

[0072] Specifically, the trigger signal processing module 130 includes a common-phase amplifier unit 131, a hysteresis zero-crossing comparison unit 132 and a level conversion unit 133; the common-phase amplifier unit 131 is electrically connected to the ADC acquisition unit 123, the common-phase amplifier unit 131 is electrically connected to the hysteresis zero-crossing comparison unit 132, the hysteresis zero-crossing comparison unit 132 is electrically connected to the level conversion unit 133, and the level conversion unit 133 is electrically connected to the trigger signal transmitting module 140; the common-phase amplifier unit 131 is used to condition and amplify the digital voltage signal to obtain a conditioned and amplified second voltage signal; the hysteresis zero-crossing comparison unit 132 is used to perform zero-crossing detection on the conditioned and amplified second voltage signal to obtain a trigger signal; the level conversion unit 133 is used to perform level conversion on the trigger signal to obtain a square wave signal.

[0073] Further, the in-phase amplifier unit 131 includes an eighth resistor R8, a sixth capacitor C6, a third precision operational amplifier OPA3, a ninth resistor R9, a tenth resistor R10 and a seventh capacitor C7, the hysteresis zero-crossing comparison unit 132 includes a third-stage amplifier circuit, a second diode D2 and a fourteenth resistor R14, the third-stage amplifier circuit includes a fourth precision operational amplifier OPA4, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13 and an eighth capacitor C8, the level conversion unit 133 includes a first MOS tube Q1, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22; the eighth resistor R10 includes a second diode D2 ... a eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13 and an eighth capacitor C8, the level conversion unit 133 includes a first MOS tube Q1, a twentieth resistor R20, a twenty-first resistor R2 The first end of the eighth resistor R8 is electrically connected to the output end of the ADC acquisition unit 123, the second end of the eighth resistor R8 is electrically connected to the first end of the sixth capacitor C6 and the non-inverting input end of the third precision operational amplifier OPA3, the second end of the sixth capacitor C6 and the first end of the ninth resistor R9 are both grounded, the second end of the ninth resistor R9 is electrically connected to the inverting input end of the third precision operational amplifier OP3, the first end of the tenth resistor R10, and the first end of the seventh capacitor C7, the second end of the tenth resistor R10 and the second end of the seventh capacitor C7 are both electrically connected to the output end of the third precision operational amplifier OP3, and the output end of the third precision operational amplifier OP3 is electrically connected to the first end of the tenth resistor R10 and the second end of the seventh capacitor C7. The output end is electrically connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11 is electrically connected to the first end of the thirteenth resistor R13, the first end of the eighth capacitor C8, and the non-inverting input end of the fourth precision operational amplifier OPA4, the second end of the thirteenth resistor R13 and the second end of the eighth capacitor C8 are both electrically connected to the output end of the fourth precision operational amplifier OPA4, the first end of the twelfth resistor R12 is electrically connected to the inverting input end of the fourth precision operational amplifier OPA4, the second end of the twelfth resistor R12 is grounded, the output end of the fourth precision operational amplifier OPA4 is electrically connected to the first end of the second diode D2, and the The second end of the second diode D2 is electrically connected to the first end of the fourteenth resistor R14, the first end of the twentieth resistor R20 is electrically connected to the second end of the fourteenth resistor R14 and the drain of the first MOS tube Q1 respectively, the second end of the twentieth resistor R20 is connected to the high voltage power supply, the gate of the first MOS tube Q1 is electrically connected to the first end of the twenty-first resistor R21, the source of the first MOS tube Q1 is electrically connected to the first end of the twenty-second resistor R22, the second end of the twenty-first resistor R21 and the second end of the twenty-second resistor R22 are both connected to the low voltage power supply, and the first end of the twenty-second resistor R22 is electrically connected to the trigger signal transmitting module 140.

[0074] It is understandable that the digital voltage signal integrated and restored in the current detection module 120 is an AC sinusoidal voltage signal in phase with the measured current. Therefore, in order to obtain the phase information of the measured current, it is necessary to detect and locate the zero point of the digital voltage signal to obtain a trigger signal. The function of the trigger signal processing module 130 is to perform zero-crossing detection processing on the obtained digital voltage signal. The trigger signal processing module 130 includes three parts: a common-phase amplifier unit 131, a hysteresis zero-crossing comparison unit 132, and a level conversion unit 133. The circuit diagram is shown in FIG. Figure 4 shown.

[0075] First, the digital voltage signal is filtered by the eighth resistor R8 and the sixth capacitor C6, and then conditioned and amplified by the proportional amplification gain formed by the third precision operational amplifier OPA3 and the ninth resistor R9 and the tenth resistor R10 to obtain the conditioned and amplified second voltage signal, which increases the amplitude of the signal and facilitates subsequent processing. Then the conditioned and amplified second voltage signal is input to the hysteresis zero-crossing comparison unit 132 composed of the third-stage amplifier circuit, the second diode D2 and the fourteenth resistor R14. One end of the twelfth resistor R12 is connected to the ground. When the voltage at the in-phase input terminal of the fourth precision operational amplifier OPA4 is greater than the threshold voltage (for example, 0), the output terminal outputs a high level, and when the voltage at the in-phase input terminal is less than the threshold voltage (for example, 0), the output terminal outputs a low level. The values ​​of the eleventh resistor R11 and the thirteenth resistor R13 set the disturbance threshold value to avoid multiple zero-crossing noise signals near the zero point of the signal waveform, resulting in false triggering, improving the anti-noise disturbance performance, and ensuring the stability and reliability of the trigger signal. The second diode D2 serves to isolate the analog output and the digital trigger signal, effectively avoiding interference between the analog signal and the digital signal and improving the stability of the entire system.

[0076] Finally, after passing through the level conversion unit 133 composed of the first MOS tube Q1, when the waveform of the trigger signal is at a low level, there is a low-voltage power supply VCC_L, the twenty-second resistor R22 and an internal diode loop of the first MOS tube Q1, and the source of the first MOS tube Q1 is at a low level. When the waveform of the trigger signal is at a high level, the aforementioned loop does not exist, and the source of the first MOS tube Q1 is at a high level due to the presence of a pull-up resistor, thereby realizing the conversion of the trigger signal level from the VCC_H level domain to the VCC_L level domain, thereby improving the compatibility and flexibility of the system, and finally outputting a square wave signal.

[0077] The trigger signal transmitting module 140 is used to convert the square wave signal into a wireless signal and send it to the trigger signal receiving module 150 in a wireless manner.

[0078] Specifically, the trigger signal transmitting module 140 includes a first main control 141 and a first wireless transceiver module 142; the first main control 141 is electrically connected to the level conversion unit 133, the first main control 141 is connected to the first wireless transceiver module 142, and the first wireless transceiver module 142 is communicatively connected to the trigger signal receiving module 150; the first main control 141 is used to receive the trigger signal and generate a sinusoidal wave signal with the same frequency as the trigger signal; the first wireless transceiver module 142 is used to collect the sinusoidal wave signal, modulate the sinusoidal wave signal into a wireless signal, and send the wireless signal to the trigger signal receiving module 150 wirelessly.

[0079] Furthermore, the first main control 141 includes a DAC module, and the first wireless transceiver module 142 includes an ADC converter, a first MCU chip and a first radio frequency IC chip; the DAC module is electrically connected to the first end of the twenty-second resistor R22, the DAC module is connected to the ADC converter, the ADC converter is communicatively connected to the first MCU chip, and the first MCU chip is communicatively connected to the first radio frequency IC chip.

[0080] It is understandable that the waveform output by the trigger signal processing module 130 is a square wave signal, which can be directly output as a TTL level trigger signal and connected to the detection terminal via a coaxial cable. However, the cable connection method sometimes cannot meet the requirements of long distances on site, and there will be inconveniences such as carrying heavy cables. Therefore, this embodiment uses the trigger signal transmitting module 140 to send the generated square wave signal to the remote trigger signal receiving module 150 via wireless communication, thereby realizing the wireless connection function. The flowchart of the trigger signal transmitting module 140 is shown in FIG. Figure 5 As shown, the trigger signal transmitting module 140 includes two parts: a first main control chip 141 and a first wireless transceiver module 142. First, a square wave signal is input to the first main control chip 141. The DAC module inside the first main control chip 141 generates a sine wave signal with the same frequency as the trigger signal. The sine wave signal is collected and processed by the ADC converter of the first wireless transceiver module 142, and then sent to the first RF IC chip via the first MCU chip through the corresponding digital communication interface. The first RF IC chip modulates the sine wave signal into a wireless signal and transmits it through the antenna in the form of radio waves. This design not only improves the reliability and stability of communication, but also reduces noise interference and attenuation during signal transmission.

[0081] The design of the trigger signal transmitting module 140 solves the inconvenience of the cable connection method such as the long distance on site or the heavy weight of the cable, and improves the flexibility and portability of the system. In addition, it simplifies the system structure, reduces the use of cables and connectors, and reduces the complexity and maintenance cost of the system. At the same time, the wireless communication method also avoids the signal loss and interference problems that may be caused by cable connection, and improves the overall performance of the system.

[0082] The trigger signal receiving module 150 is used to receive the wireless signal and restore the wireless signal to a trigger signal.

[0083] Specifically, the trigger signal receiving module 150 includes a second main control 151 and a second wireless transceiver module 152; the second wireless transceiver module 152 is communicatively connected to the first wireless transceiver module 142, the second wireless transceiver module 152 is communicatively connected to the second main control 151, and the second main control 151 is electrically connected to the trigger signal analysis module 160; the second wireless transceiver module 152 is used to receive wireless signals and demodulate the wireless signals into sinusoidal wave signals; the second main control 151 is used to restore the sinusoidal wave signals into trigger signals.

[0084] Furthermore, the second main control 151 includes a PWM module, an ADC module, a power port, a data port Data and a general input and output port GPIO, and the second wireless transceiver module 152 includes a DAC converter, a second MCU chip and a second RF IC chip; the second RF IC chip is communicatively connected to the first RF IC chip, the second RF IC chip is communicatively connected to the second MCU chip, the second MCU chip is communicatively connected to the DAC converter, the DAC converter is connected to the ADC module, the ADC module is communicatively connected to the PWM module, the data port Data and the general input and output port GPIO are electrically connected to the trigger signal analysis module 160, the power port is connected to the low-voltage power supply, and the second main control 151 is grounded.

[0085] Understandably, the flowchart of the trigger signal receiving module 150 is as follows: Figure 6 As shown, the trigger signal receiving module 150 is used to establish wireless communication with the trigger signal transmitting module 140. This design makes the connection between the signal source device and the signal receiving device more flexible and convenient, and is no longer limited by the length and weight of the cable. When in use, the trigger signal transmitting module 140 is installed at the signal source device end, and the trigger signal receiving module 150 is installed at the signal receiving device end. The processing process of the trigger signal receiving module 150 is the inverse process of the transmitting block. First, the received wireless signal is demodulated by the second RF IC chip in the second wireless transceiver module 152 to obtain the transmitted sine wave signal, and then sent to the DAC converter of the second wireless transceiver module 152 via the second MCU chip through the corresponding digital communication interface, and then the sine wave signal is restored by the DAC converter and output to the second main control 151, and the PWM module inside the second main control 151 restores and outputs a trigger signal. This design ensures the accuracy and integrity of the signal during transmission, and avoids the problem of false triggering or missed triggering caused by signal distortion or loss.

[0086] The trigger signal analysis module 160 is used to convert the trigger signal into a level trigger signal and output the level trigger signal to the detection terminal.

[0087] Specifically, the trigger signal analysis module 160 includes a common-phase level converter 161, which includes a first port A, a second port B, an output enable port OE, a high-voltage power port VCCB, and a low-voltage power port VCCA; the high-voltage power port VCCB is connected to the high-voltage power supply, the low-voltage power port VCCA is connected to the low-voltage power supply, the common-phase level converter 161 is grounded, the first port A is electrically connected to the data port Data, the output enable port OE is electrically connected to the general input and output port GPIO, and the second port B outputs a level trigger signal.

[0088] Understandably, if Figure 7 As shown, the trigger signal analysis module 160 includes a common-phase level converter 161. The main control MCU on the right is the second main control 151 in the trigger signal receiving module 150. The common-phase level converter 161 can independently configure the power ports of two different power domains, thereby realizing the isolation and conversion of the power domains. The first port A is used to track the level trigger signal of the power domain VCCA. In this embodiment, the level trigger signal output by the data port Data of the second main control 151 in the trigger signal receiving module 150 is tracked. The second port B is used to track the level trigger signal of the output power domain VCCB. In this embodiment, it is used to output the level trigger signal TTL. The output enable port OE is used to control the three-state output state of the IO. The level state is controlled by the general input and output port GPIO of the second main control 151. This design provides a flexible IO output control function, so that the trigger signal analysis module 160 can adjust the output state according to actual needs, thereby improving the configurability and scalability of the system.

[0089] The function of the trigger signal analysis module 160 is to convert the trigger signal to obtain a level trigger signal with driving capability and output it to the detection terminal. The phase of this level trigger signal is the phase of the measured current, so as to accurately obtain accurate phase information. This design enhances the driving capability of the signal, enables the signal to be stably and reliably transmitted to the detection terminal, and improves the stability and reliability of the system.

[0090] The synchronous phase acquisition system 100 provided in the embodiment of the present application obtains the output current of the frequency converter cabinet during the experiment in a contactless manner in the ultra-high voltage GIS on-site withstand voltage test system, converts the current waveform into a voltage analog quantity, and then connects to the detection terminal by wireless communication, thereby effectively improving the effectiveness of local detection.

[0091] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow chart, and the combination of boxes in the structure diagram and / or the flow chart, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0092] In addition, the functional modules or units in the various embodiments of the present invention may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0093] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or partly contributed to the prior art or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium can be a non-volatile storage medium or a volatile storage medium. For example, the storage medium can be: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a disk or an optical disk, and other media that can store program codes.

[0094] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A synchronous phase acquisition system, characterized in that: The system includes a flexible current sensor, a current detection module, a trigger signal processing module, a trigger signal transmitting module, a trigger signal receiving module and a trigger signal analyzing module; The flexible current sensor is electrically connected to the current detection module, the current detection module is also electrically connected to the trigger signal processing module, the trigger signal processing module is also electrically connected to the trigger signal transmitting module, the trigger signal transmitting module is also communicatively connected to the trigger signal receiving module, and the trigger signal receiving module is also electrically connected to the trigger signal parsing module; The flexible current sensor is used to measure the current signal in the measured cable and convert the current signal into a voltage signal; The current detection module is used to restore the voltage signal to obtain a restored voltage signal; The trigger signal processing module is used to perform zero-crossing detection on the restored voltage signal to obtain a trigger signal, and perform level conversion on the trigger signal to obtain a square wave signal; The trigger signal transmitting module is used to convert the square wave signal into a wireless signal and send it to the trigger signal receiving module wirelessly; The trigger signal receiving module is used to receive the wireless signal and restore the wireless signal to the trigger signal; The trigger signal analysis module is used to convert the trigger signal into a level trigger signal and output the level trigger signal to the detection terminal.

2. The synchronous phase acquisition system according to claim 1, characterized in that: The current detection module includes a single-order RC analog low-pass filter unit, an active integral amplifier unit and an ADC acquisition unit; The single-order RC analog low-pass filter unit is electrically connected to the flexible current sensor, the single-order RC analog low-pass filter unit is electrically connected to the active integral amplifier unit, the active integral amplifier unit is electrically connected to the ADC acquisition unit, and the ADC acquisition unit is electrically connected to the trigger signal processing module; The single-order RC analog low-pass filter unit is used to filter the signal with a frequency higher than a preset cut-off frequency in the voltage signal to obtain a filtered voltage signal; The active integral amplifier unit is used to condition and amplify the filtered voltage signal to obtain a conditioned and amplified first voltage signal, and to perform integral restoration on the conditioned and amplified first voltage signal to obtain the restored voltage signal; The ADC acquisition unit is used to convert the restored voltage signal into a digital voltage signal.

3. The synchronous phase acquisition system according to claim 2, characterized in that: The single-order RC analog low-pass filter unit includes a first diode D1, a first resistor R1 and a first capacitor C1, the active integral amplifier unit includes a first-stage amplifier circuit, a third capacitor C3, a second-stage integral circuit, an eighth resistor R8 and a fifth capacitor C5, the first-stage amplifier circuit includes a second resistor R2, a third resistor R3, a fourth resistor R4, a second capacitor C2 and a first precision operational amplifier OP1, and the second-stage integral circuit includes a second precision operational amplifier OPA2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and a fourth capacitor C4; The first end of the first diode D1 is electrically connected to the first end of the flexible current sensor and the first end of the first resistor R1, respectively. The second end of the first diode D1 is electrically connected to the second end of the flexible current sensor and the second end of the first capacitor C1, respectively. The second end of the first capacitor C1 is grounded. The second end of the first resistor R1 is electrically connected to the first end of the first capacitor C1 and the first end of the second resistor R2, respectively. The second end of the first capacitor C1 is electrically connected to the first end of the third resistor R3, the second end of the second resistor R2 is electrically connected to the non-inverting input end of the first precision operational amplifier OP1, the second end of the third resistor R3 is electrically connected to the inverting input end of the first precision operational amplifier OP1, the first end of the fourth resistor R4, and the first end of the second capacitor C2, the second end of the fourth resistor R4 and the second end of the second capacitor C2 are both electrically connected to the output end of the first precision operational amplifier OP1, and the first The output end of the precision operational amplifier OP1 is electrically connected to the first end of the third capacitor C3, the second end of the third capacitor C3 is electrically connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is electrically connected to the first end of the sixth resistor R6, the first end of the fourth capacitor C4, and the inverting input end of the second precision operational amplifier OPA2, the first end of the seventh resistor R7 is electrically connected to the non-inverting input end of the second precision operational amplifier OPA2, the second end of the seventh resistor R7 is grounded, the second end of the sixth resistor R6 and the second end of the fourth capacitor C4 are both electrically connected to the output end of the second precision operational amplifier OP2, the output end of the second precision operational amplifier OP2 is electrically connected to the first end of the eighth resistor R8, the second end of the eighth resistor R8 is electrically connected to the first end of the fifth capacitor C5 and the input end of the ADC acquisition unit, and the output end of the ADC acquisition unit is electrically connected to the trigger signal processing module.

4. The synchronous phase acquisition system according to claim 3, characterized in that: The trigger signal processing module includes an in-phase amplification unit, a hysteresis zero-crossing comparison unit and a level conversion unit; The in-phase amplification unit is electrically connected to the ADC acquisition unit, the in-phase amplification unit is electrically connected to the hysteresis zero-crossing comparison unit, the hysteresis zero-crossing comparison unit is electrically connected to the level conversion unit, and the level conversion unit is electrically connected to the trigger signal transmission module; The in-phase amplifier unit is used to condition and amplify the digital voltage signal to obtain a conditioned and amplified second voltage signal; The hysteresis zero-crossing comparison unit is used to perform zero-crossing detection on the conditioned and amplified second voltage signal to obtain the trigger signal; The level conversion unit is used to perform level conversion on the trigger signal to obtain the square wave signal.

5. The synchronous phase acquisition system according to claim 4, characterized in that: The in-phase amplification unit includes an eighth resistor R8, a sixth capacitor C6, a third precision operational amplifier OPA3, a ninth resistor R9, a tenth resistor R10 and a seventh capacitor C7, the hysteresis zero-crossing comparison unit includes a third-stage amplification circuit, a second diode D2 and a fourteenth resistor R14, the third-stage amplification circuit includes a fourth precision operational amplifier OPA4, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13 and an eighth capacitor C8, and the level conversion unit includes a first MOS tube Q1, a twentieth resistor R20, a twenty-first resistor R21, and a twenty-second resistor R22; The first end of the eighth resistor R8 is electrically connected to the output end of the ADC acquisition unit, the second end of the eighth resistor R8 is electrically connected to the first end of the sixth capacitor C6 and the non-inverting input end of the third precision operational amplifier OPA3, the second end of the sixth capacitor C6 and the first end of the ninth resistor R9 are both grounded, the second end of the ninth resistor R9 is electrically connected to the inverting input end of the third precision operational amplifier OP3, the first end of the tenth resistor R10, and the first end of the seventh capacitor C7, the second end of the tenth resistor R10 and the second end of the seventh capacitor C7 are both electrically connected to the output end of the third precision operational amplifier OP3, the output end of the third precision operational amplifier OP3 is electrically connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11 is electrically connected to the first end of the thirteenth resistor R13, the first end of the eighth capacitor C8, and the non-inverting input end of the fourth precision operational amplifier OPA4, the second end of the thirteenth resistor R13, the first end of the eighth capacitor C8, and the non-inverting input end of the fourth precision operational amplifier OPA4, Both ends are electrically connected to the output end of the fourth precision operational amplifier OPA4, the first end of the twelfth resistor R12 is electrically connected to the inverting input end of the fourth precision operational amplifier OPA4, the second end of the twelfth resistor R12 is grounded, the output end of the fourth precision operational amplifier OPA4 is electrically connected to the first end of the second diode D2, the second end of the second diode D2 is electrically connected to the first end of the fourteenth resistor R14, the first end of the twentieth resistor R20 is electrically connected to the second end of the fourteenth resistor R14 and the drain of the first MOS tube Q1 respectively, the second end of the twentieth resistor R20 is connected to a high voltage power supply, the gate of the first MOS tube Q1 is electrically connected to the first end of the twenty-first resistor R21, the source of the first MOS tube Q1 is electrically connected to the first end of the twenty-second resistor R22, the second end of the twenty-first resistor R21 and the second end of the twenty-second resistor R22 are both connected to the low voltage power supply, and the first end of the twenty-second resistor R22 is electrically connected to the trigger signal transmitting module.

6. The synchronous phase acquisition system according to claim 5, characterized in that: The trigger signal transmission module includes a first main control and a first wireless transceiver module; The first main control is electrically connected to the level conversion unit, the first main control is connected to the first wireless transceiver module, and the first wireless transceiver module is communicatively connected to the trigger signal receiving module; The first master control is used to receive the trigger signal and generate a sine wave signal with the same frequency as the trigger signal; The first wireless transceiver module is used to collect the sinusoidal wave signal, modulate the sinusoidal wave signal into the wireless signal, and send the wireless signal to the trigger signal receiving module wirelessly.

7. The synchronous phase acquisition system according to claim 6, characterized in that: The first main control includes a DAC module, and the first wireless transceiver module includes an ADC converter, a first MCU chip and a first radio frequency IC chip; The DAC module is electrically connected to the first end of the 22nd resistor R22, the DAC module is connected to the ADC converter, the ADC converter is communicatively connected to the first MCU chip, and the first MCU chip is communicatively connected to the first RF IC chip.

8. The synchronous phase acquisition system according to claim 7, characterized in that: The trigger signal receiving module includes a second main control and a second wireless transceiver module; The second wireless transceiver module is communicatively connected to the first wireless transceiver module, the second wireless transceiver module is communicatively connected to the second main control, and the second main control is electrically connected to the trigger signal analysis module; The second wireless transceiver module is used to receive the wireless signal and demodulate the wireless signal into the sinusoidal wave signal; The second master control is used to restore the sinusoidal wave signal to the trigger signal.

9. The synchronous phase acquisition system according to claim 8, characterized in that: The second main control includes a PWM module, an ADC module, a power port, a data port Data and a general input and output port GPIO, and the second wireless transceiver module includes a DAC converter, a second MCU chip and a second RF IC chip; The second RF IC chip is communicatively connected to the first RF IC chip, the second RF IC chip is communicatively connected to the second MCU chip, the second MCU chip is communicatively connected to the DAC converter, the DAC converter is connected to the ADC module, the ADC module is communicatively connected to the PWM module, the data port Data and the general input and output port GPIO are electrically connected to the trigger signal analysis module, the power port is connected to the low-voltage power supply, and the second master control is grounded.

10. The synchronous phase acquisition system according to claim 9, characterized in that: The trigger signal analysis module includes a common-phase level converter, and the common-phase level converter includes a first port A, a second port B, an output enable port OE, a high-voltage power port VCCB, and a low-voltage power port VCCA; The high-voltage power port VCCB is connected to the high-voltage power supply, the low-voltage power port VCCA is connected to the low-voltage power supply, the in-phase level converter is grounded, the first port A is electrically connected to the data port Data, the output enable port OE is electrically connected to the general input and output port GPIO, and the second port B outputs a level trigger signal.

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