Automatic test method and system for chip analog circuit
By using multi-channel selectors and converters for automated calibration and testing in chip analog circuit testing, the problems of long test time, few test numbers and poor contact in the prior art are solved, and fast, stable and efficient chip testing is achieved.
Patent Information
- Application Number
- CN202411793794.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-09
- Publication Date
- 2025-03-28
AI Technical Summary
The existing chip analog circuit parameter testing methods have a long test time, few test numbers, and have poor contact and noise problems, resulting in high testing costs and poor stability.
The parameters to be tested are input to the converter for quantization through a multi-channel selector, and the difference between the target value and the output value is compared using the test control module, and the calibration register is automatically adjusted until the output value reaches the target value. Then the final output value is read by the automatic test equipment to determine whether it is within the parameter specification range, and to complete the automatic calibration and testing.
This greatly reduces the time for chip testing, increases the same number of tests, reduces the cost of testing, eliminates poor contact and noise problems, and improves test stability.
Smart Images
Figure CN119716504A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip testing technology, and in particular to a chip analog circuit automatic testing method and system. Background Art
[0002] Mixed signal chips usually contain analog circuits and digital circuits, and analog circuits usually contain multiple analog modules. Chip testing is generally divided into CP testing and FT testing. CP testing is a test performed before chip packaging, and is a test for semi-finished chips; FT testing is a test that needs to be performed on the packaged wafer after the integrated circuit chip is packaged from the wafer into a finished product to ensure the performance and quality of the finished product. It is a test for the finished chip. The test of the analog circuit in the chip includes performance tests of various parameters, such as voltage accuracy and range tests, frequency accuracy, temperature characteristics tests, and absolute value tests of current.
[0003] Figure 1 The figure is a schematic diagram of the existing chip simulation circuit parameter testing method. Figure 1 As shown, the voltages to be tested Vt1, Vt2 or other voltages to be tested can be uniformly input to the first multi-channel selector MUX1, and uniformly output to the first pad PAD1 through MUX1. During the CP test or FT test, the voltage on PAD1 is measured by ATE (Automatic Test Equipment), and the measurement of the voltages to be tested of different modules is achieved by switching the input channels of MUX1. Figure 1 As shown, the measured frequencies Ft3, Ft4 or other measured frequencies can be uniformly input to the second multi-channel selector MUX2, and uniformly output to the second pad PAD2 through MUX2. During the CP test or FT test, the frequency on PAD2 is measured by ATE, and the measurement of the measured frequencies of different modules is achieved by switching the input channel of MUX2. Analog IP is a designed reusable analog module. Other measured parameters, such as current, can also be output to a pad in a similar manner and measured by ATE.
[0004] Figure 1 The existing chip analog circuit parameter testing method shown can complete the measurement of all parameters and is also the most commonly used testing method, but its disadvantages are: the test time is relatively long, because the machine needs to measure the voltage, frequency and other parameters on the pad multiple times, especially when the analog parameters need to be calibrated, each adjustment of the calibration register requires another measurement, and the machine measurement speed is slow, and the test time of a chip can be as long as several seconds or even longer; the number of simultaneous measurements is small, because the number of pins in the CP test or FT test stage needs to be increased through pad measurement, thereby reducing the number of simultaneous measurements. Summary of the invention
[0005] In view of some or all of the problems in the prior art, the present invention provides a chip simulation circuit automatic testing method, the method comprising the following steps:
[0006] Inputting the measured parameters of the analog module of the chip to be tested into the channel of the converter through a multi-channel selector for quantization to obtain the target value of the converter;
[0007] Using a test control module to compare the difference between the target value of the converter and the output value of the converter;
[0008] Adjusting a calibration register of an analog module until an output value of the converter is equal to a target value of the converter, thereby obtaining a final output value of the converter;
[0009] Use automatic testing equipment to read the final output value of the converter to determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; if the final output code is not within the parameter specification range, the chip test fails.
[0010] Furthermore, the parameters to be measured include voltage and frequency.
[0011] Further, when the parameter to be measured is voltage, the converter is an analog-to-digital converter; and / or
[0012] When the parameter to be measured is frequency, the converter is a frequency-to-digital converter.
[0013] Furthermore, when the parameter to be measured is voltage, the target value Vcode of the analog-to-digital converter is expressed by the following formula:
[0014]
[0015] Wherein, * indicates multiplication, Vt is the voltage to be measured, Vre is the reference voltage of the analog-to-digital converter, and B is the number of bytes of the analog-to-digital converter.
[0016] Furthermore, when the parameter to be measured is frequency, the target value Fcode of the frequency-to-digital converter is expressed by the following formula:
[0017]
[0018] Wherein, * indicates multiplication, Ft is the frequency to be measured, Fre is the reference frequency of the frequency-to-digital converter, and C is the number of cycles of the input clock counted by the frequency-to-digital converter.
[0019] Further, adjusting the calibration register of the analog module includes:
[0020] If the target value of the converter is greater than the output value of the converter, adjusting the calibration register of the analog module to a larger value;
[0021] If the target value of the converter is less than the output value of the converter, the calibration register of the analog module is adjusted down.
[0022] Furthermore, the parameter to be measured also includes current, and the current is converted into voltage before performing the test.
[0023] The present invention also provides a system for the above chip simulation circuit automatic testing method, the system comprising:
[0024] The chip under test is configured to include a plurality of analog modules;
[0025] A multi-channel selector configured to input the parameters to be tested of the analog modules of the chip to be tested into the channels of the converter;
[0026] A converter, configured to quantize the parameter to be measured to obtain a target value of the converter;
[0027] a test control module configured to compare a difference between a target value of the converter and an output value of the converter;
[0028] a calibration register configured to adjust an output value in the converter to obtain a final output value of the converter;
[0029] The automatic testing equipment is configured to read the final output value of the converter and determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; if the final output code is not within the parameter specification range, the chip test fails.
[0030] Further, when the parameter to be measured is voltage, the converter is an analog-to-digital converter; and / or
[0031] When the parameter to be measured is frequency, the converter is a frequency-to-digital converter.
[0032] The present invention also provides a computer-readable storage medium on which machine-readable instructions are stored. When the machine-readable instructions are executed by a processor, the steps of the chip simulation circuit automatic testing method are executed.
[0033] The technical solution provided by the present invention has the following beneficial effects:
[0034] 1. The chip simulation circuit automatic testing method provided by the present invention can greatly reduce the test time of CP test or FT test and save the test time cost.
[0035] 2. The chip analog circuit automated testing method provided by the present invention requires only fewer test pads, can increase the number of simultaneous tests of CP testing and FT testing, can test more chips in the same time, and further save the average testing cost of the chips.
[0036] 3. The chip analog circuit automated testing method provided by the present invention eliminates a series of problems such as poor contact, contact impedance and noise caused by the test pin card, greatly reduces the testing cost during chip mass production, and improves the testing stability. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] To further illustrate the above and other advantages and features of various embodiments of the present invention, a more specific description of various embodiments of the present invention will be presented with reference to the accompanying drawings. It will be understood that these drawings only depict typical embodiments of the present invention and are therefore not to be considered as limiting the scope thereof. In the accompanying drawings, for clarity, identical or corresponding parts will be represented by identical or similar reference numerals.
[0038] Figure 1 A schematic diagram of an existing chip simulation circuit parameter testing method;
[0039] Figure 2 A schematic diagram of a flow chart of a chip analog circuit automatic testing method according to an embodiment of the present invention;
[0040] Figure 3 A schematic diagram of an automatic testing method for chip analog circuits according to an embodiment of the present invention; and
[0041] Figure 4 The figure is a schematic diagram of the structure of a chip simulation circuit automatic testing system according to an embodiment of the present invention. DETAILED DESCRIPTION
[0042] In the following description, the present invention is described with reference to various embodiments. However, those skilled in the art will recognize that various embodiments may be implemented without one or more specific details or with other replacement and / or additional methods or components. In other cases, well-known structures or operations are not shown or described in detail to avoid obscuring the inventive point of the present invention. Similarly, for the purpose of explanation, specific numbers and configurations are set forth to provide a comprehensive understanding of embodiments of the present invention. However, the present invention is not limited to these specific details.
[0043] In this specification, reference to "one embodiment" or "the embodiment" means that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present invention. The phrase "in one embodiment" appearing in various places in this specification does not necessarily all refer to the same embodiment.
[0044] In this specification, unless otherwise specified, the quantifiers "plurality" and "multiple" refer to one or more than one element.
[0045] It should be noted that the embodiments of the present invention describe the method steps in a specific order, but this is only for the purpose of illustrating the specific embodiment, rather than limiting the order of the steps. On the contrary, in different embodiments of the present invention, the order of the steps can be adjusted according to actual needs.
[0046] In view of the shortcomings of the prior art, the present invention proposes a method suitable for automatic testing of analog circuits in chips. The method quantifies the parameters to be tested of the analog module by using converters such as an analog-to-digital converter (ADC) or a frequency-to-digital converter (FDC), compares the difference between the output value of the converter and the target value by a test control module, and then automatically adjusts the calibration register of the analog module until the target value is reached; the automatic test equipment (ATE) can determine whether the parameter to be tested is within the specification range by reading the final output value of the converter such as the analog-to-digital converter or the frequency-to-digital converter, thereby completing the automatic calibration and testing.
[0047] The technical solutions in the embodiments of the present invention are described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.
[0048] Figure 2 The figure is a flow chart of a chip simulation circuit automatic testing method according to an embodiment of the present invention. Figure 3 This is a schematic diagram of an automatic test method for chip simulation circuits according to an embodiment of the present invention. Figure 2 and Figure 3 , describing the chip simulation circuit automatic testing method provided by the present invention. The testing method comprises the following steps:
[0049] First, the parameters to be tested of the analog module of the chip to be tested are input into the channel of the converter through a multi-channel selector for quantization to obtain the target value of the converter. In one embodiment of the present invention, the parameters to be tested may include voltage and frequency; they may also include current, and the current is converted into voltage before the test is performed. In one embodiment of the present invention, when the parameter to be tested is voltage, the converter is an analog-to-digital converter; when the parameter to be tested is frequency, the converter is a frequency-to-digital converter. Figure 3As shown, the parameters to be measured of the first analog module and the second analog module are voltages Vt1 and Vt2, and the parameters to be measured of the third analog module and the fourth analog module are frequencies Ft1 and Ft2. In one embodiment of the present invention, the parameters to be measured of more than two analog modules may be voltages, and the parameters to be measured of more than two analog modules may be frequencies.
[0050] Vt1 and Vt2 can be any voltage between 0 and the power supply voltage VCC, such as the Bandgap output voltage 1.2V. When the parameter to be measured is voltage, the target value Vcode of the analog-to-digital converter is expressed by the following formula:
[0051]
[0052] Where * indicates multiplication, Vt is the voltage to be measured, Vre is the reference voltage of the analog-to-digital converter, and B is the number of bytes of the analog-to-digital converter. The target value Vcode is the ideal output code of the analog-to-digital converter. For example, if the voltage to be measured is 1.2V, the number of bytes of the analog-to-digital converter is 10 bits, and the reference voltage of the analog-to-digital converter is assumed to be 3V, then the target value Vcode of the analog-to-digital converter can be calculated to be 410.
[0053] Ft1, Ft2 can be any frequency between 0 and the reference frequency, such as a low-frequency clock of 32kHz. When the parameter to be measured is frequency, the target value Fcode of the frequency-to-digital converter is expressed as follows:
[0054]
[0055] Where * indicates multiplication, Ft is the frequency to be measured, Fre is the reference frequency of the frequency-to-digital converter, and C is the number of cycles of the input clock counted by the frequency-to-digital converter. The target value Fcode is the ideal output code of the frequency-to-digital converter. For example, if the frequency to be measured is 32kHz, the reference frequency of the frequency-to-digital converter is assumed to be 32M, and the number of cycles of the input clock counted by the frequency-to-digital converter is 10, then the target value Fcode of the frequency-to-digital converter can be calculated to be 10000.
[0056] Next, the test control module is used to compare the difference between the target value of the converter and the output value of the converter. For example, when the voltage to be tested is 1.2V, the target value Vcode of the analog-to-digital converter should be 410, while the output value of the converter may be 400.
[0057] Next, adjust the calibration register of the analog module until the output value of the converter is equal to the target value of the converter to obtain the final output value of the converter. In one embodiment of the present invention, the output value of the converter may also be close to the target value of the converter to obtain the final output value of the converter. If the target value of the converter is greater than the output value of the converter, the calibration register of the analog module is adjusted up; if the target value of the converter is less than the output value of the converter, the calibration register of the analog module is adjusted down. Taking the measured parameter as voltage as an example, the final output value refers to the output value of the analog-to-digital converter after calibration. For example, the output value of the analog-to-digital converter of the Bandgap voltage before calibration is 400, and the final output value of the analog-to-digital converter after calibration is 409.
[0058] Finally, use the automatic test equipment to read the final output value of the converter to determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; if the final output code is not within the parameter specification range, the chip test fails. The specification range, i.e., the SPEC range, is determined according to the actual situation. For example, for Bandgap voltage, assuming the SPEC range is 407-413, if the final output value is within the range of 407-413, the chip test is considered to have passed; if it exceeds this range, the chip test is considered to have failed.
[0059] The chip analog circuit automatic testing method provided by the present invention can greatly reduce the test time of CP test or FT test, saving the test time cost; only requires fewer test pads, can increase the number of simultaneous tests of CP test and FT test, can test more chips in the same time, further saving the average test cost of the chip; eliminates a series of problems such as poor contact, contact impedance and noise caused by the test pin card, greatly reduces the test cost of the chip during mass production, and improves the test stability.
[0060] Figure 4 FIG. 1 is a schematic diagram of the structure of a chip simulation circuit automatic testing system according to an embodiment of the present invention. Figure 4 As shown, the chip analog circuit automatic test system includes:
[0061] The chip under test is configured to include a plurality of analog modules;
[0062] A multi-channel selector configured to input the parameters to be tested of the analog modules of the chip to be tested into the channels of the converter;
[0063] The converter is configured to quantize the parameter to be measured to obtain a target value of the converter; when the parameter to be measured is voltage, the converter is an analog-to-digital converter; and / or when the parameter to be measured is frequency, the converter is a frequency-to-digital converter.
[0064] a test control module configured to compare a difference between a target value of the converter and an output value of the converter;
[0065] a calibration register configured to adjust an output value in the converter to obtain a final output value of the converter;
[0066] The automatic testing equipment is configured to read the final output value of the converter and determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; if the final output code is not within the parameter specification range, the chip test fails.
[0067] In one embodiment of the present invention, the present invention also provides a computer-readable storage medium having machine-readable instructions stored thereon, and the machine-readable instructions implement the following processing steps when executed by a processor: inputting the test parameters of the analog module of the chip to be tested into the channel of the converter through a multi-channel selector for quantization to obtain the target value of the converter; using a test control module to compare the difference between the target value of the converter and the output value of the converter; adjusting the calibration register of the analog module until the output value of the converter is equal to the target value of the converter to obtain the final output value of the converter; using automatic testing equipment to read the final output value of the converter to determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; if the final output code is not within the parameter specification range, the chip test fails.
[0068] The readable storage medium includes: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store machine-readable instructions.
[0069] Although various embodiments of the present invention are described above, it should be understood that they are presented as examples only and not as limitations. It is obvious to those skilled in the relevant art that various combinations, modifications and changes can be made thereto without departing from the spirit and scope of the present invention. Therefore, the breadth and scope of the present invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should only be defined according to the attached claims and their equivalents.
Claims
1. A chip analog circuit automatic testing method, characterized in that: include: Inputting the measured parameters of the analog module of the chip to be tested into the channel of the converter through a multi-channel selector for quantization to obtain the target value of the converter; Using a test control module to compare the difference between the target value of the converter and the output value of the converter; Adjusting a calibration register of an analog module until an output value of the converter is equal to a target value of the converter, thereby obtaining a final output value of the converter; Using an automatic test device to read the final output value of the converter to determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; If the final output code is not within the parameter specification range, the chip test fails.
2. The chip simulation circuit automatic testing method according to claim 1, characterized in that: The parameters to be measured include voltage and frequency.
3. The chip simulation circuit automatic testing method according to claim 1 or 2, characterized in that: When the parameter to be measured is voltage, the converter is an analog-to-digital converter; and / or When the parameter to be measured is frequency, the converter is a frequency-to-digital converter.
4. The chip simulation circuit automatic testing method according to any one of claims 1 to 3, characterized in that: When the parameter to be measured is voltage, the target value V of the analog-to-digital converter code It can be expressed as follows: Among them, * represents multiplication, V t is the voltage to be measured, V re is the reference voltage of the analog-to-digital converter, and B is the number of bytes of the analog-to-digital converter.
5. The chip simulation circuit automatic testing method according to any one of claims 1 to 3, characterized in that: When the parameter to be measured is frequency, the target value F of the frequency-to-digital converter code It can be expressed as follows: Among them, * represents multiplication, F t is the frequency to be measured, F re is the reference frequency of the frequency-to-digital converter, and C is the number of cycles of the input clock counted by the frequency-to-digital converter.
6. The chip simulation circuit automatic testing method according to claim 1, characterized in that: Adjusting the calibration registers of the analog modules includes: If the target value of the converter is greater than the output value of the converter, adjusting the calibration register of the analog module to a larger value; If the target value of the converter is less than the output value of the converter, the calibration register of the analog module is adjusted down.
7. The chip simulation circuit automatic testing method according to claim 1, characterized in that: The parameters to be tested also include current, which is converted into voltage before the test is performed.
8. A system for the chip simulation circuit automatic testing method according to any one of claims 1 to 7, characterized in that: include: The chip under test is configured to include a plurality of analog modules; A multi-channel selector configured to input the parameters to be tested of the analog modules of the chip to be tested into the channels of the converter; A converter, configured to quantize the parameter to be measured to obtain a target value of the converter; a test control module configured to compare a difference between a target value of the converter and an output value of the converter; a calibration register configured to adjust an output value in the converter to obtain a final output value of the converter; An automatic test device is configured to read the final output value of the converter and determine whether the final output code is within the parameter specification range; if the final output code is within the parameter specification range, the chip test passes; If the final output code is not within the parameter specification range, the chip test fails.
9. The chip simulation circuit automatic testing system according to claim 8, characterized in that: When the parameter to be measured is voltage, the converter is an analog-to-digital converter; and / or When the parameter to be measured is frequency, the converter is a frequency-to-digital converter.
10. A computer-readable storage medium, characterized in that: Machine-readable instructions are stored thereon, and when the machine-readable instructions are executed by a processor, the steps of the method according to any one of claims 1 to 7 are performed.