Light-emitting diode and light-emitting diode preparation method

Abstract

The invention provides a light emitting diode and a light emitting diode preparation method. The light emitting diode comprises an epitaxial structure, a first electrode, a second electrode, a conductive filling layer, a first insulating layer and a reflecting layer. A groove is formed in the surface of the epitaxial structure, the first electrode is located on the surface of the epitaxial structure, the second electrode is located in the groove, the conductive filling layer is located on the second electrode, the first insulating layer is located in the groove, and the height of the first insulating layer in the groove is the same as the depth of the groove. The first insulating layer surrounds the side surface of the second electrode and the side surface of the conductive filling layer, and the reflecting layer covers the epitaxial structure, the first electrode, the conductive filling layer and the first insulating layer.

Description

Technical Field

[0001] The present disclosure relates to the field of light-emitting devices, and in particular to a light-emitting diode and a method for preparing the light-emitting diode. Background Art

[0002] Light Emitting Diode (LED) can cover the wavelength range from ultraviolet to infrared. It has the advantages of energy saving, high brightness, high durability, long life and light weight, and has been widely used in fields such as lighting and display.

[0003] The related art provides a light emitting diode, comprising: an epitaxial structure, an electrode structure and a reflective layer, wherein the electrode structure passes through the reflective layer and is connected to the epitaxial structure.

[0004] In the related art, the welding area of ​​the electrode structure is small, resulting in poor ohmic contact and reliability. Summary of the invention

[0005] The embodiments of the present disclosure provide a light emitting diode and a method for manufacturing the light emitting diode, which are beneficial to increasing the welding area of ​​the electrode structure and improving the ohmic contact and reliability. The technical solution is as follows:

[0006] In one aspect, a light emitting diode is provided, comprising: an epitaxial structure, a first electrode, a second electrode, a conductive filling layer, a first insulating layer and a reflective layer.

[0007] The surface of the epitaxial structure has a groove, the first electrode is located on the surface of the epitaxial structure, the second electrode is located in the groove, the conductive filling layer is located on the second electrode, the first insulating layer is located in the groove, the height of the first insulating layer in the groove is the same as the depth of the groove, and the first insulating layer surrounds the side of the second electrode and the side of the conductive filling layer, and the reflective layer covers the epitaxial structure, the first electrode, the conductive filling layer and the first insulating layer.

[0008] Optionally, the conductive filling layer includes a first Ti sublayer, a first Pt sublayer, a first Ni sublayer, a second Pt sublayer, a second Ni sublayer, a third Pt sublayer and a second Ti sublayer stacked in sequence.

[0009] Optionally, the thickness of the first Ti sublayer is 100 to 300 angstroms, the thickness of the first Pt sublayer is 2900 to 3100 angstroms, the thickness of the first Ni sublayer is 400 to 600 angstroms, the thickness of the second Pt sublayer is 3900 to 4100 angstroms, the thickness of the second Ni sublayer is 400 to 600 angstroms, the thickness of the third Pt sublayer is 2900 to 3100 angstroms, and the thickness of the second Ti sublayer is 1700 to 1900 angstroms.

[0010] Optionally, the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not greater than the depth of the groove, and the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not less than 80% of the depth of the groove.

[0011] Optionally, the light-emitting diode also includes: a first electrode pad, a second electrode pad and a second insulating layer, the second insulating layer is located between the epitaxial structure and the reflective layer, and corresponding through holes are respectively provided on the reflective layer and the second insulating layer, the second electrode pad is electrically connected to the conductive filling layer through the through hole, and the first electrode pad is electrically connected to the first electrode through the through hole.

[0012] In another aspect, a method for preparing a light emitting diode comprises:

[0013] Fabricating epitaxial structures;

[0014] Performing patterning on the surface of the epitaxial structure to form a groove;

[0015] Manufacturing a first electrode and a second electrode, wherein the first electrode is located on the surface of the epitaxial structure, and the second electrode is located in the groove;

[0016] Making a conductive filling layer, wherein the conductive filling layer is located on the second electrode;

[0017] Filling the groove with a first insulating layer, wherein the first insulating layer surrounds the side surface of the second electrode and the side surface of the conductive filling layer, and the height of the first insulating layer in the groove is the same as the depth of the groove;

[0018] A reflective layer is manufactured, wherein the reflective layer covers the epitaxial structure, the first electrode, the conductive filling layer and the first insulating layer.

[0019] Optionally, the conductive filling layer includes a first Ti sublayer, a first Pt sublayer, a first Ni sublayer, a second Pt sublayer, a second Ni sublayer, a third Pt sublayer and a second Ti sublayer stacked in sequence.

[0020] Optionally, the thickness of the first Ti sublayer is 100 to 300 angstroms, the thickness of the first Pt sublayer is 2900 to 3100 angstroms, the thickness of the first Ni sublayer is 400 to 600 angstroms, the thickness of the second Pt sublayer is 3900 to 4100 angstroms, the thickness of the second Ni sublayer is 400 to 600 angstroms, the thickness of the third Pt sublayer is 2900 to 3100 angstroms, and the thickness of the second Ti sublayer is 1700 to 1900 angstroms.

[0021] Optionally, the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not greater than the depth of the groove, and the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not less than 80% of the depth of the groove.

[0022] Optionally, filling the groove with a first insulating layer includes:

[0023] In an environment of 280-320° C., the first filled insulating layer is made by spin coating, and the curing time of the first filled insulating layer is 55-65 minutes.

[0024] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0025] In the embodiment of the present disclosure, a conductive filling layer is provided on the second electrode in the groove, so that the reflective layer covering the first electrode and the second electrode is flatter, thereby making the surface of the second electrode pad in contact with the second electrode smoother, thereby increasing the welding area of ​​the second electrode pad and improving the ohmic contact and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0027] Figure 1 is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;

[0028] Figure 2 It is a schematic diagram of a conductive filling layer structure of a light-emitting diode provided by an embodiment of the present disclosure;

[0029] Figure 3 is a top view of a light emitting diode provided by an embodiment of the present disclosure;

[0030] Figure 4 is a top view of a through hole of a light emitting diode provided by an embodiment of the present disclosure;

[0031] Figure 5 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure;

[0032] Figure 6 This is a flow chart of another method for preparing a light emitting diode provided in an embodiment of the present disclosure.

[0033] The reference numerals are as follows:

[0034] 1000: epitaxial structure; 100: substrate; 101: first semiconductor layer; 102: active layer; 103: second semiconductor layer; 104: first electrode; 105: second electrode; 106: conductive filling layer; 107: insulating layer; 108: reflective layer; 109: first electrode pad; 110: second electrode pad; 111: bonding layer; 112: passivation layer; 113: second insulating layer; 201: through hole; 202: groove; 1061: first Ti sublayer; 1062: first Pt sublayer; 1063: first Ni sublayer; 1064: second Pt sublayer; 1065: second Ni sublayer; 1066: third Pt sublayer; 1067: second Ti sublayer. DETAILED DESCRIPTION

[0035] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0036] Figure 1 is a schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 1 The light emitting diode includes: an epitaxial structure 1000 , a first electrode 104 , a second electrode 105 , a conductive filling layer 106 , a first insulating layer 107 and a reflective layer 108 .

[0037] Among them, the surface of the epitaxial structure 1000 has a groove 202, the first electrode 104 is located on the surface of the epitaxial structure 1000, the second electrode 105 is located in the groove 202, the conductive filling layer 106 is located on the second electrode 105, the first insulating layer 107 is located in the groove 202, the height of the first insulating layer 107 in the groove 202 is the same as the depth of the groove 202, and the first insulating layer 107 surrounds the side of the second electrode 105 and the side of the conductive filling layer 106, and the reflective layer 108 covers the epitaxial structure 1000, the first electrode 104, the conductive filling layer 106 and the first insulating layer 107.

[0038] In the embodiment of the present disclosure, a conductive filling layer is provided on the second electrode in the groove, so that the reflective layer covering the first electrode and the second electrode is flatter, thereby making the surface of the second electrode pad in contact with the second electrode smoother, thereby increasing the welding area of ​​the second electrode pad and improving the ohmic contact and reliability.

[0039] Figure 2 Schematic diagram of the structure of a conductive filling layer of a light emitting diode provided by an embodiment of the present disclosure. Figure 2 The conductive filling layer 106 includes a first Ti sublayer 1061, a first Pt sublayer 1062, a first Ni sublayer 1063, a second Pt sublayer 1064, a second Ni sublayer 1065, a third Pt sublayer 1066 and a second Ti sublayer 1067 which are stacked in sequence.

[0040] In the disclosed embodiment, the first Ti sublayer can improve the adhesion between the conductive filling layer and the second electrode, and help prevent delamination and peeling. The strong wear resistance and corrosion resistance of the Pt sublayer can improve the stability of the conductive filling layer structure, and the Ni sublayer has strong corrosion resistance, which can protect the underlying material from the corrosive environment; the alternating stacking of the Pt sublayer and the Ni sublayer can protect the underlying material from the corrosive environment and improve the stability of the conductive filling layer structure; the second Ti sublayer can improve the adhesion between the conductive filling layer and the second electrode pad, and help prevent delamination and peeling.

[0041] In the disclosed embodiment, the thickness of the first Ti sublayer 1061 is 100 to 300 angstroms, the thickness of the first Pt sublayer 1062 is 2900 to 3100 angstroms, the thickness of the first Ni sublayer 1063 is 400 to 600 angstroms, the thickness of the second Pt sublayer 1064 is 3900 to 4100 angstroms, the thickness of the second Ni sublayer 1065 is 400 to 600 angstroms, the thickness of the third Pt sublayer 1066 is 2900 to 3100 angstroms, and the thickness of the second Ti sublayer 1067 is 1700 to 1900 angstroms.

[0042] In the disclosed embodiment, the Ti sublayer adopts the above thickness to ensure the adhesion effect while avoiding excessive thickness; the Pt sublayer and the Ni sublayer adopt the above thickness to ensure that the above conductive filling layer has good stability.

[0043] Exemplarily, the thickness of the first Ti sublayer 1061 is 200 angstroms, the thickness of the first Pt sublayer 1062 is 3000 angstroms, the thickness of the first Ni sublayer 1063 is 500 angstroms, the thickness of the second Pt sublayer 1064 is 4000 angstroms, the thickness of the second Ni sublayer 1065 is 500 angstroms, the thickness of the third Pt sublayer 1066 is 3000 angstroms, and the thickness of the second Ti sublayer 1067 is 1800 angstroms.

[0044] In the disclosed embodiment, the sum of the thickness of the conductive filling layer 106 and the thickness of the second electrode 105 is not greater than the depth of the groove 202, and the sum of the thickness of the conductive filling layer 106 and the thickness of the second electrode 105 is not less than 80% of the depth of the groove 202. The top surface of the conductive filling layer is at most 20% lower than the groove opening, or is flush with the opening, which facilitates the electrical connection between the pad and the conductive filling layer and is conducive to the flatness of the pad surface.

[0045] Exemplarily, the sum of the thickness of the conductive filling layer 106 and the thickness of the second electrode 105 is equal to the depth of the groove 202. The filling height is consistent with the surrounding epitaxial height. After such optimization, the problem of low metal height in the hole is better improved.

[0046] Exemplarily, the sum of the thickness of the conductive filling layer 106 and the thickness of the second electrode 105 is greater than the depth of the groove 202 .

[0047] In the embodiment of the present disclosure, the light-emitting diode also includes: a first electrode pad 109 and a second electrode pad 110 and a second insulating layer 113, the second insulating layer 113 is located between the epitaxial structure 1000 and the reflective layer 108, and corresponding through holes 201 are respectively opened on the reflective layer 108 and the second insulating layer 113, the second electrode pad 110 is electrically connected to the conductive filling layer 106 through the through hole 201, and the first electrode pad 109 is electrically connected to the first electrode 104 through the through hole 201.

[0048] In the embodiment of the present disclosure, the second electrode pad 110 is electrically connected to the conductive filling layer 106 through four through holes 201 of the reflective layer 108 and four through holes 201 of the second insulating layer 113 in sequence. The use of four through holes increases the contact area between the electrode pad and the conductive filling layer, makes the connection structure more stable, and improves the ohmic contact and reliability.

[0049] In the embodiment of the present disclosure, the insulating layer 107 may be a SiO2 insulating layer. SiO2 has good insulation properties and can isolate the flat layer from contacting the side wall of the epitaxial structure to prevent short circuit.

[0050] In the embodiment of the present disclosure, the reflective layer 108 is a distributed Bragg reflector (DBR) layer.

[0051] In the embodiment of the present disclosure, the light emitting diode may further include: a substrate 100 and a bonding layer 111 .

[0052] The substrate 100 and the epitaxial structure 1000 are bonded via a bonding layer 111 .

[0053] In the embodiment of the present disclosure, the epitaxial structure 1000 includes a first semiconductor layer 101, an active layer 102 and a second semiconductor layer 103 stacked in sequence, and the first semiconductor layer 101 is bonded to the substrate 100 via a bonding layer 111. The groove 202 is opened in the first semiconductor layer 101.

[0054] The second electrode 105 is connected to the first semiconductor layer 101 in the groove 202, the second electrode pad 110 is connected to the conductive filling layer 106 through four through holes 201 on the reflective layer 108, the first electrode 104 is connected to the second semiconductor 103, and the first electrode pad 109 is connected to the first electrode 104 through a through hole 201 on the reflective layer 108.

[0055] In the embodiment of the present disclosure, the substrate 100 may be any one of a sapphire patterned substrate, a Si substrate, a SiC substrate, etc. The present disclosure does not limit the material of the substrate.

[0056] Exemplarily, the substrate 100 is a sapphire patterned substrate.

[0057] In the embodiment of the present disclosure, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.

[0058] For example, the first semiconductor layer 101 may include an N-type AlGaInP current spreading layer and an N-type AlInP carrier confinement layer stacked in sequence, and the second semiconductor layer 103 may include a P-type AlInP carrier confinement layer and a P-type GaP window layer.

[0059] The thickness of the P-type GaP window layer is 2.8-3.2 μm, for example, 3 μm.

[0060] In another example, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.

[0061] In the embodiment of the present disclosure, the active layer 102 may be a multi-quantum well layer. For example, the multi-quantum well layer may include a plurality of periodically alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0062] Optionally, a corrosion stop layer may be provided between the bonding layer 111 and the first semiconductor layer 101 , and the corrosion stop layer may be a solidified phosphoric acid mixture.

[0063] In the embodiment of the present disclosure, the material of the bonding layer 111 may be any one of photoresist, benzocyclobutene, and silica gel.

[0064] Exemplarily, the material of the bonding layer 111 is silica gel.

[0065] In the embodiment of the present disclosure, the first electrode 104 and the second electrode 105 may each include sequentially stacked Cr, Al, AlCu, Ti, Ni, Pt, and Au alloy layers.

[0066] In the embodiment of the present disclosure, the first electrode pad 109 and the second electrode pad 110 may each include a Cr layer, an Al layer, a Ti layer, a Ni layer, and an Au alloy layer stacked in sequence.

[0067] In one example, the thickness of the Cr layer is 80-120 nm, the thickness of the Al layer is 2500-3500 nm, the thickness of the Ti layer is 450-550 nm, the thickness of the Ni layer is 1800-2200 nm, and the thickness of the Au alloy layer is 18000-22000 nm.

[0068] Exemplarily, the thickness of the Cr layer is 100 nm, the thickness of the Al layer is 3000 nm, the thickness of the Ti layer is 500 nm, the thickness of the Ni layer is 2000 nm, and the thickness of the Au alloy layer is 20000 nm.

[0069] Optionally, the light emitting diode may further include a passivation layer 112 , the passivation layer 112 covers the reflective layer 108 , and both the first electrode pad 109 and the second electrode pad 110 pass through the reflective layer 108 and then pass through the reflective layer 108 .

[0070] In the embodiment of the present disclosure, the passivation layer 112 may be a film layer formed of materials such as a SiO 2 layer and an Al 2 O 3 layer.

[0071] For example, the passivation layer 112 is a SiO 2 layer.

[0072] It is worth noting that in the embodiments of the present disclosure, structures may be selectively increased or decreased based on the structure of the above-mentioned light emitting diode, and the present disclosure does not impose any limitation on this.

[0073] Figure 3 is a top view of a light emitting diode provided by an embodiment of the present disclosure. Figure 3 The top view shape of the first electrode pad 109 and the second electrode pad 110 is a rectangle.

[0074] In other embodiments, the top view shapes of the first electrode pad 109 and the second electrode pad 110 may be other arbitrary shapes, such as a circle, which is not limited in the present disclosure.

[0075] Figure 4 is a top view of a through hole of a light emitting diode provided by an embodiment of the present disclosure. Figure 4 The projection of the groove 202 on the substrate 100 is circular, and the projection of the through hole 201 on the substrate 100 is also circular. The second electrode pad 110 is connected to the conductive filling layer 106 through the four through holes 201 on the reflective layer 108 and the four through holes 201 of the second insulating layer 113, and the projections of the four through holes 201 on the groove 202 are evenly distributed.

[0076] In other examples, the projection of the groove 202 on the substrate 100 may also be other shapes, such as a rectangle.

[0077] In other examples, the projection of the through hole 201 on the substrate 100 may also be other shapes, such as a rectangle.

[0078] In other examples, the number of through holes 201 may also be other values, such as two through holes.

[0079] In other examples, the through holes 201 may be distributed in other ways, such as side-by-side distribution.

[0080] In the embodiment of the present disclosure, the diameter of the through hole 201 may be 0.5 to 1.5 micrometers.

[0081] Exemplarily, the diameter of the through-hole is 1 micron.

[0082] Figure 5 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 5 The method steps include:

[0083] S11. Fabricating an epitaxial structure.

[0084] S12, performing graphic processing on the surface of the epitaxial structure to form grooves.

[0085] S13, manufacturing a first electrode and a second electrode, wherein the first electrode is located on the surface of the epitaxial structure, and the second electrode is located in the groove.

[0086] S14, making a conductive filling layer, wherein the conductive filling layer is located on the second electrode.

[0087] S15. Fill the groove with a first insulating layer, wherein the first insulating layer surrounds the side surface of the second electrode and the side surface of the conductive filling layer, and the height of the first insulating layer in the groove is the same as the depth of the groove.

[0088] S16, making a reflective layer, wherein the reflective layer covers the epitaxial structure, the first electrode, the conductive filling layer and the first insulating layer.

[0089] In the embodiment of the present disclosure, a conductive filling layer is provided on the second electrode in the groove, so that the reflective layer covering the first electrode and the second electrode is flatter, thereby making the surface of the second electrode pad in contact with the second electrode smoother, thereby increasing the welding area of ​​the second electrode pad and improving the ohmic contact and reliability.

[0090] Figure 6 is a flow chart of another method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 6 The method steps include:

[0091] S21. Forming a second semiconductor layer, an active layer, a first semiconductor layer and a bonding layer in sequence on a substrate, wherein the second semiconductor layer, the active layer and the first semiconductor layer constitute an epitaxial structure.

[0092] Wherein, the temporary substrate is a gallium arsenide substrate.

[0093] In one example, step S21 includes:

[0094] The first step is to fabricate a second semiconductor layer.

[0095] In the embodiment of the present disclosure, the second semiconductor layer includes a P-type AlInP carrier confinement layer and a P-type GaP window layer.

[0096] Exemplarily, a P-type GaP window layer and a P-type AlInP carrier confinement layer are sequentially fabricated on the surface of the active layer using a Metal Organic Chemical Vapor Deposition (MOCVD) device.

[0097] The second step is to make the active layer.

[0098] In the embodiment of the present disclosure, the active layer is a multi-quantum well layer, including a plurality of periodically alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0099] Exemplarily, a plurality of AlGaInP quantum well layers and AlGaInP quantum barrier layers are alternately grown on the surface of the first semiconductor layer using MOCVD equipment.

[0100] The third step is to produce the first semiconductor layer.

[0101] In the embodiment of the present disclosure, the first semiconductor layer includes an N-type AlGaInP current spreading layer and an N-type AlInP carrier confinement layer stacked in sequence.

[0102] Exemplarily, an MOCVD device is used to sequentially form an N-type AlInP carrier confinement layer and an N-type AlGaInP current spreading layer on the surface of the active layer.

[0103] In the disclosed embodiment, the growth of the semiconductor layer can be achieved by using VeecoK465i or C4 or RB metal organic chemical vapor deposition (MOCVD) equipment or AIXTRON metal organic chemical vapor deposition equipment. High purity H2 (hydrogen) or high purity N2 (nitrogen) or a mixture of high purity H2 and high purity N2 is used as a carrier gas, high purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0104] In the disclosed embodiment, an etching stop layer may be formed on the surface of the N-type AlGaInP current spreading layer, and the etching medium layer is a solidified phosphoric acid mixture.

[0105] The fourth step is to make the bonding layer.

[0106] S22. Bond the epitaxial structure to the substrate via the bonding layer and remove the temporary substrate.

[0107] The substrate may be any one of a sapphire patterned substrate, a Si substrate, a SiC substrate, etc., and the present disclosure does not limit the material of the substrate.

[0108] Exemplarily, the substrate is a sapphire patterned substrate.

[0109] The bonding temperature is 280-320°C.

[0110] Exemplarily, the bonding temperature is 300°C.

[0111] In the embodiment of the present disclosure, if the bonding temperature is too high, the semiconductor layer will be damaged, and if the bonding temperature is too low, it will be detrimental to the bonding effect. Using the above temperature for bonding can ensure a good bonding effect without damaging the semiconductor layer.

[0112] In the disclosed embodiment, the material of the bonding layer is any one of photoresist, benzocyclobutene, and silica gel.

[0113] Exemplarily, the material of the bonding layer is silica gel.

[0114] S23, performing patterning on the first semiconductor layer, the active layer and the second semiconductor layer to form grooves.

[0115] In one example, step S23 includes:

[0116] The first semiconductor layer, the active layer and the second semiconductor layer stacked in sequence are patterned by using an etching technology to form a groove.

[0117] In the embodiment of the present disclosure, the first semiconductor layer, the active layer, and the second semiconductor layer stacked in sequence are patterned by using an etching technology to form a groove, which may include:

[0118] In the first step, a layer of photoresist is coated on the surface of the second semiconductor layer.

[0119] The second step is to use a mask to block and expose the photoresist.

[0120] The third step is to develop the exposed photoresist to form a photoresist mask with a specific shape.

[0121] In the fourth step, the first semiconductor layer, the active layer and the second semiconductor layer are etched based on the photoresist mask to form a groove, and the groove is opened to the first semiconductor layer.

[0122] Step 5: Use a stripping solution to remove the photoresist.

[0123] In the embodiment of the present disclosure, the projection of the groove on the substrate is a circle.

[0124] In other examples, the projection of the groove on the substrate may also be other shapes, such as a rectangle.

[0125] S24, manufacturing a first electrode and a second electrode, wherein the first electrode is located on a surface of the first semiconductor layer, and the second electrode is located on a surface of the second semiconductor layer.

[0126] In one example, step S24 includes:

[0127] The electron beam evaporation technology or the magnetron sputtering technology is adopted to form the second electrode on the surface of the first semiconductor layer in the groove, and the first electrode is formed on the surface of the second semiconductor layer.

[0128] S25, making a conductive filling layer on the second electrode.

[0129] In the embodiment of the present disclosure, the conductive filling layer includes a first Ti sublayer, a first Pt sublayer, a first Ni sublayer, a second Pt sublayer, a second Ni sublayer, a third Pt sublayer and a second Ti sublayer stacked in sequence.

[0130] In the disclosed embodiment, the Ti sublayer can improve the adhesion between the conductive filling layer and the second electrode, and help prevent delamination and peeling. The Pt sublayer has strong wear resistance and corrosion resistance, which can improve the stability of the conductive filling layer structure. The Ni sublayer has strong corrosion resistance and can protect the underlying material from the corrosive environment. The alternating stacking of the Pt sublayer and the Ni sublayer can protect the underlying material from the corrosive environment and improve the stability of the conductive filling layer structure. The second Ti sublayer can improve the adhesion between the conductive filling layer and the second electrode pad, and help prevent delamination and peeling.

[0131] In the disclosed embodiment, the thickness of the first Ti sublayer may be 100 to 300 angstroms, the thickness of the first Pt sublayer may be 2900 to 3100 angstroms, the thickness of the first Ni sublayer may be 400 to 600 angstroms, the thickness of the second Pt sublayer may be 3900 to 4100 angstroms, the thickness of the second Ni sublayer may be 400 to 600 angstroms, the thickness of the third Pt sublayer may be 2900 to 3100 angstroms, and the thickness of the second Ti sublayer may be 1700 to 1900 angstroms.

[0132] In the disclosed embodiment, the Ti sublayer adopts the above thickness to ensure the adhesion effect while avoiding excessive thickness; the Pt sublayer and the Ni sublayer adopt the above thickness to ensure that the above conductive filling layer has good stability.

[0133] Exemplarily, the thickness of the first Ti sublayer is 200 angstroms, the thickness of the first Pt sublayer is 3000 angstroms, the thickness of the first Ni sublayer is 500 angstroms, the thickness of the second Pt sublayer is 4000 angstroms, the thickness of the second Ni sublayer is 500 angstroms, the thickness of the third Pt sublayer is 3000 angstroms, and the thickness of the second Ti sublayer is 1800 angstroms.

[0134] In the disclosed embodiment, the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not greater than the depth of the groove, and the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not less than 80% of the depth of the groove, so that the top surface of the conductive filling layer is at most 20% lower than the groove opening, or is flush with the opening, which facilitates the electrical connection between the pad and the conductive filling layer and is conducive to the flatness of the pad surface.

[0135] S26, using the first insulating layer to fill the groove of the epitaxial structure.

[0136] In the embodiment of the present disclosure, the first insulating layer may be a SiO2 first insulating layer. SiO2 has good insulation properties and can isolate the conductive filling layer from contacting the side of the epitaxial structure to prevent short circuit.

[0137] In the disclosed embodiment, the first insulating layer is formed by spin-on glass (SOG) at 280-320°C, and the curing time of the first insulating layer is 55-65 minutes. The temperature is not too high to damage the device, nor is it too low to cause incomplete curing. The time is not too short to cause incomplete curing, nor is it too long to affect the production efficiency.

[0138] Exemplarily, the filled first insulating layer is formed by spin coating in an environment of 300° C., and the curing time of the filled first insulating layer is 60 minutes.

[0139] S27, making a reflective layer, wherein the reflective layer covers the epitaxial structure.

[0140] In one example, step S27 includes:

[0141] The DBR layer is manufactured on the second semiconductor layer and the surface of the step structure by using the plasma enhanced chemical vapor deposition (PECVD) technology or the atomic layer deposition (ALD) technology to form a reflective layer.

[0142] S28. Make a first electrode pad and a second electrode pad, wherein the first electrode pad penetrates the reflective layer and the second insulating layer to be connected to the first electrode, and the second electrode pad penetrates the reflective layer and the second insulating layer to be connected to the conductive filling layer.

[0143] In one example, step S28 includes:

[0144] In the first step, the reflective layer and the second insulating layer are patterned to form a through hole.

[0145] Wherein, the through holes penetrate the reflective layer and the second insulating layer respectively.

[0146] For example, it is connected to the first electrode through one through hole, and is connected to the conductive filling layer through four through holes.

[0147] In the embodiment of the present disclosure, the diameter of the through hole may be 0.5 to 1.5 microns.

[0148] Exemplarily, the diameter of the through-hole is 1 micron.

[0149] In the embodiment of the present disclosure, the projection of the through hole on the substrate is circular.

[0150] In other examples, the projection of the through hole on the substrate may also be other shapes, such as a rectangle.

[0151] The second step is to make a first electrode pad and a second electrode pad.

[0152] The first electrode pad and the second electrode pad are manufactured by electron beam evaporation or magnetron sputtering technology.

[0153] In the embodiment of the present disclosure, the first electrode pad and the second electrode pad include a Cr layer, an Al layer, a Ti layer, a Ni layer, and an Au alloy layer stacked in sequence.

[0154] In one example, the thickness of the Cr layer is 80-120 nm, the thickness of the Al layer is 2500-3500 nm, the thickness of the Ti layer is 450-550 nm, the thickness of the Ni layer is 1800-2200 nm, and the thickness of the Au alloy layer is 18000-22000 nm.

[0155] Exemplarily, the thickness of the Cr layer is 100 nm, the thickness of the Al layer is 3000 nm, the thickness of the Ti layer is 500 nm, the thickness of the Ni layer is 2000 nm, and the thickness of the Au alloy layer is 20000 nm.

[0156] In the embodiment of the present disclosure, the first electrode and the first electrode pad form a first electrode structure, and the second electrode and the second electrode pad form a second electrode structure.

[0157] In the embodiment of the present disclosure, the second electrode pad is electrically connected to the conductive filling layer through four through holes of the second insulating layer and four through holes of the reflective layer in sequence. The use of four through holes increases the contact area between the electrode pad and the conductive filling layer, makes the connection structure more stable, and improves the ohmic contact and reliability.

[0158] In the embodiment of the present disclosure, the projections of the four through holes on the projection of the groove are evenly distributed.

[0159] In other examples, the number of through holes may also be other values, such as two through holes.

[0160] In other examples, the through holes may be distributed in other ways, such as up and down distribution.

[0161] S29, manufacturing a passivation layer, wherein the passivation layer is a light-transmitting layer, and the passivation layer wraps the surface of the reflective layer.

[0162] In one example, step S29 includes:

[0163] A SiO2 layer is fabricated on the surface of the reflective layer by using a plasma enhanced chemical vapor deposition (PECVD) technique or an atomic layer deposition (ALD) technique to form a passivation layer.

[0164] In the embodiment of the present disclosure, the passivation layer can also be a transparent insulating material such as Al2O3, and the present disclosure does not limit the material of the passivation layer. According to the test results, the welding yield of the light-emitting diode manufactured by the embodiment of the present disclosure is increased from the original 99.85% to 99.92%.

[0165] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial structure (1000), a first electrode (104), a second electrode (105), a conductive filling layer (106), a first insulating layer (107) and a reflective layer (108); The surface of the epitaxial structure (1000) has a groove (202), the first electrode (104) is located on the surface of the epitaxial structure (1000), the second electrode (105) is located in the groove (202), the conductive filling layer (106) is located on the second electrode (105), the first insulating layer (107) is located in the groove (202), the height of the first insulating layer (107) in the groove (202) is the same as the depth of the groove (202), and the first insulating layer (107) surrounds the side of the second electrode (105) and the side of the conductive filling layer (106), and the reflective layer (108) covers the epitaxial structure (1000), the first electrode (104), the conductive filling layer (106) and the first insulating layer (107).

2. The light emitting diode according to claim 1, characterized in that: The conductive filling layer (106) includes a first Ti sublayer (1061), a first Pt sublayer (1062), a first Ni sublayer (1063), a second Pt sublayer (1064), a second Ni sublayer (1065), a third Pt sublayer (1066) and a second Ti sublayer (1067) stacked in sequence.

3. The light emitting diode according to claim 2, characterized in that: The thickness of the first Ti sublayer (1061) is 100 to 300 angstroms, the thickness of the first Pt sublayer (1062) is 2900 to 3100 angstroms, the thickness of the first Ni sublayer (1063) is 400 to 600 angstroms, the thickness of the second Pt sublayer (1064) is 3900 to 4100 angstroms, the thickness of the second Ni sublayer (1065) is 400 to 600 angstroms, the thickness of the third Pt sublayer (1066) is 2900 to 3100 angstroms, and the thickness of the second Ti sublayer (1067) is 1700 to 1900 angstroms.

4. The light emitting diode according to any one of claims 1 to 3, characterized in that: The sum of the thickness of the conductive filling layer (106) and the thickness of the second electrode (105) is not greater than the depth of the groove (202), and the sum of the thickness of the conductive filling layer (106) and the thickness of the second electrode (105) is not less than 80% of the depth of the groove (202).

5. The light emitting diode according to any one of claims 1 to 3, characterized in that: The light emitting diode further comprises: a first electrode pad (109), a second electrode pad (110) and a second insulating layer (113); the second insulating layer (113) is located between the epitaxial structure (1000) and the reflective layer (108); corresponding through holes (201) are respectively provided on the reflective layer (108) and the second insulating layer (113); the second electrode pad (110) is electrically connected to the conductive filling layer (106) through the through hole (201); and the first electrode pad (109) is electrically connected to the first electrode (104) through the through hole (201).

6. A method for preparing a light emitting diode, characterized in that: The method comprises: fabricating epitaxial structures; Performing patterning on the surface of the epitaxial structure to form a groove; Manufacturing a first electrode and a second electrode, wherein the first electrode is located on the surface of the epitaxial structure, and the second electrode is located in the groove; Making a conductive filling layer, wherein the conductive filling layer is located on the second electrode; Filling the groove with a first insulating layer, wherein the first insulating layer surrounds the side surface of the second electrode and the side surface of the conductive filling layer, and the height of the first insulating layer in the groove is the same as the depth of the groove; A reflective layer is manufactured, wherein the reflective layer covers the epitaxial structure, the first electrode, the conductive filling layer and the first insulating layer.

7. The method for preparing a light emitting diode according to claim 6, characterized in that: The conductive filling layer includes a first Ti sublayer, a first Pt sublayer, a first Ni sublayer, a second Pt sublayer, a second Ni sublayer, a third Pt sublayer and a second Ti sublayer which are stacked in sequence.

8. The method for preparing a light emitting diode according to claim 7, characterized in that: The thickness of the first Ti sublayer is 100 to 300 angstroms, the thickness of the first Pt sublayer is 2900 to 3100 angstroms, the thickness of the first Ni sublayer is 400 to 600 angstroms, the thickness of the second Pt sublayer is 3900 to 4100 angstroms, the thickness of the second Ni sublayer is 400 to 600 angstroms, the thickness of the third Pt sublayer is 2900 to 3100 angstroms, and the thickness of the second Ti sublayer is 1700 to 1900 angstroms.

9. The method for preparing a light emitting diode according to any one of claims 6 to 8, characterized in that: The sum of the thickness of the conductive filling layer and the thickness of the second electrode is not greater than the depth of the groove, and the sum of the thickness of the conductive filling layer and the thickness of the second electrode is not less than 80% of the depth of the groove.

10. The method for preparing a light emitting diode according to any one of claims 6 to 8, characterized in that: Filling the groove with a first insulating layer comprises: In an environment of 280-320° C., the first filled insulating layer is made by spin coating, and the curing time of the first filled insulating layer is 55-65 minutes.

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