Filters and their fabrication methods, electronic devices

Abstract

This disclosure provides a filter and its fabrication method, as well as an electronic device. The filter includes a first substrate (100) and a second substrate (200) disposed opposite to each other, and a connecting substrate (300) disposed between the first substrate (100) and the second substrate (200). At least one first substrate electrode is disposed on the first substrate (100), and at least one second substrate electrode is disposed on the second substrate (200). The connecting substrate (300) includes at least a connecting substrate (30) and at least one conductive post penetrating the connecting substrate (30) in the thickness direction. A first bump structure (51) is disposed at one end of the conductive post near the first substrate (100), and a second bump structure (52) is disposed at one end of the conductive post near the second substrate (200). The first bump structure (51) is connected to the first substrate electrode, and the second bump structure (52) is connected to the second substrate electrode by bonding.

Description

Technical Field

[0001] This disclosure relates to, but is not limited to, the field of semiconductor technology, and in particular to a filter and its manufacturing method, and an electronic device. Background Technology

[0002] As an important component in communication terminals, filters can solve the problem of mutual interference during signal transmission and improve spectrum utilization. With the development of mobile communication technology, mobile communication systems require filters that are small in size, high in performance, and have good consistency. Integrated passive devices (IPDs) are widely used in radio frequency (RF) front-end chips in wireless communication equipment due to their superior independent passive component characteristics. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] On one hand, this disclosure provides a filter, including a first substrate, a second substrate disposed opposite to each other, and a connecting substrate disposed between the first substrate and the second substrate. At least one first substrate electrode is disposed on the first substrate, and at least one second substrate electrode is disposed on the second substrate. The connecting substrate includes at least a connecting substrate and at least one conductive post penetrating the connecting substrate in the thickness direction. A first bump structure is disposed at one end of the conductive post near the first substrate, and a second bump structure is disposed at one end of the conductive post near the second substrate. The first bump structure is connected to the first substrate electrode, and the second bump structure is connected to the second substrate electrode by bonding.

[0005] In an exemplary embodiment, the connecting substrate includes a first side surface near the first substrate and a second side surface near the second substrate. The first bump structure is disposed on the first side surface of the connecting substrate and connected to the end of the conductive post near the first substrate. The second bump structure is disposed on the second side surface of the connecting substrate and connected to the end of the conductive post near the second substrate.

[0006] In an exemplary embodiment, the orthographic projection of the first bump structure onto the connection substrate includes the orthographic projection of the conductive post onto the connection substrate, and the orthographic projection of the second bump structure onto the connection substrate includes the orthographic projection of the conductive post onto the connection substrate.

[0007] In an exemplary embodiment, the first bump structure includes a first connection layer disposed on a first side surface of the connection substrate and a first bump layer disposed on the side of the first connection layer away from the connection substrate. The first connection layer is connected to the end of the conductive pillar near the first substrate, and the first bump layer is connected to the first substrate electrode by bonding. The second bump structure includes a second connection layer disposed on a second side surface of the connection substrate and a second bump layer disposed on the side of the second connection layer away from the connection substrate. The second connection layer is connected to the end of the conductive pillar near the second substrate, and the second bump layer is connected to the second substrate electrode by bonding.

[0008] In an exemplary embodiment, the materials of the first connecting layer and the second connecting layer include any one of the following: a composite layer of titanium and copper, a composite layer of molybdenum-titanium-nickel alloy and copper, or a composite layer of molybdenum-titanium-nickel alloy, copper-nickel alloy and copper.

[0009] In an exemplary embodiment, the materials of the first bump layer and the second bump layer include any one of the following: tin, indium tin alloy.

[0010] In an exemplary embodiment, the conductive pillar includes at least a first conductive pillar and a second conductive pillar, the first substrate electrode includes at least a first connecting electrode and a second connecting electrode, the second substrate electrode includes at least a third connecting electrode, the first connecting electrode is connected to the first conductive pillar, the second connecting electrode is connected to the second conductive pillar, and the third connecting electrode is connected to the first conductive pillar and the second conductive pillar respectively. The first conductive pillar, the second conductive pillar, the first connecting electrode, the second connecting electrode and the third connecting electrode constitute a filter inductor of a three-dimensional spiral inductor structure.

[0011] In an exemplary embodiment, the first substrate is further provided with a filter capacitor, which is connected to the filter inductor.

[0012] In an exemplary embodiment, the first substrate includes at least a first substrate, a first conductive layer disposed on the side of the first substrate near the connecting substrate, a second conductive layer disposed on the side of the first conductive layer near the connecting substrate, and a third conductive layer disposed on the side of the second conductive layer near the connecting substrate, wherein the first connecting electrode and the second connecting electrode are disposed in the third conductive layer.

[0013] In an exemplary embodiment, the filter capacitor includes a first electrode and a second electrode, wherein the orthographic projection of the first electrode on the first substrate and the orthographic projection of the second electrode on the first substrate at least partially overlap, the first electrode is disposed in the second conductive layer, and the second electrode is disposed in the third conductive layer.

[0014] In an exemplary embodiment, the first conductive layer includes at least a first pad electrode, a second pad electrode, and a fourth connection electrode. The first connection electrode is connected to the first pad electrode through a via. The second connection electrode and the first electrode plate are respectively connected to the fourth connection electrode through vias. The second electrode plate is connected to the second pad electrode through a via.

[0015] In an exemplary embodiment, the first substrate further includes a pad conductive layer and a pad protective layer. The pad protective layer is disposed on the side of the first substrate away from the connecting substrate, and the pad conductive layer is disposed on the side of the pad protective layer away from the connecting substrate. The pad conductive layer includes at least a first pad and a second pad. The first pad electrode is connected to the first pad through a via, and the second pad electrode is connected to the second pad through a via.

[0016] In an exemplary embodiment, the surface of the pad conductive layer away from the connection substrate is flush with the surface of the first substrate away from the connection substrate.

[0017] In an exemplary embodiment, the surface of the pad protection layer away from the connection substrate is flush with the surface of the first substrate away from the connection substrate.

[0018] In an exemplary embodiment, the conductive pillars include n conductive pillars, the first substrate electrode includes a first connecting electrode and n / 2 second connecting electrodes, the second substrate electrode includes n / 2 third connecting electrodes, the first connecting electrode 41 is connected to the first conductive pillar among the n conductive pillars, the (n / 2)th second connecting electrode is connected to the nth conductive pillar among the n conductive pillars, the other second connecting electrodes are respectively connected to the (i+1)th and (i+2)th conductive pillars among the n conductive pillars, and the plurality of third connecting electrodes are respectively connected to the ith conductive pillar and the (i+1)th conductive pillar among the n conductive pillars. The n conductive pillars, the first connecting electrode, the n / 2 second connecting electrodes and the n / 2 third connecting electrodes constitute the first filter inductor of the three-dimensional spiral inductor structure, where n is an even number greater than or equal to 2, and i is an odd number greater than or equal to 1 and less than or equal to n-2.

[0019] In an exemplary embodiment, the first substrate is further provided with a filter capacitor, a first pad and a second pad, the first connection electrode is connected to the first pad, the (n / 2)th second connection electrode is connected to the first plate of the filter capacitor, and the second plate of the filter capacitor is connected to the second pad.

[0020] In an exemplary embodiment, the second substrate includes at least a second substrate and a fourth conductive layer disposed on the side of the second substrate near the connecting substrate, and the third connecting electrode is disposed in the fourth conductive layer.

[0021] On the other hand, this disclosure also provides an electronic device including the aforementioned filter.

[0022] Furthermore, this disclosure also provides a method for fabricating a filter, comprising:

[0023] A first substrate, a second substrate, and a connecting substrate are fabricated separately. At least one first substrate electrode is disposed on the first substrate, and at least one second substrate electrode is disposed on the second substrate. The connecting substrate includes at least a connecting substrate and at least one conductive post penetrating the connecting substrate. A first bump structure is connected to one end of the conductive post near the first substrate, and a second bump structure is connected to one end of the conductive post near the second substrate.

[0024] The first substrate and the second substrate are arranged opposite to each other, and the connecting substrate is disposed between the first substrate and the second substrate. The first bump structure is connected to the electrode of the first substrate and the second bump structure is connected to the electrode of the second substrate by bonding.

[0025] In an exemplary embodiment, the fabrication of the interconnect substrate includes:

[0026] A connection substrate is provided, on which a plurality of through holes are formed, wherein the material of the connection substrate includes glass;

[0027] Multiple conductive pillars are formed within multiple through holes;

[0028] A plurality of first bump structures are formed on a first side surface of the connecting substrate, and a plurality of second bump structures are formed on a second side surface of the connecting substrate. The first bump structure includes a first connecting layer disposed on the first side surface of the connecting substrate and a first bump layer disposed on the side of the first connecting layer away from the connecting substrate, and the plurality of first connecting layers are correspondingly connected to the ends of the plurality of conductive pillars located on the first side surface. The second bump structure includes a second connecting layer disposed on the second side surface of the connecting substrate and a second bump layer disposed on the side of the second connecting layer away from the connecting substrate, and the plurality of second connecting layers are correspondingly connected to the ends of the plurality of conductive pillars located on the second side surface.

[0029] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description

[0030] The accompanying drawings are used to provide an understanding of the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.

[0031] Figure 1This is a schematic diagram of the structure of a filter as an exemplary embodiment of the present disclosure;

[0032] Figure 2 This is a schematic diagram of the filter after the formation of the conductive layer pattern on the pads according to an embodiment of this disclosure;

[0033] Figure 3 This is a schematic diagram showing the filter after the pad protective layer pattern has been formed according to an embodiment of this disclosure;

[0034] Figure 4 This is a schematic diagram of the filter after the first substrate pattern has been formed according to an embodiment of the present disclosure;

[0035] Figure 5 This is a schematic diagram of the filter after the first conductive layer pattern has been formed according to an embodiment of this disclosure;

[0036] Figure 6 This is a schematic diagram of the filter after the second insulating layer pattern is formed according to an embodiment of the present disclosure;

[0037] Figure 7 This is a schematic diagram of the filter after the second conductive layer pattern is formed according to an embodiment of the present disclosure;

[0038] Figure 8 This is a schematic diagram of the filter after the third insulating layer pattern is formed according to an embodiment of the present disclosure;

[0039] Figure 9 This is a schematic diagram of the filter after the third conductive layer pattern is formed according to an embodiment of the present disclosure;

[0040] Figure 10 This is a schematic diagram of the filter after the fourth insulating layer pattern is formed according to an embodiment of the present disclosure;

[0041] Figure 11 This is a schematic diagram of the filter after the second substrate pattern has been formed according to an embodiment of the present disclosure;

[0042] Figure 12 This is a schematic diagram of the filter after the fourth conductive layer pattern is formed according to an embodiment of the present disclosure;

[0043] Figure 13 This is a schematic diagram of the filter after the sixth insulating layer pattern is formed according to an embodiment of the present disclosure;

[0044] Figure 14 This is a schematic diagram showing the fabrication of a connection substrate pattern for a filter according to an embodiment of this disclosure;

[0045] Figure 15 This is a schematic diagram showing the conductive pillar pattern fabricated after processing the filter according to an embodiment of this disclosure;

[0046] Figure 16 This is a schematic diagram of the filter after the first bump structure layer pattern is formed according to an embodiment of this disclosure;

[0047] Figure 17This is a schematic diagram of the filter after the second convex structure layer pattern is formed according to an embodiment of the present disclosure;

[0048] Figure 18 and Figure 19 This is a schematic diagram of the filter bonding process according to an embodiment of the present disclosure.

[0049] Explanation of reference numerals in the attached figures:

[0050] 10—First substrate; 10A—First carrier plate; 10B—First sacrificial layer;

[0051] 11—First insulating layer; 12—Second insulating layer; 13—Third insulating layer;

[0052] 14—Fourth insulating layer; 15—Fifth insulating layer; 16—Sixth insulating layer;

[0053] 20—Second substrate; 20A—Second carrier plate; 20B—Second sacrificial layer;

[0054] 21—First pad; 22—Second pad; 30—Connecting substrate;

[0055] 31—First pad electrode; 32—Second pad electrode; 41—First connection electrode;

[0056] 42—Second connecting electrode; 43—Third connecting electrode; 44—Fourth connecting electrode;

[0057] 51—First convex structure; 52—Second convex structure; 61—First electrode plate;

[0058] 62—Second electrode plate; 71—First conductive post; 72—Second conductive post;

[0059] 80—Through hole; 90—Pad protection layer; 100—First substrate;

[0060] 200—Second substrate; 300—Connecting substrate. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this disclosure clearer, embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation methods can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be varied in various forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0062] The scale of the accompanying drawings in this disclosure can be used as a reference in actual processes, but is not limited thereto. For example, the aspect ratio of the channel, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted according to actual needs. The drawings described in this disclosure are only schematic diagrams of the structure, and one aspect of this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0063] The ordinal numbers “first,” “second,” and “third” used in this specification are used to avoid confusion among the constituent elements, not to limit their quantity.

[0064] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0065] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the specific meaning of these terms in this disclosure based on the specific circumstances.

[0066] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0067] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0068] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may sometimes be replaced with "conductive film." Similarly, "insulating film" may sometimes be replaced with "insulating layer."

[0069] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0070] In this disclosure, “about” means a value that is not strictly limited and allows for process and measurement errors.

[0071] To meet the growing demands for wide bandwidth, low cost, and high integration, through-glass via (TGV) technology is gradually becoming a viable option for passive filter (LC filter) design. Compared to silicon (Si)-based IPDs, TGV-based IPDs avoid the high microwave loss caused by the poor insulation of silicon-based devices, resulting in superior electrical performance. Compared to gallium arsenide (GaAs)-based IPDs, TGV-based IPDs offer the advantage of lower cost and are suitable for high-frequency applications.

[0072] Through-Glass Via (TGV) technology involves creating through-holes in a glass substrate and filling them with metal material. This metal material then electrically connects functional structures located on the upper and lower surfaces of the glass substrate. Research indicates that fabricating these functional structures on the upper and lower surfaces involves processes such as high-temperature annealing or high-temperature thin-film deposition. Because the coefficient of thermal expansion of the metal material in the through-hole differs from that of the glass substrate, the metal material can easily protrude from the through-hole, causing a break in the connection between the metal material and the functional structure, thus reducing product yield.

[0073] This disclosure provides a passive filter, including a first substrate, a second substrate, and a connecting substrate disposed between the first substrate and the second substrate. The first substrate has at least one first substrate electrode, and the second substrate has at least one second substrate electrode. The connecting substrate includes at least a connecting substrate and at least one conductive post penetrating the connecting substrate in the thickness direction. The conductive post has a first bump structure at one end near the first substrate and a second bump structure at one end near the second substrate. The first bump structure is connected to the first substrate electrode, and the second bump structure is connected to the second substrate electrode by bonding.

[0074] In an exemplary embodiment, the connecting substrate includes a first side surface near the first substrate and a second side surface near the second substrate. The first bump structure is disposed on the first side surface of the connecting substrate and connected to the end of the conductive post near the first substrate. The second bump structure is disposed on the second side surface of the connecting substrate and connected to the end of the conductive post near the second substrate.

[0075] In an exemplary embodiment, the first bump structure includes a first connection layer disposed on a first side surface of the connection substrate and a first bump layer disposed on the side of the first connection layer away from the connection substrate. The first connection layer is connected to the end of the conductive pillar near the first substrate, and the first bump layer is connected to the first substrate electrode by bonding. The second bump structure includes a second connection layer disposed on a second side surface of the connection substrate and a second bump layer disposed on the side of the second connection layer away from the connection substrate. The second connection layer is connected to the end of the conductive pillar near the second substrate, and the second bump layer is connected to the second substrate electrode by bonding.

[0076] In an exemplary embodiment, the conductive pillar includes at least a first conductive pillar and a second conductive pillar, the first substrate electrode includes at least a first connecting electrode and a second connecting electrode, the second substrate electrode includes at least a third connecting electrode, the first connecting electrode is connected to the first conductive pillar, the second connecting electrode is connected to the second conductive pillar, and the third connecting electrode is connected to the first conductive pillar and the second conductive pillar respectively. The first conductive pillar, the second conductive pillar, the first connecting electrode, the second connecting electrode and the third connecting electrode constitute a filter inductor of a three-dimensional spiral inductor structure.

[0077] In an exemplary embodiment, the first substrate is further provided with a filter capacitor, which is connected to the filter inductor.

[0078] Figure 1 This is a schematic diagram of the structure of a filter as an exemplary embodiment of this disclosure. Figure 1 As shown, the main structure of the filter in the exemplary embodiment of this disclosure may include a first substrate 100, a second substrate 200 disposed opposite to each other, and a connecting substrate 300 disposed between the first substrate 100 and the second substrate 200. The first substrate 100 and the connecting substrate 300 are connected by bonding, and the second substrate 200 and the connecting substrate 300 are connected by bonding, thus forming a passive filter including a filter inductor and a filter capacitor.

[0079] In an exemplary embodiment, the connecting substrate 300 may include at least a connecting substrate 30, a first conductive post 71 and a second conductive post 72 penetrating the connecting substrate 30 in the thickness direction, the first substrate 100 may include at least a first substrate 10 and a first connecting electrode 41 and a second connecting electrode 42 disposed on the side of the first substrate 10 near the second substrate 200, and the second substrate 200 may include at least a second substrate 20 and a third connecting electrode 43 disposed on the side of the second substrate 20 near the first substrate 100. First conductive post 71 and second conductive post 72 are respectively provided with first bump structure 51 at one end near the first substrate 100, and second bump structure 52 at one end near the second substrate 200. The two first bump structures 51 of the connecting substrate 300 are respectively connected to the first connecting electrode 41 and the second connecting electrode 42 of the first substrate 100 by bonding. The two first bump structures 51 of the connecting substrate 300 are respectively connected to the third connecting electrode 43 of the second substrate 200 by bonding, forming an electrical connection structure of the first substrate 100, the connecting substrate 300 and the second substrate 200.

[0080] In an exemplary embodiment, the first connecting electrode 41 and the second connecting electrode 42 can serve as the first substrate electrode of this disclosure, and the third connecting electrode 43 can serve as the second substrate electrode of this disclosure.

[0081] In an exemplary embodiment, the connecting substrate 30 may include a first side surface near the first substrate 100 and a second side surface near the second substrate 200. Two first bump structures 51 may be disposed on the first side surface of the connecting substrate 30 and connected to the ends of the first conductive post 71 and the second conductive post 72 near the first substrate 100, respectively. Two second bump structures 52 may be disposed on the second side surface of the connecting substrate 30 and connected to the ends of the first conductive post 71 and the second conductive post 72 near the second substrate 200, respectively.

[0082] In an exemplary embodiment, the orthographic projection of the first bump structure 51 onto the connecting substrate may include the orthographic projections of the first conductive post 71 and the second conductive post 72 onto the connecting substrate, and the orthographic projection of the second bump structure 52 onto the connecting substrate may include the orthographic projections of the first conductive post 71 and the second conductive post 72 onto the connecting substrate.

[0083] In an exemplary embodiment, the first bump structure 51 may include a first connection layer 51-1 and a first bump layer 51-2 stacked together. The first connection layer 51-1 may be disposed on a first side surface of the connection substrate 30 and connected to the ends of the first conductive post 71 and the second conductive post 72 near the first substrate 100, respectively. The first bump layer 51-2 may be disposed on the side of the first connection layer 51-1 away from the connection substrate 30 and connected to the first connection electrode 41 and the second connection electrode 42 by bonding, respectively.

[0084] In an exemplary embodiment, the second bump structure 52 may include a stacked second connection layer 52-1 and a second bump layer 52-2. The second connection layer 52-1 may be disposed on the second side surface of the connection substrate 30 and connected to the ends of the first conductive post 71 and the second conductive post 72 near the second substrate 200, respectively. The second bump layer 52-2 may be disposed on the side of the second connection layer 52-1 near the second substrate 200 and connected to the third connection electrode 43 by bonding.

[0085] In an exemplary embodiment, the materials of the first connecting layer 51-1 and the second connecting layer 52-1 may include any of the following: a composite layer of titanium and copper, a composite layer of molybdenum-titanium-nickel alloy and copper, or a composite layer of molybdenum-titanium-nickel alloy, copper-nickel alloy and copper.

[0086] In an exemplary embodiment, the materials of the first bump layer 51-2 and the second bump layer 52-2 include any one of the following: tin, indium tin alloy.

[0087] In an exemplary embodiment, the first substrate 100 may include a filter inductor with a three-dimensional spiral inductor structure and a filter capacitor with a parallel plate capacitor structure, wherein the filter inductor and the filter capacitor are connected.

[0088] In an exemplary embodiment, the first connecting electrode 41 is connected to the first conductive post 71 through the first bump structure 51, the second connecting electrode 42 is connected to the second conductive post 72 through the first bump structure 51, and the third connecting electrode 43 is connected to the first conductive post 71 and the second conductive post 72 through the second bump structure 52. The first connecting electrode 41, the first conductive post 71, the third connecting electrode 43, the second conductive post 72 and the second connecting electrode 42 connected in sequence constitute a filter inductor of a three-dimensional spiral inductor structure.

[0089] In an exemplary embodiment, the filter capacitor may include a first electrode 61 and a second electrode 62, wherein the orthographic projection of the first electrode 61 on the first substrate 10 and the orthographic projection of the second electrode 62 on the first substrate at least partially overlap.

[0090] In an exemplary embodiment, the first substrate 100 may include at least: a first substrate 10, a first insulating layer 11 disposed on the side of the first substrate 10 near the connecting substrate 300, a first conductive layer disposed on the side of the first insulating layer 11 near the connecting substrate 300, a second insulating layer 12 disposed on the side of the first conductive layer near the connecting substrate 300, a second conductive layer disposed on the side of the second insulating layer 12 near the connecting substrate 300, a third insulating layer 13 disposed on the side of the second conductive layer near the connecting substrate 300, a third conductive layer disposed on the side of the third insulating layer 13 near the connecting substrate 300, and a fourth insulating layer 14 disposed on the side of the third conductive layer near the connecting substrate 300.

[0091] In an exemplary embodiment, the first conductive layer may include at least a first pad electrode 31, a second pad electrode 32, and a fourth connecting electrode 44; the second conductive layer may include at least a first electrode 61; and the third conductive layer may include at least a first connecting electrode 41, a second connecting electrode 42, and a second electrode 62. The second connecting electrode 42 can be connected to the fourth connecting electrode 44 through a via, and the first electrode 61 can be connected to the fourth connecting electrode 44 through a via, thus realizing the mutual connection of the filter inductor and the filter capacitor through the fourth connecting electrode 44.

[0092] In an exemplary embodiment, at least two first bonding vias are provided on the fourth insulating layer 14, and the at least two first bonding vias expose the first connecting electrode 41 and the second connecting electrode 42 respectively. At least two first bump structures 51 extend into the corresponding first bonding vias and are bonded to the first connecting electrode 41 and the second connecting electrode 42 respectively.

[0093] In an exemplary embodiment, the second substrate 200 may include at least: a second substrate 20, a fifth insulating layer 15 disposed on the side of the second substrate 20 near the connecting substrate 300, a fourth conductive layer disposed on the side of the fifth insulating layer 15 near the connecting substrate 300, and a sixth insulating layer 16 disposed on the side of the fourth conductive layer near the connecting substrate 300.

[0094] In an exemplary embodiment, the fourth conductive layer may include at least the third connecting electrode 43. The sixth insulating layer 16 is provided with at least two second bonding vias, each exposing the third connecting electrode 43, and at least two second bump structures 52 extend into the corresponding second bonding vias and are bonded to the third connecting electrode 43 respectively.

[0095] In an exemplary embodiment, the first substrate 100 may further include a pad conductive layer and a pad protective layer 90. The pad protective layer 90 may be disposed on the side of the first substrate 10 away from the connecting substrate 300, and the pad conductive layer may be disposed on the side of the pad protective layer 90 away from the connecting substrate 300.

[0096] In an exemplary embodiment, the surface of the pad protection layer 90 away from the connection substrate 300 may be substantially flush with the surface of the first substrate 10 away from the connection substrate 300.

[0097] In an exemplary embodiment, the surface of the conductive pad layer away from the connection substrate 300 can be substantially flush with the surface of the first substrate 10 away from the connection substrate 300.

[0098] In an exemplary embodiment, the conductive pad layer may include at least one first pad 21 and at least one second pad 22. A first via and a second via are provided on the first substrate 10 and the first insulating layer 11. The first pad electrode 31 can be connected to the first pad 21 through the first via, and the second pad electrode 32 can be connected to the second pad 22 through the second via.

[0099] In an exemplary embodiment, the first connection electrode 41 can be connected to the first pad electrode 31 through a via, and the second electrode plate 62 can be connected to the second pad electrode 32 through a via, thus realizing the connection between the first pad 21 and the filter inductor, and the connection between the second pad 22 and the filter capacitor.

[0100] In an exemplary embodiment, the number of conductive pillars and connecting electrodes included in the filter inductor of the three-dimensional spiral inductor structure can be set according to parameters such as inductance (e.g., number of coil turns).

[0101] In an exemplary embodiment, the connecting substrate 300 may be provided with n through holes that penetrate the connecting substrate 30 in the thickness direction, and n conductive pillars are respectively disposed in the n through holes. The n conductive pillars may be arranged regularly along a set direction. A first connecting electrode 41 and n / 2 second connecting electrodes 42 can be disposed on the first substrate 100, and n / 2 third connecting electrodes 43 can be disposed on the second substrate 200. The first connecting electrode 41 can be connected to the first conductive post among n conductive posts, the (n / 2)th second connecting electrode 42 can be connected to the nth conductive post among n conductive posts, and the other multiple second connecting electrodes 42 can be connected to the (i+1)th and (i+2)th conductive posts among n conductive posts respectively. The multiple third connecting electrodes 43 can be connected to the ith conductive post and the (i+1)th conductive post among n conductive posts respectively. The n conductive posts, the first connecting electrode 41, the n / 2 second connecting electrodes 42 and the n / 2 third connecting electrodes 43 constitute the first filter inductor of the three-dimensional spiral inductor structure, where n is an even number greater than or equal to 2, and i is an odd number greater than or equal to 1 and less than or equal to n-2.

[0102] In an exemplary embodiment, the first connection electrode 41 can be connected to the first pad of the resonator, the (n / 2)th second connection electrode 42 can be connected to the first plate of the filter capacitor, and the second plate of the filter capacitor can be connected to the second pad of the resonator.

[0103] The following description uses the filter fabrication process as an example. The "patterning process" described in this disclosure includes, for metallic, inorganic, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping; for organic materials, it includes processes such as organic material coating, mask exposure, and development. Deposition can be performed using any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more of spraying, spin coating, and inkjet printing; etching can be performed using any one or more of dry etching and wet etching. This disclosure does not limit the methods used. A "thin film" refers to a thin film made of a material on a substrate using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the filter. In the exemplary embodiments of this disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0104] The fabrication process of the filter according to an exemplary embodiment of this disclosure may include at least four parts: fabrication of a first substrate, fabrication of a second substrate, fabrication of a connecting substrate, and bonding process. The fabrication of the connecting substrate, the first substrate, and the second substrate does not require a specific order and can be performed simultaneously, while the bonding process must be performed after the connecting substrate, the first substrate, and the second substrate are fabricated. The fabrication process of each of the four parts is described below.

[0105] Part 1: Fabrication of the First Substrate

[0106] In an exemplary embodiment, the fabrication process of the first substrate may include the following operations.

[0107] (11) Forming a pad conductive layer pattern. In an exemplary embodiment, forming a pad conductive layer pattern may include: providing a first substrate 10A, first forming a first sacrificial layer (DBL) 10B on the first substrate 10A, then depositing a pad conductive film on the first sacrificial layer 10B, patterning the pad conductive film using a patterning process, and forming a pad conductive layer pattern on the first sacrificial layer 10B, such as... Figure 2 As shown.

[0108] In an exemplary embodiment, the pad conductive layer may include at least a first pad 21 and a second pad 22, wherein the first pad 21 is configured as an input terminal of the filter and the second pad 22 is configured as an output terminal of the filter, or the first pad 21 is configured as an output terminal of the filter and the second pad 22 is configured as an input terminal of the filter.

[0109] In an exemplary embodiment, the material of the first carrier plate can be glass, and the material of the first sacrificial layer can be an organic polymer material. It can be formed by coating a viscous liquid and then curing it into a film. The first sacrificial layer is configured to separate the first substrate from the first carrier plate in a subsequent laser lift-off (LLO) process.

[0110] In an exemplary embodiment, the formation of the pad conductive layer pattern can also be achieved using a lift-off process. For example, photoresist is first coated onto a first substrate, exposed and developed to form a photoresist pattern, then a pad conductive film is deposited, and subsequently the photoresist pattern and the pad conductive film on the photoresist pattern are peeled off to form a pad conductive layer pattern including a first pad 21 and a second pad 22 on the first substrate.

[0111] (12) Forming a pad protection layer pattern. In an exemplary embodiment, forming a pad protection layer pattern may include: depositing a pad protection film on a first substrate 10A on which the aforementioned pattern is formed, and patterning the pad protection film using a patterning process to form a pad protection layer 90 pattern covering the pad conductive layer, such as... Figure 3 As shown.

[0112] In an exemplary embodiment, the pad protection layer 90 may be provided only in the area where the first pad 21 and the second pad 22 are located. The pad protection layer 90 covering the first pad 21 and the second pad 22 is provided with a first transition hole and a second transition hole. The pad protection film in the first transition hole is removed to expose the surface of the first pad 21, and the pad protection film in the second transition hole is removed to expose the surface of the second pad 22.

[0113] (13) Forming a first substrate pattern. In an exemplary embodiment, forming the first substrate pattern may include: coating a first substrate film onto a first carrier plate 10A on which the aforementioned pattern is formed, curing it into a film, depositing a first insulating film, and then patterning the first insulating film and the first substrate film using a patterning process to form a first substrate 10 covering a pad conductive layer and a pad protective layer, and a first insulating layer 11 disposed on the side of the first substrate 10 away from the first carrier plate 10A, such as... Figure 4 As shown.

[0114] In an exemplary embodiment, the first substrate 10 covers not only the pad conductive layer and the pad protection layer 90, but also the first sacrificial layer 10B outside the pad protection layer 90. In the region where the first pad 21 is located, the first substrate 10 and the first insulating layer 11 are provided with a first via K1. The orthographic projection of the first via K1 on the first substrate can be located within the range of the orthographic projection of the first pad 21 on the first substrate. The first insulating film and the first substrate film within the first via K1 are removed, exposing the surface of the first pad 21. The first via K1 is configured to allow the subsequently formed first pad electrode to be connected to the first pad 21 through the via. In the region where the second pad 22 is located, the first substrate 10 and the first insulating layer 11 are provided with a second via K2. The orthographic projection of the second via K2 on the first substrate can be located within the range of the orthographic projection of the second pad 22 on the first substrate. The first insulating film and the first substrate film in the second via K2 are removed to expose the surface of the second pad 22. The second via K2 is configured to allow the subsequently formed second pad electrode to be connected to the second pad 22 through the via.

[0115] In an exemplary embodiment, the orthographic projection of the first via K1 on the first substrate 10 may be within the range of the orthographic projection of the first transition hole on the first substrate 10, and the orthographic projection of the second via K2 on the first substrate 10 may be within the range of the orthographic projection of the second transition hole on the first substrate 10.

[0116] In an exemplary embodiment, the material of the first substrate may be polyimide (PI), polyethylene terephthalate (PET), or similar materials.

[0117] (14) Forming a first conductive layer pattern. In an exemplary embodiment, forming the first conductive layer pattern may include: forming the first conductive layer pattern on the side of the first insulating layer 11 away from the first carrier plate 10A by a seed layer deposition method and an additive method on the first carrier plate 10A where the aforementioned pattern is formed, such as... Figure 5 As shown.

[0118] In an exemplary embodiment, the first conductive layer pattern may include at least a first pad electrode 31, a second pad electrode 32, and a fourth connection electrode 44 arranged at intervals.

[0119] In an exemplary embodiment, the first pad electrode 31 can be connected to the first pad 21 through the first via K1, and the second pad electrode 32 can be connected to the second pad 22 through the second via K2. The first pad electrode 31 is configured to be connected to the subsequently formed first connection electrode, and the second pad electrode 32 is configured to be connected to the subsequently formed second electrode plate.

[0120] In an exemplary embodiment, the fourth connection electrode 44 may be disposed between the first pad electrode 31 and the second pad electrode 32. The fourth connection electrode 44 is configured to connect with the subsequently formed first connection electrode and the first electrode plate to realize the connection between the filter inductor and the filter capacitor.

[0121] In an exemplary embodiment, the seed layer deposition method can be an electrochemical deposition (ECD) method, while the addition method refers to the selective deposition of conductive thin films to form conductive patterns.

[0122] In an exemplary embodiment, the patterning of the first conductive layer can also be achieved using a patterning process or a stripping process.

[0123] (15) Forming a second insulating layer pattern. In an exemplary embodiment, forming the second insulating layer pattern may include: depositing a second insulating film on the first substrate 10A on which the aforementioned pattern is formed, and patterning the second insulating film using a patterning process to form a second insulating layer 12 pattern covering the first conductive layer pattern, such as... Figure 6 As shown.

[0124] In an exemplary embodiment, a third via K3 is formed on the second insulating layer 12. The orthographic projection of the third via K3 on the first substrate can be located within the range of the orthographic projection of the fourth connecting electrode 44 on the first substrate. The second insulating film inside the third via K3 is removed to expose the surface of the fourth connecting electrode 44. The third via K3 is configured to allow the subsequently formed first electrode plate to be connected to the fourth connecting electrode 44 through the via.

[0125] (16) Forming a second conductive layer pattern. In an exemplary embodiment, forming a second conductive layer pattern may include: depositing a second conductive film on the first substrate 10A on which the aforementioned pattern is formed, patterning the second conductive film using a patterning process, and forming a second conductive layer pattern on the second insulating layer 12, such as... Figure 7 As shown.

[0126] In an exemplary embodiment, the second conductive layer pattern may include at least a first electrode plate 61, which is connected to a fourth connecting electrode 44 through a third via K3. The first electrode plate 61 may serve as one electrode plate (lower electrode plate) of a filter capacitor.

[0127] In an exemplary embodiment, the second conductive layer pattern can also be formed using a stripping process.

[0128] (17) Forming a third insulating layer pattern. In an exemplary embodiment, forming the third insulating layer pattern may include: depositing a third insulating film on the first substrate 10A on which the aforementioned pattern is formed, and patterning the third insulating film using a patterning process to form a third insulating layer 13 pattern covering the second conductive layer pattern, such as... Figure 8 As shown.

[0129] In an exemplary embodiment, a fourth via K4, a fifth via K5, and a sixth via K6 are formed on the third insulating layer 13.

[0130] In an exemplary embodiment, the orthogonal projection of the fourth via K4 on the first substrate may be located within the range of the orthogonal projection of the fourth connection electrode 44 on the first substrate. The third insulating film and the second insulating film within the fourth via K4 are removed, exposing the surface of the fourth connection electrode 44. The fourth via K4 is configured to allow the subsequently formed second connection electrode to be connected to the fourth connection electrode 44 through the via.

[0131] In an exemplary embodiment, the orthogonal projection of the fifth via K5 on the first substrate may be located within the range of the orthogonal projection of the first pad electrode 3 on the first substrate. The third insulating film and the second insulating film in the fifth via K5 are removed to expose the surface of the first pad electrode 31. The fifth via K5 is configured to allow the subsequently formed first connection electrode to be connected to the first pad electrode 31 through the via.

[0132] In an exemplary embodiment, the orthogonal projection of the sixth via K6 on the first substrate may be located within the range of the orthogonal projection of the second pad electrode 32 on the first substrate. The third insulating film and the second insulating film within the sixth via K6 are removed, exposing the surface of the second pad electrode 32. The sixth via K6 is configured to allow the subsequently formed second electrode plate to be connected to the second pad electrode 32 through the via.

[0133] (18) Forming a third conductive layer pattern. In an exemplary embodiment, forming a third conductive layer pattern may include: depositing a third conductive film on the first substrate 10A on which the aforementioned pattern is formed, patterning the third conductive film using a patterning process, and forming the third conductive layer pattern on the third insulating layer 13, such as... Figure 9 As shown.

[0134] In an exemplary embodiment, the third conductive layer pattern may include at least a first connecting electrode 41, a second connecting electrode 42, and a second electrode plate 62.

[0135] In an exemplary embodiment, the orthographic projection of the first connection electrode 41 on the first substrate 10 at least partially overlaps with the orthographic projection of the first pad electrode 31 on the first substrate 10. The first connection electrode 41 is connected to the first pad electrode 31 through a fifth via K5. The first connection electrode 41 is configured to be bonded to a first bump structure in the connection substrate.

[0136] In an exemplary embodiment, the orthographic projection of the second connection electrode 42 on the first substrate 10 at least partially overlaps with the orthographic projection of the fourth connection electrode 44 on the first substrate 10. The second connection electrode 42 is connected to the fourth connection electrode 44 through the fourth via K4. The second connection electrode 42 is configured to be bonded to the first bump structure in the connection substrate.

[0137] In an exemplary embodiment, the orthographic projection of the second electrode plate 62 on the first substrate 10 at least partially overlaps with the orthographic projection of the first electrode plate 61 and the second pad electrode 32 on the first substrate 10. The second electrode plate 62 is connected to the second pad electrode 32 through the sixth via K6. The second electrode plate 62 can serve as the other electrode plate (upper electrode plate) of the filter capacitor. The first electrode plate 61 and the second electrode plate 62 constitute a filter capacitor with a planar thin film capacitor structure.

[0138] In an exemplary embodiment, the formation of the third conductive layer pattern can also be achieved using a stripping process.

[0139] In an exemplary embodiment, after the third conductive layer pattern is formed, the surfaces of the first connecting electrode 41 and the second connecting electrode 42 on the side away from the first substrate can be polished by chemical mechanical polishing, so that the surfaces of the first connecting electrode 41 and the second connecting electrode 42 are flush, and the surface roughness of the surfaces of the first connecting electrode 41 and the second connecting electrode 42 on the side away from the first substrate can be less than or equal to 1 nm.

[0140] (19) Forming a fourth insulating layer pattern. In an exemplary embodiment, forming the fourth insulating layer pattern may include: depositing a fourth insulating film on the first substrate 10A on which the aforementioned pattern is formed, and patterning the fourth insulating film using a patterning process to form a fourth insulating layer 14 pattern covering the third conductive layer pattern, such as... Figure 10 As shown.

[0141] In an exemplary embodiment, two first bonding vias V1 are formed on the fourth insulating layer 14.

[0142] In an exemplary embodiment, the orthographic projection of a first bonding via V1 on the first substrate 10 may be located within the range of the orthographic projection of the first connecting electrode 41 on the first substrate 10. The fourth insulating film within the first bonding via V1 is removed, exposing the surface of the first connecting electrode 41. The first bonding via V1 is configured to allow a first bump structure in the connecting substrate to be connected to the first connecting electrode 41 through the bonding via.

[0143] In an exemplary embodiment, the orthographic projection of another first bonding via V1 on the first substrate 10 may be located within the range of the orthographic projection of the second connection electrode 42 on the first substrate 10. The fourth insulating film in the first bonding via V1 is removed to expose the surface of the second connection electrode 42. The first bonding via V1 is configured to allow another first bump structure in the connection substrate to be connected to the second connection electrode 42 through the via.

[0144] Thus, the fabrication of the first substrate disposed on the first carrier is completed. In an exemplary embodiment, the first substrate may include a first substrate 10 disposed on the first sacrificial layer 10B, a first insulating layer 11 disposed on the first substrate 10, a first conductive layer disposed on the first insulating layer 11, a second insulating layer 12 disposed on the first conductive layer, a second conductive layer disposed on the second insulating layer 12, a third insulating layer 13 disposed on the second conductive layer, a third conductive layer disposed on the third insulating layer 13, and a fourth insulating layer disposed on the third conductive layer. The first conductive layer may include at least a first pad electrode 31, a second pad electrode 32, and a fourth connecting electrode 44; the second conductive layer may include at least a first electrode plate 61; and the third conductive layer may include at least a first connecting electrode 41, a second connecting electrode 42, and a second electrode plate 62.

[0145] In an exemplary embodiment, the first substrate may further include a pad protection layer 90 disposed on the side of the first substrate 10 away from the first insulating layer 11 and a pad conductive layer disposed on the side of the pad protection layer 90 away from the first substrate 10. The pad conductive layer may include at least a first pad 21 and a second pad 22.

[0146] In an exemplary embodiment, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, multiple layers, or composite layers. The first insulating layer may be referred to as the first barrier layer, the second insulating layer may be referred to as the second (PVX) passivation layer, the third insulating layer may be referred to as the third passivation layer, and the fourth insulating layer may be referred to as the fourth passivation layer.

[0147] Part Two: Fabrication of the Second Substrate

[0148] In an exemplary embodiment, the fabrication process of the second substrate may include the following operations.

[0149] (21) Preparing a second substrate pattern. In an exemplary embodiment, preparing a second substrate pattern may include: providing a second carrier plate 20A, first forming a second sacrificial layer 20B on the second carrier plate 20A, then coating a second substrate film on the second sacrificial layer 20B, curing the film, depositing a fifth insulating film to form a second substrate 20, and a fifth insulating layer 15 disposed on the side of the second substrate 20 away from the second carrier plate 20A, such as... Figure 11 As shown.

[0150] In an exemplary embodiment, the material of the second substrate may be polyimide (PI), polyethylene terephthalate (PET), or similar materials.

[0151] In an exemplary embodiment, the material of the second carrier plate can be glass, and the material of the second sacrificial layer can be an organic polymer material. It can be formed by coating with a viscous liquid and then curing it into a film. The second sacrificial layer is configured to separate the second substrate from the second carrier plate in a subsequent laser lift-off process.

[0152] (22) Forming a fourth conductive layer pattern. In an exemplary embodiment, forming a fourth conductive layer pattern may include: depositing a fourth conductive film on the second substrate 20A on which the aforementioned pattern is formed, patterning the fourth conductive film using a patterning process, and forming the fourth conductive layer pattern on the fifth insulating layer 15, such as... Figure 12 As shown.

[0153] In an exemplary embodiment, the fourth conductive layer pattern may include at least a third connection electrode 43, which is configured to connect to a second bump structure in the connection substrate.

[0154] In an exemplary embodiment, the fourth conductive layer pattern can also be formed using a stripping process.

[0155] In an exemplary embodiment, after the fourth conductive layer pattern is formed, the surface of the third connecting electrode 43 away from the second substrate can be polished by chemical mechanical polishing, so that the surface roughness of the surface of the third connecting electrode 43 away from the second substrate can be less than or equal to 1 nm.

[0156] (23) Forming a sixth insulating layer pattern. In an exemplary embodiment, forming a sixth insulating layer pattern may include: depositing a sixth insulating film on the second substrate 20A on which the aforementioned pattern is formed, and patterning the sixth insulating film using a patterning process to form a sixth insulating layer 16 pattern covering the fourth conductive layer pattern, such as... Figure 13 As shown.

[0157] In an exemplary embodiment, two second bonding vias V2 are formed on the sixth insulating layer 16.

[0158] In an exemplary embodiment, the orthographic projections of the two second bonding vias V2 on the second substrate 20 can be located within the range of the orthographic projection of the third connecting electrode 43 on the second substrate 20. The sixth insulating film inside the two second bonding vias V2 is removed, exposing the surface of the third connecting electrode 43 respectively. The two second bonding vias V2 are configured to allow the two second bump structures in the connecting substrate to be connected to the third connecting electrode 43 through the bonding vias.

[0159] At this point, the fabrication of the second substrate disposed on the second carrier is complete. In an exemplary embodiment, the second substrate may include a second substrate 20 disposed on the second sacrificial layer 20B, a fifth insulating layer 15 disposed on the second substrate 20, a fourth conductive layer disposed on the fifth insulating layer 15, and a sixth insulating layer 16 disposed on the fourth conductive layer. The fourth conductive layer may include at least a third connecting electrode 43.

[0160] Part 3: Fabrication of the Connecting Substrate

[0161] In an exemplary embodiment, the fabrication process of the interconnect substrate may include the following operations.

[0162] (31) Fabricating a connection substrate. In an exemplary embodiment, fabricating a connection substrate may include: providing a connection substrate 30, forming at least two through-holes 80 on the connection substrate 30, and forming a connection substrate 30 with a TGV structure, such as... Figure 14 As shown.

[0163] In an exemplary embodiment, at least two vias 80 may have substantially the same structure, both being vias that penetrate the connecting substrate 30. On a plane parallel to the connecting substrate, the via 80 may be circular or elliptical in shape. On a plane perpendicular to the connecting substrate, the cross-sectional shape of the via 80 may be columnar, funnel-shaped, or hourglass-shaped, etc. The via 80 is configured to accommodate subsequently formed conductive pillars.

[0164] In an exemplary embodiment, the connecting substrate 30 may include a first side surface 30A and a second side surface 30B that are opposite to each other. In an exemplary embodiment, at least one through-hole may be formed using a patterning process or a laser drilling process.

[0165] In an exemplary embodiment, taking an hourglass-shaped via as an example, forming at least one via on a connecting substrate using a patterning process may include: firstly, coating a layer of photoresist on a first side surface 30A of the connecting substrate; then exposing and developing the photoresist to form exposed and unexposed areas; removing the photoresist from the exposed areas to expose the first side surface 30A of the connecting substrate, while the unexposed areas remain covered with photoresist. Next, etching the connecting substrate in the exposed areas using a dry etching or wet etching process to form a plurality of first blind holes on that side surface of the connecting substrate. The cross-sectional shape of the first blind holes may be trapezoidal. Then, coating a layer of photoresist on a second side surface 30B of the connecting substrate; then exposing and developing the photoresist to form exposed and unexposed areas; removing the photoresist from the exposed areas to expose the second side surface 30B of the connecting substrate, while the unexposed areas remain covered with photoresist. The bonding substrate of the exposure area is etched using a dry etching process or a wet etching process. Multiple second blind holes are formed on the surface of the bonding substrate. The cross-sectional shape of the second blind holes can be trapezoidal. The second blind holes are connected to the first blind holes to form an hourglass-shaped through hole.

[0166] In an exemplary embodiment, taking an hourglass-shaped through-hole as an example, forming at least one through-hole on a connecting substrate using laser drilling technology may include: firstly, using a laser to irradiate a first side surface 30A of the connecting substrate with a laser beam incident perpendicularly, forming a first frustum-shaped blind hole on that side surface of the connecting substrate; then, using a laser to irradiate a second side surface 30B of the connecting substrate with a laser beam incident perpendicularly, forming a second frustum-shaped blind hole on that side surface of the connecting substrate. The second blind hole and the first blind hole are connected to form an hourglass-shaped through-hole. When the laser beam interacts with the connecting substrate, high-energy laser photons ionize the atoms in the connecting substrate and eject them from the connecting substrate. As time increases, the hole gradually deepens until the first blind hole and the second blind hole are formed.

[0167] In an exemplary embodiment, the laser type can be a continuous laser, a pulsed laser, etc., the laser wavelength can be approximately 532nm, 355nm, 266nm, 248nm, 197nm, etc., and the laser pulse width can be 1fs to 100fs, 1ps to 100ps, 1ns to 100ns, etc.

[0168] In exemplary embodiments, laser drilling can be performed in two ways, including but not limited to the following. In the first method, when the laser spot diameter is large, the relative position of the laser beam and the connecting substrate is fixed, and the connecting substrate is directly drilled to a preset depth using high energy. In the second method, when the laser spot diameter is small, the laser beam scans in a circle on the connecting substrate, the radius of the circle gradually decreases, the focal point of the spot continuously changes, and the depth of the focal point also continuously changes, drilling the connecting substrate to a preset depth.

[0169] In an exemplary embodiment, the material of the bonding substrate can be glass, such as silicon oxide, silicon dioxide, or photosensitive glass.

[0170] (32) Fabricating a conductive pillar pattern. In an exemplary embodiment, fabricating the conductive pillar pattern may include: forming a plurality of conductive pillar patterns within a plurality of vias 80 on a connection substrate on which the aforementioned pattern is formed by a filling process, such as... Figure 15 As shown.

[0171] In an exemplary embodiment, the conductive pillar pattern may include at least a first conductive pillar 71 and a second conductive pillar 72. The first conductive pillar 71 and the second conductive pillar 72 may be respectively disposed within two through holes 80.

[0172] In an exemplary embodiment, both the first conductive post 71 and the second conductive post 72 may include a conductive layer and a seed layer located outside the conductive layer, with the seed layer connected to the inner wall of the through hole 80.

[0173] In an exemplary embodiment, forming a plurality of conductive pillar patterns within a plurality of through-holes 80 by a filling process may include:

[0174] First, a seed layer is formed on the inner wall of the through hole using physical vapor deposition or chemical vapor deposition, and then a conductive layer is formed inside the seed layer using an electroplating process.

[0175] In an exemplary embodiment, the seed layer can be made of at least one of copper (Cu), aluminum (Al), molybdenum (Mo), and silver (Ag), and the thickness of the seed layer can be approximately 0.01 μm to 0.05 μm. For example, the thickness of the seed layer can be approximately 0.03 μm.

[0176] In an exemplary embodiment, in order to increase the adhesion between the seed layer and the inner wall of the through hole, an auxiliary metal layer may be formed inside the through hole before the seed layer is formed. The material of the auxiliary metal layer includes, but is not limited to, at least one of nickel (Ni), molybdenum (Mo) alloy, and titanium (Ti) alloy.

[0177] In an exemplary embodiment, the conductive layer can be made of copper (Cu), and its thickness can be approximately 0.2 μm to 0.5 μm. The conductive layer can be filled with copper in the vias using methods such as Cu electroplating or Cu-core solder ball filling. For example, a bonding substrate is placed on an electroplating machine, an electroplating pad is pressed on, and the substrate is placed in an electroplating tank containing an electrolyte. Electricity is applied, causing the electroplating solution to flow continuously and rapidly over the substrate surface. Cations in the electroplating solution gain electrons on the inner walls of the vias, becoming atoms and depositing on the inner walls. Over time, the thickness of the copper on the inner walls of the vias gradually increases, eventually completely filling the vias.

[0178] (33) Forming a first bump structure layer pattern. In an exemplary embodiment, forming the first bump structure layer pattern may include: forming the first bump structure layer pattern on a first side surface of the connecting substrate on which the aforementioned pattern is formed, using a patterning process, such as... Figure 16 As shown.

[0179] In an exemplary embodiment, the first bump structure layer may include at least two first bump structures 51, one of which is connected to the end of the first conductive post 71 located on the first side surface, and the other of which is connected to the end of the second conductive post 72 located on the first side surface.

[0180] In an exemplary embodiment, the orthographic projection of the first bump structure 51 on the connecting substrate includes the orthographic projections of the first conductive post 71 and the second conductive post 72 on the connecting substrate, that is, the first bump structure 51 completely covers the end of the first conductive post 71 located on the first side surface and completely covers the end of the second conductive post 72 located on the first side surface.

[0181] In an exemplary embodiment, the first bump structure 51 may include a stacked first connection layer 51-1 and a first bump layer 51-2. The first connection layer 51-1 may be disposed on the connection substrate 30 and connected to the ends of the first conductive post 71 and the second conductive post 72 in the via, respectively. The first bump layer 51-2 may be disposed on the side of the first connection layer 51-1 away from the connection substrate 30. The first connection layer 51-1 may serve as a bonding layer for interconnection, bonding the first bump layer 51-2 and the first conductive post 71 and the second conductive post 72 together and preventing atoms in the first bump layer from diffusing to the conductive posts. The first bump layer 51-2 is configured to be bonded to the first connection electrode and the second connection electrode in the first substrate. In an exemplary embodiment, the first connection layer may be referred to as an under-bump metal (UBM) layer.

[0182] In an exemplary embodiment, the material of the first connecting layer can be a multilayer composite structure, such as a Ti / Cu composite layer of titanium (Ti) and copper (Cu), a MTD / Cu composite layer of molybdenum titanium nickel alloy (MTD) and copper (Cu), a MTD / CuNi / Cu composite layer of molybdenum titanium nickel alloy (MTD), a MTD / CuNi / Cu composite layer of copper nickel alloy (CuNi) and copper (Cu), etc.

[0183] In an exemplary embodiment, the material of the first bump layer can be tin (Sn) or indium-tin alloy (Sn-In), which not only has good ductility but also corrosion resistance.

[0184] In an exemplary embodiment, forming a first bump structure layer pattern on the first side surface of the connection substrate 30 by a patterning process may include: firstly depositing a first connection film on the first side surface of the connection substrate 30, then coating a layer of photoresist on the first connection film, forming a photoresist pattern by exposure and development, the photoresist pattern including exposed areas and unexposed areas, removing the photoresist in the exposed areas to expose the first connection film, and covering the first connection film with photoresist in the unexposed areas. After forming the first bump film in the exposed areas by electroplating, peeling off the photoresist pattern and the first bump film on the photoresist, and using the unpeeled first bump film as a mask to etch the first connection film, forming two first bump structures 51 on the first side surface of the connection substrate 30, the first bump structure 51 including a stacked first connection layer 51-1 and a first bump layer 51-2.

[0185] (34) Forming a second bump structure layer pattern. In an exemplary embodiment, forming the second bump structure layer pattern may include: forming the second bump structure layer pattern on a second side surface of the connecting substrate on which the aforementioned pattern is formed, using a patterning process, such as... Figure 17 As shown.

[0186] In an exemplary embodiment, the second bump structure layer may include at least two second bump structures 52, one second bump structure 52 being connected to the end of the first conductive post 71 located on the second side surface, and the other second bump structure 52 being connected to the end of the second conductive post 72 located on the second side surface.

[0187] In an exemplary embodiment, the orthographic projection of the second bump structure 52 on the connecting substrate includes the orthographic projections of the first conductive post 71 and the second conductive post 72 on the connecting substrate, that is, the second bump structure 52 completely covers the end of the first conductive post 71 located on the second side surface and completely covers the end of the second conductive post 72 located on the second side surface.

[0188] In an exemplary embodiment, the second bump structure 52 may include a stacked second connection layer 52-1 and a second bump layer 52-2. The second connection layer 52-1 may be disposed on the connection substrate 30 and connected to the ends of the first conductive post 71 and the second conductive post 72 in the through hole, respectively. The second bump layer 52-2 may be disposed on the side of the second connection layer 52-1 away from the connection substrate 30. The second connection layer 52-1 may serve as an interconnect bonding layer and may be referred to as a UBM layer.

[0189] The material of the second connecting layer can be substantially the same as that of the first connecting layer, the material of the second bump layer can be substantially the same as that of the first bump layer, and the preparation method of forming the second bump structure layer can be substantially the same as that of forming the first bump structure layer.

[0190] The connection substrate is now complete. The connection substrate may include a connection substrate 30, a first conductive post 71 and a second conductive post 72 extending through the connection substrate 30 in the thickness direction, at least two first bump structures 51 disposed on a first side surface of the connection substrate 30, and at least two second bump structures 52 disposed on a second side surface of the connection substrate 30.

[0191] Part Four: Bonding Process

[0192] In an exemplary embodiment, the bonding process may include the following operations: placing the prepared first substrate 100 on one side of the first side surface of the connecting substrate 300, and flipping the prepared second substrate 200 and placing it on one side of the second side surface of the connecting substrate 300, such as... Figure 18 As shown.

[0193] Subsequently, after the first substrate 100, the second substrate 200, and the connecting substrate 300 are aligned and bonded together, the first substrate 100, the connecting substrate 300, and the second substrate 200 are pressed together using a metal-to-metal diffusion bonding method. One first bump structure 51 in the connecting substrate 300 is bonded to the first connecting electrode 41 in the first substrate 100; another first bump structure 51 in the connecting substrate 300 is bonded to the second connecting electrode 42 in the first substrate 100; and both second bump structures 52 in the connecting substrate 300 are bonded to the third connecting electrode 43 in the second substrate 200, forming an electrical connection structure between the first substrate 100, the connecting substrate 300, and the second substrate 200. Figure 19 As shown.

[0194] In an exemplary embodiment, during the bonding process, the bonding pressure can be approximately 40 kN to 100 kN, and the bonding temperature can be approximately 350°C to 450°C.

[0195] In an exemplary embodiment, through bonding processing, the first connecting electrode 41 in the first substrate 100 and the third connecting electrode 43 in the second substrate 200 are interconnected through the first bump structure 51, the first conductive post 71 and the second bump structure 52 in the connecting substrate 300. The second connecting electrode 42 in the first substrate 100 and the third connecting electrode 43 in the second substrate 200 are interconnected through the first bump structure 51, the second conductive post 72 and the second bump structure 52 in the connecting substrate 300. The first connecting electrode 41, the first conductive post 71, the third connecting electrode 43, the second conductive post 72 and the second connecting electrode 42 connected in sequence constitute a filter inductor with a three-dimensional spiral inductor structure.

[0196] In an exemplary embodiment, since the second connecting electrode 42 is connected to the fourth connecting electrode 44 through a via, and the first electrode plate 61 is also connected to the fourth connecting electrode 44 through a via, the filter inductor and the filter capacitor are interconnected through the fourth connecting electrode 44.

[0197] Finally, the first carrier plate 10A and the first sacrificial layer 10B on the side of the first substrate 100 away from the connecting substrate 300 are removed by laser lift-off process, and the second carrier plate 20A and the second sacrificial layer 20B on the side of the second substrate 200 away from the connecting substrate 300 are removed to form the filter of the exemplary embodiment of this disclosure, such as... Figure 1 As shown.

[0198] In an exemplary embodiment, the first sacrificial layer and the second sacrificial layer decompose more thoroughly when exposed to light, thus facilitating the separation of the first substrate from the first carrier plate and the second substrate from the second carrier plate.

[0199] This completes the fabrication of the filter according to the exemplary embodiments of this disclosure.

[0200] As can be seen from the structure and fabrication process of the filter in the exemplary embodiments of this disclosure, by separately fabricating a first substrate, a second substrate, and a connecting substrate, and then bonding the first substrate and the second substrate together on both sides of the connecting substrate, this not only achieves the integration of a three-dimensional spiral inductor structure filter inductor and a parallel plate capacitor structure filter capacitor onto a single chip, resulting in a high integration density and reduced filter size, but also avoids the problem of conductive pillar protrusion caused by high-temperature annealing or high-temperature thin film deposition processes on the connecting substrate, thus eliminating the problem of disconnection between the conductive pillars in the connecting substrate and the connecting electrodes in the first and second substrates. This disclosure further improves the connection reliability between the conductive pillars in the connecting substrate and the connecting electrodes in the first and second substrates by setting a bump structure on the connecting substrate, through which the conductive pillars connect to the connecting electrodes, thereby maximizing product yield. The connecting substrate of this disclosure uses a glass substrate, which not only reduces filter loss but also lowers production costs. The fabrication process of this disclosure can be achieved using existing mature fabrication equipment, requires minimal modification to existing processes, is highly compatible with existing fabrication processes, is simple to implement, has high production efficiency, low production cost, and high yield.

[0201] The structure and fabrication process of the filter in the exemplary embodiments disclosed herein are merely illustrative. In the exemplary embodiments, the corresponding structure and the patterning process may be modified or reduced as needed, and this disclosure does not limit the scope of the invention. For example, in an exemplary embodiment, n through holes penetrating the connecting substrate 300 in the thickness direction may be provided on the connecting substrate 300, and n conductive pillars may be disposed in the n through holes, and the n conductive pillars may be arranged regularly along a predetermined direction. A first connecting electrode 41 and n / 2 second connecting electrodes 42 can be disposed on the first substrate 100, and n / 2 third connecting electrodes 43 can be disposed on the second substrate 200. The first connecting electrode 41 can be connected to the first conductive post among n conductive posts, the (n / 2)th second connecting electrode 42 can be connected to the nth conductive post among n conductive posts, and the other multiple second connecting electrodes 42 can be connected to the (i+1)th and (i+2)th conductive posts among n conductive posts respectively. The multiple third connecting electrodes 43 can be connected to the ith conductive post and the (i+1)th conductive post among n conductive posts respectively. The n conductive posts, the first connecting electrode 41, the n / 2 second connecting electrodes 42 and the n / 2 third connecting electrodes 43 constitute the first filter inductor of the three-dimensional spiral inductor structure, where n is an even number greater than or equal to 2, and i is an odd number greater than or equal to 1 and less than or equal to n-2. The first connecting electrode 41 can be connected to the first pad of the resonator, the (n / 2)th second connecting electrode 42 can be connected to the first plate of the filter capacitor, and the second plate of the filter capacitor can be connected to the second pad of the resonator.

[0202] This exemplary embodiment also provides a method for fabricating a filter to fabricate the filter of the foregoing embodiments. In an exemplary embodiment, the method for fabricating the filter may include:

[0203] A first substrate, a second substrate, and a connecting substrate are fabricated separately. At least one first substrate electrode is disposed on the first substrate, and at least one second substrate electrode is disposed on the second substrate. The connecting substrate includes at least a connecting substrate and at least one conductive post penetrating the connecting substrate. A first bump structure is connected to one end of the conductive post near the first substrate, and a second bump structure is connected to one end of the conductive post near the second substrate.

[0204] The first substrate and the second substrate are arranged opposite to each other, and the connecting substrate is disposed between the first substrate and the second substrate. The first bump structure is connected to the electrode of the first substrate and the second bump structure is connected to the electrode of the second substrate by bonding.

[0205] In an exemplary embodiment, fabricating the interconnect substrate may include:

[0206] A connection substrate is provided, on which a plurality of through holes are formed, wherein the material of the connection substrate includes glass;

[0207] Multiple conductive pillars are formed within multiple through holes;

[0208] A plurality of first bump structures are formed on a first side surface of the connecting substrate, and a plurality of second bump structures are formed on a second side surface of the connecting substrate. The first bump structure includes a first connecting layer disposed on the first side surface of the connecting substrate and a first bump layer disposed on the side of the first connecting layer away from the connecting substrate, and the plurality of first connecting layers are correspondingly connected to the ends of the plurality of conductive pillars located on the first side surface. The second bump structure includes a second connecting layer disposed on the second side surface of the connecting substrate and a second bump layer disposed on the side of the second connecting layer away from the connecting substrate, and the plurality of second connecting layers are correspondingly connected to the ends of the plurality of conductive pillars located on the second side surface.

[0209] In an exemplary embodiment, forming a plurality of first bump structures on a first side surface of the connecting substrate and forming a plurality of second bump structures on a second side surface of the connecting substrate may include:

[0210] A first connection film is deposited on the first side surface of the connection substrate, and a photoresist layer is coated on the first connection film. A photoresist pattern is formed by exposure and development. The photoresist pattern includes exposed areas and unexposed areas. The photoresist in the exposed areas is removed to expose the first connection film, and the photoresist in the unexposed areas covers the first connection film. After a first bump film is formed in the exposed areas, the photoresist pattern and the first bump film on the photoresist are stripped off. The unstripped first bump film is used as a mask to etch the first connection film, forming a plurality of first bump structures on the first side surface of the connection substrate. The first bump structure includes a stacked first connection layer and a first bump layer.

[0211] A second connection film is deposited on the second side surface of the connection substrate. A layer of photoresist is coated on the second connection film. A photoresist pattern is formed by exposure and development. The photoresist pattern includes exposed areas and unexposed areas. The photoresist in the exposed areas is removed to expose the second connection film. The photoresist in the unexposed areas covers the second connection film. After forming a second bump film in the exposed areas, the photoresist pattern and the second bump film on the photoresist are stripped off. The unstripped second bump film is used as a mask to etch the second connection film, forming a plurality of second bump structures on the second side surface of the connection substrate. The second bump structure includes a stacked second connection layer and a second bump layer.

[0212] This disclosure also provides an electronic device including the filter of the foregoing embodiments. The electronic device can be used as a radio frequency front-end device in a wireless communication device, such as a radio frequency filter.

[0213] While the embodiments disclosed herein are as described above, the content is merely for the purpose of facilitating understanding of this disclosure and is not intended to limit this disclosure. Any person skilled in the art may make any modifications and changes to the form and details of the implementation without departing from the spirit and scope of this disclosure; however, the scope of patent protection of this disclosure shall still be determined by the scope defined in the appended claims.

Claims

1. A filter, comprising oppositely arranged first and second substrates and a connecting substrate arranged between the first and second substrates, the first substrate being provided with at least one first substrate electrode, the second substrate being provided with at least one second substrate electrode, the connecting substrate comprising at least a connecting base and at least one conductive column penetrating through the connecting base in a thickness direction, the conductive column being provided with a first bump structure at one end close to the first substrate and a second bump structure at one end close to the second substrate, the first bump structure being connected to the first substrate electrode and the second bump structure being connected to the second substrate electrode by bonding; the connecting base comprising a first side surface close to the first substrate and a second side surface close to the second substrate, the first bump structure being arranged on the first side surface of the connecting base and connected to the one end of the conductive column close to the first substrate, the second bump structure being arranged on the second side surface of the connecting base and connected to the one end of the conductive column close to the second substrate; the first bump structure comprising a first connecting layer arranged on the first side surface of the connecting base and a first bump layer arranged on a side of the first connecting layer away from the connecting base, the first connecting layer being connected to the one end of the conductive column close to the first substrate, the first bump layer being connected to the first substrate electrode by bonding; the second bump structure comprising a second connecting layer arranged on the second side surface of the connecting base and a second bump layer arranged on a side of the second connecting layer away from the connecting base, the second connecting layer being connected to the one end of the conductive column close to the second substrate; a projection of the first bump structure on the connecting base containing a projection of the conductive column on the connecting base, a projection of the second bump structure on the connecting base containing a projection of the conductive column on the connecting base; the material of the first and second connecting layers comprising any one of the following: a composite layer of titanium and copper, a composite layer of molybdenum-titanium-nickel alloy and copper, a composite layer of molybdenum-titanium-nickel alloy, copper-nickel alloy and copper; the material of the first and second bump layers comprising any one of the following: tin, indium-tin alloy; the conductive column comprising at least a first conductive column and a second conductive column, the first substrate electrode comprising at least a first connecting electrode and a second connecting electrode, the second substrate electrode comprising at least a third connecting electrode, the first connecting electrode being connected to the first conductive column, the second connecting electrode being connected to the second conductive column, the third connecting electrode being connected to the first and second conductive columns respectively, the first and second conductive columns, the first and second connecting electrodes and the third connecting electrode constituting a filter inductor of a three-dimensional spiral inductor structure; the first substrate being further provided with a filter capacitor, the filter capacitor being connected to the filter inductor. ​ ​ 2. The filter of claim 1, wherein, ​ 3. The filter of claim 1, wherein, ​ 4. The filter of claim 1, wherein, ​ 5. The filter of any one of claims 1 to 4, wherein, ​ 6. The filter of claim 5, wherein, ​ 7. The filter of claim 6, wherein, The first substrate at least includes a first substrate, a first conductive layer arranged on a side of the first substrate close to the connection substrate, a second conductive layer arranged on a side of the first conductive layer close to the connection substrate, and a third conductive layer arranged on a side of the second conductive layer close to the connection substrate, and the first and second connection electrodes are arranged in the third conductive layer.

8. The filter of claim 7, wherein, The filter capacitor includes a first plate and a second plate, a projection of the first plate on the first substrate at least partially overlaps a projection of the second plate on the first substrate, the first plate is arranged in the second conductive layer, and the second plate is arranged in the third conductive layer.

9. The filter of claim 8, wherein, The first conductive layer at least includes a first pad electrode, a second pad electrode, and a fourth connection electrode, the first connection electrode is connected to the first pad electrode through a via, the second connection electrode and the first plate are respectively connected to the fourth connection electrode through vias, and the second plate is connected to the second pad electrode through a via.

10. The filter of claim 9, wherein, The first substrate further includes a pad conductive layer and a pad protection layer, the pad protection layer is arranged on a side of the first substrate away from the connection substrate, the pad conductive layer is arranged on a side of the pad protection layer away from the connection substrate, the pad conductive layer at least includes a first pad and a second pad, the first pad electrode is connected to the first pad through a via, and the second pad electrode is connected to the second pad through a via.

11. The filter of claim 10, wherein, A surface of the pad conductive layer away from the connection substrate is flush with a surface of the first substrate away from the connection substrate.

12. The filter of claim 10, wherein, A surface of the pad protection layer away from the connection substrate is flush with a surface of the first substrate away from the connection substrate.

13. The filter of claim 5, wherein, The conductive column includes n conductive columns, the first substrate electrode includes one first connection electrode and n / 2 second connection electrodes, the second substrate electrode includes n / 2 third connection electrodes, the first connection electrode 41 is connected to the first conductive column of the n conductive columns, the n / 2 second connection electrode is connected to the n conductive column of the n conductive columns, the other second connection electrodes are respectively connected to the i+1 conductive column and the i+2 conductive column of the n conductive columns, the plurality of third connection electrodes are respectively connected to the i conductive column and the i+1 conductive column of the n conductive columns, the n conductive columns, the first connection electrode, the n / 2 second connection electrodes, and the n / 2 third connection electrodes form a first filter inductor of a three-dimensional spiral inductor structure, n is an even number greater than or equal to 2, and i is an odd number greater than or equal to 1 and less than or equal to n-2.

14. The filter of claim 13, wherein, The first substrate is further provided with a filter capacitor, a first pad, and a second pad, the first connection electrode is connected to the first pad, the n / 2 second connection electrode is connected to a first plate of the filter capacitor, and a second plate of the filter capacitor is connected to the second pad.

15. The filter of claim 5, wherein, The second substrate at least includes a second substrate, a fourth conductive layer arranged on a side of the second substrate close to the connection substrate, and the third connection electrode is arranged in the fourth conductive layer.

16. An electronic device comprising the filter of any one of claims 1 to 15.

17. A method of manufacturing a filter, comprising: respectively manufacturing a first substrate, a second substrate and a connection substrate, the first substrate being provided with at least one first substrate electrode, the second substrate being provided with at least one second substrate electrode, the connection substrate comprising at least a connection substrate and at least one conductive post penetrating the connection substrate, the conductive post being connected with a first bump structure at an end close to the first substrate, the conductive post being connected with a second bump structure at an end close to the second substrate; arranging the first substrate and the second substrate oppositely, and arranging the connection substrate between the first substrate and the second substrate, and connecting the first bump structure with the first substrate electrode and the second bump structure with the second substrate electrode by bonding; the connection substrate comprising a first side surface close to the first substrate and a second side surface close to the second substrate, the first bump structure being arranged on the first side surface of the connection substrate and connected with the end of the conductive post close to the first substrate, the second bump structure being arranged on the second side surface of the connection substrate and connected with the end of the conductive post close to the second substrate; the first bump structure comprising a first connection layer arranged on the first side surface of the connection substrate and a first bump layer arranged on a side of the first connection layer away from the connection substrate, the first connection layer being connected with the end of the conductive post close to the first substrate, the first bump layer being connected with the first substrate electrode by bonding; the second bump structure comprising a second connection layer arranged on the second side surface of the connection substrate and a second bump layer arranged on a side of the second connection layer away from the connection substrate, the second connection layer being connected with the end of the conductive post close to the second substrate.

18. The method of claim 17, wherein the filter is prepared by a method comprising: manufacturing the connection substrate comprising: providing a connection substrate, forming a plurality of through holes on the connection substrate, the material of the connection substrate comprising glass; forming a plurality of conductive posts in the plurality of through holes; forming a plurality of first bump structures on a first side surface of the connection substrate and a plurality of second bump structures on a second side surface of the connection substrate; the first bump structure comprising a first connection layer arranged on the first side surface of the connection substrate and a first bump layer arranged on a side of the first connection layer away from the connection substrate, a plurality of first connection layers being connected with a plurality of conductive posts corresponding to the ends of the plurality of conductive posts on the first side surface; the second bump structure comprising a second connection layer arranged on the second side surface of the connection substrate and a second bump layer arranged on a side of the second connection layer away from the connection substrate, a plurality of second connection layers being connected with a plurality of conductive posts corresponding to the ends of the plurality of conductive posts on the second side surface.

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