A digital-analog isolation device for multiple power domains of a power management system

Abstract

The invention relates to power supply control, and in particular to a digital-analog isolation device applied to a power management system with multiple power supply domains, comprising a level converter LS1 and a level converter LS2, wherein the level converter LS1 is connected to PD1, the level converter LS1 outputs HPD1 to an OR gate OR1, the OR gate OR1 is connected to VPD1, and the OR gate OR1 outputs EPD1 to an AND gate AND1; VPD1 is input to an inverter N1, the inverter N1 outputs NVPD1 to an AND gate AND2, the level converter LS2 is connected to VPD2, the level converter LS2 outputs HVPD2 to the AND gate AND2, the AND gate AND2 outputs VVPD2 to the OR gate OR2, the OR gate OR2 is connected to PD2, the OR gate OR2 outputs EPD2 to the AND gate AND1, and the AND gate AND1 outputs PD; the technical solution provided by the invention can effectively overcome the defect in the prior art that all digital power supply domains cannot be powered off.

Description

Technical Field

[0001] The invention relates to power supply control, and in particular to a digital-analog isolation device applied to multiple power supply domains of a power supply management system. Background Art

[0002] At present, in order to reduce system power consumption, most power management systems will enter sleep mode when they have not been working for a long time and have not received valid commands. The BMS analog front-end monitoring chip AFE on the daisy chain will also enter sleep mode.

[0003] BMS analog front-end monitoring chips AFE often use a multi-power domain design. In order to minimize power consumption, some power domains will be turned off when entering sleep mode. In existing designs, when processing control signals across power domains, in order to ensure signal stability, some normally open logic will be reserved to keep the logic powered all the time. Therefore, some digital-to-analog interface control signals will cause some digital power domains to be unable to be fully powered off. Summary of the invention

[0004] 1. Technical issues to be resolved

[0005] In view of the above shortcomings of the prior art, the present invention provides a digital-to-analog isolation device for use in multiple power domains of a power management system, which can effectively overcome the defect of the prior art that all digital power domains cannot be powered off.

[0006] (II) Technical solution

[0007] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0008] A digital-analog isolation device applied to a multi-power domain of a power management system, comprising a level converter LS1 and a level converter LS2, wherein the level converter LS1 is connected to PD1, the level converter LS1 outputs HPD1 to an OR gate OR1, the OR gate OR1 is connected to VPD1, and the OR gate OR1 outputs EPD1 to an AND gate AND1;

[0009] The VPD1 is input to the inverter N1, the inverter N1 outputs NVPD1 to the AND gate AND2, the level converter LS2 is connected to VPD2, the level converter LS2 outputs HVPD2 to the AND gate AND2, the AND gate AND2 outputs VVPD2 to the OR gate OR2, the OR gate OR2 is connected to PD2, the OR gate OR2 outputs EPD2 to the AND gate AND1, and the AND gate AND1 outputs PD;

[0010] The level converter LS1 outputs HPD1 to the AND gate AND3, the AND gate AND3 is connected to VPD1, and the AND gate AND3 outputs ENPD1 to the OR gate OR3;

[0011] The inverter N1 outputs NVPD1 to the OR gate OR4, the level converter LS2 outputs HVPD2 to the OR gate OR4, the OR gate OR4 outputs VNVPD2 to the AND gate AND4, the AND gate AND4 accesses PD2, the AND gate AND4 outputs ENPD2 to the OR gate OR3, and the OR gate OR3 outputs NPD.

[0012] Preferably, both PD1 and PD2 are control signals, VPD1 is a valid signal of PD1, and VPD2 is a valid signal of PD2;

[0013] Among them, PD1 is a signal in the 1.5V power domain, which generates a signal HPD1 in the 5V power domain after passing through the level converter LS1. VPD2 is a signal in the 1.5V power domain, which generates a signal HVPD2 in the 5V power domain after passing through the level converter LS2. Both VPD1 and PD2 are signals in the 5V power domain.

[0014] Preferably, when PD is a valid output, VPD1 is 0 indicating that PD1 is a valid input, and VPD2 is 0 indicating that PD2 is a valid input;

[0015] If PD1 is a valid input, VPD1 is 0, VPD1 and HPD1 output EPD1 through OR gate OR1, the value is consistent with PD1, VPD1 outputs NVPD1 through inverter N1, the value is 1, VPD2 is 1, NVPD1 and HVPD2 output VVPD2 through AND gate AND2, the value is 1, VVPD2 and PD2 output EPD2 through OR gate OR2, the value of EPD1 and EPD2 output PD through AND gate AND1 is consistent with EPD1, so the value of PD is consistent with PD1;

[0016] If PD2 is a valid input, VPD1 is 1, VPD1 outputs NVPD1 as 0 through inverter N1, NVPD1 and HVPD2 output VVPD2 as 0 through AND gate AND2, VVPD2 and PD2 output EPD2 as the same value as PD2 through OR gate OR2, HPD1 and VPD1 output EPD1 as 1 through OR gate OR1, EPD1 and EPD2 output PD as the same value as EPD2 through AND gate AND1, so the value of PD is consistent with PD2.

[0017] Preferably, when NPD is a valid output, VPD1 is 1 indicating that PD1 is a valid input, and VPD2 is 1 indicating that PD2 is a valid input;

[0018] If PD1 is a valid input, VPD1 is 1, HPD1 and VPD1 output ENPD1 through AND gate AND3, the value is consistent with PD1, VPD1 outputs NVPD1 through inverter N1, the value is 0, VPD2 is 0, NVPD1 and HVPD2 output VNVPD2 through OR gate OR4, the value of VNVPD2 and PD2 output ENPD2 through AND gate AND4 is 0, ENPD1 and ENPD2 output NPD through OR gate OR3, the value is consistent with ENPD1, so the value of NPD is consistent with PD1;

[0019] If PD2 is a valid input, VPD1 is 0, VPD1 outputs NVPD1 as 1 through inverter N1, NVPD1 and HVPD2 output VNVPD2 as 1 through OR gate OR4, VNVPD2 and PD2 output ENPD2 as 1 through AND gate AND4, which is the same as PD2, VPD1 and HPD1 output ENPD1 as 0 through AND gate AND3, ENPD1 and ENPD2 output NPD as 1 through OR gate OR3, which is the same as ENPD2, so the value of NPD is consistent with PD2.

[0020] Preferably, the digital-analog isolation device is provided in the discharge module DSCHRG, the analog-to-digital conversion module ADC, the A port isoPORTA of the isolated serial interface and the B port isoPORTB of the isolated serial interface in the BMS analog front-end monitoring chip AFE, and the BMS analog front-end monitoring chip AFE comprises:

[0021] The digital controller DCTRL controls and processes the digital-to-analog interface signals and is connected to the 1.5V working voltage through the switch SW1;

[0022] The digital clock and reset generation module POR is connected to the 1.5V operating voltage through switch SW2;

[0023] One-time programmable device OTP, stores chip calibration parameters, connected to 5V working voltage through switch SW3;

[0024] Analog general purpose input and output interface AGPIO, connected to 5V working voltage through switch SW4;

[0025] The digital general purpose input and output interface DGPIO is connected to the 1.5V working voltage and the 5V working voltage through the switch SW5 and the switch SW6 respectively;

[0026] The discharge module DSCHRG is connected to a 5V working voltage and is provided with a first digital-analog isolation device CISO1. The PD1 of the first digital-analog isolation device CISO1 is controlled by the DSCPD output by the digital controller DCTRL. The VPD1 of the first digital-analog isolation device CISO1 is controlled by the analog controller ACTRL. The PD2 and VPD2 of the first digital-analog isolation device CISO1 are both connected to a constant value of 0.

[0027] The analog-to-digital conversion module ADC is connected to a 5V working voltage and is provided with a second digital-to-analog isolation device CISO2. The PD1 of the second digital-to-analog isolation device CISO2 is controlled by the ADCPD output by the digital controller DCTRL. The VPD1 of the second digital-to-analog isolation device CISO2 is controlled by the analog controller ACTRL. The PD2 and VPD2 of the second digital-to-analog isolation device CISO2 are both connected to a constant value of 0.

[0028] A port isoPORTA of the isolated serial interface is connected to a 5V working voltage and is provided with a third digital-analog isolation device CISO3. PD1 of the third digital-analog isolation device CISO3 is controlled by PAPD output by a digital controller DCTRL. VPD1 of the third digital-analog isolation device CISO3 is controlled by an analog controller ACTRL. PD2 and VPD2 of the third digital-analog isolation device CISO3 are both connected to a constant value of 0.

[0029] The B port isoPORTB of the isolated serial interface is connected to a 5V working voltage and is provided with a fourth digital-analog isolation device CISO4, PD1 of the fourth digital-analog isolation device CISO4 is controlled by PBPD output by the digital controller DCTRL, VPD1 of the fourth digital-analog isolation device CISO4 is controlled by the analog controller ACTRL, PD2 of the fourth digital-analog isolation device CISO4 is controlled by WPD output by the wake-up signal detection module WKP, and VPD2 of the fourth digital-analog isolation device CISO4 is controlled by the digital controller DCTRL;

[0030] The analog controller ACTRL is connected to a 5V working voltage, controls the turning off and on of switches SW1, SW2, SW3, SW4, SW5, and SW6, and controls whether the first digital-analog isolation device CISO1, the second digital-analog isolation device CISO2, the third digital-analog isolation device CISO3, and the fourth digital-analog isolation device CISO4 are effective;

[0031] Among them, the first digital-analog isolation device CISO1, the second digital-analog isolation device CISO2, the third digital-analog isolation device CISO3, and the fourth digital-analog isolation device CISO4 are all connected to a 1.5V operating voltage and a 5V operating voltage.

[0032] Preferably, for the first digital-analog isolation device CISO1:

[0033] When the analog controller ACTRL controls VPD1 of the first digital-to-analog isolation device CISO1 to be 1, the analog controller ACTRL controls the switch SW1 to be closed, the digital controller DCTRL is powered on, and DSCPD is a valid output of the digital controller DCTRL, PD1 of the first digital-to-analog isolation device CISO1 is a valid input, then the value of the output NPD of the first digital-to-analog isolation device CISO1 is consistent with DSCPD, and when DSCPD is 0, the discharge module DSCHRG is powered off, and when DSCPD is 1, the discharge module DSCHRG is powered on;

[0034] When the analog controller ACTRL controls VPD1 of the first digital-to-analog isolation device CISO1 to be 0, the analog controller ACTRL controls switch SW1 to be turned off, the digital controller DCTRL is powered off, PD2 of the first digital-to-analog isolation device CISO1 is a valid input, then the value of NPD output by the first digital-to-analog isolation device CISO1 is 0, and the discharge module DSCHRG is powered off.

[0035] Preferably, for the fourth digital-analog isolation device CISO4:

[0036] When the analog controller ACTRL controls the VPD1 of the fourth digital-to-analog isolation device CISO4 to be 0, the analog controller ACTRL controls the switch SW1 to be closed, the digital controller DCTRL is powered on, and PBPD is a valid output of the digital controller DCTRL, PD1 of the fourth digital-to-analog isolation device CISO4 is a valid input, and the digital controller DCTRL controls the VPD2 of the fourth digital-to-analog isolation device CISO4 to be 1, then the value of the output PD of the fourth digital-to-analog isolation device CISO4 is consistent with PBPD, and when PBPD is 1, the B port isoPORTB of the isolated serial interface is powered off, and when PBPD is 0, the B port isoPORTB of the isolated serial interface is powered on;

[0037] When the analog controller ACTRL controls VPD1 of the fourth digital-to-analog isolation device CISO4 to 1, the analog controller ACTRL controls the switch SW1 to turn off, the digital controller DCTRL powers off, and PD2 of the fourth digital-to-analog isolation device CISO4 is a valid input. Then the value of the output PD of the fourth digital-to-analog isolation device CISO4 is consistent with WPD. When WPD is 1, the B port isoPORTB of the isolated serial interface is powered off. When WPD is 0, the B port isoPORTB of the isolated serial interface is powered on.

[0038] (III) Beneficial effects

[0039] Compared with the prior art, the digital-to-analog isolation device for multiple power domains in a power management system provided by the present invention can power off all digital power domains through hardware design, thereby further reducing the system power consumption of the power management system. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 It is a hardware circuit diagram of the digital-analog isolation device in the present invention;

[0042] Figure 2 The power domain block diagram of the BMS analog front-end monitoring chip AFE in the present invention. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] A digital-analog isolation device for multiple power domains in a power management system, such as Figure 1 As shown, it includes a level converter LS1 and a level converter LS2, the level converter LS1 is connected to PD1, the level converter LS1 outputs HPD1 to the OR gate OR1, the OR gate OR1 is connected to VPD1, and the OR gate OR1 outputs EPD1 to the AND gate AND1;

[0045] VPD1 is input to inverter N1, inverter N1 outputs NVPD1 to AND gate AND2, level converter LS2 is connected to VPD2, level converter LS2 outputs HVPD2 to AND gate AND2, AND gate AND2 outputs VVPD2 to OR gate OR2, OR gate OR2 is connected to PD2, OR gate OR2 outputs EPD2 to AND gate AND1, and AND gate AND1 outputs PD;

[0046] The level converter LS1 outputs HPD1 to the AND gate AND3, the AND gate AND3 is connected to VPD1, and the AND gate AND3 outputs ENPD1 to the OR gate OR3;

[0047] The inverter N1 outputs NVPD1 to the OR gate OR4, the level converter LS2 outputs HVPD2 to the OR gate OR4, the OR gate OR4 outputs VNVPD2 to the AND gate AND4, the AND gate AND4 accesses PD2, the AND gate AND4 outputs ENPD2 to the OR gate OR3, and the OR gate OR3 outputs NPD.

[0048] PD1 and PD2 are both control signals, VPD1 is the effective signal of PD1, and VPD2 is the effective signal of PD2;

[0049] Among them, PD1 is a signal in the 1.5V power domain, which generates a signal HPD1 in the 5V power domain after passing through the level converter LS1. VPD2 is a signal in the 1.5V power domain, which generates a signal HVPD2 in the 5V power domain after passing through the level converter LS2. Both VPD1 and PD2 are signals in the 5V power domain.

[0050] 1) When PD is a valid output, VPD1 is 0, indicating that PD1 is a valid input, and VPD2 is 0, indicating that PD2 is a valid input;

[0051] If PD1 is a valid input, VPD1 is 0, VPD1 and HPD1 output EPD1 through OR gate OR1, the value is consistent with PD1, VPD1 outputs NVPD1 through inverter N1, the value is 1, VPD2 is 1, NVPD1 and HVPD2 output VVPD2 through AND gate AND2, the value is 1, VVPD2 and PD2 output EPD2 through OR gate OR2, the value of EPD1 and EPD2 output PD through AND gate AND1 is consistent with EPD1, so the value of PD is consistent with PD1;

[0052] If PD2 is a valid input, VPD1 is 1, VPD1 outputs NVPD1 as 0 through inverter N1, NVPD1 and HVPD2 output VVPD2 as 0 through AND gate AND2, VVPD2 and PD2 output EPD2 as the same value as PD2 through OR gate OR2, HPD1 and VPD1 output EPD1 as 1 through OR gate OR1, EPD1 and EPD2 output PD as the same value as EPD2 through AND gate AND1, so the value of PD is consistent with PD2.

[0053] 2) When NPD is a valid output, VPD1 is 1, indicating that PD1 is a valid input, and VPD2 is 1, indicating that PD2 is a valid input;

[0054] If PD1 is a valid input, VPD1 is 1, HPD1 and VPD1 output ENPD1 through AND gate AND3, the value is consistent with PD1, VPD1 outputs NVPD1 through inverter N1, the value is 0, VPD2 is 0, NVPD1 and HVPD2 output VNVPD2 through OR gate OR4, the value of VNVPD2 and PD2 output ENPD2 through AND gate AND4 is 0, ENPD1 and ENPD2 output NPD through OR gate OR3, the value is consistent with ENPD1, so the value of NPD is consistent with PD1;

[0055] If PD2 is a valid input, VPD1 is 0, VPD1 outputs NVPD1 as 1 through inverter N1, NVPD1 and HVPD2 output VNVPD2 as 1 through OR gate OR4, VNVPD2 and PD2 output ENPD2 as 1 through AND gate AND4, which is the same as PD2, VPD1 and HPD1 output ENPD1 as 0 through AND gate AND3, ENPD1 and ENPD2 output NPD as 1 through OR gate OR3, which is the same as ENPD2, so the value of NPD is consistent with PD2.

[0056] like Figure 2 As shown, the digital-analog isolation device is arranged in the discharge module DSCHRG, the analog-to-digital conversion module ADC, the A port isoPORTA of the isolated serial interface and the B port isoPORTB of the isolated serial interface in the BMS analog front-end monitoring chip AFE. The BMS analog front-end monitoring chip AFE includes:

[0057] The digital controller DCTRL controls and processes the digital-to-analog interface signals and is connected to the 1.5V working voltage through the switch SW1;

[0058] The digital clock and reset generation module POR is connected to the 1.5V operating voltage through switch SW2;

[0059] One-time programmable device OTP, stores chip calibration parameters, connected to 5V working voltage through switch SW3;

[0060] Analog general purpose input and output interface AGPIO, connected to 5V working voltage through switch SW4;

[0061] The digital general purpose input and output interface DGPIO is connected to the 1.5V working voltage and the 5V working voltage through the switch SW5 and the switch SW6 respectively;

[0062] The discharge module DSCHRG is connected to a 5V working voltage and is provided with a first digital-analog isolation device CISO1. The PD1 of the first digital-analog isolation device CISO1 is controlled by the DSCPD output by the digital controller DCTRL. The VPD1 of the first digital-analog isolation device CISO1 is controlled by the analog controller ACTRL. The PD2 and VPD2 of the first digital-analog isolation device CISO1 are both connected to a constant value of 0.

[0063] The analog-to-digital conversion module ADC is connected to a 5V working voltage and is provided with a second digital-to-analog isolation device CISO2. The PD1 of the second digital-to-analog isolation device CISO2 is controlled by the ADCPD output by the digital controller DCTRL. The VPD1 of the second digital-to-analog isolation device CISO2 is controlled by the analog controller ACTRL. The PD2 and VPD2 of the second digital-to-analog isolation device CISO2 are both connected to a constant value of 0.

[0064] A port isoPORTA of the isolated serial interface is connected to a 5V working voltage and is provided with a third digital-analog isolation device CISO3. PD1 of the third digital-analog isolation device CISO3 is controlled by PAPD output by a digital controller DCTRL. VPD1 of the third digital-analog isolation device CISO3 is controlled by an analog controller ACTRL. PD2 and VPD2 of the third digital-analog isolation device CISO3 are both connected to a constant value of 0.

[0065] The B port isoPORTB of the isolated serial interface is connected to a 5V working voltage and is provided with a fourth digital-analog isolation device CISO4, PD1 of the fourth digital-analog isolation device CISO4 is controlled by PBPD output by the digital controller DCTRL, VPD1 of the fourth digital-analog isolation device CISO4 is controlled by the analog controller ACTRL, PD2 of the fourth digital-analog isolation device CISO4 is controlled by WPD output by the wake-up signal detection module WKP, and VPD2 of the fourth digital-analog isolation device CISO4 is controlled by the digital controller DCTRL;

[0066] The analog controller ACTRL is connected to a 5V working voltage, controls the turning off and on of switches SW1, SW2, SW3, SW4, SW5, and SW6, and controls whether the first digital-analog isolation device CISO1, the second digital-analog isolation device CISO2, the third digital-analog isolation device CISO3, and the fourth digital-analog isolation device CISO4 are effective;

[0067] Among them, the first digital-analog isolation device CISO1, the second digital-analog isolation device CISO2, the third digital-analog isolation device CISO3, and the fourth digital-analog isolation device CISO4 are all connected to a 1.5V operating voltage and a 5V operating voltage.

[0068] 1) For the first digital-analog isolation device CISO1:

[0069] When the analog controller ACTRL controls VPD1 of the first digital-to-analog isolation device CISO1 to be 1, the analog controller ACTRL controls the switch SW1 to be closed, the digital controller DCTRL is powered on, and DSCPD is a valid output of the digital controller DCTRL, PD1 of the first digital-to-analog isolation device CISO1 is a valid input, then the value of the output NPD of the first digital-to-analog isolation device CISO1 is consistent with DSCPD, and when DSCPD is 0, the discharge module DSCHRG is powered off, and when DSCPD is 1, the discharge module DSCHRG is powered on;

[0070] When the analog controller ACTRL controls VPD1 of the first digital-to-analog isolation device CISO1 to be 0, the analog controller ACTRL controls switch SW1 to be turned off, the digital controller DCTRL is powered off, PD2 of the first digital-to-analog isolation device CISO1 is a valid input, then the value of NPD output by the first digital-to-analog isolation device CISO1 is 0, and the discharge module DSCHRG is powered off.

[0071] In the technical solution of the present application, the working principles of the second digital-analog isolation device CISO2 and the third digital-analog isolation device CISO3 are similar to the working principle of the first digital-analog isolation device CISO1 mentioned above.

[0072] 2) For the fourth digital-analog isolation device CISO4:

[0073] When the analog controller ACTRL controls the VPD1 of the fourth digital-to-analog isolation device CISO4 to be 0, the analog controller ACTRL controls the switch SW1 to be closed, the digital controller DCTRL is powered on, and PBPD is a valid output of the digital controller DCTRL, PD1 of the fourth digital-to-analog isolation device CISO4 is a valid input, and the digital controller DCTRL controls the VPD2 of the fourth digital-to-analog isolation device CISO4 to be 1, then the value of the output PD of the fourth digital-to-analog isolation device CISO4 is consistent with PBPD, and when PBPD is 1, the B port isoPORTB of the isolated serial interface is powered off, and when PBPD is 0, the B port isoPORTB of the isolated serial interface is powered on;

[0074] When the analog controller ACTRL controls VPD1 of the fourth digital-to-analog isolation device CISO4 to 1, the analog controller ACTRL controls the switch SW1 to turn off, the digital controller DCTRL powers off, and PD2 of the fourth digital-to-analog isolation device CISO4 is a valid input. Then the value of the output PD of the fourth digital-to-analog isolation device CISO4 is consistent with WPD. When WPD is 1, the B port isoPORTB of the isolated serial interface is powered off. When WPD is 0, the B port isoPORTB of the isolated serial interface is powered on.

[0075] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A digital-analog isolation device for multiple power domains in a power management system, characterized in that: It includes a level converter LS1 and a level converter LS2, the level converter LS1 is connected to PD1, the level converter LS1 outputs HPD1 to an OR gate OR1, the OR gate OR1 is connected to VPD1, and the OR gate OR1 outputs EPD1 to an AND gate AND1; The VPD1 is input to the inverter N1, the inverter N1 outputs NVPD1 to the AND gate AND2, the level converter LS2 is connected to VPD2, the level converter LS2 outputs HVPD2 to the AND gate AND2, the AND gate AND2 outputs VVPD2 to the OR gate OR2, the OR gate OR2 is connected to PD2, the OR gate OR2 outputs EPD2 to the AND gate AND1, and the AND gate AND1 outputs PD; The level converter LS1 outputs HPD1 to the AND gate AND3, the AND gate AND3 is connected to VPD1, and the AND gate AND3 outputs ENPD1 to the OR gate OR3; The inverter N1 outputs NVPD1 to the OR gate OR4, the level converter LS2 outputs HVPD2 to the OR gate OR4, the OR gate OR4 outputs VNVPD2 to the AND gate AND4, the AND gate AND4 accesses PD2, the AND gate AND4 outputs ENPD2 to the OR gate OR3, and the OR gate OR3 outputs NPD.

2. The digital-analog isolation device for multiple power domains in a power management system according to claim 1, characterized in that: Both PD1 and PD2 are control signals, VPD1 is a valid signal of PD1, and VPD2 is a valid signal of PD2; Among them, PD1 is a signal in the 1.5V power domain, which generates a signal HPD1 in the 5V power domain after passing through the level converter LS1. VPD2 is a signal in the 1.5V power domain, which generates a signal HVPD2 in the 5V power domain after passing through the level converter LS2. Both VPD1 and PD2 are signals in the 5V power domain.

3. The digital-analog isolation device for multiple power domains in a power management system according to claim 2, characterized in that: When PD is a valid output, VPD1 is 0, indicating that PD1 is a valid input, and VPD2 is 0, indicating that PD2 is a valid input; If PD1 is a valid input, VPD1 is 0, VPD1 and HPD1 output EPD1 through OR gate OR1, the value is consistent with PD1, VPD1 outputs NVPD1 through inverter N1, the value is 1, VPD2 is 1, NVPD1 and HVPD2 output VVPD2 through AND gate AND2, the value is 1, VVPD2 and PD2 output EPD2 through OR gate OR2, the value of EPD1 and EPD2 output PD through AND gate AND1 is consistent with EPD1, so the value of PD is consistent with PD1; If PD2 is a valid input, VPD1 is 1, VPD1 outputs NVPD1 as 0 through inverter N1, NVPD1 and HVPD2 output VVPD2 as 0 through AND gate AND2, VVPD2 and PD2 output EPD2 as the same value as PD2 through OR gate OR2, HPD1 and VPD1 output EPD1 as 1 through OR gate OR1, EPD1 and EPD2 output PD as the same value as EPD2 through AND gate AND1, so the value of PD is consistent with PD2.

4. The digital-analog isolation device for multiple power domains in a power management system according to claim 3, characterized in that: When NPD is a valid output, VPD1 is 1, indicating that PD1 is a valid input, and VPD2 is 1, indicating that PD2 is a valid input; If PD1 is a valid input, VPD1 is 1, HPD1 and VPD1 output ENPD1 through AND gate AND3, the value is consistent with PD1, VPD1 outputs NVPD1 through inverter N1, the value is 0, VPD2 is 0, NVPD1 and HVPD2 output VNVPD2 through OR gate OR4, the value of VNVPD2 and PD2 output ENPD2 through AND gate AND4 is 0, ENPD1 and ENPD2 output NPD through OR gate OR3, the value is consistent with ENPD1, so the value of NPD is consistent with PD1; If PD2 is a valid input, VPD1 is 0, VPD1 outputs NVPD1 as 1 through inverter N1, NVPD1 and HVPD2 output VNVPD2 as 1 through OR gate OR4, VNVPD2 and PD2 output ENPD2 as 1 through AND gate AND4, which is the same as PD2, VPD1 and HPD1 output ENPD1 as 0 through AND gate AND3, ENPD1 and ENPD2 output NPD as 1 through OR gate OR3, which is the same as ENPD2, so the value of NPD is consistent with PD2.

5. The digital-analog isolation device for multiple power domains in a power management system according to claim 4, characterized in that: The digital-analog isolation device is provided in the discharge module DSCHRG, the analog-to-digital conversion module ADC, the A port isoPORTA of the isolated serial interface and the B port isoPORTB of the isolated serial interface in the BMS analog front-end monitoring chip AFE. The BMS analog front-end monitoring chip AFE includes: The digital controller DCTRL controls and processes the digital-to-analog interface signals and is connected to the 1.5V working voltage through the switch SW1; The digital clock and reset generation module POR is connected to the 1.5V operating voltage through switch SW2; One-time programmable device OTP, stores chip calibration parameters, connected to 5V working voltage through switch SW3; Analog general purpose input and output interface AGPIO, connected to 5V working voltage through switch SW4; The digital general purpose input and output interface DGPIO is connected to the 1.5V working voltage and the 5V working voltage through the switch SW5 and the switch SW6 respectively; The discharge module DSCHRG is connected to a 5V working voltage and is provided with a first digital-analog isolation device CISO1. The PD1 of the first digital-analog isolation device CISO1 is controlled by the DSCPD output by the digital controller DCTRL. The VPD1 of the first digital-analog isolation device CISO1 is controlled by the analog controller ACTRL. The PD2 and VPD2 of the first digital-analog isolation device CISO1 are both connected to a constant value of 0. The analog-to-digital conversion module ADC is connected to a 5V working voltage and is provided with a second digital-to-analog isolation device CISO2. The PD1 of the second digital-to-analog isolation device CISO2 is controlled by the ADCPD output by the digital controller DCTRL. The VPD1 of the second digital-to-analog isolation device CISO2 is controlled by the analog controller ACTRL. The PD2 and VPD2 of the second digital-to-analog isolation device CISO2 are both connected to a constant value of 0. A port isoPORTA of the isolated serial interface is connected to a 5V working voltage and is provided with a third digital-analog isolation device CISO3. PD1 of the third digital-analog isolation device CISO3 is controlled by PAPD output by a digital controller DCTRL. VPD1 of the third digital-analog isolation device CISO3 is controlled by an analog controller ACTRL. PD2 and VPD2 of the third digital-analog isolation device CISO3 are both connected to a constant value of 0. The B port isoPORTB of the isolated serial interface is connected to a 5V working voltage and is provided with a fourth digital-analog isolation device CISO4, PD1 of the fourth digital-analog isolation device CISO4 is controlled by PBPD output by the digital controller DCTRL, VPD1 of the fourth digital-analog isolation device CISO4 is controlled by the analog controller ACTRL, PD2 of the fourth digital-analog isolation device CISO4 is controlled by WPD output by the wake-up signal detection module WKP, and VPD2 of the fourth digital-analog isolation device CISO4 is controlled by the digital controller DCTRL; The analog controller ACTRL is connected to a 5V working voltage, controls the turning off and on of switches SW1, SW2, SW3, SW4, SW5, and SW6, and controls whether the first digital-analog isolation device CISO1, the second digital-analog isolation device CISO2, the third digital-analog isolation device CISO3, and the fourth digital-analog isolation device CISO4 are effective; Among them, the first digital-analog isolation device CISO1, the second digital-analog isolation device CISO2, the third digital-analog isolation device CISO3, and the fourth digital-analog isolation device CISO4 are all connected to a 1.5V operating voltage and a 5V operating voltage.

6. The digital-analog isolation device for multiple power domains in a power management system according to claim 5, characterized in that: For the first digital-analog isolation device CISO1: When the analog controller ACTRL controls VPD1 of the first digital-to-analog isolation device CISO1 to be 1, the analog controller ACTRL controls the switch SW1 to be closed, the digital controller DCTRL is powered on, and DSCPD is a valid output of the digital controller DCTRL, PD1 of the first digital-to-analog isolation device CISO1 is a valid input, then the value of the output NPD of the first digital-to-analog isolation device CISO1 is consistent with DSCPD, and when DSCPD is 0, the discharge module DSCHRG is powered off, and when DSCPD is 1, the discharge module DSCHRG is powered on; When the analog controller ACTRL controls VPD1 of the first digital-to-analog isolation device CISO1 to be 0, the analog controller ACTRL controls switch SW1 to be turned off, the digital controller DCTRL is powered off, PD2 of the first digital-to-analog isolation device CISO1 is a valid input, then the value of NPD output by the first digital-to-analog isolation device CISO1 is 0, and the discharge module DSCHRG is powered off.

7. The digital-analog isolation device for multiple power domains in a power management system according to claim 5, characterized in that: For the fourth digital-analog isolation device CISO4: When the analog controller ACTRL controls the VPD1 of the fourth digital-to-analog isolation device CISO4 to be 0, the analog controller ACTRL controls the switch SW1 to be closed, the digital controller DCTRL is powered on, and PBPD is a valid output of the digital controller DCTRL, PD1 of the fourth digital-to-analog isolation device CISO4 is a valid input, and the digital controller DCTRL controls the VPD2 of the fourth digital-to-analog isolation device CISO4 to be 1, then the value of the output PD of the fourth digital-to-analog isolation device CISO4 is consistent with PBPD, and when PBPD is 1, the B port isoPORTB of the isolated serial interface is powered off, and when PBPD is 0, the B port isoPORTB of the isolated serial interface is powered on; When the analog controller ACTRL controls VPD1 of the fourth digital-to-analog isolation device CISO4 to 1, the analog controller ACTRL controls the switch SW1 to turn off, the digital controller DCTRL powers off, and PD2 of the fourth digital-to-analog isolation device CISO4 is a valid input. Then the value of the output PD of the fourth digital-to-analog isolation device CISO4 is consistent with WPD. When WPD is 1, the B port isoPORTB of the isolated serial interface is powered off. When WPD is 0, the B port isoPORTB of the isolated serial interface is powered on.

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