A packaging method and apparatus for a vertical cavity surface-emitting laser.

Abstract

This invention discloses a packaging method and apparatus for a vertical-cavity surface-emitting laser (VCSEL), belonging to the field of semiconductor laser chip packaging technology. This invention adds an additional packaging heat sink to the top of the VCSEL chip, using the packaging heat sink, supporting connecting blocks, and bottom heat sink components to surround the VCSEL chip from top and bottom. This invention adjusts the heat dissipation mode at the top of the device from inefficient heat radiation to air to heat conduction via a high thermal conductivity solid material. Compared with existing technologies, this invention can effectively increase the thermal conductivity of the medium near the heat source center and significantly reduce the heat blocking effect of the top DBR material. Furthermore, this invention utilizes the chamfered structure within the through-hole and a two-dimensional transparent thermally conductive material to further increase the lateral component of the top heat flow, improving the efficiency of heat flow from the VCSEL chip to the top sides.

Description

Technical fields:

[0001] This invention pertains to semiconductor laser chip packaging technology, specifically relating to a packaging method and apparatus for a vertical cavity surface-emitting laser. Background technology:

[0002] Vertical cavity surface emitting lasers (VCSELs) have many advantages, such as small mode size, good spot quality, low threshold current, and the ability to realize single longitudinal and single transverse modes. They have important applications in many fields, especially in optical communication, optical sensing, and consumer electronics.

[0003] However, heat dissipation has long been a key bottleneck limiting the stable operation of VCSELs. Due to the small size of VCSELs, the power density of the heat source increases, significantly increasing the thermal resistance of the device. Furthermore, to prevent the opaque heat sink from obstructing the laser emitted from the top surface of the VCSEL, common VCSELs are packaged with the bottom surface facing upwards. Heat must pass through the DBR, substrate, and solder sequentially to reach the heat sink, further increasing the distance of the heat dissipation path. More importantly, the DBR in VCSEL devices not only has extremely low thermal conductivity but is also located precisely along the path of heat flow from the active region to the heat sink. Even with flip-chip packaging, the DBR inevitably narrows the area of ​​the heat dissipation path. VCSEL devices are highly sensitive to gain and mode mismatch; increased heat can simultaneously affect both the cavity mode and the gain wavelength, and in severe cases, even render the VCSEL completely inoperable. Therefore, compared to EELs, VCSELs require a more efficient heat dissipation packaging design. Because the cavity length of a VCSEL chip is short, the side surface area is much smaller than the top surface area; heat radiation to the upper surface and heat conduction to the lower surface are the main heat dissipation channels. Moreover, unlike edge-emitting lasers, most of the surface of the heat source can be eutectic bonded to the heat sink. The light emission direction of VCSEL is consistent with the main heat flow direction. Existing bottom-mount technology always separates it from the DBR with extremely poor thermal conductivity, making it difficult to achieve effective heat dissipation.

[0004] The existing methods for improving heat dissipation in VCSEL packaging mainly include the following: 1. Using transition heat sink materials with higher thermal conductivity, such as diamond and silicon carbide. 2. Increasing the area of ​​the VCSEL chip, increasing the cavity length of the VCSEL, and reducing the thickness of the heat dissipation bottleneck in the VCSEL. 3. Using a flip-chip packaging method with the VCSEL chip facing down and the laser emanating from one side of the substrate, reducing the heat dissipation distance between the heat source and the heat sink. 4. Using active cooling methods, bonding the back of the VCSEL device to a semiconductor cooling device or a microchannel water cooling device to improve heat dissipation efficiency. While these solutions have achieved some improvement in practical applications, they still have certain limitations and shortcomings in terms of cost, yield, and power consumption. Furthermore, due to the requirement of top-emitting laser light, all of the above solutions are single-sided packaging, and the heat dissipation bottleneck of the VCSEL has not been completely overcome, leaving considerable room for improvement in the device's heat dissipation performance. Summary of the Invention:

[0005] To overcome the above difficulties, this invention proposes a packaging method and apparatus for a vertical cavity surface-emitting laser, which can significantly reduce the thermal resistance of the device packaging and improve the optoelectronic performance and thermal stability of the device.

[0006] The technical solution provided by this invention is as follows:

[0007] A packaging method for a vertical-cavity surface-emitting laser (VCSEL) is characterized by using a packaging heat sink and a bottom heat sink component to surround the VCSEL chip from top to bottom. The packaging heat sink includes a support connecting block and a heat dissipation bridge structure, wherein the support connecting block is a hollow cylinder, and the heat dissipation bridge structure is a cover. The heat dissipation bridge structure is disposed on the top of the support connecting block and the VCSEL chip. A chamfered through hole is provided in the central region of the heat dissipation bridge structure, and several buried metal vias are provided on the heat dissipation bridge structure. The specific packaging steps include the following:

[0008] 1) Align the bottom heat sink component with the center of the encapsulation socket and perform die bonding;

[0009] 2) Fix the VCSEL chip and support connector block to the bottom heat sink component using alloy solder;

[0010] 3) The heat dissipation bridge structure is placed above the VCSEL chip and the support connection block. The DBR of the VCSEL chip is located in the chamfered through hole, and the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure. The heat dissipation bridge structure is fixedly connected to the support connection block through an alloy solder layer.

[0011] 4) The metal buried via of the heat dissipation bridge structure is connected to the P-type metal electrode of the VCSEL chip through alloy solder. The positive terminal is connected to the metal buried via of the heat dissipation bridge structure with a first gold wire, and the negative terminal is connected to the alloy solder on the bottom heat sink component with a second gold wire to form an electrical path.

[0012] Furthermore, the VCSEL chip is placed inside the hollow core of the support connector block using a nozzle with a sleeve structure, wherein the inner surface of the support connector block is 60-80µm away from the outer surface of the VCSEL chip, and the heat dissipation bridge structure is precisely aligned with the support connector block using the internal groove of the nozzle.

[0013] Furthermore, a transparent thermally conductive material layer is added above the DBR of the VCSEL chip. The transparent thermally conductive material layer is a two-dimensional material of graphene and boron nitride, and the edge of the transparent thermally conductive material layer is in contact with the sidewall of the chamfered through hole.

[0014] Furthermore, the alloy solder layer consists of a metal layer vapor-deposited on the lower surface of the heat dissipation bridge structure and a metal layer vapor-deposited on the upper surface of the support connecting block, wherein the metal layer is Au, In or silver.

[0015] Furthermore, the bottom diameter of the chamfered through-hole is 10-20 μm larger than the diameter of the DBR on the VCSEL chip.

[0016] Furthermore, the present invention provides a heat sink for packaging a vertical cavity surface-emitting laser, including a support connecting block and a heat dissipation bridge structure. The support connecting block is a hollow columnar body, and the heat dissipation bridge structure is a cover. The heat dissipation bridge structure is disposed on the top of the support connecting block. A chamfered through hole is provided in the central area of ​​the heat dissipation bridge structure, and several metal embedded holes are provided on the heat dissipation bridge structure as metal contacts for connecting pin terminals.

[0017] Furthermore, the heat dissipation bridge structure and the supporting connecting block are both made of diamond, SiC, and AlN insulating and thermally conductive materials.

[0018] Furthermore, the thickness of the heat dissipation bridge structure ranges from 50 to 80 μm; the chamfer range of the chamfered through hole is 30° to 45°.

[0019] The beneficial effects of this invention are as follows:

[0020] Using the packaging method of this invention, when the VCSEL chip is in operation, the heat generated inside is transferred downwards through the VCSEL chip's DBR, substrate, and heat sink components. Simultaneously, heat generated at the top of the device can be transferred along the heat dissipation bridge-support connection block to the bottom heat sink. Compared to traditional packaging structures, the upper and lower enclosure packaging structure of this invention not only effectively overcomes the heat dissipation bottleneck at the top of the device but also utilizes a chamfered through-hole structure to bring the heat dissipation medium as close as possible to the center of the heat source without affecting the device's light emission, thereby increasing the effective heat flux density through the heat dissipation bridge. Furthermore, the addition of a two-dimensional transparent thermally conductive material with high lateral thermal conductivity further increases the flow efficiency of heat from the core area of ​​the device to the heat dissipation bridges at both ends.

[0021] The beneficial effects of this invention are as follows:

[0022] (1) The design of the heat sink fully considers the spatial distribution of chip temperature and effectively increases the utilization efficiency of the heat sink. It can achieve better heat dissipation effect with the same chip and heat sink area, and reduce the overall packaging cost.

[0023] (2) The present invention provides electrical shielding and support protection for the chip, which can effectively reduce the probability of damage to the chip caused by static electricity and external mechanical stress during the process, improve the packaging yield and the stability and reliability of the device operation.

[0024] (3) This invention is not only compatible with existing packaging processes, but also has strong adaptability and flexibility. The above packaging form can be used for both P-side light emission and substrate light emission VCSEL structures.

[0025] (4) Since the distance between the through hole of the heat dissipation bridge structure and the light output area of ​​the VCSEL is within the Rayleigh length range, the near-field optical parameters of the VCSEL can be flexibly modulated by using optical lenses or electro-optic and thermo-optic effects. Attached image description:

[0026] Figure 1 This is a schematic diagram of the VCSEL structure according to a specific embodiment of the present invention;

[0027] Figure 2 This is a three-dimensional schematic diagram of the heat sink according to a specific embodiment of the present invention;

[0028] Figure 3 This is a schematic diagram of the VCSEL packaging structure according to a specific embodiment of the present invention;

[0029] Figure 4 This is a three-dimensional schematic diagram of the VCSEL packaging structure according to a specific embodiment of the present invention;

[0030] Figure 5 This is a simulated heat distribution diagram of the VCSEL after encapsulation using the present invention;

[0031] Among them, 1-DBR; 2-Transparent thermally conductive material; 3-P-type metal electrode; 4-P+GaN contact layer; 5-P-type GaN layer; 6-AlGaN electron blocking layer; 7-InGaN quantum well; 8-N-type GaN layer; 9-N-type DBR; 10-N-type metal electrode; 11-SiO2 current limiting via; 12-ITO current spreading layer; 21-Through hole of heat dissipation bridge structure; 22-Metal buried via of heat dissipation bridge structure; 23-Heat dissipation bridge structure; 24-Alloy solder; 25-Support connecting block; 26-VCSEL chip; 27-First gold wire; 28-Second gold wire; 29-Bottom heat sink component. Detailed implementation method:

[0032] To further illustrate the effectiveness of the packaging device and packaging method of the present invention, this embodiment uses a GaN-based VCSEL chip with a lasing wavelength of 460nm as an example. Figure 1 As shown, the doping concentration of the n-GaN electron injection layer in the VCSEL chip structure is 1*10⁻⁶. 18 cm -3 The active region of an InGaN quantum well consists of two pairs of In... 0.20 Ga 0.80 The structure is composed of N / GaN, with a quantum well thickness of 2.5 nm and a quantum barrier thickness of 2.5 nm. After epitaxy, a cylindrical mesa with a diameter of 50 μm is first etched using ICP / RIE to expose the n-GaN conductive layer. Then, a 200 nm SiO2 insulating layer is deposited on the mesa using PECVD, and a circular current injection aperture with a diameter of 12 μm is etched using RIE. Next, a 50 nm thick transparent electrode ITO is deposited. Then, p-type and n-type electrodes, Ni / Au and Ti / Al / Ni / Au, are deposited on the top of the mesa and the n-GaN surface, respectively. Finally, SiO2 / Ta2O5 is deposited on the p-type electrode as the DBR of the VCSEL chip, covering the current injection aperture to form a complete VCSEL device. Finally, the wafer is divided into VCSEL chips with a length and width of 100um*100um and a thickness of 80um using a dicing blade and a film expansion device. At the same time, a 30nm two-dimensional boron nitride transparent thermal conductive material layer is deposited on the upper surface of the DBR of the VCSEL chip as a heat transfer layer.

[0033] The heat sink provided by this invention, such as Figure 2As shown, the heat sink consists of a heat dissipation bridge structure and a support connecting block. The preferred materials for the heat dissipation bridge structure and the support connecting block are insulating and thermally conductive materials such as diamond, graphite, SiC, AlN, and boron nitride. Taking the laser cutting method to process the SiC support connecting block and the SiC heat dissipation bridge structure as an example, the support connecting block is a hollow cylinder with an inner diameter of 200*200µm, an outer diameter of 400*400µm, and a sidewall thickness of 80µm. The heat dissipation bridge structure is a cover with dimensions of 400*400µm and a thickness of 80µm. The support connection block is a dike structure surrounding the VCSEL chip. The outer boundary of the support connection block is consistent with the outer boundary of the heat dissipation bridge structure. The heat dissipation bridge structure is set on top of the support connection block to form a cover. The height of the support connection block is equal to the height of the VCSEL chip. A chamfered through hole is provided in the central area of ​​the heat dissipation bridge structure. The through hole is prepared by photoresist thermal reflow method. The bottom diameter of the through hole is 30um and the chamfer size is 45°. At the same time, several metal buried holes are provided on the heat dissipation bridge structure to serve as metal contacts for lead connection pin terminals. Preferably, the filling material of the metal buried holes is one of Au, Ag, Al, and Cu.

[0034] like Figure 3 As shown, the encapsulated heat sink and bottom heat sink are located above and below the VCSEL chip. The inner surface of the supporting connecting block is approximately 60-80 μm away from the outer surface of the VCSEL chip. The diameter of the chamfered through-hole is 10-20 μm larger than the diameter of the VCSEL chip's DBR. The VCSEL chip's DBR is located within the through-hole of the heat dissipation bridge structure, serving as the emission point for the top laser. The edge of the transparent thermally conductive material on the VCSEL chip's DBR contacts the inner wall of the chamfered through-hole. The lower surface of the heat dissipation bridge structure is provided with an alloy solder layer. The heat dissipation bridge structure and the supporting connecting block are tightly connected by the alloy solder. The P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure, and the buried metal via of the heat dissipation bridge structure is connected to the P-type metal electrode of the VCSEL chip through this alloy solder.

[0035] The present invention provides a packaging method for a vertical cavity surface-emitting laser (VCSEL), such as... Figure 4 As shown, the core of this method lies in using a heat sink and a bottom heat sink to surround the VCSEL chip from top to bottom. The specific steps include the following:

[0036] 1) First, the TO56 packaged tube socket is picked up and placed on the preheating stage, and the socket is heated to 380℃. Then, the bottom heat sink component of SiC is picked up and aligned with the center of the tube socket for die bonding. The die bonding time is 10 seconds and the pressure is 200g.

[0037] 2) Place the VCSEL chip face up and the support connection block on the surface of the alloy solder layer on the bottom heat sink component of SiC. The VCSEL chip is located in the hollow core of the support connection block. The inner surface of the support connection block is 60-80um away from the outer surface of the VCSEL chip. Raise the temperature of the hot stage to 350℃, the nozzle pressure is 50g, and the placement time is 10 seconds.

[0038] 3) Deposit 10µm Au and 4µm In metal layers as alloy solder layers on the lower surface of the heat dissipation bridge structure and the upper surface of the support connecting block, respectively. After cooling to room temperature, pick up the heat dissipation bridge structure onto the preheating stage and heat it to 350°C. Fix the heat dissipation bridge structure above the VCSEL chip and the support connecting block. The Au and In metals between the heat dissipation bridge structure and the support connecting block reach a pre-molten state. Use the internal groove of the nozzle to strictly align the heat dissipation bridge structure with the support connecting block. The DBR of the VCSEL chip is located in the chamfered through-hole structure, and the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure. The nozzle pressure is 100g, and the placement time is 30s. The heat dissipation bridge structure is fixedly connected to the support connecting block through the alloy solder layer.

[0039] 4) After cooling, the heat sink and bottom heat sink components surround the VCSEL chip from top to bottom. The metal buried via of the heat sink structure is connected to the P-type metal electrode of the VCSEL chip through alloy solder. The positive terminal is connected to the metal buried via of the heat sink structure with a first gold wire, and the negative terminal is connected to the alloy solder on the bottom heat sink component with a second gold wire to form an electrical path.

[0040] Figure 5 This is a temperature distribution diagram of the VCSEL chip packaged using the present invention. It can be clearly seen that the lateral component of the heat flow in the central region of the VCSEL device increases significantly, and the heat generated in the active region is dissipated outwards through the top heat dissipation system. The overall thermal resistance of the top is reduced from 1281 K / W to 880 K / W, and the junction temperature is reduced by more than 6°C. Compared with the prior art, the present invention effectively increases the thermal conductivity of the medium near the heat source center by adding a heat sink structure, significantly reducing the heat-blocking effect of the top DBR material. Furthermore, the chamfered through-hole structure further increases the lateral component of the top heat flow, maximizing the efficiency of heat flow from the VCSEL chip to the top two support pillars.

[0041] Finally, it should be noted that the purpose of disclosing the embodiments is to help further understand the present invention. However, those skilled in the art will understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection of the present invention is defined by the claims.

Claims

1. A packaging method for a vertical-cavity surface-emitting laser, characterized in that, The VCSEL chip is surrounded on both the top and bottom by a heat sink and a heat encapsulation shroud. The heat sink includes a support connecting block and a heat dissipation bridge structure. The support connecting block is a hollow cylinder, and the heat dissipation bridge structure is a cover. The heat dissipation bridge structure is located on top of the support connecting block and the VCSEL chip. A chamfered through hole is provided in the central area of ​​the heat dissipation bridge structure, and several buried metal vias are provided on the heat dissipation bridge structure. The specific encapsulation steps include the following: 1) Align the bottom heat sink component with the center of the encapsulation socket and perform die bonding; 2) Fix the VCSEL chip and support connector block to the bottom heat sink component using alloy solder; 3) The heat dissipation bridge structure is placed above the VCSEL chip and the support connection block. The DBR of the VCSEL chip is located in the chamfered through hole, and the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure. The heat dissipation bridge structure is fixedly connected to the support connection block through an alloy solder layer. 4) The metal buried via of the heat dissipation bridge structure is connected to the P-type metal electrode of the VCSEL chip through alloy solder. The positive terminal is connected to the metal buried via of the heat dissipation bridge structure with a first gold wire, and the negative terminal is connected to the alloy solder on the bottom heat sink component with a second gold wire to form an electrical path.

2. The packaging method for the vertical-cavity surface-emitting laser as described in claim 1, characterized in that, The VCSEL chip is placed inside the hollow core of the support connector using a nozzle with a sleeve structure, wherein the inner surface of the support connector is 60-80 μm away from the outer surface of the VCSEL chip.

3. The packaging method for the vertical-cavity surface-emitting laser as described in claim 1, characterized in that, A transparent thermally conductive material layer is added above the DBR of the VCSEL chip. The transparent thermally conductive material layer is a two-dimensional material of graphene and boron nitride, and the edge of the transparent thermally conductive material layer is in contact with the sidewall of the chamfered through hole.

4. The packaging method for the vertical-cavity surface-emitting laser as described in claim 1, characterized in that, The alloy solder layer consists of a metal layer vapor-deposited on the lower surface of the heat dissipation bridge structure and a metal layer vapor-deposited on the upper surface of the support connecting block.

5. The packaging method for the vertical-cavity surface-emitting laser as described in claim 4, characterized in that, The metal layer is Au, In, or silver.

6. The packaging method for the vertical-cavity surface-emitting laser as described in claim 1, characterized in that, The bottom diameter of the chamfered through-hole is 10-20 μm larger than the diameter of the DBR on the VCSEL chip.

7. A heat sink for packaging a vertical-cavity surface-emitting laser, characterized in that, It includes a support connecting block and a heat dissipation bridge structure. The support connecting block is a hollow columnar body, and the heat dissipation bridge structure is a cover. The heat dissipation bridge structure is located on the top of the support connecting block. A chamfered through hole is provided in the central area of ​​the heat dissipation bridge structure, and several metal embedded holes are provided on the heat dissipation bridge structure as metal contacts for connecting pin terminals.

8. The heat sink for the vertical-cavity surface-emitting laser as described in claim 7, characterized in that, The heat dissipation bridge structure and the supporting connecting block are both made of diamond, SiC, and AlN insulating and thermally conductive materials.

9. The heat sink for the vertical-cavity surface-emitting laser as described in claim 7, characterized in that, The thickness of the heat dissipation bridge structure ranges from 50 to 80 μm.

10. The heat sink for packaging a vertical-cavity surface-emitting laser as described in claim 7, characterized in that, The chamfer range of the chamfered through hole is 30° to 45°.

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