Method for etching thick metal film of VDMOS product

Abstract

The invention provides a method for etching a thick metal film of a VDMOS (Vertical Double-diffused Metal Oxide Semiconductor) product. The method comprises the following steps of: firstly, depositing a passivation layer after metal sputtering, then, carrying out circuit photoetching and PSV (Particle Swarm Vapor Vulcanization) etching, carrying out dry etching on a metal film by taking a PSV structure as a mask, subsequently, removing photoresist and polymer residues, depositing the passivation layer again, carrying out passivation photoetching and etching, and finally, removing the residual photoresist. According to the method, the limitation of the thickness of the photoresist on the etching depth of the metal film is broken through, high-precision etching of the thicker metal film is realized, meanwhile, the technological process is simplified, the production cost is reduced, the production efficiency is improved, material waste and environmental pollution are reduced, and the method has good equipment compatibility and flexibility and is suitable for industrial production. A new solution is provided for manufacturing and application of VDMOS power devices, and the method has profound industry influence and wide market application prospects.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor chip manufacturing technology, and in particular relates to an etching method for a thick metal film of a VDMOS product. Background Art

[0002] As an important component of modern electronic technology, VDMOS (Vertical Diffused Metal Oxide Semiconductor) power devices are widely used in power management, motor drive and other fields. With the continuous development of electronic technology, the performance requirements for VDMOS power devices are increasing, one of which is the increasing demand for the thickness of the metal layer. In traditional VDMOS products, the thickness of the metal layer is generally around 4-5 microns (um), but this thickness has gradually failed to meet the development needs of current technology. Especially in high-voltage and high-current application scenarios, thicker metal layers can effectively improve the conductivity and heat dissipation performance of the device, thereby improving the stability and reliability of the entire system. Therefore, the market demand for VDMOS power devices with a metal film thickness of 6-8 microns or even thicker is growing.

[0003] In the production process of VDMOS power devices, the etching process of metal wires is a crucial link. In the early days, due to the wide CD (Critical Dimension) of the product, the etching of metal wires mostly used wet chemical etching methods. Wet etching has the advantages of large flux and low cost, but with the reduction of product size, wet etching can no longer meet the requirements for CD accuracy. Therefore, dry etching has gradually become the mainstream process. Dry etching can achieve high-precision and high-uniformity metal wire etching by adopting vertical anisotropic etching characteristics. However, in the dry etching process, the selectivity of photoresist (PR) becomes a limiting factor. The selectivity of conventional metal dry etching machines for photoresists is generally not high, and is mostly controlled in the range of 2-3. This means that during the etching process, the photoresist is consumed at a faster rate, thereby limiting the thickness of the metal film that can be etched.

[0004] In order to improve the selectivity of photoresist, it is theoretically necessary to upgrade the high selectivity etching equipment. However, this not only requires huge cost investment, but also has relatively limited room for improvement. Therefore, how to achieve the etching of thicker metal films without changing the thickness of the photoresist and the etcher has become a technical problem that needs to be solved urgently. In the traditional etching process, metal sputtering is performed first, then circuit lithography and circuit etching are performed, and then the photoresist is removed, and finally the passivation layer is deposited and passivation lithography and passivation etching are performed. Due to the limited selectivity of dry etching for photoresist, the thickness of the aluminum film can only be controlled within the range of 3.8-5.7 microns, which cannot meet the market demand for thicker metal films.

[0005] In summary, with the development of VDMOS power devices, the requirements for the thickness of the metal layer are constantly increasing, while the traditional dry etching process is limited by the selectivity of the photoresist and cannot achieve the etching of thicker metal films. Summary of the invention

[0006] In view of the above-mentioned shortcomings, the present invention aims to provide an etching method for a thicker metal film without changing the thickness of the photoresist and the etcher, so as to solve the problems existing in the prior art.

[0007] In order to achieve the above object, the technical solution provided by the present invention is as follows.

[0008] A method for etching a thick metal film of a VDMOS product, specifically comprising the following steps: Step 1: Metal deposition On the surface of the substrate, a layer of metal film is evenly deposited by sputtering. This layer of metal film will serve as the main target of the subsequent etching process. During the sputtering process, the sputtering time, power and other parameters need to be precisely controlled to ensure that the thickness of the metal film is uniform and meets the design requirements.

[0009] Step 2: Deposition of passivation layer 1 (Passivation depo) Next, a passivation layer is deposited on the surface of the metal film. The main function of this passivation layer is to protect the metal film from damage during the etching process and serve as a mask for subsequent photolithography and etching. When depositing the passivation layer, it is necessary to select appropriate materials and process parameters to ensure the thickness, uniformity and adhesion of the passivation layer.

[0010] Step 3: Metal Photo The desired circuit pattern is formed on the passivation layer using photolithography. First, a layer of photoresist is coated on the passivation layer, and then the circuit pattern is transferred to the photoresist through steps such as exposure and development. The pattern of the photoresist will serve as a mask for subsequent etching, so the accuracy and integrity of the pattern must be ensured.

[0011] Step 4: PSV etching According to the pattern of the photoresist, the passivation layer is etched to form a PSV (Passivation Opening) structure. The purpose of this step is to expose part of the metal film for subsequent metal etching. During the etching process, the depth and uniformity of the etching need to be precisely controlled to ensure that the shape and size of the PSV structure meet the design requirements.

[0012] Step 5: Metal Etch The metal film is etched using dry etching technology with the PSV structure as a mask. Dry etching has the advantages of high precision and high uniformity, and can achieve accurate etching of complex circuit patterns. Since the PSV structure has a good selectivity for metal film, it can ensure that during the etching process, the loss rate of the metal film is much lower than the loss rate of the photoresist and passivation layer, thereby achieving the etching of thicker metal films.

[0013] Step 6: Photoresist removal and polymer removal After etching is completed, the photoresist layer and the polymer residues that may be generated during the etching process need to be removed. This step is usually achieved by chemical cleaning or physical cleaning. Removing photoresist and polymer residues is the key to ensuring the smooth progress of subsequent processes, so it is necessary to ensure the thoroughness and uniformity of cleaning.

[0014] Step 7: Deposit the passivation layer 2 again (Passivation depo) A passivation layer is deposited again to protect the etched metal circuit. During the deposition process, it is necessary to ensure that the thickness of the newly deposited passivation layer is less than the thickness of the PSV remaining in step 5 to meet the subsequent process requirements. At the same time, the adhesion and compatibility between the passivation layer and the metal circuit also need to be considered.

[0015] Step 8: Passivation Photolithography (PSV Photo) The new PSV structure is formed on the new passivation layer using photolithography. The photolithography process in this step is similar to the previous step, and the accuracy and integrity of the pattern must be ensured.

[0016] Step 9: Passivation Etching (PSV Etch) According to the new photolithography pattern, the passivation layer is etched to form the required circuit connection or protection structure. During the etching process, the depth and uniformity of the etching need to be precisely controlled to ensure that the shape and size of the circuit connection or protection structure meet the design requirements.

[0017] Step 10: Photoresist removal Remove any remaining photoresist layer. This step is usually achieved by chemical cleaning, which needs to ensure thoroughness and uniformity. After removing the photoresist, the entire etching process is complete.

[0018] Compared with the prior art, the present invention has the following beneficial effects: First, this method successfully breaks the inherent limitation of photoresist thickness on metal film etching depth, making it possible to achieve high-precision and high-quality etching of thicker metal films while keeping the photoresist thickness and etcher unchanged. This breakthrough has greatly broadened the design and application scope of VDMOS power devices.

[0019] Secondly, through the well-designed process optimization, the present invention significantly reduces the complexity and cost of the production process. Reducing the number of photolithography layers and etching steps not only improves production efficiency and shortens the product launch cycle, but also effectively controls the use of raw materials, reduces unnecessary waste, and thus reduces overall production costs. This efficient and economical production method is of great significance to improving the competitiveness of enterprises.

[0020] Furthermore, the present invention also exhibits significant advantages in terms of environmental protection. By reducing the use of multiple layers of photoresist and the pollutants that may be generated during multiple etching processes, the present invention helps to reduce the burden on the environment, which is in line with the current global advocacy of green manufacturing and sustainable development concepts.

[0021] In addition, the compatibility and flexibility of the equipment of the present invention are also a highlight. The application of the new process can be realized without replacing or upgrading the existing photolithography machine and etching equipment, which greatly reduces the equipment investment cost of the enterprise and also improves the utilization rate of the existing equipment. Moreover, the method can be flexibly adjusted according to the requirements of different metal film thicknesses and circuit patterns, providing strong support for the diversified production of VDMOS products.

[0022] In summary, the thick metal film etching method for VDMOS products proposed in the present invention not only achieves a major breakthrough in terms of technology, but also demonstrates significant advantages in terms of cost control, environmental protection, equipment compatibility and flexibility, opening a new chapter for the manufacture and application of VDMOS power devices, and has far-reaching industry influence and broad market application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the structure after the circuit etching of the present invention is completed.

[0024] Figure 2 This is a schematic diagram of the structure after the circuit etching is completed using the traditional process method. DETAILED DESCRIPTION

[0025] The present invention will be further described in detail below in conjunction with specific examples, but the implementation methods of the present invention include but are not limited to the scope represented by the following examples.

[0026] Comparative example: Normal process flow Step 1 Select 8-inch wafer N (100) substrate Step 2: Deposit a layer of ILD film on the substrate. In this example, the CVD process is selected and the ILD film is USG 2000A+BPSG8000A.

[0027] Step 3: After the ILD film is deposited, the metal layer is prepared. In this example, the metal layer uses the PVD process 5um ALCU (CU content 0.5%) process; Step 4: Perform metal layer lithography, select I-line 36000A PR, lithography machine NIKON i11, and perform corresponding glue coating, exposure, and development operations.

[0028] Step 5: Metal etching, AMAT TCP9600 etcher is used, etching recipe: pressure 12mt / source power 500W / DC POWER 250W / 100sccm CL2 / 70sccm BCL3 / 5sccm N2; ALCU selects PR at 2.5:1, OE is set at 50%, PRloss=5um*(1+0.5) / 2.5=3.0um, PR REMAIN=3.6um-3.0um=6000A, which is less than the safety glue thickness of 7200A, and there is a metal line damage issue; Step6: Perform PR remove + polymer clean on the wafer; select plasma 1000 for PR remove and EKC wet cleaning for polymer clean; Step7 PSV layer deposition, using CVD process USG3000+SIN 7000A; Step8 PSV lithography, complete coating + exposure + development. I-line 3.6um PR, NIKON i11 model is selected.

[0029] Step9 PSV etching: Use lam4520 etcher to complete PSV etching.

[0030] Step 10 PR remove + polymer clean, select plasma 1000 for PR remove and EKC wet cleaning for polymer clean; The above flow is a normal practice in the prior art, and there is an abnormal over-etching of the metalline due to insufficient remaining thickness of the metal etching paste.

[0031] Etched aluminum film thickness = (photoresist thickness × aluminum to PR etching selectivity) / (1 + etching OE) Under the premise that the ratio of photoresist thickness, etched OE and safety resist thickness remains unchanged, the selection ratio of aluminum to PR determines the maximum and minimum etching aluminum thickness. project Numeric Known photoresist thickness (MAX) 36000A Aluminum to PR etching selectivity (known) 2-3 Aluminum etching OE amount (known) 50% Safe glue thickness ratio (known) 20% Aluminum film thickness 38.4K^57.6K

[0032] The above table shows the product parameters after comparative etching method.

[0033] Example: Step 1 Select 8-inch wafer N (100) substrate Step 2: Deposit a layer of ILD film on the substrate. In this example, the CVD process is selected and the ILD film is USG 2000A+BPSG8000A.

[0034] Step 3: After the ILD film is deposited, the metal layer is prepared. In this example, the metal layer uses the PVD process 8um ALCU (CU content 0.5%) process; Step 4: Deposition of PSV1 layer, requiring USG 8200A; Step 5: Perform metal layer lithography using I-line 36000A PR and NIKON i11 lithography machine to perform corresponding glue coating, exposure, and development operations.

[0035] Step 6: Perform PSV1 etching, select lam4520 etcher to complete PSV etching; etching selection ratio USG: PR=3:1, OE setting 30%, PR loss=8200A*(1+0.3) / 3=3553A; PR remain=36000-3553=32447A; Step 7: Metal etching. AMAT TCP9600 etcher is used. Etching recipe: pressure 12mt / source power 500W / DC POWER 250W / 100sccm CL2 / 70sccm BCL3 / 5sccm N2; ALCU selectivity for PR is 2.5:1, OE amount is set to 50%, theoretically PR loss = 8um*(1+0.5) / 2.5=4.8um, which exceeds the remaining glue thickness of 32447A, and then the PSV1 layer on the metal line is etched, USG loss = (80000A*(1+0.5)-332447*2.5) / 7.5=5184A, USGremain=8200-5184=3015A, Step8: Perform PR remove + polymer clean on the wafer; select plasma 1000 for PR remove and EKC wet cleaning for polymer clean; Step 9: PSV2 layer deposition, using CVD process SIN 7000A; Step 10 PSV photolithography, complete coating + exposure + development. I-line 3.6um PR, NIKON i11 model is selected.

[0036] Step 11 PSV etching: Use lam4520 etcher to complete PSV2 etching.

[0037] Step 12 PR remove + polymer clean, select plasma 1000 for PR remove and EKC wet cleaning for polymer clean; The above technical solution can realize the 8um METAL process, and can also increase the target metal thickness by increasing the thickness of PSV1.

[0038] Maximum thickness of etched aluminum film = (remaining thickness of PSV1 after etching × aluminum to PR etching selectivity + (PSV1 thickness - PSV1remain thickness) × aluminum to USG etching selectivity) / (1 + etching OE) Remaining resist thickness after PSV1 etching = photoresist thickness - PSV1 layer thickness / PSV etching USG to PR selectivity ratio According to the above calculation formula, the thickness of the PSV1 layer affects the thickness of the aluminum film etching. In the example, the PSV1 thickness of 8200A can complete the aluminum film etching of 8.0um. project Numeric Photoresist thickness 36000A Aluminum to PR etching selectivity 2-3 Aluminum to USG etching selectivity 5-10 PSV etching USG to PR selectivity ratio 2.5-3.5 Aluminum etching OE amount 50% PSV1 layer etching OE 30% PSV1 layer thickness 8200A PSV1 ET remain thickness 3000A

[0039] The above table shows the product parameters of the etching process of the embodiment.

[0040] It can be seen from the above embodiments that the present invention has the following beneficial effects: First, regarding the limitation of photoresist thickness, the traditional process method is limited by the thickness of the photoresist, resulting in the limitation of the etching thickness of the metal film. However, the method of the present invention achieves the etching of thicker metal films without changing the thickness of the photoresist and the etcher by optimizing the process flow. This greatly expands the application scope of the etching process and meets the urgent market demand for thicker metal film VDMOS power devices.

[0041] Secondly, in terms of the complexity of the process flow, the traditional process method may require multiple layers of photoresist and multiple etching steps, resulting in a complex process and high cost. The method of the present invention reduces the number of photolithography layers and etching steps by streamlining the process flow, thereby reducing production costs, improving production efficiency, and significantly shortening the time to market for products.

[0042] In terms of etching accuracy and uniformity, the traditional process method may be affected by various factors such as photoresist thickness and etcher performance, resulting in unsatisfactory etching results. The method of the present invention uses dry etching technology and PSV structure as a mask to significantly improve the etching accuracy and uniformity, ensure accurate etching of circuit patterns, and thus improve product quality and reliability.

[0043] In addition, from the perspective of material waste and pollution, the multi-layer photoresist and multiple etching steps in the traditional process method may cause material waste and environmental pollution. The method of the present invention effectively reduces material waste and environmental pollution by reducing the number of photolithography layers and etching steps, which conforms to the concept of green manufacturing and is conducive to achieving sustainable development.

[0044] In terms of equipment compatibility, the traditional process method may require a photolithography machine and an etching machine of a specific model or specification, which increases the cost of equipment upgrade and replacement. However, the method of the present invention does not require changing the existing photoresist thickness and etching machine model, has good equipment compatibility, reduces equipment cost, and improves equipment utilization.

[0045] Finally, in terms of flexibility and scalability, the traditional process method is designed for specific metal film thickness and circuit pattern, and has limited flexibility. The method of the present invention has a flexible process flow and can be adjusted according to different metal film thickness and circuit pattern requirements. It is suitable for the production of various types of VDMOS products and has broad application prospects and huge market potential.

[0046] In summary, the thick metal film etching method for VDMOS products of the present invention has significant beneficial effects compared with the traditional process method. It not only breaks through the limitation of photoresist thickness and realizes the precise etching of thicker metal films, but also reduces production costs, improves production efficiency, reduces material waste and environmental pollution, and has good equipment compatibility, flexibility and scalability.

Claims

1. A method for etching a thick metal film of a VDMOS product, characterized in that: The specific steps include: Step 1: Metal Sputtering On the surface of the substrate, a metal film is uniformly deposited by sputtering; Step 2: Deposition of passivation layer Next, a passivation layer is deposited on the surface of the metal film; Step 3: Circuit Lithography forming a desired circuit pattern on the passivation layer using photolithography technology; Step 4: PSV etching According to the pattern of the photoresist, the passivation layer is etched to form a PSV structure; Step 5: Circuit Etching Using dry etching technology, the metal film is etched using the PSV structure as a mask; Step 6: Photoresist removal and polymer removal After etching is completed, the photoresist layer and the polymer residue that may be generated during the etching process need to be removed; Step 7: Deposit the passivation layer again Depositing a passivation layer again to protect the etched metal circuit; Step 8: Passivation Lithography Using photolithography to form a new PSV structure on the new passivation layer; Step 9: Passivation Etching According to the new photolithography pattern, the passivation layer is etched to form the required circuit connection or protection structure; Step 10: Photoresist removal removing any remaining photoresist layer; After removing the photoresist, the entire etching process is completed.

2. The method for etching a thick metal film of a VDMOS product according to claim 1, characterized in that: In step 1, during the sputtering process, the sputtering time and power need to be precisely controlled to ensure that the thickness of the metal film is uniform and meets the design requirements.

3. The method for etching a thick metal film of a VDMOS product according to claim 1, characterized in that: In step three, specifically, first, a layer of photoresist is coated on the passivation layer, and then the circuit pattern is transferred to the photoresist through steps such as exposure and development. The pattern of the photoresist will serve as a mask for subsequent etching.

4. The method for etching a thick metal film of a VDMOS product according to claim 1, characterized in that: In step five, the etching is performed using a dry etching process. During the etching process, the loss rate of the metal film is much lower than the loss rate of the photoresist and the passivation layer.

5. The method for etching a thick metal film of a VDMOS product according to claim 1, characterized in that: In step six, the residue is removed by chemical cleaning or physical cleaning.

6. The method for etching a thick metal film of a VDMOS product according to claim 1, characterized in that: In step seven, during the deposition process, the thickness of the newly deposited passivation layer minus the remaining PSV thickness in step five needs to meet the subsequent process requirements.

7. The method for etching a thick metal film of a VDMOS product according to claim 1, characterized in that: In step ten, it is removed by chemical cleaning.

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