Gain adjustment circuit, method and electronic device

Abstract

The present application discloses a gain adjustment circuit, method, and electronic device, relating to the field of radio frequency. These devices can achieve gain adjustment based on a low-power LNA by reducing the number of LNAs that are on. In the gain adjustment circuit, the first, second, bias, control, and ground terminals of each LNA are respectively connected to the first, second, bias, control, and ground terminals of an LNA module. The LNA module is connected in series with a first inductor, which is then connected to a power supply. The LNA module is connected in series with a third inductor and then to ground. The LNA module and a first impedance matching circuit are connected to a controller. The first impedance matching circuit is connected in parallel with the LNA module. An RF signal passes through the first inductor and the LNA module before being output. The controller adjusts the number of LNAs that are on and the impedance of the first impedance matching circuit based on the signal strength of the input RF signal.

Description

Technical Field

[0001] The present application relates to the field of radio frequency, and in particular to a gain adjustment circuit, method and electronic device. Background Art

[0002] With the development of communications and the Internet of Things (IoT), radio frequency (RF) technology has become an important means of communication. The power consumption of RF technology in communication equipment has been a major concern, with low-noise amplifiers (LNAs) being a major source of power consumption.

[0003] Currently, when a high-power RF signal is input to the LNA, the LNA gain needs to be reduced. However, it is not possible to reduce the LNA gain while ensuring that the matching impedance remains unchanged, resulting in the LNA gain being unadjustable. Summary of the Invention

[0004] The embodiments of the present application provide a gain adjustment circuit, method, and electronic device, which can adjust the gain based on a low-power LNA by reducing the number of conduction phases of the LNA.

[0005] To achieve the purpose, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, a gain adjustment circuit is provided, which includes a low-noise amplifier (LNA) module, a first impedance matching circuit, a first inductor, a second inductor, a third inductor, and a controller; the LNA module includes at least two LNAs, a first end of each LNA in the LNA module is connected to the first end of the LNA module, a second end of each LNA in the LNA module is connected to the second end of the LNA module, a bias end of each LNA in the LNA module is connected to the bias end of the LNA module, a ground end of each LNA in the LNA module is connected to the ground end of the LNA module, and a control end of each LNA in the LNA module is connected to the control end of the LNA module; the first end of the LNA module is connected to the first inductor. The second end of the LNA module is connected to the second end of the second inductor, the ground end of the LNA module is connected to the first end of the third inductor, and the control end of the LNA module is connected to the controller; the second end of the third inductor is grounded; the first end of the first impedance matching circuit is connected to the first end of the LNA module, the second end of the first impedance matching circuit is connected to the second end of the LNA module, and the control end of the first impedance matching circuit is connected to the controller; the first end of the first inductor is used to input a radio frequency signal, the first end of the second inductor is used to input a bias voltage, and the second end of the LNA module is used to output a regulated radio frequency signal; the controller is used to adjust the number of LNAs in the LNA module that are turned on and the impedance of the first impedance matching circuit according to the signal strength of the input radio frequency signal.

[0007] The gain adjustment circuit includes an LNA module consisting of at least two LNAs and a first impedance matching circuit in the LNA module's feedback loop. A controller can determine the required gain based on the signal strength of the input RF signal. Based on the required gain, the controller controls the number of LNAs that are on. The first impedance matching circuit matches the gain corresponding to the number of LNAs that are on, to ensure that after gain adjustment, the gain adjustment circuit still meets the 50-ohm impedance matching requirement. Therefore, by reducing the number of LNAs that are on, gain adjustment can be achieved while maintaining the 50-ohm impedance matching requirement, even with a low-power LNA.

[0008] In one implementation of the first aspect, the LNA module includes a first LNA and a second LNA; and a controller controls the number of LNAs in the LNA module that are turned on based on the signal strength of an input RF signal, including: when the signal strength of the input RF signal is less than or equal to a first signal strength threshold, the controller controls the first LNA and the second LNA to be turned on; when the signal strength of the input RF signal is greater than the first signal strength threshold and less than or equal to a second signal strength threshold, the controller controls either the first LNA or the second LNA to be turned on.

[0009] In this implementation, when the input RF signal strength is less than or equal to a first signal strength threshold, it indicates that the input signal is low and a high gain adjustment is required by the LNA module. Therefore, there is no need to reduce the number of LNAs that are on, and the controller controls the first and second LNAs to be on. When the input RF signal strength is greater than the first signal strength threshold and less than or equal to a second signal strength threshold, it indicates that the input signal is high and a high gain adjustment is no longer required by the LNA module. Therefore, the number of LNAs that are on can be reduced, and the controller controls the first or second LNA to be on. Thus, by reducing the number of LNAs that are on, gain adjustment can be achieved while maintaining a low-power LNA.

[0010] In one implementation of the first aspect, the first impedance matching circuit includes a first switch, a second switch, a first capacitor, a first adjustable capacitor, and a first adjustable resistor; a first end of the first switch is connected to a first end of the LNA module, a second end of the first switch is connected to a first end of the first adjustable capacitor, and a control end of the first switch is connected to a controller; a second end of the first adjustable capacitor is grounded, and the control end of the first adjustable capacitor is connected to the controller; a first end of the second switch is connected to a first end of the LNA module, a second end of the second switch is connected to a first end of the first capacitor, and the control end of the second switch is connected to the controller; a second end of the first capacitor is connected to a first end of the first adjustable resistor; a second end of the first adjustable resistor is connected to a second end of the LNA module, and the control end of the first adjustable resistor is connected to the controller.

[0011] In this implementation, a first impedance matching circuit is formed by connecting a series resistor, a capacitor, and a parallel capacitor in the feedback loop of the LNA module, thereby ensuring that after the gain is adjusted by the LNA module, the gain adjustment circuit can still meet the impedance matching of 50 ohms.

[0012] In an implementation of the first aspect, the controller adjusts the impedance of the first impedance matching circuit according to the signal strength of the input radio frequency signal, including: the controller controls the first switch to close and adjusts the capacitance of the first adjustable capacitor according to the signal strength of the input radio frequency signal; or controls the second switch to close and adjusts the resistance of the first adjustable resistor; or controls the first switch and the second switch to close and adjusts the capacitance of the first adjustable capacitor and the resistance of the first adjustable resistor.

[0013] In this implementation, the controller can adjust the impedance of the first impedance matching circuit by controlling the first switch to close, thereby connecting the first adjustable capacitor of the first branch and adjusting the capacitance of the first adjustable capacitor. Alternatively, the controller can adjust the impedance of the first impedance matching circuit by controlling the second switch to close, thereby connecting the first capacitor and the first adjustable resistor of the second branch and adjusting the resistance of the first adjustable resistor. Alternatively, the controller can adjust the impedance of the first impedance matching circuit by controlling the first switch to close and the second switch to close, thereby connecting the first adjustable capacitor of the first branch and the first capacitor and the first adjustable resistor of the second branch and adjusting the capacitance of the first adjustable capacitor and the resistance of the first adjustable resistor. This achieves impedance matching corresponding to the number of LNA conduction states, ensuring that after gain adjustment, the gain adjustment circuit can still meet 50 ohm impedance matching requirements.

[0014] In one implementation of the first aspect, the gain adjustment circuit further includes a bypass circuit and a second impedance matching circuit; a first end of the second impedance matching circuit is connected to the first end of the first inductor, a second end of the second impedance matching circuit is grounded, and a control end of the second impedance matching circuit is connected to the controller; a first end of the bypass circuit is connected to the first end of the LNA module, a second end of the bypass circuit is connected to the second end of the LNA module, and the control end of the bypass circuit is connected to the controller.

[0015] In this implementation, when the input RF signal strength is high, the LNA is saturated due to the excessive input signal. At this point, the LNA is no longer needed to amplify the RF signal and may even need to attenuate it. Therefore, the LNA module can be disconnected and a bypass circuit added to attenuate the signal. Adjusting the attenuation coefficient through the bypass circuit further saves area and improves linearity at high signal strengths. Furthermore, a second impedance matching circuit can be used to match the impedance corresponding to the bypass circuit's attenuation coefficient, ensuring that even after adjusting the attenuation coefficient through the bypass circuit, the gain adjustment circuit still meets the 50 ohm impedance matching requirement.

[0016] In one implementation of the first aspect, when the signal strength of the input RF signal is greater than a second signal strength threshold, the controller is further configured to: control both the first LNA and the second LNA to be turned off; control both the bypass circuit and the second impedance matching circuit to be turned on; and adjust the attenuation coefficient of the bypass circuit and the impedance of the second impedance matching circuit based on the signal strength of the input RF signal.

[0017] In this implementation, when the signal strength of the input RF signal exceeds the second signal strength threshold, it indicates that the signal strength of the input RF signal is too strong and the LNA is saturated. At this point, amplification of the input RF signal is no longer necessary, and attenuation may even be required. Therefore, the controller disconnects the LNA module and the first impedance matching circuit, connects the bypass circuit and the second impedance matching circuit, and adjusts the attenuation coefficient of the bypass circuit to attenuate the input RF signal. Furthermore, the second impedance matching circuit is capable of matching the impedance corresponding to the attenuation coefficient of the bypass circuit, thereby ensuring that the gain adjustment circuit still meets 50 ohm impedance matching requirements after adjusting the attenuation coefficient.

[0018] In one implementation of the first aspect, the bypass circuit includes a third switch, a fourth switch, and a second adjustable resistor; a first end of the third switch is connected to the first end of the LNA module, a second end of the third switch is connected to the first end of the second adjustable resistor, and a control end of the third switch is connected to a controller; the second end of the second adjustable resistor is grounded, and the control end of the second adjustable resistor is connected to the controller; a first end of the fourth switch is connected to the first end of the LNA module, a second end of the fourth switch is connected to the second end of the LNA module, and the control end of the fourth switch is connected to the controller.

[0019] In this implementation, by connecting a bypass circuit consisting of a third switch, a fourth switch, and a second adjustable resistor in parallel to the LNA module, the input RF signal can be attenuated by adjusting the attenuation coefficient of the bypass circuit when the signal strength of the input RF signal is very high.

[0020] In an implementation of the first aspect, the second impedance matching circuit includes a fifth switch, a third adjustable resistor, and a second adjustable capacitor; the first end of the fifth switch is connected to the first end of the first inductor, the second end of the fifth switch is connected to the first end of the third adjustable resistor, and the control end of the fifth switch is connected to the controller; the second end of the third adjustable resistor is connected to the first end of the second adjustable capacitor, and the control end of the third adjustable resistor is connected to the controller; the second end of the second adjustable capacitor is grounded, and the control end of the second adjustable capacitor is connected to the controller.

[0021] In this implementation, a second impedance matching circuit consisting of a fifth switch, a third adjustable resistor, and a second adjustable capacitor is connected to the first inductor. While the attenuation coefficient is adjusted by the bypass circuit, the second impedance matching circuit matches the impedance corresponding to the attenuation coefficient. This ensures that after adjusting the attenuation coefficient, the gain adjustment circuit can still meet the 50 ohm impedance matching requirement.

[0022] In an implementation manner of the first aspect, the controller controls the bypass circuit and the second impedance matching circuit to be turned on, including: the controller controls the third switch to be closed, the fourth switch to be closed, and the fifth switch to be closed.

[0023] In this implementation, the bypass circuit and the second impedance matching circuit are turned on by controlling the third switch, the fourth switch, and the fifth switch to be closed, which is simple and convenient.

[0024] In an implementation manner of the first aspect, the controller adjusts the attenuation coefficient of the bypass circuit according to the signal strength of the input RF signal, including: the controller adjusts the resistance of the second adjustable resistor according to the signal strength of the input RF signal; the controller adjusts the impedance of the second impedance matching circuit according to the signal strength of the input RF signal, including: the controller adjusts the capacitance of the second adjustable capacitor and the resistance of the third adjustable resistor according to the signal strength of the input RF signal.

[0025] In this implementation, when the third, fourth, and fifth switches are closed, the controller adjusts the attenuation coefficient of the bypass circuit by adjusting the resistance of the second adjustable resistor, thereby attenuating the input RF signal. The impedance of the second impedance matching circuit is adjusted by adjusting the capacitance of the second adjustable capacitor and the resistance of the third adjustable resistor. This ensures that the attenuation coefficient can be adjusted and the corresponding impedance can be matched even when a high-intensity RF signal is input.

[0026] In an implementation manner of the first aspect, the impedance of the first inductor is different from the impedance of the second inductor, and the impedance of the second inductor is the same as the impedance of the third inductor.

[0027] In this implementation, by setting the impedances of the first, second, and third inductors, the gain adjustment circuit can be made symmetrical, thereby enhancing the anti-interference capability of the gain adjustment circuit and improving its linearity and performance. Furthermore, the first and second impedance matching circuits can be used together to adjust the impedance, thereby ensuring that the gain adjustment circuit can still meet 50 ohm impedance matching requirements even after adjusting the attenuation coefficient via the bypass circuit.

[0028] In a second aspect, a gain adjustment method is provided, which is applied to an electronic device. The electronic device includes a noise amplifier (LNA) module, a first impedance matching circuit, a first inductor, a second inductor, a third inductor, and a controller; the controller is configured to execute the gain adjustment method; the LNA module includes at least two LNAs, the first end of each LNA in the LNA module is connected to the first end of the LNA module, the second end of each LNA in the LNA module is connected to the second end of the LNA module, the bias end of each LNA in the LNA module is connected to the bias end of the LNA module, the ground end of each LNA in the LNA module is connected to the ground end of the LNA module, and the control end of each LNA in the LNA module is connected to the control end of the LNA module; the LNA module The first end of the first inductor is connected to the second end of the first inductor, the bias end of the LNA module is connected to the second end of the second inductor, the ground end of the LNA module is connected to the first end of the third inductor, and the control end of the LNA module is connected to a controller; the second end of the third inductor is grounded; the first end of the first impedance matching circuit is connected to the first end of the LNA module, the second end of the first impedance matching circuit is connected to the second end of the LNA module, and the control end of the first impedance matching circuit is connected to the controller; the first end of the first inductor is used to input a radio frequency signal, the first end of the second inductor is used to input a bias voltage, and the second end of the LNA module is used to output a regulated radio frequency signal; the method includes: adjusting the number of LNAs in the LNA module that are turned on and the impedance of the first impedance matching circuit according to the signal strength of the input radio frequency signal.

[0029] In one implementation of the second aspect, the LNA module includes a first LNA and a second LNA. Adjusting the number of LNAs in the LNA module that are turned on based on the signal strength of an input RF signal includes: controlling the first LNA and the second LNA to be turned on when the input signal strength is less than or equal to a first signal strength threshold; and controlling the first LNA or the second LNA to be turned on when the input signal strength is greater than the first signal strength threshold and less than or equal to a second signal strength threshold; the second signal strength threshold is greater than the first signal strength threshold.

[0030] In one implementation of the second aspect, the first impedance matching circuit includes a first switch, a second switch, a first capacitor, a first adjustable capacitor, and a first adjustable resistor; a first end of the first switch is connected to a first end of the LNA module, a second end of the first switch is connected to a first end of the first adjustable capacitor, and a control end of the first switch is connected to a controller; a second end of the first adjustable capacitor is grounded, and the control end of the first adjustable capacitor is connected to the controller; a first end of the second switch is connected to a first end of the LNA module, a second end of the second switch is connected to a first end of the first capacitor, and the control end of the second switch is connected to the controller; a second end of the first capacitor is connected to a first end of the first adjustable resistor; a second end of the first adjustable resistor is connected to a second end of the LNA module, and the control end of the first adjustable resistor is connected to the controller.

[0031] In an implementation of the second aspect, adjusting the impedance of the first impedance matching circuit according to the signal strength of the input RF signal includes: controlling the first switch to close and adjusting the capacitance of the first adjustable capacitor according to the signal strength of the input RF signal; or controlling the second switch to close and adjusting the resistance of the first adjustable resistor; or controlling the first switch and the second switch to close and adjusting the capacitance of the first adjustable capacitor and the resistance of the first adjustable resistor.

[0032] In one implementation of the second aspect, the electronic device further includes a bypass circuit and a second impedance matching circuit; a first end of the second impedance matching circuit is connected to the first end of the first inductor, a second end of the second impedance matching circuit is grounded, and a control end of the second impedance matching circuit is connected to the controller; a first end of the bypass circuit is connected to the first end of the LNA module, a second end of the bypass circuit is connected to the second end of the LNA module, and the control end of the bypass circuit is connected to the controller.

[0033] In one implementation of the second aspect, when the signal strength of the input RF signal is greater than a second signal strength threshold, the method further includes: controlling both the first LNA and the second LNA to be turned off; controlling both the bypass circuit and the second impedance matching circuit to be turned on; and adjusting the attenuation coefficient of the bypass circuit and the impedance of the second impedance matching circuit based on the signal strength of the input RF signal.

[0034] In one implementation of the second aspect, the bypass circuit includes a third switch, a fourth switch, and a second adjustable resistor; a first end of the third switch is connected to the first end of the LNA module, a second end of the third switch is connected to the first end of the second adjustable resistor, and a control end of the third switch is connected to a controller; the second end of the second adjustable resistor is grounded, and the control end of the second adjustable resistor is connected to the controller; a first end of the fourth switch is connected to the first end of the LNA module, a second end of the fourth switch is connected to the second end of the LNA module, and the control end of the fourth switch is connected to the controller.

[0035] In an implementation of the second aspect, the second impedance matching circuit includes a fifth switch, a third adjustable resistor, and a second adjustable capacitor; the first end of the fifth switch is connected to the first end of the first inductor, the second end of the fifth switch is connected to the first end of the third adjustable resistor, and the control end of the fifth switch is connected to the controller; the second end of the third adjustable resistor is connected to the first end of the second adjustable capacitor, and the control end of the third adjustable resistor is connected to the controller; the second end of the second adjustable capacitor is grounded, and the control end of the second adjustable capacitor is connected to the controller.

[0036] In an implementation manner of the second aspect, controlling the bypass circuit and the second impedance matching circuit to be turned on includes: controlling the third switch to be closed, the fourth switch to be closed, and the fifth switch to be closed.

[0037] In one implementation of the second aspect, adjusting the attenuation coefficient of the bypass circuit according to the signal strength of the input RF signal includes: adjusting the resistance of the second adjustable resistor according to the signal strength of the input RF signal; adjusting the impedance of the second impedance matching circuit according to the signal strength of the input RF signal includes: adjusting the capacitance of the second adjustable capacitor and the resistance of the third adjustable resistor according to the signal strength of the input RF signal.

[0038] In an implementation manner of the second aspect, the impedance of the first inductor is different from the impedance of the second inductor, and the impedance of the second inductor is the same as the impedance of the third inductor.

[0039] In a third aspect, an electronic device is provided, comprising the gain adjustment circuit according to the first aspect and any embodiment thereof, wherein the gain adjustment circuit is used to adjust the amplitude of a radio frequency signal input to the electronic device.

[0040] In a fourth aspect, an electronic device is provided, comprising a memory and a controller, wherein the memory stores computer program code, and the computer program code comprises computer instructions. When the computer instructions are executed by the controller, the electronic device executes the gain adjustment method of the second aspect and any embodiment thereof.

[0041] In a fifth aspect, a computer-readable storage medium is provided, comprising computer instructions. When the computer instructions are executed on an electronic device, the electronic device executes the gain adjustment method of the second aspect and any embodiment thereof.

[0042] In a sixth aspect, a computer program product is provided. When the computer program product is run on an electronic device, the electronic device executes the gain adjustment method of the second aspect and any embodiment thereof.

[0043] Among them, the technical effects brought about by the design methods of the second, third, fourth, fifth and sixth aspects can refer to the technical effects brought about by the different design methods in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 A schematic diagram of a possible hardware structure of an electronic device provided in an embodiment of the present application;

[0045] Figure 2 A schematic diagram of a possible software structure of an electronic device provided in an embodiment of the present application;

[0046] Figure 3 A schematic diagram of the circuit structure of an LNA provided for related technology;

[0047] Figure 4 A schematic diagram of the circuit structure of another LNA provided in the related art;

[0048] Figure 5 A schematic diagram of the structure of a gain adjustment circuit provided in an embodiment of the present application;

[0049] Figure 6 A schematic structural diagram of a gain adjustment circuit including a switch tube provided in an embodiment of the present application;

[0050] Figure 7 A schematic diagram of a structure of a gain adjustment circuit of two LNAs provided in an embodiment of the present application;

[0051] Figure 8 A schematic diagram of a structure of a gain adjustment circuit of three LNAs provided in an embodiment of the present application;

[0052] Figure 9 A schematic diagram of a structure of a gain adjustment circuit of four LNAs provided in an embodiment of the present application;

[0053] Figure 10 A schematic structural diagram of a gain adjustment circuit including a specific circuit structure of a first impedance matching circuit provided in an embodiment of the present application;

[0054] Figure 11 A schematic structural diagram of a gain adjustment circuit including an equivalent impedance circuit when both an LNA module and a first impedance matching circuit are disconnected, provided in an embodiment of the present application;

[0055] Figure 12 A schematic structural diagram of a gain adjustment circuit including a bypass circuit and a second impedance matching circuit provided in an embodiment of the present application;

[0056] Figure 13 A schematic structural diagram of a gain adjustment circuit including an equivalent impedance circuit, a bypass circuit, and a second impedance matching circuit provided in an embodiment of the present application;

[0057] Figure 14 A schematic diagram of a gain adjustment circuit including a specific circuit structure of a bypass circuit provided in an embodiment of the present application;

[0058] Figure 15 A schematic diagram of a gain adjustment circuit including a bypass circuit and a second impedance matching circuit according to an embodiment of the present application;

[0059] Figure 16 A flow chart of a gain adjustment method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0060] The following describes the technical solutions in the embodiments of the present application in conjunction with the accompanying drawings. In the description of this application, unless otherwise specified, " / " indicates that the objects associated with each other are in an "or" relationship. For example, A / B can mean A or B. "And / or" in this application is simply a description of the association relationship between associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: A alone, A and B together, or B alone. A and B can be singular or plural. Furthermore, in the description of this application, unless otherwise specified, "multiple" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, "at least one of a, b, or c" can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or plural. In addition, in order to facilitate the clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish between identical or similar items with substantially the same functions and effects. Those skilled in the art will understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit differences. At the same time, in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or design. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete way for ease of understanding. The terms "coupling" and "connection" involved in the embodiments of the present application should be understood in a broad sense. For example, they can refer to a physical direct connection or an indirect connection achieved through an electronic device, such as a connection achieved through a resistor, inductor, capacitor or other electronic device.

[0061] A low-noise amplifier (LNA) is an electronic device used to amplify weak signals. It is used in communications, radar, satellite reception, and radio astronomy. Its main feature is its ability to amplify signals while introducing minimal noise.

[0062] The resistive feedback cascode LNA (Rf-LNA) is a common LNA structure that combines the high gain of the cascode with the stability and linearity of the resistive feedback, achieving low noise, high gain, and wide bandwidth performance.

[0063] The current-reuse inductive degeneration cascade LNA (CRID-LNA) is a high-performance, low-power amplifier structure that combines the input matching and noise optimization of inductive degeneration, the high gain and wide bandwidth of cascode, and the low power consumption of current reuse to achieve low noise, high gain, and low power consumption.

[0064] An embodiment of the present application provides an electronic device having a display function. The electronic device can be mobile or fixed. The electronic device can be deployed on land (e.g., indoors or outdoors, handheld or vehicle-mounted), on water (e.g., on ships), or in the air (e.g., on airplanes, balloons, and satellites). The electronic device can be referred to as user equipment (UE), access terminal, terminal unit, subscriber unit, terminal station, mobile station (MS), mobile station, terminal agent, or terminal device. For example, the electronic device can be a mobile phone, tablet computer, laptop computer, smart bracelet, smart screen, smart watch, virtual reality (VR) device, augmented reality (AR) device, terminal in industrial control, terminal in self-driving, terminal in remote medical care, terminal in smart grid, terminal in transportation safety, terminal in smart city, terminal in smart home, etc. The embodiments of the present application do not limit the specific type and structure of the electronic device. A possible structure of the electronic device is described below.

[0065] Take the mobile phone as an example, Figure 1FIG. 1 shows a possible structure of an electronic device 100. The electronic device 100 may include a processor 210, an external memory interface 220, an internal memory 221, a universal serial bus (USB) interface 230, a power management module 240, a battery 241, a wireless charging coil 242, a mobile communication module 250, a wireless communication module 260, a gain adjustment circuit 1, a controller 3, an antenna 251, an antenna 261, an audio module 270, a speaker 270A, a receiver 270B, a microphone 270C, an earphone interface 270D, a sensor module 280, a button 290, a motor 291, an indicator 292, a camera 293, a display 294, and a subscriber identification module (SIM) card interface 295. Optionally, in some embodiments, an audio digital signal processor (ADSP) 243 is also included.

[0066] It should be understood that the structures illustrated in the embodiments of the present application do not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0067] The processor 210 may include one or more processing units, such as a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processing unit (CPU), an application processor (AP), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, and a neural network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors. For example, the processor 210 may be an application processor (AP). Alternatively, the processor 210 may be integrated into a system on chip (SoC). Alternatively, the processor 210 may be integrated into an integrated circuit (IC) chip. The processor 210 may include an analog front end (AFE) and a micro-controller unit (MCU) in an IC chip.

[0068] Processor 210 may also include a memory for storing computer instructions and data. In some embodiments, the memory in processor 210 is a cache memory. This memory can store computer instructions or data that have just been used or are being recycled by processor 210. If processor 210 needs to use the computer instructions or data again, it can directly access the memory. This avoids repeated accesses, reduces processor 210 latency, and thus improves system efficiency.

[0069] In some embodiments, the processor 210 may include one or more interfaces, including an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a USB interface.

[0070] In some embodiments, the processor may be a processor or controller, such as a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic device, transistor logic device, hardware component, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. The aforementioned processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0071] The ADSP 243 can be coupled to the audio module 270 and the sensor module 280. The ADSP 243 can be used to process audio signals and sensor data. When the processor 210 is in a dormant state, the ADSP 243 can still keep working, thereby reducing the power consumption of the electronic device 100.

[0072] It is understood that the interface connection relationship between the modules illustrated in the embodiment of the present application is merely an illustrative illustration and does not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods from those in the embodiment, or a combination of multiple interface connection methods.

[0073] The external memory interface 220 can be used to connect an external memory card to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 210 through the external memory interface 220 to implement data storage functions. For example, files such as music and videos can be stored in the external memory card.

[0074] The internal memory 221 can be used to store computer-executable program code, which includes computer instructions. The processor 210 executes the computer instructions stored in the internal memory 221 to perform various functional applications and data processing of the electronic device 100. In addition, the internal memory 221 can include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0075] The controller 3 can also execute various functional applications and data processing of the electronic device 100 by running computer instructions stored in the internal memory 221. In addition, the internal memory 221 may include a high-speed random access memory and a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0076] In the embodiment of the present application, when the computer instruction is executed by the controller 3, the electronic device 100 executes the gain adjustment method in the embodiment of the present application.

[0077] The memory involved in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. The non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0078] The electronic device 100 can implement audio functions such as music playback and recording through the audio module 270, the speaker 270A, the receiver 270B, the microphone 270C, the headphone jack 270D, and the application processor.

[0079] Keys 290 include a power button, volume button, and other buttons. Keys 290 can be mechanical or touch-sensitive. Electronic device 100 can receive key inputs and generate key signal inputs related to user settings and function control of electronic device 100. Motor 291 can generate vibration alerts. Motor 291 can be used for incoming call vibration alerts or for touch vibration feedback. Indicator 292 can be an indicator light that can indicate charging status, battery level changes, messages, missed calls, notifications, and the like. SIM card interface 295 is used to connect a SIM card. A SIM card can be connected to and disconnected from electronic device 100 by inserting or removing it from SIM card interface 295. Electronic device 100 can support one or N SIM card interfaces, where N is a positive integer greater than one. SIM card interface 295 can support nano SIM cards, micro SIM cards, and SIM cards. In some embodiments, the electronic device 100 uses an embedded SIM (eSIM) card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0080] The electronic device 100 can implement a camera function using an ISP, a camera 293, a video codec, a GPU, a display 294, and an application processor. The ISP is used to process data fed back by the camera 293. In some embodiments, the ISP can be provided within the camera 293. The camera 293 is used to capture still images or videos. In some embodiments, the electronic device 100 can include one or N cameras 293, where N is a positive integer greater than one.

[0081] Electronic device 100 can implement display functions through a GPU, display screen 294, and an application processor. A GPU is a microprocessor for image processing that connects display screen 294 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 210 may include one or more GPUs that execute computer instructions to generate or modify display information.

[0082] The power management module 240 is configured to receive charging input from a charger. The charger may be a wireless charger, such as a wireless charging dock or another electronic device 100 with reverse wireless charging functionality. The power management module 240 may receive wireless charging input via the electronic device's wireless charging coil 242. Alternatively, the charger may be a wired charger, for example, via the USB port 230. The power management module 240 is also referred to as a charging chip.

[0083] The power management module 240 is connected to the battery 241. The power management module 240 receives input from the battery 241 and provides power to the processor 210, internal memory 221, display 294, camera 293, and wireless communication module 260. The power management module 240 can also monitor parameters such as the battery 241 capacity, battery 241 cycle count, and battery 241 health status (leakage, impedance). In other embodiments, the power management module 240 can also be provided within the processor 210.

[0084] The wireless communication function of the electronic device 100 can be implemented through the antenna 251, the antenna 261, the mobile communication module 250, the wireless communication module 260, the modem processor, etc.

[0085] In an embodiment of the present application, the wireless communication function of the electronic device 100 is realized through the antenna 251, antenna 261, mobile communication module 250, wireless communication module 260, modulation and demodulation processor, etc. after the gain is adjusted by the controller 3 of the gain adjustment circuit 1 in the radio frequency module.

[0086] The mobile communication module 250 can provide solutions for wireless communications such as 2G / 3G / 4G / 5G for the electronic device 100. The wireless communication module 260 can provide solutions for wireless communications such as wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite systems (GNSS), frequency modulation (FM), near field communication (NFC), and infrared (IR) for the electronic device 100.

[0087] As attached Figure 2 As shown, taking the electronic device 100 running the Android operating system as an example, the software architecture run by the processor 210 includes an application layer, a framework layer, a system runtime layer, a hardware abstraction layer (HAL) and a kernel layer.

[0088] The kernel layer is the layer between hardware and software. For example, it includes the display driver, camera driver, and gain adjustment driver. The display driver drives the display to display images or receive user touch operations, the camera driver drives the camera to capture image data, and the gain adjustment driver drives the gain adjustment circuit.

[0089] In the embodiment of the present application, the gain adjustment driver is used to drive the gain adjustment circuit 1 to output an adjusted radio frequency signal.

[0090] The HAL layer abstracts the hardware. It hides the platform-specific hardware interface details and provides the operating system with a virtual hardware platform, ensuring hardware independence. For example, the HAL layer includes the display module, camera module, and gain adjustment module. The display module creates a virtual display screen, the camera module creates a virtual camera, and the gain adjustment module creates a virtual gain adjustment circuit.

[0091] The system runtime layer includes C / C++ libraries and runtime libraries. Many core components and services of the Android operating system are built from native code and require C / C++ libraries written in C and C++. When an application is first installed, the runtime library is precompiled into machine code, a process called pre-compilation. This allows for acceleration when the application is launched and executed by running the machine code.

[0092] The framework layer provides application programming interfaces (APIs) and a programming framework for applications in the application layer. The framework layer includes predefined implementation methods. For example, the framework layer includes the window manager, content provider, view system, and notification manager.

[0093] The application layer can include a series of application packages, such as photo, camera, Bluetooth and other applications (application, app).

[0094] With the development of communications and the Internet of Things (IoT), radio frequency (RF) technology has become a key technology in communications. However, the power consumption of RF technology in communications equipment has been a major concern, with low-noise amplifiers (LNAs) being a major source of power consumption.

[0095] Currently, LNA generally adopts Rf-LNA due to area requirements. Figure 3As shown, in the RF-LNA, the input signal is amplified by the switch M2, providing the primary voltage gain. Specifically, the RF signal is connected to the first terminal of the first inductor Lg via the input terminal. The second terminal of the first inductor Lg is connected to the gate of the switch M2, and the source of the switch M2 is grounded. The switch M1 is located above the switch M2, increasing the output impedance and isolating the input and output, thereby enhancing the circuit's frequency response and stability. Specifically, the source of the switch M1 is connected to the drain of the switch M2, the gate of the switch M1 serves as the control terminal, and the drain of the switch M1 is connected to the output. The drain of the switch M1 receives a bias voltage (e.g., power supply Vdd) via the second inductor Ls1. A resistive feedback network (feedback resistor Rf in series with isolation capacitor C) is added between the source of the switch M2 and the output node to reduce gain and improve linearity and stability. Specifically, the second end of feedback resistor Rf is connected to the drain of switch M1, the first end of feedback resistor Rf is connected to the second end of isolation capacitor C, and the first end of isolation capacitor C is connected to the second end of first inductor Lg. This Rf-LNA can achieve low noise, high gain, and wide bandwidth performance, but it also brings the problem of high power consumption.

[0096] For example, as shown in the attached Figure 3 As shown, the LNA of the Rf-LNA circuit can be simplified to obtain an equivalent circuit diagram. Specifically, the input RF signal is connected to the first terminal of LNA 2 through the first inductor Lg. The second terminal of LNA 2 is used to output the amplified RF signal. The bias terminal of LNA 2 inputs the bias voltage through the second inductor Ls1. The ground terminal of LNA 2 is grounded. The control terminal of LNA 2 is connected to the controller 3. The input impedance of the Rf-LNA is .

[0097] Theoretically, CRID-LNA has the advantage of low power consumption compared to Rf-LNA. Figure 4As shown, in the CRID-LNA, the input signal is amplified by the switch M2. Specifically, the RF signal is connected to the first end of the first inductor Lg via the input terminal. The second end of the first inductor Lg is connected to the first end of the isolation capacitor C, and the second end of the isolation capacitor C is connected to the gate of the switch M2. The switch M1 is located above the switch M2 and further amplifies the input RF signal. Specifically, the source of the switch M1 is connected to the drain of the switch M2. The gate of the switch M1 serves as the control terminal, and the drain of the switch M1 is connected to the output. The drain of the switch M1 receives a bias voltage (e.g., power supply Vdd) via the second inductor Ls1. The source of the switch M2 is connected to the third inductor Ls2 (i.e., the source inductor) for inductor degeneration. Specifically, the source of the switch M2 is connected to the first end of the third inductor Ls2, and the second end of the third inductor Ls2 is grounded. The switches M1 and M2 share the bias current, thereby reducing overall power consumption. This CRID-LNA combines the input matching and noise optimization of inductive degeneration, the high gain and wide bandwidth of cascode, and the low power consumption of current multiplexing to achieve low noise, high gain, and low power consumption. Therefore, communication equipment often chooses the low-power CRID-LNA circuit.

[0098] For example, as shown in the attached Figure 4 As shown, the LNA of the CRID-LNA circuit can be simplified to obtain an equivalent circuit diagram. Specifically, the input RF signal is connected to the first terminal of LNA 2 through the first inductor Lg. The second terminal of LNA 2 is used to output the amplified RF signal. The bias terminal of LNA 2 inputs the bias voltage through the second inductor Ls1. The ground terminal of LNA 2 is grounded through the third inductor Ls2. The control terminal of LNA 2 is connected to the controller 3. The input impedance of the CRID-LNA circuit is .

[0099] In the related art, when a high-power RF signal is input, the gain of LNA 2 needs to be reduced. However, it is not possible to reduce the gain of LNA 2 while ensuring that the matching impedance remains unchanged, resulting in the gain of LNA 2 being unadjustable.

[0100] To this end, embodiments of the present application provide a gain adjustment circuit capable of adjusting the number of LNAs in an LNA module comprising at least two LNAs that are conducting, and adjusting the impedance of a first impedance matching circuit connected in parallel with the LNA module, based on the signal strength of an input RF signal. Therefore, the gain adjustment circuit provided in embodiments of the present application can achieve gain adjustment while maintaining a low-power LNA by reducing the number of LNAs that are conducting.

[0101] The gain adjustment circuit provided in the embodiment of the present application can be as shown in the attached Figure 1The gain adjustment circuit 1 in the radio frequency module of the electronic device 100 shown in FIG. Figure 1 The controller 3 in the gain adjustment circuit 1 in the radio frequency module in the electronic device 100 is shown. In the embodiment of the present application, the electronic device 100 including the gain adjustment circuit 1 is taken as an example to specifically describe the gain adjustment circuit 1 of the present application.

[0102] For example, as shown in the attached Figure 5 As shown, the gain adjustment circuit 1 includes an LNA module 4, a first impedance matching circuit 5, a first inductor Lg, a second inductor Ls1, a third inductor Ls2, and a controller 3. The LNA module 4 includes at least two LNAs 2. The first end of each LNA 2 in the LNA module 4 is connected to the first end of the LNA module 4, the second end of each LNA 2 in the LNA module 4 is connected to the second end of the LNA module 4, the bias end of each LNA 2 in the LNA module 4 is connected to the bias end of the LNA module 4, the ground end of each LNA 2 in the LNA module 4 is connected to the ground end of the LNA module 4, and the control end of each LNA 2 in the LNA module 4 is connected to the control end of the LNA module 4. The first end of LNA module 4 is connected to the second end of first inductor Lg, the bias end of LNA module 4 is connected to the second end of second inductor Ls1, the ground end of LNA module 4 is connected to the first end of third inductor Ls2, and the control end of LNA module 4 is connected to controller 3. The second end of third inductor Ls2 is grounded. The first end of first impedance matching circuit 5 is connected to the first end of LNA module 4, the second end of first impedance matching circuit 5 is connected to the second end of LNA module 4, and the control end of first impedance matching circuit 5 is connected to controller 3. The first end of first inductor Lg is used to input an RF signal, the first end of second inductor Ls1 is used to input a bias voltage, and the second end of LNA module 4 is used to output a regulated RF signal. Controller 3 is used to adjust the number of LNAs 2 in LNA module 4 that are turned on and the impedance of first impedance matching circuit 5 based on the signal strength of the input RF signal.

[0103] In a possible implementation, the inductance values ​​of the first inductor Lg, the second inductor Ls1, and the third inductor Ls2 may be the same or different. The embodiment of the present application does not limit the inductance values ​​of the first inductor Lg, the second inductor Ls1, and the third inductor Ls2.

[0104] In the embodiment of the present application, in a possible implementation, the impedance of the first inductor Lg is different from the impedance of the second inductor Ls1 , and the impedance of the second inductor Ls1 is the same as the impedance of the third inductor Ls2 .

[0105] For example, as shown in the attached Figure 3 -Attached Figure 4As shown, LNA 2 includes two switching transistors. In a possible implementation, the switching transistors may be MOSFET transistors or IGBT transistors. The embodiment of the present application does not limit the type of the switching transistors.

[0106] As attached Figure 5 The working principle of the gain adjustment circuit 1 in the embodiment of the present application is as follows:

[0107] At least two LNAs 2 are connected in parallel to form an LNA module 4. The first end of the LNA module 4 is connected to the second end of the first inductor Lg for impedance matching in conjunction with the first impedance matching circuit 5. The bias end of the LNA module 4 is connected to the second end of the second inductor Ls1, whose first end is used to input a bias voltage. The ground end of the LNA module 4 is connected to the first end of the third inductor Ls2, whose second end is grounded. The third inductor Ls2 introduces a real impedance to match the input impedance and inductor degeneration, thereby improving the linearity and noise performance of the gain adjustment circuit 1. The control end of the LNA module 4 is connected to the controller 3. Specifically, the controller 3 is connected to the control end of each LNA 2 to control the on / off state of each LNA 2. The control end of the first impedance matching circuit 5 is connected to the controller 3. Specifically, the controller 3 controls the opening and closing of switches in the first impedance matching circuit 5 to adjust the impedance of the first impedance matching circuit 5. Specifically, controller 3 is configured to adjust the number of LNAs 2 in LNA module 4 that are on and the impedance of first impedance matching circuit 5 based on the signal strength of the input RF signal. This gain adjustment circuit 1, based on a low-power CRID-LNA circuit structure, incorporates LNA module 4. This allows adjustment of the number of LNAs 2 that are on based on the desired gain, and matches different impedances to the gains corresponding to different LNA 2 on-times. This ensures that after gain adjustment, gain adjustment circuit 1 still meets the 50-ohm impedance matching requirement. Therefore, by reducing the number of LNAs 2 that are on, gain adjustment can be achieved based on the low-power LNA 2 while maintaining impedance matching.

[0108] In one possible implementation, LNA 2 may include the following: Figure 3 -Attached Figure 4 The one cascode structure shown may also include multiple cascode structures, for example, 2, 3, or 4. The embodiment of the present application does not limit the number of cascode structures in the LNA 2.

[0109] In a possible implementation, the multiple cascode structures may be symmetrical or asymmetrical, and the embodiment of the present application does not limit the connection method of the cascode structures.

[0110] In the embodiment of the present application, the LNA 2 including two symmetrical cascode structures is taken as an example to specifically illustrate the equivalent circuit of the gain adjustment circuit 1 of the present application.

[0111] For example, as shown in the attached Figure 6 As shown, the LNA module 4 includes n LNAs 2, where n is a positive integer and n>=2. Each LNA 2 includes two symmetrical cascode structures, specifically four switches and two capacitors. The four switches are switch Mn1, switch Mn2, switch Mn3, and switch Mn4. The two capacitors are a first isolation capacitor C1 and a second isolation capacitor C2. Switches Mn1 and Mn2 are n-type, while switches Mn3 and Mn4 are p-type. Switches Mn1 and Mn4 have identical parameters except for their channel parameters. Switches Mn2 and Mn3 have identical parameters except for their channel parameters. The first isolation capacitor C1 and the second isolation capacitor C2 have identical parameters. The gate of the switching transistor Mn1 is connected to the second end of the first isolation capacitor C1, the source of the switching transistor Mn1 is connected to the second end of the second inductor Ls1, and the drain of the switching transistor Mn1 is connected to the source of the switching transistor Mn2. A bias voltage is input to the first end of the second inductor Ls1. The gate of the switching transistor Mn2 is connected to the controller 3, and the drain of the switching transistor Mn2 is connected to the drain of the switching transistor Mn3. The gate of the switching transistor Mn3 is connected to the controller 3, and the source of the switching transistor Mn3 is connected to the drain of the switching transistor Mn4. The gate of the switching transistor Mn4 is connected to the second end of the second isolation capacitor C2, and the source of the switching transistor Mn4 is connected to the first end of the third inductor Ls2. The second end of the third inductor Ls2 is grounded. The first ends of the first isolation capacitor C1 and the second isolation capacitor C2 are both connected to the second end of the first inductor Lg. The drains of the switching transistors Mn2 and Mn3 are both used to output the regulated RF signal. The connection relationship between the first inductor Lg, the first impedance matching circuit 5, and the controller 3 is the same as that in the attached Figure 4 -Attached Figure 5 The connection method is the same as in , so I will not repeat it here.

[0112] When n=1, the four switches are M11, M12, M13, and M14. When n=2, they are M21, M22, M23, and M24. When n=3, they are M31, M32, M33, and M34. When n=4, they are M41, M42, M43, and M44. Similarly, the connection method for the four switches in each LNA 2 is the same as the connection method for switches Mn1, Mn2, Mn3, and Mn4 described above. The sources of the switches Mn1 in each LNA 2 are interconnected, the gates of the switches Mn1 are interconnected, the drains of the switches Mn2 are interconnected, the gates of the switches Mn2 are interconnected, the gates of the switches Mn3 are interconnected, the gates of the switches Mn4 are interconnected, and the sources of the switches Mn4 are interconnected, thereby forming an LNA module 4. For example, when n=2, the sources of the switches M11 and M21 are interconnected, the gates of the switches M11 and M21 are interconnected, the drains of the switches M12 and M22 are interconnected, the gates of the switches M12 and M22 are interconnected, the gates of the switches M13 and M23 are interconnected, the gates of the switches M14 and M24 are interconnected, and the sources of the switches M14 and M24 are interconnected, thereby forming an LNA module 4.

[0113] As attached Figure 6 The working principle of the gain adjustment circuit 1 in the embodiment of the present application is as follows:

[0114] The gates of the switch transistors Mn2 and Mn3 in each LNA 2 are connected to the controller 3. That is, the controller 3 controls the on / off state of each LNA 2 by controlling the closing or opening of the four switch transistors in each LNA 2, thereby adjusting the number of LNA 2 conduction states according to the required gain. Therefore, by reducing the number of LNA 2 conduction states, the gain can be adjusted based on the low power consumption of the LNA 2. The principle of the controller 3 adjusting the first impedance matching circuit 5 is similar to that described in the accompanying FIG. Figure 4 The principle is the same as in , so I will not repeat it here.

[0115] In the embodiment of the present application, the Figure 6 Compared with the LNA 2 with two mutually symmetrical common source and common gate structures shown in the attached Figure 4 The gain of the LNA 2 with a cascode structure is shown in the attached figure. Figure 4 The LNA 2 has a cascode structure with a gain of twice the power of the LNA 2 shown, thereby increasing the gain range and making the gain adjustment range larger.

[0116] In a possible implementation, the number of LNAs 2 in the LNA module 4 may be 2, 3, or 4. The embodiment of the present application does not limit the number of LNAs 2 in the LNA module 4.

[0117] In a possible implementation, the model of each LNA 2 in the LNA module 4 may be the same or different. The embodiment of the present application does not limit the model of each LNA 2 in the LNA module 4.

[0118] In the embodiment of the present application, when the number of LNAs 2 in the LNA module 4 is 2, for example, as shown in the attached Figure 7 As shown, the LNA module 4 includes a first LNA 41 and a second LNA 42. The first ends of the first LNA 41 and the second LNA 42 are both connected to the first end of the LNA module 4, the second ends of the first LNA 41 and the second LNA 42 are both connected to the second end of the LNA module 4, the bias ends of the first LNA 41 and the second LNA 42 are both connected to the bias end of the LNA module 4, the ground ends of the first LNA 41 and the second LNA 42 are both connected to the ground end of the LNA module 4, and the control ends of the first LNA 41 and the second LNA 42 are both connected to the control end of the LNA module 4.

[0119] Similarly, in the embodiment of the present application, when the number of LNAs 2 in the LNA module 4 is 3, for example, as shown in the attached Figure 8 As shown, the LNA module 4 includes a first LNA 41, a second LNA 42, and a third LNA 43. The first ends of the first LNA 41, the second LNA 42, and the third LNA 43 are all connected to the first end of the LNA module 4, the second ends of the first LNA 41, the second LNA 42, and the third LNA 43 are all connected to the second end of the LNA module 4, the bias ends of the first LNA 41, the second LNA 42, and the third LNA 43 are all connected to the bias end of the LNA module 4, the ground ends of the first LNA 41, the second LNA 42, and the third LNA 43 are all connected to the ground end of the LNA module 4, and the control ends of the first LNA 41, the second LNA 42, and the third LNA 43 are all connected to the control end of the LNA module 4.

[0120] Similarly, in the embodiment of the present application, when the number of LNAs 2 in the LNA module 4 is 4, for example, as shown in the attached Figure 9As shown, the LNA module 4 includes a first LNA 41, a second LNA 42, a third LNA 43, and a fourth LNA 44. The first ends of the first LNA 41, the second LNA 42, the third LNA 43, and the fourth LNA 44 are all connected to the first end of the LNA module 4, the second ends of the first LNA 41, the second LNA 42, the third LNA 43, and the fourth LNA 44 are all connected to the second end of the LNA module 4, the bias ends of the first LNA 41, the second LNA 42, the third LNA 43, and the fourth LNA 44 are all connected to the bias end of the LNA module 4, the ground ends of the first LNA 41, the second LNA 42, the third LNA 43, and the fourth LNA 44 are all connected to the ground end of the LNA module 4, and the control ends of the first LNA 41, the second LNA 42, the third LNA 43, and the fourth LNA 44 are all connected to the control end of the LNA module 4.

[0121] In the embodiment of the present application, when the number of LNAs 2 in the LNA module 4 is greater than 4, the connection method is similar to that when the number is 2, 3, or 4, and will not be repeated here.

[0122] For example, as shown in the attached Figure 10 As shown, in one possible implementation, the first impedance matching circuit 5 includes a first switch S1, a second switch S2, a first capacitor C21, a first adjustable capacitor C11, and a first adjustable resistor R1. A first end of the first switch S1 is connected to a first end of the LNA module 4, a second end of the first switch S1 is connected to a first end of the first adjustable capacitor C11, and a control end of the first switch S1 is connected to a controller 3. A second end of the first adjustable capacitor C11 is grounded, and a control end of the first adjustable capacitor C11 is connected to the controller 3. A first end of the second switch S2 is connected to a first end of the LNA module 4, a second end of the second switch S2 is connected to a first end of the first capacitor C21, and a control end of the second switch S2 is connected to the controller 3. A second end of the first capacitor C21 is connected to a first end of the first adjustable resistor R1. A second end of the first adjustable resistor R1 is connected to a second end of the LNA module 4, and a control end of the first adjustable resistor R1 is connected to the controller 3.

[0123] In a possible implementation, the first switch S1 and the second switch S2 may be MOSFETs or IGBTs. The embodiment of the present application does not limit the types of the first switch S1 and the second switch S2.

[0124] As attached Figure 10 The working principle of the first impedance matching circuit 5 in the embodiment of the present application is as follows:

[0125] The first impedance matching circuit 5 includes two branches: a first branch and a second branch. The first branch and the second branch are independent. The first branch includes a first switch S1 and a first adjustable capacitor C11. The first end of the first branch is connected to the first end of the LNA module 4, and the second end is grounded. Specifically, the first end of the first switch S1 is the first end of the first branch, and the second end of the first adjustable capacitor C11 is the second end of the first branch. The second end of the first switch S1 is connected to the first end of the first adjustable capacitor C11, i.e., connected in series. The control ends of the first switch S1 and the first adjustable capacitor C11 are connected to the controller 3. The controller 3 can independently adjust the impedance of the first impedance matching circuit 5 by controlling the closing of the first switch S1 and adjusting the capacitance of the first adjustable capacitor C11. The second branch includes a second switch S2, a first capacitor C21, and a first adjustable resistor R1. The first end of the second branch is connected to the first end of the LNA module 4, and the second end is connected to the second end of the LNA module 4. Specifically, the first end of the second switch S2 serves as the first end of the first branch, and the second end of the first adjustable resistor R1 serves as the second end of the first branch. The second end of the second switch S2 is connected to the first end of the first capacitor C21, i.e., connected in series. The second end of the first capacitor C21 is connected to the first end of the first adjustable resistor R1, i.e., connected in series. In other words, the second switch S2, the first capacitor C21, and the first adjustable resistor R1 are connected in series. The control ends of the second switch S2 and the first adjustable resistor R1 are connected to the controller 3. The controller 3 adjusts the impedance of the series connection of the first capacitor C21 and the first adjustable resistor R1 by controlling the closing of the second switch S2 and adjusting the resistance of the first adjustable resistor R1, thereby independently adjusting the impedance of the first impedance matching circuit 5. The controller 3 adjusts the impedance of the first impedance matching circuit 5 by controlling the closing of the first switch S1 and adjusting the capacitance of the first adjustable capacitor C11, and the closing of the second switch S2 and adjusting the resistance of the first adjustable resistor R1, thereby matching the impedance corresponding to the number of conduction states of the LNA 2. For example, when one LNA 2 is turned on, the corresponding matched impedance is the first impedance. When two LNAs 2 are turned on, the corresponding matched impedance is the second impedance. Similarly, depending on the number of LNAs 2 turned on, the impedance matched by the first impedance matching circuit 5 will be different. This ensures that after gain adjustment, the gain adjustment circuit 1 can still meet the 50 ohm impedance matching requirement.

[0126] Specifically, in one possible implementation, the controller 3 adjusts the impedance of the first impedance matching circuit 5, including: controlling the first switch S1 to close, adjusting the capacitance of the first adjustable capacitor C11; or; controlling the second switch S2 to close, adjusting the resistance of the first adjustable resistor R1; or; controlling the first switch S1 and the second switch S2 to close, adjusting the capacitance of the first adjustable capacitor C11 and the resistance of the first adjustable resistor R1.

[0127] For example, as shown in the attached Figure 10As shown, since the first branch and the second branch are independent, the impedance of the first impedance matching circuit 5 can be adjusted in three ways: 1) When the first switch S1 is closed and the second switch S2 is open, the impedance of the first impedance matching circuit 5 is adjusted by adjusting the capacitance of the first adjustable capacitor C11. In this case, the impedance of the first impedance matching circuit 5 is the impedance of the first adjustable capacitor C11. 2) When the first switch S1 is open and the second switch S2 is closed, the impedance of the first impedance matching circuit 5 is adjusted by adjusting the resistance of the first adjustable resistor R1. In this case, the impedance of the first impedance matching circuit 5 is the impedance of the first capacitor C21 and the first adjustable resistor R1 in series. 3) When the first switch S1 is closed and the second switch S2 is closed, the impedance of the first impedance matching circuit 5 is adjusted by adjusting the capacitance of the first adjustable capacitor C11 and the resistance of the first adjustable resistor R1. In this case, the impedance of the first impedance matching circuit 5 is the impedance of the first adjustable capacitor C11, the first capacitor C21, and the first adjustable resistor R1 in parallel.

[0128] In the embodiment of the present application, since the first end of the first impedance matching circuit 5 is connected to the second end of the first inductor Lg, when the impedance of the first impedance matching circuit 5 is adjusted, the first inductor Lg and the first impedance matching circuit 5 jointly adjust the impedance of the gain adjustment circuit 1.

[0129] The gain adjustment scheme using LNA module 4 is only applicable to applications with low RF signal gain. Specifically, in the embodiment of the present application, within the linear range, the lower the input RF signal power, the greater the gain of LNA 2, and the greater the input RF signal power, the smaller the gain of LNA 2. When the input RF signal strength is low, the gain can be adjusted by LNA module 4 before output. However, when the input RF signal strength is high, the excessive input signal causes LNA 2 to saturate. In this case, LNA 2 no longer needs to amplify the RF signal and may even need to attenuate it. Therefore, the gain adjustment scheme using LNA module 4 is no longer applicable. Therefore, other attenuation schemes are required. To further save area and improve linearity at high signal strengths, a bypass circuit is typically used to adjust the attenuation coefficient for attenuation. In the embodiment of the present application, after adjusting the attenuation coefficient using the bypass circuit, the attenuated signal is input to the mixer.

[0130] In the scheme for adjusting the gain of the LNA module 4, in order to ensure the noise coefficient of the LNA module 4 at the highest gain, a switching element is generally not added to the front end of the main path (i.e., the path of the first inductor Lg and the LNA module 4 in series). Therefore, it is necessary to first disconnect the LNA module 4 and the first impedance matching circuit 5. For example, as shown in the attached figure Figure 11As shown, all the switch transistors Mn1, Mn2, Mn3 and Mn4 in the LNA module 4 are disconnected, and the first switch S1 and the second switch S2 of the first impedance matching circuit 5 are also disconnected. After the LNA module 4 and the first impedance matching circuit 5 are disconnected, for example, as shown in the attached Figure 11 As shown, the second inductor Ls1, the third inductor Ls2, the LNA module 4, and the first impedance matching circuit 5 can be equivalent to an equivalent impedance circuit 6 including an isolation capacitor C, a parasitic capacitor Cgs, and an inductor Ls. The isolation capacitor C includes a first isolation capacitor C1 and a second isolation capacitor C2. The inductor Ls includes a second inductor Ls1 and a third inductor Ls2.

[0131] Furthermore, after disconnecting the LNA module 4 and the first impedance matching circuit 5, the attenuation coefficient of the bypass circuit needs to be adjusted to attenuate the input RF signal. The impedance matching circuit also needs to match the impedance corresponding to the attenuation coefficient. This ensures that after adjusting the attenuation coefficient via the bypass circuit, the gain adjustment circuit 1 can still meet the 50-ohm impedance matching requirement. Therefore, the gain adjustment circuit 1 in this embodiment of the present application may further include a bypass circuit and a second impedance matching circuit.

[0132] For example, as shown in the attached Figure 12 As shown, in one possible implementation, the gain adjustment circuit 1 further includes a bypass circuit 7 and a second impedance matching circuit 8. A first end of the second impedance matching circuit 8 is connected to the first end of the first inductor Lg, a second end of the second impedance matching circuit 8 is grounded, and a control end of the second impedance matching circuit 8 is connected to the controller 3. A first end of the bypass circuit 7 is connected to the first end of the LNA module 4, a second end of the bypass circuit 7 is connected to the second end of the LNA module 4, and a control end of the bypass circuit 7 is connected to the controller 3.

[0133] As attached Figure 12 The working principle of the gain adjustment circuit 1 in the embodiment of the present application is as follows:

[0134] A first end of bypass circuit 7 is connected to a first end of LNA module 4, and a second end of bypass circuit 7 is connected to a second end of LNA module 4. In other words, bypass circuit 7 is connected in parallel with LNA module 4 and first impedance matching circuit 5. A first end of second impedance matching circuit 8 is connected to a first end of first inductor Lg, and a second end of second impedance matching circuit 8 is grounded. In other words, second impedance matching circuit 8 is connected to the first end of first inductor Lg.

[0135] When the input RF signal strength is low, controller 3 controls LNA module 4 and first impedance matching circuit 5 to conduct, and controls bypass circuit 7 and second impedance matching circuit 8 to disconnect. This ensures that, even when a low-strength RF signal is input, the gain can be adjusted based on the low-power LNA 2 by reducing the number of LNA 2 circuits that are turned on. When the input RF signal strength is high, controller 3 controls LNA module 4 and first impedance matching circuit 5 to disconnect, and controls bypass circuit 7 and second impedance matching circuit 8 to conduct. This ensures that, even when a high-strength RF signal is input, the input RF signal can be attenuated by adjusting the attenuation coefficient of bypass circuit 7. During the gain attenuation process, second impedance matching circuit 8 matches the impedance corresponding to the attenuation coefficient of bypass circuit 7, ensuring that after the attenuation coefficient is adjusted, the gain adjustment circuit 1 can still meet the 50-ohm impedance matching requirement. Therefore, the gain adjustment circuit 1 can adjust the gain based on the low-power LNA 2 by reducing the number of conduction cycles of the LNA 2 when a low-signal-strength RF signal is input. Furthermore, the gain adjustment circuit 1 can cooperate with the bypass circuit 7 to attenuate the gain when a high-signal-strength RF signal is input. Thus, a gain adjustment solution can be provided for the front end of a low-power RF receiver.

[0136] The circuit after the LNA module 4 and the first impedance matching circuit 5 are disconnected is equivalent to an equivalent impedance circuit 6, as shown in the attached example. Figure 13 As shown, the gain adjustment circuit 1 in the embodiment of the present application includes a first inductor Lg, an equivalent impedance circuit 6, a bypass circuit 7, a second impedance matching circuit 8, and a controller 3. The first end of the second impedance matching circuit 8 is connected to the first end of the first inductor Lg, the second end of the second impedance matching circuit 8 is grounded, and the control end of the second impedance matching circuit 8 is connected to the controller 3. The first end of the bypass circuit 7 is connected to the second end of the first inductor Lg, the second end of the bypass circuit 7 is connected to the second end of the equivalent impedance circuit 6, and the control end of the bypass circuit 7 is connected to the controller 3. Because the bypass circuit 7 and the second impedance matching circuit 8 only operate when the signal strength of the input RF signal is very high, it is possible to ensure that the input RF signal is attenuated by adjusting the attenuation coefficient of the bypass circuit 7 under the premise of inputting a high signal strength RF signal. In the process of attenuating the gain, the second impedance matching circuit 8 matches the impedance corresponding to the attenuation coefficient of the bypass circuit 7, thereby ensuring that after adjusting the attenuation coefficient, the gain adjustment circuit 1 can still meet the 50 ohm impedance matching.

[0137] For example, as shown in the attached Figure 14As shown, in one possible implementation, the bypass circuit 7 includes a third switch S3, a fourth switch S4, and a second adjustable resistor R2. A first end of the third switch S3 is connected to a first end of the LNA module 4 (or equivalent impedance circuit 6), a second end of the third switch S3 is connected to a first end of the second adjustable resistor R2, and a control end of the third switch S3 is connected to the controller 3. The second end of the second adjustable resistor R2 is grounded, and the control end of the second adjustable resistor R2 is connected to the controller 3. A first end of the fourth switch S4 is connected to a first end of the LNA module 4 (or equivalent impedance circuit 6), a second end of the fourth switch S4 is connected to a second end of the LNA module 4 (or equivalent impedance circuit 6), and a control end of the fourth switch S4 is connected to the controller 3.

[0138] In a possible implementation, the third switch S3 and the fourth switch S4 may be MOSFETs or IGBTs. The embodiment of the present application does not limit the types of the third switch S3 and the fourth switch S4.

[0139] As attached Figure 14 The working principle of the bypass circuit 7 in the embodiment of the present application is as follows:

[0140] The bypass circuit 7 includes a third switch S3, a fourth switch S4, and a second adjustable resistor R2. The fourth switch S4 is connected in parallel with the LNA module 4, and the second end of the third switch S3 is connected in series with the second adjustable resistor R2, which is then attached to the first end of the fourth switch S4. The control ends of the third switch S3, the fourth switch S4, and the second adjustable resistor R2 are all connected to the controller 3. The controller 3 controls the fourth switch S4 to close, thereby connecting to the main circuit of the bypass circuit 7. It also controls the third switch S3 to close, connecting to the second adjustable resistor R2, thereby shunting the main circuit of the bypass circuit 7 and adjusting the attenuation coefficient of the bypass circuit 7. Furthermore, the attenuation coefficient can be adjusted by adjusting the resistance of the second adjustable resistor R2. By connecting the third switch S3, the fourth switch S4, and the second adjustable resistor R2 in parallel with the LNA module 4 to form the bypass circuit 7, even when the input RF signal strength is high, the attenuation coefficient of the bypass circuit 7 can be adjusted.

[0141] For example, as shown in the attached Figure 15As shown, in one possible implementation, the second impedance matching circuit 8 includes a fifth switch S5, a third adjustable resistor R3, and a second adjustable capacitor C12. The first end of the fifth switch S5 is connected to the first end of the first inductor Lg, the second end of the fifth switch S5 is connected to the first end of the third adjustable resistor R3, and the control end of the fifth switch S5 is connected to the controller 3; the second end of the third adjustable resistor R3 is connected to the first end of the second adjustable capacitor C12, and the control end of the third adjustable resistor R3 is connected to the controller 3. The second end of the second adjustable capacitor C12 is grounded, and the control end of the second adjustable capacitor C12 is connected to the controller 3.

[0142] In a possible implementation, the fifth switch S5 may be a MOSFET or an IGBT. The embodiment of the present application does not limit the type of the fifth switch S5.

[0143] As attached Figure 15 The working principle of the second impedance matching circuit 8 in the embodiment of the present application is as follows:

[0144] The second impedance matching circuit 8 is connected to the first end of the first inductor Lg. The fifth switch S5, the third adjustable resistor R3, and the second adjustable capacitor C12 are connected in series and then grounded. The controller 3 controls the closing of the fifth switch S5 to connect the third adjustable resistor R3 and the second adjustable capacitor C12. By adjusting the series impedance of the third adjustable resistor R3 and the second adjustable capacitor C12, the impedance corresponding to the attenuation coefficient is adjusted. This ensures that, under the premise of inputting a high-signal-strength RF signal, while adjusting the attenuation coefficient through the bypass circuit 7, the impedance corresponding to the attenuation coefficient is matched through the second impedance matching circuit 8. This ensures that after adjusting the attenuation coefficient, the gain adjustment circuit 1 can still meet the 50-ohm impedance matching requirement.

[0145] To address the aforementioned issues, embodiments of the present application further provide a gain adjustment method. Similarly, by reducing the number of LNA 2 conducting phases, gain adjustment can be achieved using a low-power LNA 2. This embodiment of the present application uses an LNA module 4 including a first LNA 41 and a second LNA 42 as an example to specifically illustrate the gain adjustment method.

[0146] For example, as shown in the attached Figure 16As shown, an embodiment of the present application provides a gain adjustment method, which is applied to an electronic device 100. The electronic device 100 includes a noise amplifier LNA module 4, a first impedance matching circuit 5, a first inductor Lg, a second inductor Ls1, a third inductor Ls2, and a controller 3; the controller 3 is configured to execute the gain adjustment method. The connection relationship between the LNA module 4, the first impedance matching circuit 5, the first inductor Lg, the second inductor Ls1, the third inductor Ls2, and the controller 3 is the same as the connection relationship in the gain adjustment circuit 1 described above, and will not be repeated here. The gain adjustment method may include steps S1601-S1604:

[0147] In step S1601 , the controller 3 adjusts the conduction quantity of the LNA 2 in the LNA module 4 and the impedance of the first impedance matching circuit 5 according to the signal strength of the input RF signal.

[0148] Controller 3 can determine the required gain based on the signal strength of the input RF signal. Based on the required gain, controller 3 controls the number of LNA 2 switches on. First impedance matching circuit 5 matches the gain corresponding to the number of LNA 2 switches on, ensuring that after gain adjustment, gain adjustment circuit 1 still meets the 50 ohm impedance matching requirement. Therefore, by reducing the number of LNA 2 switches on, gain adjustment can be achieved while maintaining low power consumption.

[0149] Step S1602 : When the signal strength of the input RF signal is less than or equal to the first signal strength threshold, the controller 3 controls the first LNA 41 and the second LNA 42 to be turned on, and adjusts the impedance of the first impedance matching circuit 5 to be the first impedance.

[0150] The first signal strength threshold is a threshold for the signal strength of the RF signal when a high gain adjustment is required by the LNA module 4, and can be set according to actual needs. For example, it can be obtained by statistically analyzing multiple signal strengths of the RF signal when a high gain adjustment is required by the LNA module 4, such as by analyzing the mean, median, minimum, or maximum values ​​of the multiple signal strengths of the RF signal when a high gain adjustment is required by the LNA module 4. Alternatively, it can be set based on empirical values.

[0151] When the signal strength of the input RF signal is less than or equal to the first signal strength threshold, it indicates that the input signal is small and a large gain adjustment is required by LNA module 4. Therefore, there is no need to reduce the number of LNAs 2 that are turned on. Therefore, controller 3 controls first LNA 41 and second LNA 42 to be turned on and matches the impedance corresponding to when first LNA 41 and second LNA 42 are turned on. In other words, the impedance of first impedance matching circuit 5 is adjusted to the first impedance. In other words, the first impedance is the matching impedance corresponding to when first LNA 41 and second LNA 42 are turned on, thereby ensuring that gain adjustment circuit 1 can still meet the 50 ohm impedance matching requirement.

[0152] In step S1603, when the signal strength of the input RF signal is greater than the first signal strength threshold and less than or equal to the second signal strength threshold, the controller 3 controls the first LNA 41 or the second LNA 42 to be turned on and adjusts the impedance of the first impedance matching circuit 5 to the second impedance; and when the second signal strength threshold is greater than the first signal strength threshold.

[0153] The second signal strength threshold is a threshold for the signal strength of the RF signal when a high gain adjustment by the LNA module 4 is not required, and can be set according to actual needs. For example, it can be obtained by statistically analyzing multiple signal strengths of the RF signal when a high gain adjustment by the LNA module 4 is not required, such as by analyzing the mean, median, minimum, or maximum values ​​of multiple signal strengths of the RF signal when a high gain adjustment by the LNA module 4 is not required. Alternatively, it can be set based on empirical values.

[0154] When the signal strength of the input RF signal is greater than the first signal strength threshold and less than or equal to the second signal strength threshold, it indicates that the input signal is large and a large gain adjustment by the LNA module 4 is no longer required. Therefore, the number of LNA modules 2 that are turned on can be reduced. Therefore, the controller 3 controls the first LNA 41 or the second LNA 42 to be turned on and matches the impedance corresponding to the first LNA 41 or the second LNA 42 when the first LNA 41 or the second LNA 42 is turned on. In other words, the impedance of the first impedance matching circuit 5 is adjusted to the second impedance. In other words, the second impedance is the matching impedance corresponding to the first LNA 41 or the second LNA 42 when the first LNA 41 or the second LNA 42 is turned on, thereby ensuring that the gain adjustment circuit 1 can still meet the 50 ohm impedance matching.

[0155] The gain adjustment method described in steps S1602-S1603 above essentially determines the gain to be adjusted based on the input RF signal strength, thereby controlling the conduction level of LNA 2 in LNA module 4. Furthermore, impedance matching is achieved in the feedback loop of LNA module 4 using a first impedance matching circuit 5 (i.e., a series resistor, capacitor, and parallel capacitor), ensuring that after gain adjustment, the gain adjustment circuit 1 still maintains an impedance matching of 50 ohms.

[0156] In step S1604, when the signal strength of the input RF signal is greater than the second signal strength threshold, the controller 3 controls the first LNA 41 and the second LNA 42 to be turned off, controls the bypass circuit 7 and the second impedance matching circuit 8 to be turned on, and adjusts the attenuation coefficient of the bypass circuit 7 and the impedance of the second impedance matching circuit 8 according to the signal strength of the input RF signal.

[0157] The third signal strength threshold is the signal strength threshold at which the LNA module 4 is saturated due to the signal strength of the RF signal, and can be set according to actual needs. For example, it can be obtained by statistically calculating multiple signal strengths of the RF signal when the LNA module 4 is saturated, such as calculating the mean, median, or minimum value of multiple signal strengths of the RF signal when the LNA module 4 is saturated. It can also be set based on empirical values.

[0158] When the input RF signal strength exceeds the second signal strength threshold, it indicates that the input RF signal strength is very high. Due to the excessive input signal, LNA 2 has reached saturation, and LNA 2 is no longer needed to amplify the RF signal, and may even need to attenuate it. Therefore, LNA module 4 can be disconnected first, i.e., controller 3 controls both first LNA 41 and second LNA 42 to be turned off. Then, bypass circuit 7 can be added, i.e., controlled to conduct, to attenuate the signal. By adjusting the attenuation coefficient of bypass circuit 7, further area savings can be achieved and linearity performance can be improved under high signal strength conditions. Furthermore, by controlling the conduction of second impedance matching circuit 8, the impedance corresponding to the attenuation coefficient of bypass circuit 7 can be matched, ensuring that even after adjusting the attenuation coefficient of bypass circuit 7, the gain adjustment circuit 1 still meets the 50 ohm impedance matching requirement. Therefore, when a low-signal-strength RF signal is input, the gain can be adjusted based on the low-power LNA 2 by reducing the number of conduction cycles of the LNA 2. Furthermore, when a high-signal-strength RF signal is input, the gain can be attenuated in cooperation with the bypass circuit 7. Thus, a gain adjustment solution for a low-power RF receiver front end can be provided.

[0159] For details, see the attached Figure 15 In a possible implementation, the controller 3 controls the bypass circuit 7 and the second impedance matching circuit 8 to be turned on, including controlling the third switch S3 to be closed, the fourth switch S4 to be closed, and the fifth switch S5 to be closed.

[0160] As can be seen from the gain adjustment circuit 1 described above, the bypass circuit 7 adjusts the attenuation coefficient through the third switch S3, the fourth switch S4, and the second adjustable resistor R2. When the controller 3 controls the bypass circuit 7 to be turned on, the third switch S3 and the fourth switch S4 are both closed. The main path of the bypass circuit 7 including the fourth switch S4 is shunted by the branch formed by the third switch S3 and the second adjustable resistor R2, thereby adjusting the attenuation coefficient of the bypass circuit 7 by adjusting the resistance value of the second adjustable resistor R2. Since the second impedance matching circuit 8 only includes a branch formed by the fifth switch S5, the third adjustable resistor R3, and the second adjustable capacitor C12, the controller 3 controls the second impedance matching circuit 8 to be turned on, and correspondingly controls the fifth switch S5 to be closed, so that the branch formed by the fifth switch S5, the third adjustable resistor R3, and the second adjustable capacitor C12 is turned on, thereby matching the impedance corresponding to the attenuation coefficient of the bypass circuit 7.

[0161] Since the signal strength of the input RF signal is different, the impedance matched by the corresponding second impedance matching circuit 8 is also different. Therefore, the controller 3 adjusts the attenuation coefficient of the bypass circuit 7 and the impedance of the second impedance matching circuit 8 according to the signal strength of the input RF signal, thereby ensuring that the gain adjustment circuit 1 can still meet the 50 ohm impedance matching under the premise of adjusting the attenuation coefficient of the bypass circuit 7.

[0162] For details, see the attached Figure 15 In one possible implementation, adjusting the attenuation coefficient of the bypass circuit 7 based on the signal strength of the input RF signal includes adjusting the resistance of the second adjustable resistor R2 based on the signal strength of the input RF signal. Adjusting the impedance of the second impedance matching circuit 8 based on the signal strength of the input RF signal includes adjusting the capacitance of the second adjustable capacitor C12 and the resistance of the third adjustable resistor R3 based on the signal strength of the input RF signal.

[0163] Similarly, as can be seen from the gain adjustment circuit 1 described above, the controller 3 adjusts the attenuation coefficient of the bypass circuit 7 based on the signal strength of the input RF signal. Essentially, when both the third switch S3 and the fourth switch S4 are closed, the controller 3 adjusts the resistance of the second adjustable resistor R2 in the bypass circuit 7 based on the signal strength of the input RF signal. Specifically, when the fourth switch S4 is closed, the main path of the bypass circuit 7 is connected, and when the third switch S3 is closed, the second adjustable resistor R2 is connected to the main path of the bypass circuit 7, thereby shunting the main path of the bypass circuit 7 and adjusting the attenuation coefficient of the bypass circuit 7. The controller 3 adjusts the impedance of the second impedance matching circuit 8 based on the signal strength of the input RF signal. Essentially, when the fifth switch S5 is closed, the controller 3 adjusts the series impedance of the second adjustable capacitor C12 and the third adjustable resistor R3 in the second impedance matching circuit 8 based on the signal strength of the input RF signal to adjust the impedance corresponding to the attenuation coefficient of the bypass circuit 7.

[0164] According to the gain adjustment circuit 1 described above, when the input RF signal strength is low, the controller 3 controls the LNA module 4 and the first impedance matching circuit 5 to be conductive, and controls the bypass circuit 7 and the second impedance matching circuit 8 to be disconnected, thereby adjusting the gain via the LNA module 4. When the input RF signal strength is high, the controller 3 controls the LNA module 4 and the first impedance matching circuit 5 to be disconnected, controls the bypass circuit 7 and the second impedance matching circuit 8 to be conductive, and adjusts the gain by adjusting the attenuation coefficient of the bypass circuit 7. It will be understood that the second signal strength threshold is a threshold for determining the signal strength of the RF signal. By determining the difference between the signal strength of the input RF signal and the second signal strength threshold, the controller switches between the two gain adjustment modes of the LNA module 4 and the bypass circuit 7, thereby adjusting the gain.

[0165] The gain adjustment method described in steps S1601-S1604 above, when the LNA module 4 includes n LNAs 2, where n is a positive integer and n>2, can be expanded based on the gain adjustment method when n=2, where the LNA module 4 includes the first LNA 41 and the second LNA 42, to obtain a corresponding gain adjustment method. Figure 8As shown, when n=3, the gain adjustment is divided into three gears. When the signal strength of the input RF signal is less than or equal to the first signal strength threshold, the controller 3 controls all three LNAs 2 to be turned on, and adjusts the impedance of the first impedance matching circuit 5 to the first impedance; when the signal strength of the input RF signal is greater than the first signal strength threshold and less than or equal to the second signal strength threshold, the controller 3 controls two of the LNAs 2 to be turned on, and adjusts the impedance of the first impedance matching circuit 5 to the second impedance, and the second signal strength threshold is greater than the first signal strength threshold; when the signal strength of the input RF signal is greater than the second signal strength threshold and less than or equal to the third signal strength threshold, the controller 3 controls one of the LNAs 2 to be turned on, and adjusts the impedance of the first impedance matching circuit 5 to the third impedance, and the third signal strength threshold is greater than the second signal strength threshold. For example, as shown in the attached figure, Figure 9 As shown, when n=4, the gain adjustment is divided into four gears. When the signal strength of the input RF signal is less than or equal to a first signal strength threshold, the controller 3 controls all four LNAs 2 to be turned on and adjusts the impedance of the first impedance matching circuit 5 to the first impedance. When the signal strength of the input RF signal is greater than the first signal strength threshold and less than or equal to a second signal strength threshold, the controller 3 controls three of the LNAs 2 to be turned on and adjusts the impedance of the first impedance matching circuit 5 to the second impedance, where the second signal strength threshold is greater than the first signal strength threshold. When the signal strength of the input RF signal is greater than the second signal strength threshold and less than or equal to a third signal strength threshold, the controller 3 controls two of the LNAs 2 to be turned on and adjust the impedance of the first impedance matching circuit 5 to the third impedance, where the third signal strength threshold is greater than the second signal strength threshold. When the signal strength of the input RF signal is greater than the third signal strength threshold and less than or equal to a fourth signal strength threshold, the controller 3 controls one of the LNAs 2 to be turned on and adjusts the impedance of the first impedance matching circuit 5 to the fourth impedance, where the fourth signal strength threshold is greater than the third signal strength threshold. Similarly, different values ​​of n result in different gain adjustment gears. In the embodiment of the present application, when the number n of LNAs 2 in the LNA module 4 is greater than 4, the gain adjustment method is similar to that when the number n is 2, 3, or 4, and will not be further described here.

[0166] The gain adjustment method described in steps S1601 to S1604 above is specifically described by taking the case where n=4 and the LNA module 4 includes the first LNA 41 , the second LNA 42 , the third LNA 43 and the fourth LNA 44 as an example.

[0167] The gain adjustment method described in steps S1601-S1604 above can be divided into two gain adjustment modes: 1) LNA module adjustment mode; 2) bypass adjustment mode. The LNA module adjustment mode corresponds to the method described in steps S1602-S1603 above, where controller 3 controls the conduction level of LNA 2 in LNA module 4 based on the signal strength of the input RF signal. The bypass adjustment mode corresponds to the method described in step S1604 above, where controller 3 adjusts the attenuation coefficient of bypass circuit 7 based on the signal strength of the input RF signal.

[0168] In the embodiment of the present application, the initial gain value can be set to 24dB, the model of each LNA 2 is the same, the gain attenuation value of each LNA 2 is 6dB, and the attenuation value of the bypass circuit 7 is adjusted into four levels, and the gain attenuation value of each level is also 6dB. For example, as shown in Table 1:

[0169] Table 1 Gain reduction in different gain adjustment modes

[0170]

[0171] Table 1 shows that the threshold for switching between LNA module adjustment mode and bypass adjustment mode is 6 dB. When the input RF signal strength is less than or equal to the first signal strength threshold, controller 3 turns on all four LNAs 2 and adjusts the impedance of first impedance matching circuit 5 to the first impedance. At this point, the gain is attenuated by 0 dB (i.e., -0 dB), and the gain value is 24 dB. When the input RF signal strength is greater than the first signal strength threshold and less than or equal to the second signal strength threshold, controller 3 turns on three of the LNAs 2 and adjusts the impedance of first impedance matching circuit 5 to the second impedance. The second signal strength threshold is greater than the first signal strength threshold. At this point, the gain is attenuated by 6 dB (i.e., -6 dB), and the gain value is 18 dB. When the input RF signal strength is greater than the second signal strength threshold and less than or equal to the third signal strength threshold, controller 3 turns on two of the LNAs 2 and adjusts the impedance of first impedance matching circuit 5 to the third impedance. The third signal strength threshold is greater than the second signal strength threshold. At this point, the gain is attenuated by 12 dB (i.e., -12 dB), and the gain value is 12 dB. When the signal strength of the input RF signal is greater than the third signal strength threshold and less than or equal to the fourth signal strength threshold, controller 3 controls one of the LNAs 2 to be conductive and adjusts the impedance of the first impedance matching circuit 5 to the fourth impedance. The fourth signal strength threshold is greater than the third signal strength threshold. At this time, the gain is attenuated by 18dB (i.e., -18dB), and the gain value is 6dB. When the signal strength of the input RF signal is greater than the fourth signal strength threshold and less than or equal to the fifth signal strength threshold, controller 3 controls all LNAs 2 to be disconnected, controls bypass circuit 7 and the second impedance matching circuit 8 to be conductive, controls the attenuation coefficient of bypass circuit 7 to the first level, and adjusts the impedance of the second impedance matching circuit 8 to the fifth impedance. The fifth signal strength threshold is greater than the fourth signal strength threshold. At this time, the gain is attenuated by 24dB (i.e., -24dB), and the gain value is 0dB. When the signal strength of the input RF signal is greater than the fifth signal strength threshold and less than or equal to the sixth signal strength threshold, controller 3 controls the attenuation coefficient of bypass circuit 7 to the second level and adjusts the impedance of second impedance matching circuit 8 to the sixth impedance. The sixth signal strength threshold is greater than the fifth signal strength threshold. At this time, the gain is attenuated by 30db (i.e., -30db), and the gain value is -6db. When the signal strength of the input RF signal is greater than the sixth signal strength threshold and less than or equal to the seventh signal strength threshold, controller 3 controls the attenuation coefficient of bypass circuit 7 to the third level and adjusts the impedance of second impedance matching circuit 8 to the seventh impedance. The seventh signal strength threshold is greater than the sixth signal strength threshold. At this time, the gain is attenuated by 36db (i.e., -36db), and the gain value is -12db.When the signal strength of the input RF signal is greater than the seventh signal strength threshold and less than or equal to the eighth signal strength threshold, the controller 3 controls the attenuation coefficient of the bypass circuit 7 to the fourth level, and adjusts the impedance of the second impedance matching circuit 8 to the eighth impedance. The eighth signal strength threshold is greater than the seventh signal strength threshold. At this time, the gain is attenuated by 42db (i.e., -42db), and the gain value is -18db.

[0172] Among them, the fourth signal strength threshold, the fifth signal strength threshold, the sixth signal strength threshold, the seventh signal strength threshold and the eighth signal strength threshold, like the first signal strength threshold, the second signal strength threshold and the third signal strength threshold described above, can be set according to actual needs. The setting method is the same as that of the first signal strength threshold, the second signal strength threshold and the third signal strength threshold described above, and will not be repeated here.

[0173] As shown in Table 1, when the input RF signal strength is low, the purpose of attenuating the gain by 6dB (i.e., -6dB) by varying multiples can be achieved by reducing the number of LNAs 2 (corresponding to reducing the number of switches Mnm by a factor of 4, where m is a positive integer, and m=1, 2, 3, or 4). When the input RF signal strength is high, the purpose of attenuating the gain by varying multiples of 6dB (i.e., -6dB) can be achieved by adjusting the attenuation coefficient of bypass circuit 7 to different levels.

[0174] In the embodiment of the present application, the attenuation gain value of each LNA 2 can be the same or different, and can be 6 dB or other values. The attenuation gain value of the bypass circuit 7 can be divided into four levels, or other levels in addition to the four levels. The attenuation gain of each level can be the same or different. The gain adjustment methods other than those in Table 1 are the same as the gain adjustment method described in Table 1 above and will not be repeated here.

[0175] The gain adjustment method described in steps S1601-S1604 above can adjust the number of LNAs 2 in an LNA module 4, which includes at least two LNAs 2, and the impedance of a first impedance matching circuit 5 connected in parallel with the LNA module 4, based on the input RF signal strength when the input RF signal strength is low. It can also adjust the attenuation coefficient of the bypass circuit 7 and the impedance of the second impedance matching circuit 8 based on the input RF signal strength when the input RF signal strength is high. Therefore, the gain adjustment method described in steps S1601-S1604 above can ensure that, even when an RF signal with low signal strength is input, the gain can be adjusted based on a low-power LNA 2 by reducing the number of LNAs 2 that are turned on. Furthermore, different impedances are matched to the gains corresponding to different LNA 2 turn-on numbers by the first impedance matching circuit 5, ensuring that after gain adjustment, the gain adjustment circuit 1 still meets the 50-ohm impedance matching requirement. It can also attenuate the input RF signal by adjusting the attenuation coefficient of the bypass circuit 7 when an RF signal with high signal strength is input. In the process of attenuating the gain through the bypass circuit 7, the impedance corresponding to the attenuation coefficient of the bypass circuit 7 is matched through the second impedance matching circuit 8, thereby ensuring that after the attenuation coefficient is adjusted through the bypass circuit 7, the gain adjustment circuit 1 can still meet the 50 ohm impedance matching.

[0176] The gain adjustment circuit, method, and electronic device provided in embodiments of the present application include an LNA module, a first impedance matching circuit connected in parallel with the LNA module, a bypass circuit connected in parallel with the LNA module, a first inductor Lg, a second inductor Ls1, a third inductor Ls2, and the impedance of a second impedance matching circuit connected to the main circuit where the LNA module resides. When the signal strength of an incoming RF signal is low, the number of LNAs in an LNA module comprising at least two LNAs that are turned on, and the impedance of the first impedance matching circuit connected in parallel with the LNA module, can be adjusted based on the signal strength of the incoming RF signal. Furthermore, when the signal strength of the incoming RF signal is high, the attenuation coefficient of the bypass circuit and the impedance of the second impedance matching circuit can be adjusted based on the signal strength of the incoming RF signal. Therefore, the gain adjustment circuit, method, and electronic device provided in embodiments of the present application can ensure that, even when an incoming RF signal has low signal strength, gain adjustment can be achieved by reducing the number of LNAs that are turned on, thereby achieving a low-power LNA gain adjustment. The first impedance matching circuit matches the gain corresponding to the number of LNAs that are on, with different impedances, to ensure that after gain adjustment, the gain adjustment circuit still meets 50-ohm impedance matching. Furthermore, even when a high-strength RF signal is input, the input RF signal can be attenuated by adjusting the attenuation coefficient of the bypass circuit. During the gain attenuation process, the second impedance matching circuit matches the impedance corresponding to the attenuation coefficient of the bypass circuit, ensuring that after the attenuation coefficient is adjusted by the bypass circuit, the gain adjustment circuit still meets 50-ohm impedance matching.

[0177] It is understandable that in order to implement the above functions, the electronic device includes hardware and / or software modules corresponding to the execution of each function. In combination with the algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments, but such implementation should not be considered to be beyond the scope of this application.

[0178] In this embodiment, the electronic device can be divided into functional modules according to the above-mentioned method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into a single processing module. The above-mentioned integrated modules can be implemented in the form of hardware. It should be noted that the module division in this embodiment is illustrative and is only a logical functional division. In actual implementation, other division methods may be used.

[0179] An embodiment of the present application further provides a computer-readable storage medium, in which computer program code is stored. When the processor executes the computer program code, the electronic device executes the relevant method steps in the above method embodiment.

[0180] An embodiment of the present application further provides a computer program product, which, when executed on a computer, enables the computer to execute the relevant method steps in the above method embodiment.

[0181] Among them, the electronic device, computer storage medium or computer program product provided in this application is used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, and will not be repeated here.

[0182] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0183] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the above modules or units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0184] The units described above as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0185] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The functions of the aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0186] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application, or the part that makes the contribution, or all or part of the technical solution can be embodied in the form of a software product. The software product is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the above-mentioned method of each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc., various media that can store program code.

[0187] The above content is only a specific embodiment of this application, but the scope of protection of this application is not limited to this. Any changes or replacements within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A gain adjustment circuit, characterized in that: The gain adjustment circuit includes a low noise amplifier (LNA) module, a first impedance matching circuit, a first inductor, a second inductor, a third inductor, a bypass circuit, a second impedance matching circuit, and a controller; the LNA module includes at least two LNAs, the first end of each LNA in the LNA module is connected to the first end of the LNA module, the second end of each LNA in the LNA module is connected to the second end of the LNA module, the bias end of each LNA in the LNA module is connected to the bias end of the LNA module, the ground end of each LNA in the LNA module is connected to the ground end of the LNA module, and the control end of each LNA in the LNA module is connected to the LNA module. the first end of the LNA module is connected to the second end of the first inductor, the bias end of the LNA module is connected to the second end of the second inductor, the ground end of the LNA module is connected to the first end of the third inductor, and the control end of the LNA module is connected to the controller; the second end of the third inductor is grounded; the first end of the first impedance matching circuit is connected to the first end of the LNA module, the second end of the first impedance matching circuit is connected to the second end of the LNA module, and the control end of the first impedance matching circuit is connected to the controller; the first end of the first inductor is used to input a radio frequency signal, the first end of the second inductor is used to input a bias voltage, and the second end of the LNA module is used to output the adjusted radio frequency signal; A first end of the second impedance matching circuit is connected to a first end of the first inductor, a second end of the second impedance matching circuit is grounded, and a control end of the second impedance matching circuit is connected to the controller; a first end of the bypass circuit is connected to a first end of the LNA module, a second end of the bypass circuit is connected to a second end of the LNA module, and a control end of the bypass circuit is connected to the controller; The controller is used to: According to the signal strength of the input radio frequency signal, the conduction quantity of the LNA in the LNA module, the impedance of the first impedance matching circuit, the attenuation coefficient of the bypass circuit, and the impedance of the second impedance matching circuit are adjusted.

2. The gain adjustment circuit according to claim 1, wherein: The LNA module includes a first LNA and a second LNA; the controller adjusts the conduction number of the LNAs in the LNA module according to the signal strength of the input radio frequency signal, including: When the signal strength of the input RF signal is less than or equal to a first signal strength threshold, the controller controls the first LNA and the second LNA to be turned on; When the signal strength of the input RF signal is greater than a first signal strength threshold and less than or equal to a second signal strength threshold, the controller controls the first LNA or the second LNA to be turned on; and the second signal strength threshold is greater than the first signal strength threshold.

3. The gain adjustment circuit according to claim 2, wherein: The first impedance matching circuit includes a first switch, a second switch, a first capacitor, a first adjustable capacitor, and a first adjustable resistor; a first end of the first switch is connected to the first end of the LNA module, a second end of the first switch is connected to the first end of the first adjustable capacitor, and a control end of the first switch is connected to the controller; a second end of the first adjustable capacitor is grounded, and the control end of the first adjustable capacitor is connected to the controller; a first end of the second switch is connected to the first end of the LNA module, a second end of the second switch is connected to the first end of the first capacitor, and the control end of the second switch is connected to the controller; a second end of the first capacitor is connected to the first end of the first adjustable resistor; a second end of the first adjustable resistor is connected to the second end of the LNA module, and the control end of the first adjustable resistor is connected to the controller.

4. The gain adjustment circuit according to claim 3, wherein: The controller adjusts the impedance of the first impedance matching circuit according to the signal strength of the input radio frequency signal, including: The controller controls the first switch to close and adjusts the capacitance of the first adjustable capacitor according to the signal strength of the input radio frequency signal; or controlling the second switch to close, thereby adjusting the resistance value of the first adjustable resistor; or; The first switch and the second switch are controlled to be closed, and the capacitance of the first adjustable capacitor and the resistance of the first adjustable resistor are adjusted.

5. The gain adjustment circuit according to claim 4, characterized in that: When the signal strength of the input radio frequency signal is greater than the second signal strength threshold, the controller is further configured to: controlling the first LNA and the second LNA to be turned off; controlling the bypass circuit and the second impedance matching circuit to be turned on; The attenuation coefficient of the bypass circuit and the impedance of the second impedance matching circuit are adjusted according to the signal strength of the input radio frequency signal.

6. The gain adjustment circuit according to claim 5, characterized in that: The bypass circuit includes a third switch, a fourth switch, and a second adjustable resistor; a first end of the third switch is connected to the first end of the LNA module, a second end of the third switch is connected to the first end of the second adjustable resistor, and a control end of the third switch is connected to the controller; a second end of the second adjustable resistor is grounded, and a control end of the second adjustable resistor is connected to the controller; a first end of the fourth switch is connected to the first end of the LNA module, a second end of the fourth switch is connected to the second end of the LNA module, and a control end of the fourth switch is connected to the controller.

7. The gain adjustment circuit according to claim 6, wherein: The second impedance matching circuit includes a fifth switch, a third adjustable resistor, and a second adjustable capacitor; the first end of the fifth switch is connected to the first end of the first inductor, the second end of the fifth switch is connected to the first end of the third adjustable resistor, and the control end of the fifth switch is connected to the controller; the second end of the third adjustable resistor is connected to the first end of the second adjustable capacitor, and the control end of the third adjustable resistor is connected to the controller; the second end of the second adjustable capacitor is grounded, and the control end of the second adjustable capacitor is connected to the controller.

8. The gain adjustment circuit according to claim 7, wherein: The controller controls the bypass circuit and the second impedance matching circuit to be turned on, including: The controller controls the third switch to be closed, the fourth switch to be closed, and the fifth switch to be closed.

9. The gain adjustment circuit according to claim 8, wherein: The controller adjusts the attenuation coefficient of the bypass circuit according to the signal strength of the input radio frequency signal, including: The controller adjusts the resistance of the second adjustable resistor according to the signal strength of the input radio frequency signal; The controller adjusts the impedance of the second impedance matching circuit according to the signal strength of the input radio frequency signal, including: The controller adjusts the capacitance of the second adjustable capacitor and the resistance of the third adjustable resistor according to the signal strength of the input radio frequency signal.

10. The gain adjustment circuit according to any one of claims 1 to 9, characterized in that: The impedance of the first inductor is different from the impedance of the second inductor, and the impedance of the second inductor is the same as the impedance of the third inductor.

11. A gain adjustment method, characterized in that: The invention is applied to an electronic device, the electronic device comprising a noise amplifier (LNA) module, a first impedance matching circuit, a first inductor, a second inductor, a third inductor, a bypass circuit, a second impedance matching circuit, and a controller; the controller is configured to execute the gain adjustment method; the LNA module comprises at least two LNAs, the first end of each LNA in the LNA module is connected to the first end of the LNA module, the second end of each LNA in the LNA module is connected to the second end of the LNA module, the bias end of each LNA in the LNA module is connected to the bias end of the LNA module, the ground end of each LNA in the LNA module is connected to the ground end of the LNA module, and the control end of each LNA in the LNA module is connected to the ground end of the LNA module. The control terminals of the LNA module are both connected to the control terminal of the LNA module; the first terminal of the LNA module is connected to the second terminal of the first inductor, the bias terminal of the LNA module is connected to the second terminal of the second inductor, the ground terminal of the LNA module is connected to the first terminal of the third inductor, and the control terminal of the LNA module is connected to the controller; the second terminal of the third inductor is grounded; the first terminal of the first impedance matching circuit is connected to the first terminal of the LNA module, the second terminal of the first impedance matching circuit is connected to the second terminal of the LNA module, and the control terminal of the first impedance matching circuit is connected to the controller; the first terminal of the first inductor is used to input a radio frequency signal, the first terminal of the second inductor is used to input a bias voltage, and the second terminal of the LNA module is used to output the adjusted radio frequency signal; A first end of the second impedance matching circuit is connected to a first end of the first inductor, a second end of the second impedance matching circuit is grounded, and a control end of the second impedance matching circuit is connected to the controller; a first end of the bypass circuit is connected to a first end of the LNA module, a second end of the bypass circuit is connected to a second end of the LNA module, and a control end of the bypass circuit is connected to the controller; the method includes: According to the signal strength of the input radio frequency signal, the conduction quantity of the LNA in the LNA module, the impedance of the first impedance matching circuit, the attenuation coefficient of the bypass circuit, and the impedance of the second impedance matching circuit are adjusted.

12. The gain adjustment method according to claim 11, characterized in that: The LNA module includes a first LNA and a second LNA; and adjusting the conduction number of the LNAs in the LNA module according to the signal strength of the input RF signal includes: When the input signal strength is less than or equal to a first signal strength threshold, controlling the first LNA and the second LNA to be turned on; When the input signal strength is greater than a first signal strength threshold and less than or equal to a second signal strength threshold, the first LNA or the second LNA is controlled to be turned on; and the second signal strength threshold is greater than the first signal strength threshold.

13. The gain adjustment method according to claim 12, wherein: The first impedance matching circuit includes a first switch, a second switch, a first capacitor, a first adjustable capacitor, and a first adjustable resistor; a first end of the first switch is connected to the first end of the LNA module, a second end of the first switch is connected to the first end of the first adjustable capacitor, and a control end of the first switch is connected to the controller; a second end of the first adjustable capacitor is grounded, and the control end of the first adjustable capacitor is connected to the controller; a first end of the second switch is connected to the first end of the LNA module, a second end of the second switch is connected to the first end of the first capacitor, and the control end of the second switch is connected to the controller; a second end of the first capacitor is connected to the first end of the first adjustable resistor; a second end of the first adjustable resistor is connected to the second end of the LNA module, and the control end of the first adjustable resistor is connected to the controller.

14. The gain adjustment method according to claim 13, wherein: The adjusting the impedance of the first impedance matching circuit according to the signal strength of the input radio frequency signal includes: controlling the first switch to close and adjusting the capacitance of the first adjustable capacitor according to the signal strength of the input radio frequency signal; or; controlling the second switch to close, thereby adjusting the resistance value of the first adjustable resistor; or; The first switch and the second switch are controlled to be closed, and the capacitance of the first adjustable capacitor and the resistance of the first adjustable resistor are adjusted.

15. The gain adjustment method according to claim 14, wherein: When the signal strength of the input radio frequency signal is greater than the second signal strength threshold, the method further includes: controlling the first LNA and the second LNA to be turned off; controlling the bypass circuit and the second impedance matching circuit to be turned on; The attenuation coefficient of the bypass circuit and the impedance of the second impedance matching circuit are adjusted according to the signal strength of the input radio frequency signal.

16. The gain adjustment method according to claim 15, characterized in that: The bypass circuit includes a third switch, a fourth switch, and a second adjustable resistor; a first end of the third switch is connected to the first end of the LNA module, a second end of the third switch is connected to the first end of the second adjustable resistor, and a control end of the third switch is connected to the controller; a second end of the second adjustable resistor is grounded, and a control end of the second adjustable resistor is connected to the controller; a first end of the fourth switch is connected to the first end of the LNA module, a second end of the fourth switch is connected to the second end of the LNA module, and a control end of the fourth switch is connected to the controller.

17. The gain adjustment method according to claim 16, wherein: The second impedance matching circuit includes a fifth switch, a third adjustable resistor, and a second adjustable capacitor; the first end of the fifth switch is connected to the first end of the first inductor, the second end of the fifth switch is connected to the first end of the third adjustable resistor, and the control end of the fifth switch is connected to the controller; the second end of the third adjustable resistor is connected to the first end of the second adjustable capacitor, and the control end of the third adjustable resistor is connected to the controller; the second end of the second adjustable capacitor is grounded, and the control end of the second adjustable capacitor is connected to the controller.

18. The gain adjustment method according to claim 17, wherein: The controlling the bypass circuit and the second impedance matching circuit to be turned on includes: The third switch, the fourth switch, and the fifth switch are controlled to be closed.

19. The gain adjustment method according to claim 18, wherein: The adjusting the attenuation coefficient of the bypass circuit according to the signal strength of the input radio frequency signal includes: adjusting the resistance of the second adjustable resistor according to the signal strength of the input radio frequency signal; The adjusting the impedance of the second impedance matching circuit according to the signal strength of the input radio frequency signal includes: The capacitance of the second adjustable capacitor and the resistance of the third adjustable resistor are adjusted according to the signal strength of the input radio frequency signal.

20. The gain adjustment method according to any one of claims 11 to 19, characterized in that: The impedance of the first inductor is different from the impedance of the second inductor, and the impedance of the second inductor is the same as the impedance of the third inductor.

21. An electronic device, characterized in that: The device comprises a gain adjustment circuit as described in any one of claims 1 to 10; the gain adjustment circuit is used to adjust the amplitude of the radio frequency signal input to the electronic device.

22. An electronic device, characterized in that: include: A memory and a controller, the memory being used to store instructions executable by the controller, the memory storing computer program code, the computer program code comprising computer instructions, and when the computer instructions are executed by the controller, the electronic device executes the gain adjustment method as described in any one of claims 11 to 20.

23. A computer-readable storage medium, characterized in that The method comprises computer instructions, which, when executed on the electronic device, enable the electronic device to execute the gain adjustment method according to any one of claims 11 to 20.

24. A computer program product, characterized in that When the computer program product is run on a computer, the computer is enabled to execute the gain adjustment method according to any one of claims 11 to 20.

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