Circuit module and method of manufacturing such circuit module

Abstract

The disclosure relates to a circuit module and a method of manufacturing such a circuit module. A circuit module includes a module substrate having a mounting surface and a plurality of conductive features, and an electronic circuitry coupled to the mounting surface. An encapsulant material covers the electronic circuitry and the mounting surface, and an upper surface of the encapsulant material defines a first surface of the circuit module. A plurality of leadframe ends, each separate from a non-planar leadframe unit, extend from the conductive feature at the mounting surface through the encapsulant material toward the first surface of the circuit module. Each of the leadframe ends is formed by an elongated planar conductive feature of a leadframe unit, and the plurality of leadframe ends are electrically coupled to the electronic circuitry through the conductive features and the module substrate. An encapsulant pit may extend from the first surface of the circuit module into the encapsulant material, and a proximal end of the lead frame end terminates at the encapsulant pit.

Description

Technical Field

[0001] Embodiments of the subject matter described herein relate generally to circuit modules and electronic systems including circuit modules, and more particularly, to circuit modules having embedded terminals and electronic systems including such circuit modules. Background Art

[0002] Various types of electronic systems employ circuit modules that include a printed circuit board (PCB), circuitry coupled to a mounting surface of the PCB, and a non-conductive encapsulant (e.g., a plastic encapsulant) that defines an upper surface of the module and protects the circuitry from environmental influences (e.g., from oxidation and contaminants). Typically, the embedded circuitry is electrically coupled to conductive pads on the bottom surface of the PCB through the PCB. The embedded circuitry can be electrically coupled to external circuitry by connecting bottom-side conductive pads of the circuit module to corresponding conductive pads on the mounting surface of a system substrate.

[0003] Some circuit modules are configured to be stacked with other circuit modules or packaged electronic devices to achieve a vertical "stacked package" system. In some cases, these systems are desirable because they tend to require a smaller mounting footprint on the system substrate than systems in which all modules and circuit systems are directly mounted on the system substrate in a side-by-side manner. Modules configured for use in a stacked package system may utilize top-side interconnects extending from the mounting surface to the upper surface of the circuit module to achieve external electrical connections to the embedded circuit system. Methods for forming conventional top-side interconnects in such modules tend to be expensive and / or complex. In addition, the equipment used to form such top-side interconnects typically occupies considerable space in the manufacturing workshop.

[0004] Therefore, what is needed is a circuit module having top-side interconnects that are relatively inexpensive to manufacture and / or can be manufactured using equipment that does not occupy a large manufacturing footprint. Summary of the invention

[0005] According to a first aspect of the present invention, there is provided a circuit module, comprising:

[0006] a module substrate having a mounting surface and a plurality of conductive features at the mounting surface;

[0007] an electronic circuit system coupled to the mounting surface of the module substrate;

[0008] an encapsulant material covering the electronic circuitry and the mounting surface of the module substrate, wherein an upper surface of the encapsulant material defines a first surface of the circuit module; and

[0009] a plurality of lead frame ends extending from the conductive feature at the mounting surface through the encapsulant material toward the first surface of the circuit module, wherein each of the lead frame ends is formed by an elongated planar conductive feature of a lead frame unit, and wherein the plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive feature and the module substrate.

[0010] In one or more embodiments, each of the lead frame ends has a rectangular cross-section.

[0011] In one or more embodiments, each of the lead frame ends is formed of one or more materials selected from copper and copper alloys.

[0012] In one or more embodiments, encapsulant pits extend from the first surface into the encapsulant material; and

[0013] The proximal end of the lead frame end terminates at the encapsulant recess.

[0014] In one or more embodiments, the surface of the encapsulant recess is defined by the encapsulant material; and

[0015] The proximal end of the lead frame end is exposed in the encapsulant recess.

[0016] In one or more embodiments, the surface of the encapsulant recess is defined by the encapsulant material; and

[0017] The circuit module additionally includes a lead frame pocket nested within the encapsulant pocket, wherein the lead frame pocket is integrally formed with the lead frame end.

[0018] In one or more embodiments, the lead frame recess is not filled with the encapsulant material.

[0019] In one or more embodiments, the circuit module further comprises:

[0020] A conductive attach material is coupled to the proximal end of the lead frame end within the encapsulant pocket.

[0021] In one or more embodiments, the lowest depth of the encapsulant recess is at a depth of at least 0.100 mm below the first surface of the circuit module.

[0022] In one or more embodiments, the lead frame end is embedded within the encapsulant material proximate to a side of the encapsulant material; and

[0023] The encapsulant material surrounds each of the lead frame ends.

[0024] In one or more embodiments, the module substrate further includes a heat dissipation structure extending through the module substrate;

[0025] The heat dissipation structure has a first surface exposed at the mounting surface of the module substrate; and

[0026] The electronic circuit system includes an integrated circuit die coupled to the first surface of the heat dissipation structure.

[0027] In one or more embodiments, the heat dissipation structure includes a structure selected from a conductive coin block and a set of thermal vias.

[0028] In one or more embodiments, the integrated circuit die is a power amplifier die, and the heat dissipation structure is configured to provide a thermal path for heat generated by the power amplifier die during operation of the circuit module.

[0029] According to a second aspect of the present invention, there is provided an electronic system, comprising:

[0030] a system substrate having a top surface and a plurality of conductive pads at the top surface; and

[0031] A circuit module coupled to the conductive pad of the system substrate, wherein the circuit module includes

[0032] a module substrate having a mounting surface, a bottom surface, and a plurality of conductive features at the mounting surface, wherein the bottom surface of the module substrate defines a bottom surface of the circuit module,

[0033] an electronic circuit system coupled to the mounting surface of the module substrate,

[0034] an encapsulant material covering the electronic circuit system and the mounting surface of the module substrate, wherein an upper surface of the encapsulant material defines a top surface of the circuit module, and

[0035] A plurality of lead frame ends extending from the conductive feature at the mounting surface through the encapsulant material toward the top surface of the circuit module, wherein each of the lead frame ends is formed by an elongated planar conductive feature of a lead frame unit, and wherein the plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive feature.

[0036] In one or more embodiments, the module substrate further includes a heat dissipation structure extending between the mounting surface and the bottom surface of the module substrate;

[0037] The electronic circuit system includes an integrated circuit die connected to a surface of the heat dissipation structure exposed at the mounting surface of the module substrate;

[0038] The proximal end of the lead frame end at the top surface of the circuit module is coupled to the conductive pad at the top surface of the system substrate by a conductive attachment material; and

[0039] The electronic system additionally includes a heat sink coupled to the heat dissipation structure at the bottom surface of the module substrate.

[0040] In one or more embodiments, the bottom surface of the module substrate is coupled to the conductive pad at the top surface of the system substrate;

[0041] The electronic system further comprises another electronic device; and

[0042] A proximal end of the lead frame end at the top surface of the circuit module is coupled to the other electronic device by a conductive attachment material.

[0043] According to a third aspect of the present invention, there is provided a method for manufacturing a circuit module, the method comprising:

[0044] coupling the electronic circuit system to the mounting surface of the module substrate;

[0045] Providing a non-planar leadframe unit including a sacrificial center feature and a plurality of leadframe ends, wherein a proximal end of each of the plurality of leadframe ends is coupled to the sacrificial center feature, and wherein each of the plurality of leadframe ends extends at a right angle relative to a substrate-facing surface of the sacrificial center feature;

[0046] electrically coupling distal tips of the plurality of lead frame ends to a plurality of conductive features at the mounting surface of the module substrate, wherein the plurality of lead frame ends are electrically coupled to the electronic circuitry through the conductive features and the module substrate;

[0047] applying an encapsulant material between the module substrate and the substrate-facing surface of the sacrificial center feature, wherein the encapsulant material covers the electronic circuitry and the mounting surface of the module substrate, the encapsulant material extends from the mounting surface of the module substrate to the substrate-facing surface of the leadframe unit, and the encapsulant material surrounds the plurality of leadframe ends; and

[0048] The sacrificial center feature is removed from a top surface of the encapsulant material without removing the lead frame ends from the encapsulant material, wherein the top surface of the encapsulant material defines a first surface of the circuit module.

[0049] In one or more embodiments, providing the non-planar lead frame unit includes:

[0050] providing a planar lead frame unit comprising the sacrificial center feature and a plurality of pre-bent lead frame ends connected to the sacrificial center feature; and

[0051] Each of the pre-bent leadframe ends is bent toward the substrate-facing surface of the sacrificial central feature to form the plurality of leadframe ends extending at the right angle relative to the substrate-facing surface of the sacrificial central feature.

[0052] In one or more embodiments, the method further comprises:

[0053] Prior to bending each of the pre-bent lead frame ends, a plurality of lead frame pockets are formed in the upper surface of the sacrificial central feature, wherein after bending each of the lead frame ends, each of the plurality of lead frame pockets extends between the upper surface of the central sacrificial feature and the proximal end of the lead frame end.

[0054] In one or more embodiments, after removing the central sacrificial feature, the plurality of lead frame pockets define a plurality of conductive cups attached to the proximal ends of the plurality of lead frame ends; and

[0055] The plurality of conductive cups remain unfilled with the encapsulant material.

[0056] In one or more embodiments, the method further comprises:

[0057] The plurality of lead frame pockets are removed to form a plurality of encapsulant pockets, wherein the proximal ends of the plurality of lead frame ends are exposed within the plurality of encapsulant pockets after the plurality of lead frame pockets are removed.

[0058] In one or more embodiments, the method further comprises:

[0059] A conductive attachment material is applied to the proximal ends of the plurality of lead frame ends within the plurality of encapsulant pockets.

[0060] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] A more complete understanding of the subject matter may be gained by referring to the detailed description and claims when considered in conjunction with the following drawings, wherein like reference numerals refer to similar elements throughout the various figures.

[0062] Figure 1 is a top view of a circuit module including an encapsulant-embedded lead frame end according to an example embodiment;

[0063] Figure 2 According to an example embodiment Figure 1 A side cross-sectional view of the circuit module along line 2-2;

[0064] Figure 3 A solder ball having a proximal tip attached to a lead frame end according to an example embodiment Figure 1 A top view of a circuit module;

[0065] Figure 4 According to an example embodiment Figure 3 A side cross-sectional view of the circuit module along line 4-4;

[0066] Figure 5 is a schematic depiction of a Doherty power amplifier module;

[0067] Figure 6 According to an exemplary embodiment Figure 5 A top view of a Doherty power amplifier and a power amplifier module including an encapsulant embedded lead frame end with the encapsulant removed;

[0068] Figure 7 is a flow chart of a method for manufacturing a lead frame unit having lead frame ends ready for attachment to a substrate of a circuit module according to an example embodiment;

[0069] Figure 8 is a top view of a lead frame panel having a plurality of lead frame units at a first stage of manufacture according to an example embodiment;

[0070] Fig. 9 is a top view of a lead frame unit of a lead frame panel at a second manufacturing stage according to an example embodiment;

[0071] Fig.10 According to an example embodiment Fig. 9 A side cross-sectional view of the lead frame unit along line 10 - 10 ;

[0072] Fig.11 is a top view of a lead frame unit at a third manufacturing stage according to an example embodiment;

[0073] Fig.12 According to an example embodiment Fig.11 A side cross-sectional view of the lead frame unit along line 12-12;

[0074] Fig.13 According to an example embodiment Fig.11 and 12 A perspective view of a lead frame unit;

[0075] Fig.14 is a flow chart of a method for manufacturing a panel of circuit modules, each of which includes an encapsulant-embedded lead frame terminal, according to an example embodiment;

[0076] Fig.15 is a top view of a panel of a circuit module at a first manufacturing stage according to an example embodiment;

[0077] Fig.16 is in a second manufacturing stage according to an example embodiment Fig.15 A top view of a panel of a circuit module;

[0078] Fig.17 According to an example embodiment Fig.16 A side cross-sectional view of a single module unit of the panel of circuit modules along line 17-17;

[0079] Fig.18 is in a third manufacturing stage according to an example embodiment Fig.17 A side cross-sectional view of a module unit;

[0080] Fig.19 is a fourth manufacturing stage according to an example embodiment Fig.18 A side cross-sectional view of a module unit;

[0081] Fig. 20 is a fourth manufacturing stage according to an alternative exemplary embodiment Fig.18 A side cross-sectional view of a module unit;

[0082] Fig.21 is a side cross-sectional view of a circuit module having encapsulant embedded lead frame ends incorporated into a top-side cooled electronic system according to an example embodiment; and

[0083] Fig. 22 is a side cross-sectional view of a circuit module having encapsulant embedded leadframe ends incorporated into a package-on-package electronic system according to an example embodiment. DETAILED DESCRIPTION

[0084] Embodiments of the inventive subject matter described herein include a circuit module including a module substrate having a mounting surface, circuitry coupled to the mounting surface, an encapsulant material covering the mounting surface and the circuitry, and a conductive interconnect extending from the mounting surface through the encapsulant material toward a first contact surface of the circuit module. An upper surface of the encapsulant defines the first contact surface of the circuit module.

[0085] According to one or more embodiments, each of the conductive interconnects is formed by an elongated planar conductive feature of a planar lead frame, and thus each interconnect may be referred to herein as a "lead frame interconnect". Since the lead frame interconnects are formed by a portion of the planar lead frame, each lead frame interconnect may have a rectangular cross-sectional area. More specifically, each of the lead frame interconnects is formed by an elongated planar conductive feature that is attached to a lead frame flange feature at its proximal end. According to one or more embodiments, a lead frame recess may be formed in an upper surface of the lead frame flange at the proximal end of each lead frame interconnect, and each lead frame interconnect may then be bent downward at its proximal end to extend at a right angle (i.e., orthogonal) relative to the lead frame flange, wherein the lead frame recess is bent open during the bending process. This produces a leadframe unit comprising a leadframe flange and a plurality of orthogonally extending leadframe interconnects at up to four sides of the leadframe flange, with leadframe pockets at proximal ends of at least some of the leadframe interconnects.

[0086] To form a circuit module according to one or more embodiments, an electronic circuit component (e.g., an integrated circuit die, a discrete surface mount component, a bonding wire, etc.) is coupled to a conductive feature (e.g., a bonding pad) at a mounting surface of a module substrate. A lead frame unit is then aligned with the module substrate, and a distal end of a lead frame interconnect is physically and electrically coupled to a conductive feature (e.g., an additional bonding pad) at the mounting surface of the module substrate. An encapsulant material (e.g., a plastic encapsulant) is then applied over the electronic circuit component and around the lead frame interconnect, thereby substantially filling the space between the mounting surface of the module substrate and the substrate-facing surface of the lead frame unit flange. According to one or more embodiments, an upper surface of the encapsulant material that contacts the substrate-facing surface of the lead frame unit flange corresponds to a first contact surface of the circuit module.

[0087] The concave upper surface of the lead frame pit remains unfilled with the encapsulant during the process of applying the encapsulant material, and the convex surface of the lead frame pit facing the substrate extends from the first contact surface toward the substrate. Therefore, the unfilled conductive lead frame pit is coupled to the proximal end of each lead frame interconnect. Then, the lead frame flange is removed. According to one or more embodiments, this allows the lead frame interconnect to remain in the encapsulant material and be separated from the lead frame pit and the lead frame flange at its proximal end. In such embodiments, the conductive material forming the lead frame pit is removed together with the lead frame flange, so that the proximal end of the lead frame interconnect is exposed in the pit ("encapsulant pit") in the encapsulant material. In such embodiments, each encapsulant pit is defined by a concave surface of the encapsulant material, wherein the concave surface is recessed in the encapsulant material relative to the first contact surface. In other embodiments, some or all of the conductive material forming the lead frame recesses remains attached to the proximal ends of the lead frame interconnects, thereby creating a plurality of recessed conductive lead frame recesses extending from the first contact surface of the encapsulant material toward the module substrate. To prepare the resulting electronic circuit module for attachment to a system substrate (e.g., in a flip chip orientation) or to an overlying electronic device or module (e.g., in a package-on-package system), solder balls may be applied to the exposed proximal ends of the lead frame interconnects and / or the recessed conductive lead frame recesses.

[0088] According to one or more additional embodiments, a circuit module may include an embedded conductive structure (e.g., a conductive coin, a set of thermal / ground vias, or another conductive feature) extending through a module substrate, and an integrated circuit die (e.g., a power amplifier die) connected to a surface of the embedded heat dissipation structure exposed at a mounting surface of the module substrate. According to one or more specific embodiments, the integrated circuit die may include a power amplifier die, and the embedded conductive structure may provide a thermal path to an external heat sink. Additionally or alternatively, the embedded conductive structure may provide a ground path for the power amplifier die.

[0089] In some embodiments, the circuit module can be coupled to the mounting surface of the system substrate in a reverse orientation (i.e., an orientation in which the contact surface of the encapsulant material contacts the system substrate and the proximal ends of the lead frame ends can be electrically coupled (e.g., by solder balls) to corresponding bonding pads at the mounting surface of the system substrate). In such embodiments, the lead frame ends can be used as input / output (I / O) terminals, bias transfer terminals, ground terminals, etc. In addition, a heat sink or other heat dissipation structure can be coupled to the embedded conductive structure exposed at the upward-facing surface of the module substrate (if included). This may be referred to herein as a "top-side cooled" electronic system.

[0090] Alternatively, the circuit module may be coupled to the system substrate in a non-inverted orientation (i.e., an orientation in which the module substrate contacts the system substrate), and the circuit module may serve as the "bottom" or "lower device" in a "package-on-package" electronic system. In such embodiments, the bonding pads exposed at the outer bottom surface of the module substrate may be electrically coupled to corresponding bonding pads at the mounting surface of the system substrate, and the module bonding pads may be used as I / O terminals, bias transfer terminals, ground terminals, etc. Additionally, bonding pads of another circuit module or device (herein referred to as the "upper device") may be electrically coupled (e.g., by solder balls) to the upward-facing proximal end of the lead frame interconnect (or lead frame recess, if retained) to form a package-on-package electronic system. The lead frame interconnect may be used as an I / O terminal, bias transfer terminal, ground terminal, etc. between the circuit module and the upper device.

[0091] The circuit module embodiments described herein can be used to accommodate any of a variety of different types of circuits. In order to provide specific examples that will help convey the details of the subject matter of the present invention, examples of power amplifier modules (and more specifically, Doherty power amplifiers) are used herein. However, based on the description herein, those skilled in the art will understand that the subject matter of the present invention can be used in circuit modules other than power amplifier modules. Therefore, the use of power amplifiers in the example embodiments below does not mean that the application of the subject matter of the present invention is limited to power amplifier modules, because the subject matter of the present invention can also be used in other types of electronic circuit modules.

[0092] Figure 1 1 is a top view of a circuit module 100 including an encapsulant embedded lead frame end 142 according to an example embodiment. To enhance understanding, Figure 1 Should Figure 2 Also check out, Figure 2 yes Figure 1 2 is a cross-sectional side view of circuit module 100 along line 2 - 2 . Circuit module 100 has a first side 104 , a second side 105 , a third side 106 , and a fourth side 107 extending between first surface 101 and second surface 103 (or top and bottom surfaces) of circuit module 100 .

[0093] As will be described in detail below, circuit module 100 includes electronic circuitry implemented on or above a multi-layer module substrate 201. The electronic circuitry is embedded within an encapsulant material 180. In addition, according to one or more embodiments, circuit module 100 includes one or more groups 141 of lead frame ends 142 for providing electrical connectivity between the electronic circuitry and external circuitry (e.g., for transmitting signals and bias voltages, and for connecting to a ground reference), as will be discussed in detail below. The electronic circuitry and lead frame ends 142 are embedded in the encapsulant material 180, and the proximal ends of the lead frame ends 142 are exposed at a top surface 101 of circuit module 100.

[0094] The module substrate 201 may include a multilayer printed circuit board (PCB) or other suitable substrate. The module substrate 201 has a first side, a second side, a third side, and a fourth side (only sides 205 and 207 are numbered) extending between a first surface 202 (also referred to as a "top" or "mounting surface") and a second surface 203 (also referred to as a "bottom" or "heat sink attachment surface"). The bottom surface 203 of the module substrate 201 also corresponds to the bottom surface 103 of the circuit module 100.

[0095] More specifically, the module substrate 201 includes a plurality of dielectric layers 214, 215, 216 (e.g., formed of FR-4, ceramic, or other PCB dielectric materials) arranged alternately with a plurality of conductive layers 209, 210, 211, 212, wherein a top surface 202 of the module substrate 201 is defined by the patterned conductive layers 212, and a bottom surface 203 of the module substrate 201 is defined by the conductive layers 209. It should be noted that while the module substrate 201 is illustrated as including three dielectric layers 214-216 and four conductive layers 209-212, other embodiments of the module substrate may include more or fewer dielectric layers and / or conductive layers.

[0096] Each of the various conductive layers 209-212 may have a primary purpose and may also include conductive features that facilitate signal and / or voltage / ground routing between other layers. Although the following description indicates a primary purpose for each of the conductive layers 209-212, it should be understood that these layers (or their functionality) may differ from one another. Figure 2 The invention is arranged in a specific arrangement best shown in FIG. 1 and discussed below.

[0097] For example, in an embodiment, the patterned conductive layer 212 at the mounting surface 202 of the module substrate 201 can be primarily used as a signal conducting layer. More specifically, the layer 212 includes a plurality of conductive features (e.g., conductive pads and traces) that serve as attachment points for the integrated circuit dies 234, 254, the surface mount components 224, and other discrete components, and also provide electrical connectivity between the dies 234, 254, the components 224, and other discrete components.

[0098] In addition, as will be discussed below, layer 212 may include a plurality of conductive features 213 (e.g., bonding pads) that are specifically designated for attaching conductive lead frame terminals 142 that are designed to transmit signals, bias voltages, and / or ground connections. Layer 212 may also include a plurality of "dummy" pads to which "dummy" lead frame terminals 142 may be attached. As used herein, a "dummy" lead frame terminal is a terminal that is not assigned any specific function in the device and is not coupled to any active circuitry. In various embodiments, the dummy terminals and dummy pads may remain electrically floating (i.e., not coupled to ground or other circuitry), or may alternatively be coupled to a ground plane (e.g., ground plane 211).

[0099] In an embodiment, the second patterned conductive layer 211 is used as an RF ground layer. The RF ground layer 211 also includes a plurality of conductive features (e.g., conductive traces) that can be electrically coupled to conductive features of the signal conducting layer 212 and the system ground layer 209 (described below) through conductive vias (e.g., via 217) extending through the dielectric layers 214-216.

[0100] The third patterned conductive layer 210 is used to deliver bias voltages to the die 234, 254 and may also be used as a routing layer, as mentioned above. Finally, the fourth conductive layer 209 is used as a system ground layer and also as a heat sink attachment layer, such as when combined with Fig.21 In other embodiments, the fourth conductive layer 209 may be patterned, and the conductive portions of the patterned conductive layer 209 may serve as input terminals and output terminals or other types of terminals, such as Fig. 22 Explain in more detail.

[0101] According to an embodiment, the module substrate 201 further includes one or more heat dissipation structures 218 extending through the module substrate 201 between the top surface 202 and the bottom surface 203. The die 234, 254 can be physically and electrically coupled to the surfaces of the heat dissipation structures 218 exposed at the top surface 202 of the module substrate 201. The bottom surfaces of the heat dissipation structures 218 can be exposed at the bottom surface 203 of the module substrate 201, or the bottom surfaces of the heat dissipation structures 218 can be covered with a bottom conductive layer 209, such as Figure 2. In either case, during operation of the device 100, the heat dissipation structure 218 is configured to provide a thermal path between the top and bottom surfaces of the heat dissipation structure 218 for heat generated by the tube core 234, 254. In various embodiments, the heat dissipation structure 218 may include a conductive metal coin block that is press-fit and / or attached to a through hole extending between the surfaces 202, 203 of the module substrate 201. In an alternative embodiment, each of the heat dissipation structures 218 may include a plurality (or a group of) conductive thermal vias (e.g., circular or strip-shaped vias) extending between the surfaces 202, 203 of the module substrate 201. As will be described in conjunction with Fig.21 In more detail, when the circuit module 100 is integrated into a top-side cooled electrical system, the exposed bottom surface of the heat dissipation structure 218 (or the portion of the conductive layer 209 overlying these surfaces) is physically and thermally coupled to a heat sink (e.g., Fig.21 Alternatively, the heat sink 2116 may be combined with Fig. 22 In more detail, when the circuit module 100 is integrated into a bottom-side cooled or stacked package electrical system, the exposed bottom surface of the heat dissipation structure 218 (or the portion of the conductive layer 209 overlying these surfaces) can be physically and thermally coupled to the conductive block (e.g., Fig. 22 Conductive coin block 2218).

[0102] As mentioned above, electronic circuitry is implemented on, over, and / or within multi-layer module substrate 201. The electronic circuitry may include a plurality of dies and components coupled to mounting surface 202 of module substrate 201. For example, the circuitry may include at least one semiconductor die (e.g., dies 234, 254), at least one surface mount component (e.g., component 224), electrical interconnects (e.g., bond wires, bond pads, conductive vias, and conductive traces), and / or other electrical elements.

[0103] A non-conductive encapsulant material 180 (e.g., a plastic encapsulant) is disposed on mounting surface 202 and over and around the die and components and around lead frame end 142. Encapsulant material 180 has a first side 184, a second side 185, a third side 186, and a fourth side 187 extending between mounting surface 202 of module substrate 201 and an exposed top surface 181 of encapsulant material 180. Sides 184-187 of encapsulant material 180 are coplanar with sides (not numbered) of module substrate 201 (and thus both sides 184-187 of encapsulant material 180 and sides of module substrate 201 are coplanar with sides 104-107 of circuit module 100). Top surface 181 of encapsulant material 180 also corresponds to top surface 101 of circuit module 100. As shown in FIG. Figure 2As shown in , encapsulant material 180 has a thickness 282 that is greater than the maximum height of components embedded within encapsulant material 180 (eg, surface mount component 220 and dies 234 , 254 ).

[0104] The above-mentioned groups 141 of lead frame ends 142 are embedded within the encapsulant material 180 proximate to the sides 184-187 of the encapsulant material 180 (and therefore proximate to the sides 104-107 of the circuit module 100). The non-conductive encapsulant material 180 completely surrounds each of the lead frame ends 142, except for the proximal ends 144 of the lead frame ends 142 exposed at the surface 101 of the module 100. Thus, there is encapsulant material 180 between each lead frame end 142 of the module 100 and the side 104-107 closest thereto. Each group 141 of lead frame ends 142 may include one or more lead frame ends 142. Although Figure 1-4 Groups 141 are depicted that each include five lead frame ends 142, but each group 141 may include more or fewer lead frame ends 142, and / or some groups 141 may be excluded from circuit module 100. Additionally, in some embodiments, one or more lead frame ends (not shown) may be more centrally located within circuit module 100.

[0105] According to one or more embodiments, each lead frame end 142 includes an elongated planar conductive structure extending from the mounting surface 202 of the module substrate 201 toward or to the top surface 101 of the circuit module 100 . Figure 2 As shown in the cross-sectional view 246 of the second lead frame end 142 starting from the left side 107 of the circuit module 107, each lead frame end 142 may have a rectangular cross-section defined by a lead frame end width 250 and a lead frame end thickness 251. For example, the lead frame end width 250 may be in the range of about 0.050 millimeters (mm) to about 0.100 mm, and the lead frame end thickness 251 may be in the range of about 0.050 mm to about 0.500 mm. In other embodiments, the lead frame end width 250 and / or the lead frame end thickness 250 may be less than or greater than the above-given ranges. As will be described in detail below, the rectangular cross-section 246 of each lead frame end 142 arises from the fact that each lead frame end 142 is formed from a substantially planar lead frame panel (e.g., Figure 8 The fact that the circuit module 100 is formed as part of the lead frame panel 800 of FIG. 1 is a rectangular cross-section of the lead frame end 142 represents a significant difference between the circuit module 100 and conventional packaged devices.

[0106] According to one or more embodiments, a first end 144 (referred to herein as a "proximal end") of each lead frame end 142 is exposed at the top surface 101 of the circuit module 100, and a second end 145 (referred to herein as a "distal end") of each lead frame end 142 is embedded within the encapsulant material 180. More specifically, the distal end 145 of the end 142 is embedded within the encapsulant material 180 and is physically coupled and electrically connected to a conductive feature 213 (e.g., a bonding pad) on the mounting surface 202 of the module substrate 201. The conductive feature on the mounting surface 202 of the module substrate 201 is in turn electrically coupled to the embedded circuitry. Thus, the lead frame end 142 is electrically coupled to the embedded circuitry.

[0107] According to one or more embodiments, a plurality of encapsulant recesses 143 extend into the encapsulant material 180 at the top surface 101 of the circuit module 100, and the proximal ends 144 of the lead frame ends 142 are exposed in the encapsulant recesses 143. The concave surfaces of the encapsulant recesses 143 are substantially defined by the encapsulant material 180. Each of the encapsulant recesses 143 has a width 245 that is greater than the lead frame end width 250 (e.g., about 10% to about 200% wider than the lead frame end width 250). In addition, the lowest depth of each of the encapsulant recesses 143 is at a depth 243 below the surface 101, and the depth 243 is in the range of at least about 0.100 mm to about 0.300 mm, but the depth 243 can also be smaller or larger.

[0108] In some embodiments, the thickness 282 of the encapsulant material 180 can be greater than the height 249 of the lead frame end 142, and thus the proximal end 144 of the lead frame end 142 can be recessed below the top surface 101 of the circuit module 100. In other embodiments, the proximal end 144 of the lead frame end 142 can extend to the top surface 101 of the circuit module 100 or extend above the top surface 101 of the circuit module 100.

[0109] Either way, the proximal end 144 of the leadframe end 142 may be exposed within the encapsulant pocket 143. To physically couple and electrically connect the proximal end 144 of the leadframe end 142 to external circuitry, a conductive attaching material may be applied to the proximal end 144 of the leadframe end 142.

[0110] To illustrate, Figure 3 and 4 The following are respectively shown according to example embodiments. Figure 1 A top view and a side cross-sectional view (along the direction of the circuit module 100) Figure 34-4), wherein the conductive attachment material 342 is deposited on and attached to the proximal end 144 of the lead frame end 142 within the recess 143. For example, the conductive attachment material 342 may include a solder ball, solder paste, or a conductive adhesive. Fig.21 and 22 Explained in detail, the conductive attachment material 342 enables the circuit module 100 to be physically coupled and electrically connected to a system substrate (eg, Fig.21 The substrate 2101) may be connected to an external circuit system in the form of another packaged electronic device (e.g., Fig. 22 device 2210).

[0111] As previously indicated, circuit module 100 may be used to house any of a variety of different types of circuits. In order to provide a specific example that will help convey the details of the inventive subject matter, an example of a power amplifier (and more specifically, a Doherty power amplifier) ​​is utilized herein. However, based on the description herein, one skilled in the art will appreciate that the inventive subject matter may be used in circuit modules having circuitry other than a Doherty power amplifier.

[0112] Figure 5 is a schematic depiction of a Doherty power amplifier 500 . Figure 5 Should Figure 6 Also check out, Figure 6 is according to an example embodiment including Figure 5 A top view of a power amplifier module 600 of a circuit system corresponding to the Doherty power amplifier 500. Figure 6 , excluding encapsulant material 180 ( Figure 1-4 ) to better illustrate the circuitry of power amplifier module 600. It should be understood that encapsulant material 180 will be included in module 600, such as in combination with Figure 1-4 Discussed.

[0113] Basically, the power amplifier module 600 includes various circuit components corresponding to the circuit elements of the amplifier 500, as will be described below. It can be noted here that Figure 1-4 Elements with the same reference numerals as those in FIG. 6 include substantially the same materials, functionalities, and characteristics, and are described above in conjunction with Figure 1-4 The details and embodiments of such elements described also apply to Figure 6 These details are incorporated into Figure 6 in this description.

[0114] The circuit system in the power amplifier module 600 is supported by a multi-layer module substrate 201, which can be combined with Figure 2The embodiments of the module substrate 201 described are substantially the same. Briefly, the module substrate 201 has a top surface 202 (or mounting surface 202), various dies (e.g., Figure 2 , 4 , 6 dies 234, 634, 254, 654) and surface mount components (e.g., Figure 2 , 4 , 6 components 224) coupled to the top surface 202. As previously indicated, the module substrate 201 may also include a mounting surface 202 and a bottom surface 203 ( Figure 2 ) between the top surface 202 of the module substrate 201. The die 234, 634, 254, 654 can be physically and electrically coupled to surfaces of the heat dissipation structure 218 that are exposed at the top surface 202 of the module substrate 201, and those surfaces of the heat dissipation structure 218 can be considered to be coplanar portions of the top surface 202 of the module substrate 201.

[0115] Additionally, the conductive layer at the mounting surface 202 (eg, Figure 2 The layer 212 of is patterned to include a plurality of conductive features (e.g., Figure 2 , 6 The bonding pads 213, 620, 622) and the conductive traces that electrically couple the mounting surface conductive features, the die, and the surface mount components together. The surface mount components (e.g., Figure 2 , 4 , 6) may be coupled to some of the conductive bonding pads. In addition, as described above, a plurality of lead frame ends 142 may be coupled to other of the conductive bonding pads (e.g., coupled to bonding pads 620, 622, and other unnumbered bonding pads). According to some embodiments, the bonding pads to which the lead frame ends 142 are connected are located near the sides 104-107 of the circuit module 600. Some of the lead frame ends 142 are configured to transmit signals or bias voltages, while other of the lead frame ends 142 may be configured to be connected to a ground reference. Still other of the lead frame ends 142 may be electrically floating or coupled to a "dummy" end of ground.

[0116] In an embodiment, the Doherty amplifier 500 and the power amplifier module 600 each include an RF input terminal 520, 620, an RF output terminal 522, 622, a power splitter 224, 524 (eg, implemented as Figure 2 , 4 , one or more surface mount components 224 of 6), having one or more carrier amplifier dies (e.g., Figure 2 , 6The carrier amplifier path 530, 630 of the die 234, 634) has one or more peaking amplifiers (e.g., Figure 2 , 6 The peaking amplifier paths 550, 650, the phase delay and impedance reversal elements 570, 670, and the combining nodes 572, 672 of the die 254, 654).

[0117] In one or more embodiments, each of the RF input terminals 520, 620 and the RF output terminals 522, 622 may be connected using an example of a lead frame terminal (eg, Figure 1-4 , 6) is implemented. When incorporated into a larger RF system, the RF input terminals 520, 620 are coupled to an RF signal source, and the RF output terminals 522, 622 are coupled to a load 590 (e.g., an antenna or other load). The RF signal source provides an input RF signal, which is an analog signal that includes spectral energy that is typically centered around one or more carrier frequencies. Basically, the Doherty amplifier 500 and the power amplifier module 600 are configured to amplify the input RF signal and generate an amplified RF signal at the RF output terminals 522, 622.

[0118] In an embodiment, the power divider 224, 524 has an input 526, 626 and two outputs 527, 627, 528, 628. The power divider input 526, 626 is coupled to the RF input terminal 520, 620 to receive the input RF signal. Figure 6 , the power divider input 626 can be connected through the conductive layer 212 ( Figure 2 ) and one or more bond wires are coupled to the RF input 620. The power divider 224, 524 is configured to divide the RF input signal received at the input 526, 626 into a first RF signal and a second RF signal (or a carrier signal and a peaking signal), which are provided to the carrier amplifier path 530, 630 and the peaking amplifier path 550, 650 through the outputs 527, 627, 528, 628, respectively. According to an embodiment, the power divider 224, 524 includes a first phase shift element, which is configured to impart a first phase shift (e.g., an approximately 90 degree phase shift) to the peaking signal before providing the peaking signal to the output 528, 628. Therefore, at the outputs 527, 627 and 528, 628, the carrier signal and the peaking signal may be approximately 90 degrees out of phase with each other.

[0119] When the Doherty amplifier 500 implemented in the power amplifier module 600 has a symmetrical configuration (i.e., a configuration in which the carrier amplifier power transistors and the peaking amplifier power transistors are substantially the same size), the power divider 224, 524 can divide or split the input RF signal received at the input 526, 626 into two very similar signals, which in some embodiments have equal power. Conversely, when the Doherty amplifier 500 implemented in the power amplifier module 600 has an asymmetrical configuration (i.e., a configuration in which one of the amplifier power transistors (typically the peaking amplifier transistor) is significantly larger), the power divider 224, 524 can output a carrier signal and a peaking signal having unequal powers.

[0120] The outputs 527, 627, 528, 628 of the power dividers 224, 524 are connected to carrier amplifier paths 530, 630 and peaking amplifier paths 550, 650, respectively. The carrier amplifier paths 530, 630 are configured to amplify the carrier signal from the power dividers 224, 524 and provide the amplified carrier signal to the power combining nodes 572, 672. Similarly, the peaking amplifier paths 550, 650 are configured to amplify the peaking signal from the power dividers 224, 524 and provide the amplified peaking signal to the power combining nodes 572, 672, wherein the paths 530, 630, 550, 650 are designed so that the amplified carrier signal and the peaking signal arrive at the power combining nodes 572, 672 in phase with each other.

[0121] According to an embodiment, the carrier amplifier path 530, 630 includes one or more carrier amplifier dies (e.g., Figure 2 , 6 234, 634) and a phase shift and impedance inversion element 570, 670. More specifically, in various embodiments, the carrier amplifier path 530, 630 includes an RF input 534, 634, an RF output 538, 638, and one or more amplifier stages coupled between the input 534, 634 and the output 538, 638. The RF input 534, 634 is coupled to the first output 527, 627 of the power divider 224, 524 (e.g., by bonding wires and conductive traces), and thus the RF input 534, 634 receives the carrier signal generated by the power divider 224, 524.

[0122] Each amplifier stage of the carrier amplifier path 530, 630 includes a power transistor. In a single-stage carrier amplifier, a single power transistor (e.g., only one power transistor) may be implemented on a single power amplifier die. Figure 6 In a two-stage carrier amplifier, two power transistors (e.g., Figure 6 636, 637), or may be on separate dies (e.g., Figure 2 , 6 Each power amplifier is implemented on a die 234, 634) such as Figure 6 The power amplifier module depicted in FIG.

[0123] In either case, each power transistor includes a control terminal (e.g., a gate terminal) and a first current carrying terminal and a second current carrying terminal (e.g., a drain terminal and a source terminal). In a single-stage device that would include a single power transistor, the control terminal is electrically connected to the RF input terminal 534, 634, one of the current carrying terminals (e.g., the drain terminal) is electrically connected to the RF output terminal 538, 638, and the other current carrying terminal (e.g., the source terminal) is electrically connected to a ground reference (e.g., through the heat sink structure 218). Conversely, a two-stage amplifier would include two power transistors coupled in series, with the first transistor serving as a driver amplifier transistor having a relatively low gain, and the second transistor serving as a final amplifier transistor having a relatively high gain. In such embodiments, the control terminal of the driver amplifier transistor is electrically connected to the RF input terminal 534, 634, one of the current carrying terminals of the driver amplifier transistor (e.g., the drain terminal) may be electrically connected to the control terminal of the final amplifier transistor, and the other current carrying terminal (e.g., the source terminal) of the driver amplifier transistor is electrically connected to the ground reference. Additionally, one of the current carrying terminals (eg, the drain terminal) of the final amplifier transistor is electrically connected to the RF output terminal 538, 638, and the other current carrying terminal (eg, the source terminal) of the final amplifier transistor may be electrically connected to a ground reference.

[0124] In addition to the power transistors, the input and output impedance matching networks and the bias circuitry components ( Figure 5 , 6 ) may also be included in the carrier amplifier path 530, 630. In an embodiment, the plurality of lead frame terminals (e.g., Figure 1 , 6 The lead frame end 142 of the carrier amplifier 530, 630 that is close to the side 105 provides a bias voltage for the transistors 636, 637. In addition, in embodiments in which the carrier amplifier path 530, 630 includes a two-stage amplifier, a bias voltage may also be provided along the carrier amplifier path 530, 630 between the driver amplifier transistor and the final amplifier transistor (e.g., between the Figure 6 The transistors 636 and 637 include an inter-stage matching network ( Figure 5 , 6 not shown).

[0125] In an embodiment, the RF output terminals 538, 638 of the carrier amplifier paths 530, 630 are coupled to the power combining nodes 572, 672 through phase shifting and impedance reversing elements 570, 670. According to an embodiment, the impedance reversing element may be implemented as a lambda / 4 (λ / 4) transmission line phase shift element (e.g., Figure 2 The λ / 4 transmission line phase shift element 570, 670 is a microstrip line formed by the conductive layer 212 of the carrier amplifier path 530, 630, and imparts a relative phase shift of about 90 degrees to the carrier signal after amplification along the carrier amplifier path 530, 630. A first end of the impedance reversing element 570, 670 is coupled to the RF output terminal 538, 638 of the carrier amplifier path 530, 630 (e.g., through a set of bonding wires), and a second end of the phase shift element 570, 670 is coupled to the power combining node 572, 672 (e.g., through another set of bonding wires).

[0126] Referring now to the peaking amplifier paths 550, 650, according to an embodiment, the peaking amplifier paths 550, 650 include one or more peaking amplifier dies (e.g., Figure 2 , 6 More specifically, in various embodiments, the peaking amplifier path 550, 650 includes an RF input 554, 654, an RF output 558, 658, and one or more amplifier stages coupled between the input 554, 654 and the output 558, 658. The RF input 554, 654 is coupled to the second output 528, 628 of the power divider 224, 524 (e.g., via bond wires and conductive traces), and thus the RF input 554, 654 receives the peaking signal generated by the power divider 224, 524.

[0127] As with carrier amplifier paths 530, 630, each amplifier stage of peaking amplifier paths 550, 650 includes a power transistor. In a single-stage peaking amplifier, a single power transistor (e.g., only one power transistor) may be implemented on a single power amplifier die. Figure 6 In a two-stage peaking amplifier, two power transistors (e.g., Figure 6 656, 657), or may be on separate dies (e.g., Figure 2 , 6 Each power amplifier is implemented on a die 254, 654) such as Figure 6 The power amplifier module depicted in FIG.

[0128] In either case, each power transistor includes a control terminal (e.g., a gate terminal) and a first current carrying terminal and a second current carrying terminal (e.g., a drain terminal and a source terminal). In a single-stage device that would include a single power transistor, the control terminal is electrically connected to the RF input terminal 554, 654, one of the current carrying terminals (e.g., the drain terminal) is electrically connected to the RF output terminal 558, 658, and the other current carrying terminal (e.g., the source terminal) is electrically connected to a ground reference (e.g., through the heat sink structure 218). Conversely, a two-stage amplifier would include two power transistors coupled in series, with the first transistor serving as a driver amplifier transistor having a relatively low gain, and the second transistor serving as a final amplifier transistor having a relatively high gain. In such embodiments, the control terminal of the driver amplifier transistor is electrically connected to the RF input terminal 554, 654, one of the current carrying terminals of the driver amplifier transistor (e.g., the drain terminal) may be electrically connected to the control terminal of the final amplifier transistor, and the other current carrying terminal (e.g., the source terminal) of the driver amplifier transistor is electrically connected to the ground reference. Additionally, one of the current carrying terminals (eg, the drain terminal) of the final amplifier transistor is electrically connected to the RF output terminal 558, 658, and the other current carrying terminal (eg, the source terminal) of the final amplifier transistor may be electrically connected to a ground reference.

[0129] In addition to the power transistors, the input and output impedance matching networks and the bias circuitry components ( Figure 5 , 6 ) may also be included in the peaking amplifier path 550, 650 and / or electrically coupled to the peaking amplifier. In an embodiment, the peaking amplifier path 550, 650 may be electrically coupled to the peaking amplifier path 550, 650. Figure 1 , 6 The bias voltage is provided at the lead frame end 142 of the lead frame that is close to the side 107. In addition, in embodiments in which the peaking amplifier path 550, 650 includes a two-stage amplifier, a bias voltage may also be provided along the peaking amplifier path 550, 650 between the driver amplifier transistor and the final amplifier transistor (e.g., between the Figure 6 The transistors 656 and 657 include an inter-stage matching network ( Figure 5 , 6 not shown).

[0130] In an embodiment, the RF output terminals 558, 658 of the peaking amplifier paths 550, 650 are directly coupled to the power combining nodes 572, 672. According to an embodiment, the RF output terminals 558, 658 of the peaking amplifier paths 550, 650 and the combining nodes 572, 672 are implemented with common elements. More specifically, in an embodiment, the final stage transistors (e.g., Figure 6The RF output terminals 558, 658 of the transistor 657 of the phase shifting element 570, 670 are configured to function as both the combining node 572, 672 and the output terminals 558, 658 of the peaking amplifier paths 550, 650. To facilitate the combining of the amplified carrier signal and the peaking signal, and as mentioned above, the RF output terminals 558, 658 (and therefore the combining node 572, 672) are connected to the second ends of the phase shifting and impedance reversing elements 570, 670 (e.g., by a set of bond wires). In other embodiments, the combining node 572, 672 may be a separate element from the RF output terminals 558, 658.

[0131] In either case, the amplified carrier RF signal and the peaking RF signal are combined in phase at the combining node 572, 672. The combining node 572, 672 is electrically coupled to the RF output terminal 522, 622 to provide the amplified and combined RF output signal to the RF output terminal 522, 622. In an embodiment, an output impedance matching network 574, 674 between the combining node 572, 672 and the RF output terminal 522, 622 is used to present an appropriate load impedance to each of the carrier amplifier path 530, 630 and the peaking amplifier path 550, 650. The resulting amplified RF output signal is produced at the RF output terminal 522, 622, to which an output load 590 (e.g., an antenna) is connected.

[0132] The Doherty amplifier 500 and the power amplifier module 600 are configured such that the carrier amplifier path 530, 630 provides amplification for relatively low level input signals, and the two amplification paths 530, 630, 550, 650 operate in combination to provide amplification for relatively high level input signals. This can be achieved, for example, by biasing the carrier amplifier transistor (e.g., Figure 6 636, 637) to operate the carrier amplifier transistor in class AB mode, and bias the peaking amplifier transistor (e.g., Figure 6 transistors 656, 657) so that the peaking amplifier transistors operate in class C mode.

[0133] exist Figure 5 and 6In the embodiment shown in and described above, the first phase shift element in the divider 224, 524 imparts a phase shift of approximately 90 degrees to the peaking signal prior to amplification, and the phase shift and impedance reversing element 570, 670 similarly imparts a phase shift of approximately 90 degrees to the amplified carrier signal, so that the amplified carrier signal and the peaking signal can be combined in phase at the combining node 572, 672. Such an architecture is referred to as a non-inverting Doherty amplifier architecture. In an alternative embodiment, the first phase shift element in the divider 224, 524 can impart a phase shift of approximately 90 degrees to the carrier signal rather than the peaking signal prior to amplification, the phase shift and impedance reversing element 570, 670 can alternatively be included at the output of the peaking amplifier, and the output 538, 638 of the carrier amplifier path 530, 630 can be used as the combining node. Such an alternative architecture is referred to as an inverting Doherty amplifier architecture. In still other alternative embodiments, other combinations of phase shifting elements may be implemented in the carrier path 530, 630 and / or the peaking path 550, 650 prior to amplification to achieve a phase difference of approximately 90 degrees between the carrier signal and the peaking signal prior to amplification, and the phase shifts applied to the amplified carrier signal and the amplified peaking signal may be selected accordingly to ensure that the signals are combined in phase at the combining node 572, 672.

[0134] A method of manufacturing the circuit module 100, 600 will now be described. An embodiment of the method includes first manufacturing a non-planar "lead frame unit" (e.g., Fig.13 The non-planar "lead frame unit" 820 will then be attached to the module substrate (e.g., as later combined with Fig.14 , 16 described).

[0135] Figure 7 is a method for manufacturing one or more non-planar lead frame units 820 ( Figure 11-13 ), each non-planar lead frame unit having a plurality of sets of lead frame ends (e.g., Figure 1-4 , 6, 8-13 ends 142). For manufacturing cost and efficiency, multiple identical non-planar lead frame units 820 ( Figure 11-13 ), and the plurality of non-planar lead frame units 820 may be separated from each other during the manufacturing process. Alternatively, the non-planar lead frame units 820 may be formed individually. To indicate the two manufacturing processes, Figure 8 depicts a top view of a panel 800 for parallel fabrication of an array of a plurality of non-planar lead frame units 820, and Figure 9-13 Each depicts an individual planar or non-planar lead frame unit 810, 820 during a series of manufacturing steps. It should be understood that the panel 800 ( Figure 8) may alternatively be used to form only one non-planar lead frame unit 820, or Figure 9-13 The planar and non-planar lead frame units 810, 820 depicted in FIG. 8 can be manufactured in the context of a panel.

[0136] refer to Figure 7 and 8 In both cases, the method begins in block 702 by providing a lead frame panel 800. For example, Figure 8 is a top view of a lead frame panel 800 having four planar lead frame units 810 (delineated by dashed lines) according to one or more embodiments.

[0137] The lead frame panel 800 may be a semi-rigid conductive (e.g., metal) sheet having substantially planar and parallel top and bottom surfaces. Thus, at this stage of manufacturing, each of the planar lead frame units 810 also has substantially planar and parallel top and bottom surfaces. The lead frame panel 800 may be formed from one or more conductive materials including copper, copper alloys, and / or other suitable materials. According to an embodiment, the lead frame panel 800 may have a thickness (e.g., Figure 2 The thickness 251 of the end 142 corresponds to the thickness 251 ( Fig.10 ).

[0138] As also indicated in block 702, the method further includes forming an array of openings 827 in each planar leadframe unit 810 of the leadframe panel 800 to define a plurality of pre-bent leadframe ends 142 connected between the sacrificial center feature 822 and the sacrificial edge feature 824. In essence, each of the pre-bent leadframe ends 142 corresponds to an elongated planar conductive feature of the planar leadframe unit 810. More specifically, as Figure 8 As shown in , up to four groups of openings 827 may be formed adjacent to the four sides of each planar lead frame unit 810. According to other embodiments, fewer groups of openings 827 may be formed adjacent to less than all four sides of each planar lead frame unit 810. To enhance understanding, in Figure 8 An enlarged view of one of the groups 840 of openings 827 is shown to the right of FIG.

[0139] Forming the opening 827 in the lead frame panel 800 may include performing an etching process, a stamping process, or another suitable process. Figure 8 As best shown in the enlarged view of the group 840 of openings 827 on the right side of FIG. 1 , each opening 827 is substantially rectangular in shape, and each group of adjacent openings 827 defines a pre-bent lead frame end 142 between adjacent openings 827. The number of openings 827 is one greater than the number of pre-bent lead frame ends 142. The width of each opening 142 ( Figure 8The vertical dimension in ( ) defines the distance between adjacent lead frame ends 142 and also defines a lead frame spacing 850 (i.e., the center-to-center distance between adjacent lead frame ends 142). According to various embodiments, the lead frame spacing 850 is in the range of about 0.4 mm to about 0.1 mm, but the lead frame spacing 850 can also be smaller or larger. The length ( Figure 8 The horizontal dimension in ( ) defines the height of each pre-bent lead frame end 142 (eg, Figure 2 Finally, the separation distance between adjacent openings 827 defines the width of each pre-bent lead frame end 142 (eg, Figure 2 width 250).

[0140] In addition to defining the pre-bent leadframe ends 142, the formation of the array openings 827 also defines several other features of each planar leadframe unit 810. Specifically, a sacrificial center feature 822 is defined between the array openings 827 within each planar leadframe unit 810. Additionally, four sacrificial corner features 823 are defined between adjacent array openings 827. Finally, sacrificial edge features 824 are defined between the array openings 827 and the four edges of the planar leadframe unit 810. As shown in FIG. Figure 8 As best seen in the enlarged view of the group 840 of openings 827 on the right side of FIG. 8 , each pre-bent lead frame end 142 has a proximal end 144 connected to the sacrificial center feature 822 and a distal end 145 connected to one of the sacrificial edge features 824 .

[0141] Reference now Figure 7 , 9 and 10, the method continues at block 704 by forming a lead frame recess 943 in the planar upper surface 825 of the central sacrificial feature 822 proximate to the proximal end 144 of each pre-bent lead frame end 142. For illustration, Fig. 9 and 10 The lead frame recess 943 according to one or more embodiments is respectively Figure 8 Top view and side cross-sectional view (along line 10 - 10 ) of one of the planar lead frame units 810 .

[0142] Each lead frame dimple 943 is defined by a concave surface of the sacrificial center feature 822, which extends below the upper surface 825 of the sacrificial center feature 822. The lead frame dimple 943 can be formed by performing a stamping process, a drilling process, or another suitable process. The shape of each dimple 943 depends on the shape of the object used to form the dimple 943. For example, when a stamping process is used, the shape of each dimple 943 in the planar upper surface 825 can be a square (e.g., Fig. 9), rectangular, circular or other shapes. Similarly, based on the shape of the stamp, the cross-sectional shape of each dimple 943 may be curved (such as Fig.10 ), square or rectangular or other shapes. According to one or more embodiments, each lead frame dimple 943 may have a depth 944 below the upper surface 825 of the sacrificial center feature 822 (or the lead frame panel 800), wherein the depth 944 is in the range of about 40% to about 80% of the thickness 251 of the planar lead frame unit 810 (and the sacrificial center feature 822), but the depth 944 may also be smaller or larger. In addition, the width 945 of each lead frame dimple 943 may be in the range of about 110% to 300% or more of the width 250 of the pre-bent lead frame end 142. Alternatively, each lead frame dimple 943 may be shallower, deeper, narrower or wider than the above given ranges.

[0143] Reference now Figure 7 , 11 At block 706, the method continues by converting the planar lead frame unit 810 into a non-planar lead frame unit 820. According to one or more embodiments, this conversion is accomplished by separating the distal end 145 of the pre-bent lead frame end 142 from the sacrificial edge feature 824 and then bending the lead frame end 142 at its proximal end 144 (i.e., at the dimple 943) toward a surface 826 (hereinafter referred to as a "substrate-facing surface" 826) of the sacrificial center feature 822 to form the non-planar lead frame unit 820. For illustration, Fig.11 and 12 1 and 2 are top and side cross-sectional views (along line 12 - 12 ), respectively, of the non-planar leadframe unit 820 after separating and bending the leadframe ends 142 of the planar leadframe unit 810 , according to one or more embodiments.

[0144] Separating the distal ends 145 of the pre-bent lead frame ends 142 may include sawing or laser cutting through the distal ends 145 of the lead frame ends 145 where they are connected to the sacrificial edge features 824. A block (not shown) or other support structure may be placed beneath the sacrificial center feature 822 and then a force applied to the upper surface of the pre-bent lead frame ends 142 to bend the pre-bent lead frame ends at their proximal ends 144 toward the surface 826. The force is applied until each of the lead frame ends 142 extends at an approximately 90 degree angle 1242 (i.e., perpendicularly) relative to the sacrificial center feature 822. During the bending process, the lead frame pockets 943 may be bent open, as in Fig.12After bending each of the lead frame ends 142 , each lead frame dimple 943 extends between the upper surface 825 of the central sacrificial feature 822 and the proximal end 144 of the lead frame end 142 .

[0145] refer to Figure 7 and block 708, sacrificial corner features 823 and sacrificial edge features 824 may optionally be removed to singulate each non-planar lead frame unit 820 from a panel (e.g., panel 800), or otherwise prepare for assembly with a module substrate (e.g., Figure 2 , 4 , 6 and 15) assembled non-planar lead frame unit 820. Alternatively, the sacrificial corner features 823 and sacrificial edge features 824 can be retained at this time so that the panels of the connected non-planar lead frame unit 820 can be coupled to the corresponding panels of the module substrate.

[0146] Fig.13 According to an example embodiment Fig.11 and 12 820. Basically, at this stage, each non-planar lead frame unit 820 includes a sacrificial center feature 822, a plurality of lead frame dimples 943 in the upper surface and at the edge of the sacrificial center feature 822, and a plurality of lead frame ends 142, the proximal ends 144 of the plurality of lead frame ends 142 being coupled to the edge of the sacrificial center feature 822. The lead frame ends 142 extend perpendicularly to the sacrificial center feature 822 from their proximal ends 144 in a direction opposite to the lead frame dimples 943. According to an embodiment, the distal ends 145 of the lead frame ends 142 are spaced apart from the sacrificial center feature 822 by approximately 249 (0.133) the height of the lead frame ends 142. Figure 2 ). Desirably, the distal tips 145 are substantially coplanar so that if the distal tips 145 of the non-planar lead frame units 820 are placed on a planar surface, all of the distal tips 145 will contact such a planar surface. That is, there may be a small amount of variation in the distance of the distal tips 145 from the sacrificial center feature 822, which can be compensated for at a later stage of manufacturing. At this point, the non-planar lead frame units 820 are ready for assembly with the module substrate.

[0147] Fig.14 is a method for manufacturing one or more circuit modules (e.g., Figure 1100), each of the one or more circuit modules including an encapsulant embedded lead frame end 142. For manufacturing cost and efficiency, multiple identical circuit modules 100 can be created in parallel in the case of module strips or module panels, and multiple circuit modules 100 can be separated from each other during the manufacturing process. Alternatively, the circuit modules 100 can be formed individually. To indicate two manufacturing processes, Fig.15 and 16 depicts a top view of a module panel 1500 that can be used to manufacture multiple circuit modules 100 in parallel, and Figure 17-20 Each depicts an individual circuit module 100 (or 100') during a series of manufacturing steps. It should be understood that the module panel 1500 ( Fig.15 ) may alternatively include only the module substrate 1521, or Figure 17-20 The circuit modules 100 , 100 ′ depicted in FIG. 1 can be manufactured in the context of a panel.

[0148] refer to Fig.14 and 15 In both cases, the method begins in block 1402 by providing a module panel 1500. For example, Fig.15 is a top view of a module panel 1500 having four module substrates 201 (delineated by dashed lines) according to one or more embodiments.

[0149] Each of the module substrates 201 may be combined with Figure 1-4 The module substrate 201 described in FIG. 6 is the same as or substantially similar to the module substrate 201 described in FIG. 6 , and the module substrate 201 described in FIG. Figure 1-4 The details of the module substrate 201 described in 6 are also applicable to Figure 15-20 Therefore, these details are incorporated into the module substrate 201. Figure 15-20 In this description. In brief, each module substrate 201 has a first (or mounting) surface 202, a second (or bottom) surface 203, and a plurality of dielectric layers 214-216 and conductive layers 209-212 between the mounting surface 202 and the bottom surface 203. In addition, each module substrate 201 includes a side surface (e.g., Figure 2 The module substrate 201 includes a plurality of conductive features 213 disposed on the side surfaces 205, 207 of the module substrate 201. As will be described later, the conductive features 213 are specifically designated for attaching the lead frame unit 820, and more specifically, for attaching the distal ends 145 of the plurality of lead frame ends 142 of the lead frame unit 820. In some embodiments, each module substrate 201 may also include one or more heat dissipation structures 218 extending between the mounting surface 202 and the bottom surface 203 of the module substrate 201.

[0150] According to an embodiment, at this stage of manufacturing, the circuit system has been coupled to the mounting surface 202 of each module substrate 201. Figure 2 , 4 6, the circuit system may include one or more semiconductor dies (eg, coupled to the mounting surface 202 (eg, coupled to the surface of the heat dissipation structure 218 exposed at the mounting surface 202) Figure 2 , 4 , dies 234, 254, 634, 654 of 6), coupled to one or more discrete components (e.g., Figure 2 , 4 , 6 distributor 224) and various bonding wire arrays that interconnect the die, discrete components and conductive traces (of patterned conductive layer 212). Figure 6 As discussed, the circuitry may embody a power amplifier (eg, a Doherty power amplifier), but the circuitry may embody other types of circuits as well.

[0151] Reference now Fig.14 , 16 and 17 , the method continues in block 1404 by attaching the non-planar lead frame unit 820 to the conductive features 213 at the mounting surface 202 of each module substrate 201 . Fig.16 is a top view of a panel 1500 of a module substrate 201 in a subsequent manufacturing stage, and Fig.17 is a single module substrate 201 and a non-planar lead frame unit 820 along Fig.16 A cross-sectional view of line 17-17. Fig.17 To form an attachment, a conductive attachment material 1710 (e.g., solder, solder paste, or a conductive adhesive) may first be applied to each of the conductive features 213 to which the lead frame end 142 of the module substrate 201 is to be coupled, and / or the conductive attachment material 1710 may be applied to the distal end 145 of the lead frame end 145.

[0152] After applying the conductive attaching material 1710, the non-planar lead frame unit 820 is aligned with each module substrate 201. More specifically, the distal ends 145 of the lead frame ends 142 of the non-planar lead frame unit 820 are aligned with the corresponding conductive features 213 of the module substrate 201. As indicated above, in some embodiments, the non-planar lead frame units 820 are separated from each other (e.g., the sacrificial corner features 823 and the sacrificial edge features 824 have been removed to produce individual lead frame units 820), while in other embodiments, multiple non-planar lead frame units 820 may still be coupled together by sacrificial features (e.g., the sacrificial corner features 823 and the sacrificial edge features 824 of the lead frame panel 800). In either case, once the non-planar lead frame unit 820 is aligned with the module substrate 201, the conductive attaching material 1710 can be processed (e.g., reflowed) to secure the distal ends 145 of the lead frame ends 142 to the conductive features 213. In an alternative embodiment, the conductive feature 213 may include an opening into which the distal tip 145 of the lead frame end 142 may be inserted. Fig.17 As most clearly shown in , the attachment of the non-planar leadframe unit 820 to the module substrate 201 creates an air cavity 1720 between the mounting surface 202 of the module substrate 201 and the substrate-facing surface 826 of the sacrificial center feature 822 of the non-planar leadframe unit 820 .

[0153] Reference now Fig.14 and 18 The method continues in block 1406 by applying an encapsulant material 180 between the mounting surface 202 of the module substrate 201 and the substrate-facing surface 826 of the sacrificial center feature 822 . Fig.18 is applied with an encapsulant material 180 Fig.17 8 is a cross-sectional view of a module substrate 201 and a non-planar lead frame unit 820 .

[0154] For example, according to one or more embodiments, a film assisted molding (FAM) process may be performed to apply the encapsulant material 180. Fig.18As shown in , the FAM process includes placing a film 1802 (e.g., a plastic film) over the non-planar lead frame unit 820 so that the adhesive side of the film 1802 contacts and protects the outwardly facing surface of the lead frame unit 820, including the surface of the lead frame pocket 942. The film 1802 is drawn downward onto the outer surface of the non-planar lead frame unit 820. During the FAM process, the non-planar lead frame unit 820 serves to support the film 1802. Then, the viscous encapsulant material 180 flows into the air cavity 1720 between the mounting surface 202 of the module substrate 201 and the substrate-facing surface 826 of the non-planar lead frame unit 820. A sufficient amount of the encapsulant material 180 is applied so as to surround the lead frame end 142, to completely cover the mounting surface 202 and the various dies, components, and bonding wires coupled to the mounting surface 202, and to extend upward to and contact the substrate-facing surface 826 of the non-planar lead frame unit 820. Essentially, encapsulant material 180 completely fills air cavity 1720 between mounting surface 202 and non-planar lead frame unit 820. After curing encapsulant material 180 and removing film 1802, the result is an encapsulated circuit module (or a panel of an encapsulated module), such as Fig.18 as shown in .

[0155] Reference now Fig.14 and 19 The method continues in block 1408 by removing the sacrificial center feature 822 of the non-planar leadframe unit 820 while leaving the leadframe ends 142 embedded in the encapsulant material 180 . Fig.19 is a cross-sectional view of circuit module 100 with sacrificial central feature 822 partially removed.

[0156] According to one or more embodiments, the sacrificial central feature 822 may be removed by peeling the sacrificial central feature 822 from a top surface 181 of the encapsulant material 180 (i.e., a surface 181 formed by the contact of the encapsulant material 180 with the substrate-facing surface 826 of the sacrificial central feature 822). Fig.19 As shown in and according to one or more embodiments, when the sacrificial central feature 822 is stripped from the encapsulant material, a portion of the non-planar lead frame unit 820 corresponding to the lead frame recess 943 may also be stripped. This causes the lead frame recess 943 to separate from the proximal end 144 of the embedded lead frame end 142 and form an encapsulant recess 143 in the top surface 181 of the encapsulant material 180. As previously described in conjunction with Figure 2 As discussed, each of the encapsulant pits 143 is characterized by a width 245 ( Figure 2 ) and depth 243 below surface 181 ( Figure 2 ).

[0157] During the stripping process, the proximal end 144 of the embedded lead frame end 142 may be broken off from the lead frame pocket 943, and may also be pulled upward a distance into the encapsulant pocket 143. Either way, the proximal end 144 of the lead frame end 142 is exposed in the encapsulant pocket 143, and the distal end 145 of the lead frame end 142 remains embedded in the encapsulant material 180 and attached to the conductive feature 213.

[0158] Reference now Fig. 20 According to an alternative embodiment, instead of stripping the sacrificial center feature 822 and the lead frame pocket 943 from the device 100, a grinding and / or polishing process may be performed to remove the sacrificial center feature 822 without removing all of the material of the lead frame pocket 943. In such an embodiment, the resulting circuit device 100' includes at least a portion of the lead frame pocket 943 (or conductive "cup") that remains attached to the proximal end 144 of the lead frame end 142 and nested within the encapsulant pocket 143. The lead frame end 142 and the lead frame pocket 943 are integrally formed from the same lead frame unit 820. The lead frame pocket 943 remains unfilled with the encapsulant material 180. Whether the lead frame pocket 943 is removed (as in Fig.19 ) or is a portion of the lead frame recess 943 retained (as in the embodiment shown in Fig. 20 In the embodiment shown in FIG. 1 ), the proximal end 144 of each of the lead frame interconnects 142 terminates at one of a plurality of encapsulant pockets 143 .

[0159] Reference now Figure 3 , 4 14 and block 1410, a conductive attachment material 342 (e.g., solder, solder paste, or conductive adhesive) may then be applied to the exposed distal tip 145 of the lead frame end 142 to prepare the circuit module 100 (or 100') for integration into a larger electrical system. According to some embodiments, the conductive attachment material 342 is substantially nested into the encapsulant recess 143 in the device module 100 (or into the lead frame recess 943 in the device module 100').

[0160] Reference again Fig.14 and block 1412, if a module panel (e.g., Fig.15 If a plurality of circuit modules 100 are manufactured in parallel on a panel 1500 (e.g., a single-cutting process may be performed to produce a plurality of individual circuit modules 100. At this point, the manufacturing of the circuit module 100 (or 100') is completed.

[0161] As mentioned above, the circuit module 100 can be integrated into a larger electronic system. In some cases, the circuit module 100 can be flip-chip or reverse-oriented attached to the system substrate, which can be beneficial because it can achieve a "top-side cooling" system configuration. For example, Fig.21 is a side cross-sectional view of a circuit module 100 incorporated into a top-side cooled electronic system 2100 according to an example embodiment. More specifically, the top-side cooled electronic system 2100 includes a system substrate 2101, an embodiment of the circuit module 100 (or 100'), and a heat sink 2116. The system substrate 2101 includes a multi-layer printed circuit board (PCB) or other suitable substrate.

[0162] The system substrate 2101 has a top surface 2102 (also referred to as a "mounting surface") and an opposing bottom surface 2103. Fig.21 As depicted in , the system substrate 2101 includes multiple dielectric layers (e.g., formed of FR-4, ceramic, or other PCB dielectric materials) arranged alternately with multiple conductive layers. The mounting surface 2102 of the system substrate 2101 may include a patterned conductive layer 2112, which may be primarily used as a signal conducting layer. More specifically, the patterned conductive layer 2112 includes multiple conductive features (e.g., conductive pads and traces) that serve as attachment points for the module 100, the input connector 2191, and the output connector 2192. Each of the connectors 2191, 2192 may be, for example, a coaxial connector having a center signal conductor and an outer ground shield. According to an embodiment, the signal conductor of the input connector 2191 is electrically coupled to a first conductive trace of layer 2112, which in turn is coupled to an input end (e.g., Figure 6 In addition, the signal conductor of output connector 2192 is electrically coupled to a second conductive trace of layer 2112, which in turn is coupled to an output terminal of circuit module 100 (e.g., Figure 6 The ground shields of connectors 2191, 2192 are electrically coupled to additional traces (not numbered), which in turn are electrically coupled to a system ground layer (not numbered) of system substrate 2101 through conductive vias.

[0163] The circuit module 100 (or 100') is provided with respect to Figure 2 , 4, 20 and 21 are coupled to the mounting surface 2102 of the system substrate 2101 in an orientation that is a reversal (or "flipped") of the orientation depicted in FIG. 20 . More specifically, the circuit module 100 is coupled to the system substrate 2101 such that the first surface 101 of the module 100 and the mounting surface 2102 of the system substrate 2101 face each other. To connect the module 100 to the system substrate 2101, each of the proximal ends 144 of the ends 142 of the module 100 is aligned with a corresponding pad (e.g., pad 2114) on the mounting surface 2102 of the system substrate 2101. In embodiments where the conductive attachment material 342 is disposed on the exposed ends of the module ends 142, the conductive attachment material 342 is reflowed or otherwise cured to physically connect the module ends to their corresponding pads on the mounting surface 2102 of the module substrate 2101. In other embodiments, the conductive attach material may additionally or alternatively be disposed on conductive pads (eg, pads 2114 ) of the system substrate 2101 , and an appropriate reflow or curing process may be performed to connect the module 100 to the system substrate 2101 .

[0164] According to an embodiment, the heat sink 2116 is physically and thermally coupled to the second surface 103 of the circuit module 100, and more specifically, to the surface of the conductive layer 209 and / or the embedded heat dissipation structure 218 of the module 100. The heat sink 2116 is formed of a thermally conductive material, which may also be electrically conductive. For example, the heat sink 2116 may be formed of copper or another bulk conductive material. In order to couple the heat sink 2116 to the circuit module 100, a thermally conductive material 2198 (e.g., thermal grease) may be dispensed on the heat sink 2116 and / or on the second surface 103 (and / or on the surface of the heat dissipation structure 218) of the module 100. The heat sink 2116 is then brought into contact with the second surface 103. The heat sink 2116 may then be clamped, screwed, or otherwise secured in place.

[0165] During operation of the system 2100, an input signal is provided through the input terminal 2191 and is transmitted to the input terminal of the circuit module 100 (eg, Figure 6 The circuit system in the circuit module 100 processes (eg, amplifies) the input signal and outputs the signal at the output terminal (eg, Figure 6 During operation, a component (e.g., Figure 2 , 4 , 6 power transistor dies 234, 254, 634, 654) can generate considerable thermal energy (heat). As indicated by arrow 2199, the thermal energy generated by the assembly is transferred through the heat dissipation structure 218 to the heat sink 2116, which effectively dissipates the heat to the ambient atmosphere.

[0166] As also mentioned above, embodiments of circuit module 100 (or 100') may alternatively be coupled to a system substrate in a non-inverted orientation, and circuit module 100 may serve as a "bottom device" or "lower device" in a "package-on-package" electronic system. For example, Fig. 22 2 is a side cross-sectional view of a circuit module 100 incorporated into a package-on-package electronic system 2200 according to an example embodiment. More specifically, the package-on-package electronic system 2200 includes a system substrate 2201, an embodiment of the circuit module 100 (or 100'), and an upper electronic device 2210. It should be noted here that Fig. 22 In the embodiment of the circuit module 100 shown in , the conductive layer 209 at the second surface 103 of the circuit module 100 can be patterned so that the first patterned conductor can be used as the input end of the circuit module 100 and the second patterned conductor can be used as the output end of the circuit module 100.

[0167] The system substrate 2201 has a top surface 2202 (also referred to as a "mounting surface") and an opposing bottom surface 2203. Fig. 22 , the system substrate 2201 includes a plurality of dielectric layers (e.g., formed of FR-4, ceramic, or other PCB dielectric materials) arranged alternately with a plurality of conductive layers. The mounting surface 2202 of the system substrate 2201 may include a patterned conductive layer 2212, which may be primarily used as a signal conducting layer. More specifically, the patterned conductive layer 2212 includes a plurality of conductive features (e.g., conductive pads and traces) that serve as attachment points for the module 100, the input connector 2291, and the output connector 2292. Each of the connectors 2291, 2292 may be, for example, a coaxial connector having a center signal conductor and an outer ground shield. According to an embodiment, the signal conductor of the input connector 2291 is electrically coupled to a first conductive trace of the layer 2212, which in turn is coupled to the input end of the circuit module 100. In addition, the signal conductor of the output connector 2292 is electrically coupled to a second conductive trace of the layer 2212, which in turn is coupled to the output end of the circuit module 100. The ground shields of the connectors 2291, 2292 are electrically coupled to additional traces (not numbered), which in turn are electrically coupled through conductive vias to a system ground layer (not numbered) of the system substrate 2201. According to one or more embodiments, the system substrate 2201 may also include a thermal coin 2218 or thermal vias extending between the top surface 2202 and the bottom surface 2203 of the system substrate 2201.

[0168] Circuit module 100 (or 100 ′) is in a non-inverted orientation (ie, Figure 2 , 420) is coupled to the mounting surface 2202 of the system substrate 2201. More specifically, the circuit module 100 is coupled to the system substrate 2201 such that the second surface 103 of the module 100 and the mounting surface 2202 of the system substrate 2201 face each other. To connect the module 100 to the system substrate 2201, the patterned conductors formed by portions of the conductive layer 209 of the circuit module 100 are aligned with corresponding conductive pads formed by the patterned conductive layer 2212 of the system substrate 2201, and the corresponding conductors and pads are connected using a conductive attachment material (e.g., solder, solder paste, conductive adhesive).

[0169] To form a package-on-package configuration, the upper electronic device 2210 is then coupled to the first surface 101 of the module 100. To connect the upper electronic device 2210 to the module 100, the conductive pads on the substrate-facing surface of the upper electronic device 2210 are aligned with the corresponding proximal ends 144 of the ends 142 of the module 100. In embodiments where the conductive attaching material 342 is disposed on the exposed ends of the module ends 142, the conductive attaching material 342 is reflowed or otherwise cured to physically connect the module ends to their corresponding pads on the upper electronic device 2210. In other embodiments, the conductive attaching material may additionally or alternatively be disposed on the conductive pads of the upper electronic device 2210, and an appropriate reflow or curing process may be performed to connect the upper electronic device 2210 to the module 100.

[0170] During operation of the system 2200, an input signal is provided through the input terminal 2291 and is transmitted to the input terminal (eg, Figure 6 The circuit system in the circuit module 100 processes (eg, amplifies) the input signal and outputs the signal at the output terminal (eg, Figure 6 Additional signals may be transmitted between the circuit module 100 and the upper electronic device 2210 via the lead frame terminal 142.

[0171] During operation, components (e.g. Figure 2 , 4 , 6) can generate considerable thermal energy (heat). As indicated by arrow 2299, the thermal energy generated by the components is transferred to the thermal block 2218 of the system substrate 2201 through the heat dissipation structure 218 of the circuit module 100, and the thermal block 2218 transfers the thermal energy to the bottom surface 2203 of the system substrate 2201.

[0172] Embodiments of the circuit module include a module substrate having a mounting surface, a plurality of conductive features at the mounting surface, and an electronic circuit system coupled to the mounting surface of the module substrate. An encapsulant material covers the electronic circuit system and the mounting surface of the module substrate, and an upper surface of the encapsulant material defines a first surface of the circuit module. A plurality of lead frame ends extend from the conductive features at the mounting surface through the encapsulant material toward the first surface of the circuit module. Each of the lead frame ends is formed by an elongated planar conductive feature of a lead frame unit, and the plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive features and the module substrate. According to some other embodiments, an encapsulant pit extends from the first surface of the circuit module into the encapsulant material, and the proximal end of the lead frame end terminates at the encapsulant pit.

[0173] An embodiment of an electronic system includes: a system substrate having a top surface and a plurality of conductive pads at the top surface; and a circuit module coupled to the conductive pads of the system substrate. The circuit module includes a module substrate having a mounting surface, a bottom surface, and a plurality of conductive features at the mounting surface. The bottom surface of the module substrate defines the bottom surface of the circuit module. The electronic circuit system is coupled to the mounting surface of the module substrate. An encapsulant material covers the electronic circuit system and the mounting surface of the module substrate, and an upper surface of the encapsulant material defines the top surface of the circuit module. A plurality of lead frame ends extend from the conductive features at the mounting surface through the encapsulant material toward the top surface of the circuit module. Each of the lead frame ends is formed by an elongated planar conductive feature of a lead frame unit, and the plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive features.

[0174] An embodiment of a method for manufacturing a circuit module includes providing a non-planar lead frame unit including a sacrificial center feature and a plurality of lead frame ends, wherein a proximal end of each of the plurality of lead frame ends is coupled to the sacrificial center feature, and each of the plurality of lead frame ends extends at a right angle relative to a substrate-facing surface of the sacrificial center feature. The method further includes: coupling an electronic circuit system to a mounting surface of a module substrate; and electrically coupling distal ends of the plurality of lead frame ends to a plurality of conductive features at the mounting surface of the module substrate. The plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive features and the module substrate. The method further includes applying an encapsulant material between the module substrate and the substrate-facing surface of the sacrificial center feature. The encapsulant material covers the electronic circuit system and the mounting surface of the module substrate, the encapsulant material extends from the mounting surface of the module substrate to the substrate-facing surface of the lead frame unit, and the encapsulant material surrounds the plurality of lead frame ends. The method further includes removing the sacrificial center feature from a top surface of the encapsulant material without removing the lead frame ends from the encapsulant material. The top surface of the encapsulant material defines a first surface of the circuit module.

[0175] According to another embodiment, providing a non-planar lead frame unit includes: providing a planar lead frame unit, the planar lead frame unit including a sacrificial center feature and a plurality of pre-bent lead frame ends connected to the sacrificial center feature; and bending each of the pre-bent lead frame ends toward a substrate-facing surface of the sacrificial center feature to form a plurality of lead frame ends extending at right angles relative to the substrate-facing surface of the sacrificial center feature.

[0176] According to another additional embodiment, a plurality of lead frame recesses are formed in an upper surface of a sacrificial central feature before each of the pre-bent lead frame ends are bent, and after each of the lead frame ends are bent, each of the plurality of lead frame recesses extends between the upper surface of the central sacrificial feature and a proximal end of the lead frame end.

[0177] The foregoing detailed description is merely illustrative in nature and is not intended to limit the embodiments of the subject matter or the application and use of such embodiments. As used herein, the word "exemplary" means "serving as an example, instance, or illustration". Any embodiment described herein as exemplary should not necessarily be understood as being preferred or advantageous over other embodiments. In addition, it is not intended to be bound by any explicit or implicit theory presented in the foregoing technical field, background technology, or detailed description.

[0178] The connecting lines shown in the various figures included herein are intended to represent exemplary functional relationships and / or physical couplings between the various elements. It should be noted that many alternative or additional functional relationships or physical connections may exist in the embodiments of the subject matter. In addition, certain terms may also be used herein only for reference purposes, and therefore these terms are not intended to be restrictive, and unless the context clearly indicates, the terms "first", "second" and other such numerical terms referring to the structure do not imply an order or sequence.

[0179] As used herein, "node" means any internal or external reference point, connection point, junction, signal line, conductive element, etc., at which a given signal, logic level, voltage, data pattern, current or quantity exists. In addition, two or more nodes may be implemented by one physical element (and two or more signals may be multiplexed, modulated, or otherwise distinguished despite being received or output at a common node).

[0180] The foregoing description refers to elements or nodes or features being "connected" or "coupled" together. As used herein, unless otherwise expressly stated, "connected" means that one element is directly joined to another element (or directly communicates with another element), and not necessarily mechanically joined. Likewise, unless otherwise expressly stated, "coupled" means that one element is directly or indirectly joined to another element (or directly or indirectly communicates with another element electrically or otherwise), and not necessarily mechanically joined. Thus, although the schematic diagrams shown in the figures depict an exemplary arrangement of elements, additional intervening elements, devices, features, or assemblies may be present in the embodiments of the depicted subject matter.

[0181] Although at least one exemplary embodiment has been presented in the foregoing specific embodiments, it should be understood that there are a large number of variations. It should also be understood that one or more exemplary embodiments described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. In fact, the foregoing specific embodiments will provide a convenient guide for implementing the described one or more embodiments to those skilled in the art. It should be understood that various changes may be made to the function and arrangement of the elements without departing from the scope defined by the claims, and the scope defined by the claims includes known equivalents and foreseeable equivalents at the time of filing this patent application.

Claims

1. A circuit module, characterized in that: include: a module substrate having a mounting surface and a plurality of conductive features at the mounting surface; an electronic circuit system coupled to the mounting surface of the module substrate; an encapsulant material covering the electronic circuit system and the mounting surface of the module substrate, wherein an upper surface of the encapsulant material defines a first surface of the circuit module; as well as a plurality of lead frame ends extending from the conductive feature at the mounting surface through the encapsulant material toward the first surface of the circuit module, wherein each of the lead frame ends is formed by an elongated planar conductive feature of a lead frame unit, and wherein the plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive feature and the module substrate.

2. The circuit module according to claim 1, characterized in that: Each of the lead frame ends has a rectangular cross-section.

3. The circuit module according to claim 1, characterized in that: Each of the lead frame ends is formed of one or more materials selected from copper and copper alloys.

4. The circuit module according to claim 1, characterized in that: encapsulant recesses extending from the first surface into the encapsulant material; and The proximal end of the lead frame end terminates at the encapsulant recess.

5. The circuit module according to claim 4, characterized in that: The surfaces of the encapsulant recesses are defined by the encapsulant material; and The proximal end of the lead frame end is exposed in the encapsulant recess.

6. The circuit module according to claim 4, characterized in that: The surfaces of the encapsulant recesses are defined by the encapsulant material; and The circuit module additionally includes a lead frame pocket nested within the encapsulant pocket, wherein the lead frame pocket is integrally formed with the lead frame end.

7. The circuit module according to claim 1, characterized in that: The lead frame end is embedded in the encapsulant material proximate to a side of the encapsulant material; and The encapsulant material surrounds each of the lead frame ends.

8. The circuit module according to claim 1, characterized in that: The module substrate additionally includes a heat dissipation structure extending through the module substrate; The heat dissipation structure has a first surface exposed at the mounting surface of the module substrate; and The electronic circuit system includes an integrated circuit die coupled to the first surface of the heat dissipation structure.

9. An electronic system, characterized in that: include: a system substrate having a top surface and a plurality of conductive pads at the top surface; as well as A circuit module coupled to the conductive pad of the system substrate, wherein the circuit module includes a module substrate having a mounting surface, a bottom surface, and a plurality of conductive features at the mounting surface, wherein the bottom surface of the module substrate defines a bottom surface of the circuit module, an electronic circuit system coupled to the mounting surface of the module substrate, an encapsulant material covering the electronic circuit system and the mounting surface of the module substrate, wherein an upper surface of the encapsulant material defines a top surface of the circuit module, and A plurality of lead frame ends extending from the conductive feature at the mounting surface through the encapsulant material toward the top surface of the circuit module, wherein each of the lead frame ends is formed by an elongated planar conductive feature of a lead frame unit, and wherein the plurality of lead frame ends are electrically coupled to the electronic circuit system through the conductive feature.

10. A method for manufacturing a circuit module, characterized in that: The method comprises: coupling the electronic circuit system to the mounting surface of the module substrate; Providing a non-planar leadframe unit including a sacrificial center feature and a plurality of leadframe ends, wherein a proximal end of each of the plurality of leadframe ends is coupled to the sacrificial center feature, and wherein each of the plurality of leadframe ends extends at a right angle relative to a substrate-facing surface of the sacrificial center feature; electrically coupling distal tips of the plurality of lead frame ends to a plurality of conductive features at the mounting surface of the module substrate, wherein the plurality of lead frame ends are electrically coupled to the electronic circuitry through the conductive features and the module substrate; applying an encapsulant material between the module substrate and the substrate-facing surface of the sacrificial center feature, wherein the encapsulant material covers the electronic circuitry and the mounting surface of the module substrate, the encapsulant material extends from the mounting surface of the module substrate to the substrate-facing surface of the leadframe unit, and the encapsulant material surrounds the plurality of leadframe ends; and The sacrificial center feature is removed from a top surface of the encapsulant material without removing the lead frame ends from the encapsulant material, wherein the top surface of the encapsulant material defines a first surface of the circuit module.

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