Fin-type and complementary field effect transistor
By using hydrogen fluoride-resistant silane compounds to protect the oxide surface during the formation of fin type and complementary field effect transistors, and using a solution containing hydrogen fluoride in the cleaning step, the problem of oxide surface damage is solved, achieving efficient cleaning and functional protection.
Patent Information
- Application Number
- CN202411416218.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-13
- Filing Date
- 2024-10-11
- Publication Date
- 2025-04-15
AI Technical Summary
In the formation of fin type and complementary field effect transistors, dry etching and subsequent cleaning steps are prone to damage the oxide surface, resulting in reduced functionality and weakened electrical insulation.
Further damage to the oxide surface is prevented by using hydrogen fluoride-resistant silane compounds and using a solution containing hydrogen fluoride in the cleaning step.
Effectively protect the oxide surface, prevent damage and residual contamination, and maintain the function of fin or complementary field effect transistors, especially when using high concentration hydrogen fluoride solutions.
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Figure CN119835957A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of fin-type and complementary field effect transistors. Background Art
[0002] In the prior art, fin-type and complementary field effect transistors are increasingly used in integrated circuit chips to achieve high transistor density or correspondingly smaller semiconductor nodes. Fin field effect transistors include any type of field effect transistor containing a fin-shaped channel or gate. An example is a fin field effect transistor (FinFET). Complementary field effect transistors (CFETs) include n-type gate full-circle field effect transistors stacked on p-type gate full-circle field effect transistors.
[0003] For these devices, the scale becomes very small, so even slight impurities or minor damage may degrade their functionality.
[0004] Typically, dry etching is used to form the channels or gates of these devices. However, dry etching tends to damage the oxide surface due to the bombardment of plasma ions with the oxide surface. Subsequent cleaning steps with hydrogen fluoride solutions are typically used to remove (oxide-like) residues produced by the dry etching step, which have been found to further damage these oxide surfaces and may cause multiple problems. For example, when the oxide surface of the hard mask is damaged, the protection of the material under the hard mask during subsequent etching steps may be reduced. As another example, when the oxide surface of the shallow trench isolation portion is damaged, the electrical insulation between adjacent transistors may be weakened. As another example, when the oxide surface of the gate oxide is damaged, the electrical insulation between the gate metal and the transistor channel may be weakened. Although the concentration of hydrogen fluoride in the solution used may be very low to prevent the further damage, it in turn leads to a low removal efficiency of the residue.
[0005] Therefore, there remains a need in the art for devices and methods that address at least some of the above-mentioned issues. Summary of the invention
[0006] An object of the present invention is to provide a method for forming one or more fin-type or complementary field effect transistors with good functionality.
[0007] Another object of the present invention is to provide an intermediate for forming one or more fin-type or complementary field effect transistors with good functionality.
[0008] The above objects are achieved by the methods and intermediates described in the present invention.
[0009] One advantage of embodiments of the present invention is that during the cleaning step, the oxide surface can be protected by a hydrogen fluoride-resistant silane compound. Another advantage of embodiments of the present invention is that damage to the oxide surface can be prevented when cleaning with a solution containing hydrogen fluoride. In addition, another advantage of embodiments of the present invention is that this damage prevention effect can be achieved even when using a solution with a high concentration of hydrogen fluoride, thereby facilitating the effective removal of oxide-like residues that are typically produced during dry etching. Therefore, one advantage of embodiments of the present invention is that the functionality of the formed fin-type or complementary field effect transistor can be well maintained, wherein the formed fin-type or complementary field effect transistor is highly sensitive to such damage and residue contamination.
[0010] In a first aspect, the present invention relates to a method of forming one or more fin-type or complementary field effect transistors, the method comprising:
[0011] i) providing a first intermediate structure, the first intermediate structure comprising:
[0012] - a layer to be patterned, and
[0013] - a first hard mask having openings,
[0014] ii) dry etching the layer through the openings in the hard mask to form a second intermediate structure, wherein the second intermediate structure includes one or more exposed oxide surfaces, iii) contacting the exposed oxide surfaces with a chemical formula R—Si(R 1 ) n (OR 2 ) 3-n The silane compound is reacted with R, wherein R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2, then,
[0015] iv) cleaning the second intermediate structure having a reactive oxide surface by contacting it with a solution comprising hydrogen fluoride.
[0016] In a second aspect, the present invention relates to an intermediate for forming a plurality of fin-type or complementary field effect transistors, the intermediate comprising:
[0017] - substrate;
[0018] - a plurality of fins comprising channel material protruding from a substrate, and
[0019] - recesses in the substrate between the fins,
[0020] - a shallow trench isolation located in the recess and formed of an oxide material, and
[0021] - multiple gates or dummy gates, and
[0022] - a first hard mask superimposed on and aligned with the plurality of gates or dummy gates,
[0023] The intermediate comprises an oxide surface covered with a silane compound bound to the oxide surface, the silane compound having the chemical formula R—Si(R 1 ) n (OR 2 ) 2-n , where R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2.
[0024] Particular and preferred aspects of the invention are set out in the accompanying independent and dependent claims. Features in the dependent claims may be combined with features in the independent claim and with features in other dependent claims as appropriate and not limited to those explicitly stated in the claims.
[0025] While improvements, changes and developments in apparatus are ongoing in the art, the concepts of the present invention are believed to represent substantially new and novel improvements involving changes in existing practice resulting in the provision of a more efficient, more stable and more reliable apparatus of this nature.
[0026] The above and other characteristics, features and advantages of the present invention will become apparent in the following detailed description in conjunction with the accompanying drawings, which illustrate the principles of the present invention by way of example. This description is for illustrative purposes only and does not limit the scope of the present invention. The reference figures cited below refer to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1A and Figure 1B 3 and 4. are respectively a top view and a vertical cross-sectional schematic diagram of a first intermediate structure according to a first example of an embodiment of the present invention.
[0029] Figure 2 is a schematic vertical cross-sectional view of a second intermediate structure according to a first example of an embodiment of the present invention.
[0030] Figure 3 is a schematic vertical cross-sectional view of a second intermediate structure according to a first example of an embodiment of the present invention, wherein the oxide surface is reacted with a silane compound.
[0031] Figure 4is a schematic vertical cross-sectional view of a second intermediate structure according to a first example of an embodiment of the present invention, wherein an oxide surface is reacted with a silane compound to which a solution containing hydrogen fluoride is applied.
[0032] Figure 5 is a schematic vertical cross-sectional view of a preliminary intermediate structure of a second example according to an embodiment of the present invention.
[0033] Fig. 6A and Figure 6B 1 and 2 are respectively a top view and a vertical cross-sectional schematic diagram of a preliminary intermediate structure after shallow trench isolation is formed according to a second example of an embodiment of the present invention.
[0034] Figure 7 FIG. 1 is a schematic vertical cross-sectional view of a preliminary intermediate structure after shallow trench isolation formation and oxide layer deposition according to a second example of an embodiment of the present invention.
[0035] Fig. 8A , Figure 8B and Figure 8C 1 and 2 are schematic diagrams of a top view and two different vertical cross-sections of a first intermediate structure according to a second example of an embodiment of the present invention.
[0036] Fig. 9A , Fig. 9B and Fig. 9C 1 and 2 are schematic diagrams of a top view and two different vertical cross-sections of a second intermediate structure according to a second example of an embodiment of the present invention.
[0037] Fig.10 is a schematic vertical cross-sectional view of a second intermediate structure according to a second example of an embodiment of the present invention, wherein the oxide surface is reacted with a silane compound.
[0038] In different drawings, the same reference signs identify the same or similar elements. DETAILED DESCRIPTION
[0039] The present invention will be described with respect to specific embodiments and with reference to certain drawings, but the invention is not limited thereto, only by the claims. The drawings described are illustrative only and are non-limiting. In the drawings, the dimensions of some elements may be exaggerated and not drawn to scale for illustrative purposes. The dimensions and relative dimensions do not correspond to actual reductions in the practice of the invention.
[0040] In addition, the terms first, second, third, etc. in the specification and claims are used to distinguish similar elements and are not necessarily used to describe a sequence in time, space, hierarchy, or any other manner. It should be understood that the terms used in this manner are interchangeable where appropriate, and the embodiments described in the present invention are capable of operating in other sequences than those described or illustrated herein.
[0041] In addition, in the specification and claims, the terms top, bottom, over, under, etc. are used for descriptive purposes and not necessarily for describing relative positions. It should be understood that the terms so used are interchangeable where appropriate, and that the embodiments described in the present invention are capable of operating in other orientations than those described or illustrated herein. Unless otherwise specified, when the term "on" is used, it means physical contact.
[0042] It should be noted that the term "comprising" used in the claims should not be interpreted as being limited to the parts listed thereafter, and it does not exclude other elements or steps. Therefore, it should be understood to indicate the presence of the features, integrations, steps or components, but this does not exclude the presence or addition of one or more other features, integrations, steps or components or combinations thereof. Therefore, the term "comprising" covers the situation where only the features are present, as well as the situation where these features and one or more other features are present. Therefore, the word "comprising" as an embodiment according to the present invention also includes the situation where no other components are present. Therefore, the scope of the expression "a device comprising components A and B" should not be understood to limit the device to be composed only of components A and B. It means that for the present invention, the relevant components of the device are only A and B.
[0043] References to "one embodiment" or "an embodiment" in the specification mean that the specific features, structures, or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing in various places in the specification do not necessarily all refer to the same embodiment, but may all refer to the same embodiment. In addition, specific features, structures, or characteristics may be combined in one or more embodiments in any suitable manner, which will be apparent to those of ordinary skill in the art.
[0044] Similarly, it should be understood that in the description of illustrative embodiments of the invention, different features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof, in order to simplify the disclosure and aid in understanding one or more different aspects of the invention. However, the method in the present disclosure should not be interpreted as reflecting the following intention: the claimed invention requires more features than those expressly recited in the claims. And, as reflected in the appended claims, the features included in the invention may be less than all the features of a single embodiment disclosed above. Therefore, the appended claims are to be expressly incorporated into this detailed description, and each claim itself represents an independent embodiment of the invention.
[0045] In addition, when some embodiments described herein include some but not other features included in other embodiments, the combination of features of different embodiments should be intended to be included within the scope of the present invention and form different embodiments, which should be understood by those skilled in the art. For example, in the attached claims, any embodiment claimed for protection can be used in any combination.
[0046] In addition, some embodiments are described herein as a method or a combination of method elements implemented by a processor of a computer system or by other means of implementing a function. Therefore, a processor with instructions required for implementing the method or method elements forms a device for carrying out the method or method elements. In addition, the element of the device embodiment described herein is an example of a device for performing a function, and the function is carried out by being used to implement the element for the purpose of the present invention.
[0047] Numerous specific details are set forth in the description herein. However, it should be understood that embodiments of the present invention may be implemented without these specific details. In other cases, well-known methods, structures, and techniques are not described in detail in order not to obscure the understanding of this specification.
[0048] In a first aspect, the present invention relates to a method of forming one or more fin-type or complementary field effect transistors, the method comprising:
[0049] i) providing a first intermediate structure, the first intermediate structure comprising:
[0050] - a layer to be patterned, and
[0051] - a first hard mask having openings,
[0052] ii) dry etching the layer through the openings in the hard mask to form a second intermediate structure, wherein the second intermediate structure includes one or more exposed oxide surfaces, iii) contacting the exposed oxide surfaces with a chemical formula R—Si(R 1 ) n (OR 2 ) 3-n The silane compound is reacted with R, wherein R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2, then,
[0053] iv) cleaning the second intermediate structure having a reactive oxide surface by contacting it with a solution comprising hydrogen fluoride.
[0054] An oxide surface is the surface of an oxide material. The oxide material is typically silicon dioxide, but may alternatively be, for example, gallium oxide or aluminum oxide.
[0055] In some embodiments, the layer to be patterned is a gate or dummy gate material layer, and the second intermediate structure includes one or more gates or dummy gates. The gate material can be polysilicon, Ta, TaN, Nb or WN / RuO2. The dummy gate material can be a material such as polysilicon, amorphous silicon or microcrystalline silicon, which can be selectively etched and replaced with a gate material in a subsequent stage.
[0056] In some embodiments, the method may be used to form a plurality of fin-type or complementary field effect transistors, wherein the first intermediate structure comprises:
[0057] - substrate,
[0058] - a plurality of fins comprising channel material protruding from a substrate, and
[0059] - recesses in the substrate between the fins,
[0060] - a shallow trench isolation located in the recess and formed of an oxide material,
[0061] - The gate or dummy gate material layer covers the substrate, the shallow trench isolation part and embeds a plurality of fins.
[0062] In these embodiments, forming the first intermediate structure may include:
[0063] 1a) providing a substrate, then,
[0064] 1b) providing a layer comprising a channel material on a substrate,
[0065] 1c) providing a preliminary hard mask having openings on the layer comprising the channel material,
[0066] 1d) dry etching a) the layer comprising the channel material and b) an upper portion of the substrate through the openings in the preliminary hard mask to form a preliminary intermediate structure comprising a plurality of fins comprising the channel material and recesses in the substrate between the fins comprising the channel material, the fins protruding from the substrate,
[0067] 1e) forming a shallow trench isolation portion by filling the recess with an oxide material,
[0068] If) covering the substrate, the shallow trench isolation portion and the fins containing the channel material with a gate or pseudo gate material layer, and
[0069] Ig) Providing a first hard mask having an opening on the gate or dummy gate material.
[0070] In these embodiments, the method further includes a step Ie' between step Ie and step If: conformally covering the substrate, the shallow trench isolation portion and the fin with an oxide material, and wherein step If covers the oxide material.
[0071] In some embodiments, the channel material may include a layer stack for forming a nanosheet. The layer stack may include alternating layers formed of silicon and silicon germanium. In some embodiments, a plurality of fins including the channel material may include a patterned layer stack for forming a nanosheet.
[0072] In some embodiments, the method is used to form one or more complementary field effect transistors, wherein the layer to be patterned comprises a layer stack for forming a nanosheet. In these embodiments, the layer stack may include alternating layers formed of silicon and silicon germanium.
[0073] In some embodiments, the group R of the silane compound may include an atom chain with a length of 1 to 30 atoms, preferably 3 to 25 atoms, and more preferably 6 to 20 atoms. 1 and / or group R 2 Atom chains with a chain length of 1 to 30 atoms may be included. The chain may effectively prevent hydrogen fluoride from reaching the oxide surface. Preferably, the atomic chain is a carbon chain, that is, the atoms are carbon atoms. The carbon chain may be particularly non-reactive to hydrogen fluoride and is therefore stable.
[0074] In some embodiments, the group R of the silane compound is selected from: (C1-C30) alkyl, (C6-C20) aryl, (C2-C30) alkenyl, (C6-C20) aryl (C1-C30) alkyl, (C1-C30) alkyl (C6-C20) aryl and (C1-C30) alkoxy; R 1 is selected from the group consisting of: hydrogen, hydroxy, halogen, (C1-C30)alkyl, (C6-C20)aryl, (C6-C20)aryl(C1-C30)alkyl, (C2-C30)alkenyl, and (C1-C30)alkyl(C6-C20)aryl; and R 2 is selected from the group consisting of hydrogen, (C1-C30)alkyl, halogenated (C1-C30)alkyl, (C6-C20)aryl, (C6-C20)aryl(C1-C30)alkyl, and (C1-C30)alkyl(C6-C20)aryl, and R is alkyl, alkenyl, aryl, aralkyl, alkoxy or alkaryl, and R 1 The alkyl, haloalkyl, alkenyl, aryl, aralkyl or alkaryl group may be further substituted by one or more substituents selected from the group consisting of halogen, hydroxyl, -N(R 11 )(R 12 ),—S(R13 ), -C(=O)R 14 , and -OC(=O)R 15 , where R 11 , R 12 , R 13 , R 14 and R 15 Each is independently selected from hydrogen and (C1-C30)alkyl, (C6-C20)aryl and (C2-C30)alkenyl. In a preferred embodiment, the group R of the silane compound is selected from: (C3-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C3-C20)alkyl, (C3-C20)alkyl(C6-C12)aryl; R 1 is selected from the group consisting of hydrogen, hydroxy, halogen, (C1-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C1-C20)alkyl, and (C1-C20)alkyl(C6-C12)aryl; and R 2 is selected from the group consisting of hydrogen, (C1-C20)alkyl, halogenated (C1-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C1-C20)alkyl, and (C1-C20)alkyl(C6-C12)aryl, and R is an alkyl, aryl, aralkyl, or alkaryl group and R 1 The alkyl, aryl, aralkyl or alkaryl group may be further substituted by one or more substituents selected from the group consisting of halogen, hydroxyl, -N(R 11 )(R 12 ), and—S(R 13 ), where R 11 , R 12 , and R 13 Each is independently selected from hydrogen and (C1-C20)alkyl.
[0075] In some embodiments, the solution may have a hydrogen fluoride concentration of up to 2 wt%. Preferably, the solution has a hydrogen fluoride concentration of 0.01 to 2 wt%, more preferably 0.1 to 2.0 wt%, and even more preferably 0.5 to 2.0 wt%. An advantage of embodiments of the present invention is that high concentrations of hydrogen fluoride can be used for cleaning, thereby achieving efficient and effective cleaning.
[0076] In some embodiments, the solution is applied to the surface of the second intermediate structure for a period of up to 120 seconds. Preferably, the solution is applied for 1 to 120 seconds, more preferably 10 to 120 seconds. An advantage of embodiments of the present invention is that the solution containing hydrogen fluoride can be applied for a long time, thereby achieving efficient and effective cleaning.
[0077] Any features of any embodiment of the first aspect may be independently described as any embodiment of the second aspect of the present invention.
[0078] In a second aspect, the present invention relates to an intermediate for forming a plurality of fin-type or complementary field effect transistors, the intermediate comprising:
[0079] - substrate;
[0080] - a plurality of fins comprising channel material protruding from a substrate, and
[0081] - recesses in the substrate between the fins,
[0082] - a shallow trench isolation located in the recess and formed of an oxide material, and
[0083] - multiple gates or dummy gates, and
[0084] - a first hard mask, which is superposed on the plurality of gates or dummy gates and aligned with the plurality of gates or dummy gates,
[0085] The intermediate comprises an oxide surface covered with a silane compound bound to the oxide surface, the silane compound having the chemical formula R—Si(R 1 ) n (OR 2 ) 2-n , where R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2.
[0086] In some embodiments, the group R of the silane compound comprises an atom chain having a length of 1 to 30 atoms, 3 to 25 atoms, and more preferably 6 to 20 atoms. 1 and / or group R 2 Atom chains with a chain length of 1 to 30 atoms are included. The chain can effectively prevent hydrogen fluoride from reaching the oxide surface. Preferably, the atomic chain is a carbon chain, that is, the atoms are carbon atoms. The carbon chain may be particularly unreactive to hydrogen fluoride and is therefore stable to hydrogen fluoride.
[0087] In some embodiments, the group R of the silane compound is selected from: (C1-C30) alkyl, (C6-C20) aryl, (C2-C30) alkenyl, (C6-C20) aryl (C1-C30) alkyl, (C1-C30) alkyl (C6-C20) aryl and (C1-C30) alkoxy; R 1is selected from the group consisting of: hydrogen, hydroxy, halogen, (C1-C30)alkyl, (C6-C20)aryl, (C6-C20)aryl(C1-C30)alkyl, (C2-C30)alkenyl, and (C1-C30)alkyl(C6-C20)aryl; and R 2 is selected from the group consisting of hydrogen, (C1-C30)alkyl, halogenated (C1-C30)alkyl, (C6-C20)aryl, (C6-C20)aryl(C1-C30)alkyl, and (C1-C30)alkyl(C6-C20)aryl, and R is alkyl, alkenyl, aryl, aralkyl, alkoxy or alkaryl, and R 1 The alkyl, haloalkyl, alkenyl, aryl, aralkyl or alkaryl group may be further substituted by one or more substituents selected from the group consisting of halogen, hydroxyl, -N(R 11 )(R 12 ),—S(R 13 ), -C(=O)R 14 , and -OC(=O)R 15 , where R 11 , R 12 , R 13 , R 14 and R 15 Each is independently selected from hydrogen and (C1-C30)alkyl, (C6-C20)aryl and (C2-C30)alkenyl. In a preferred embodiment, the group R of the silane compound is selected from: (C3-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C3-C20)alkyl, (C3-C20)alkyl(C6-C12)aryl; R 1 is selected from the group consisting of hydrogen, hydroxy, halogen, (C1-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C1-C20)alkyl, and (C1-C20)alkyl(C6-C12)aryl; and R 2 is selected from the group consisting of hydrogen, (C1-C20)alkyl, halogenated (C1-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C1-C20)alkyl, and (C1-C20)alkyl(C6-C12)aryl, and R is an alkyl, aryl, aralkyl, or alkaryl group and R 1 The alkyl, aryl, aralkyl or alkaryl group may be further substituted by one or more substituents selected from the group consisting of halogen, hydroxyl, -N(R 11 )(R 12 ), and—S(R 13 ), where R 11 , R 12 , and R 13 Each is independently selected from hydrogen and (C1-C20)alkyl.
[0088] Any features of any embodiment of the second aspect may be independently described as any embodiment of the first aspect of the present invention.
[0089] The present invention is now described by a detailed description of several embodiments of the present invention. It is obvious that other embodiments of the present invention can be constructed according to the knowledge of those skilled in the art without departing from the technical teaching of the present invention, and the present invention is limited only by the appended claims.
[0090] Example 1: Cleaning after active layer etching
[0091] In this embodiment, a first exemplary method for forming one or more complementary field effect transistors according to an embodiment of the present invention is described in detail. Figure 1A and Figure 1B , Figure 1A is a top view of a first intermediate structure 1 according to an embodiment of the present invention, Figure 1B The first intermediate structure 2 is shown along Figure 1A A vertical cross section is shown in dashed line.
[0092] The first intermediate structure 1 includes a substrate 2 , a layer 3 to be patterned covering the substrate 2 , and a first hard mask 4 located on the layer to be patterned, wherein the first hard mask 4 has an opening 40 .
[0093] In this embodiment, the layer 3 to be patterned comprises a channel material, for example a layer stack for forming a nanosheet. For example, the layer stack may comprise alternating layers formed of silicon and silicon germanium.
[0094] The substrate 2 may be a silicon-on-insulator or a semiconductor substrate, such as crystalline silicon, gallium arsenide, gallium nitride, or gallium phosphate.
[0095] In this embodiment, the hard mask 4 is formed of an oxide material, for example, silicon oxide, such as silicon dioxide. Alternatively, the hard mask 4 may be silicon oxide on silicon nitride (in which case the oxide surface of the hard mask is the exposed surface of the silicon oxide).
[0096] refer to Figure 2 , which shows a vertical cross-section of a second intermediate structure 10 formed from a first intermediate structure by dry etching the layer to be patterned through an opening 40 in a hard mask 4. Dry etching techniques (e.g., plasma etching, such as reactive ion etching) are typically anisotropic and therefore directional etching techniques. In this embodiment, the second intermediate structure 10 thus formed includes fins 30 formed of channel material on a substrate 2. The second intermediate structure 10 includes one or more exposed oxide surfaces, which in this embodiment are exposed surfaces of a hard mask 4. The hard mask 4 covers and is aligned with the fins 30 formed of the channel material.
[0097] In this embodiment, the dry etch has etched into the upper portion 20 of the substrate 2. As a result, recesses 21 are formed in the substrate 2 between the fins 30 comprising the channel material. The upper portion 20 of the substrate 20 comprises walls 22 formed of substrate material of the upper portion 20 of the substrate 2 that was not removed by the dry etch, and the fins 30 are located on the walls 22.
[0098] The dry etching may produce residues (not shown) on the surface of the second intermediate structure 10. These residues may be detrimental to the consistency and function of the complementary field effect transistor formed in this embodiment and the method according to an embodiment of the present invention. Therefore, usually, after the dry etching is performed, and preferably before the second intermediate structure 10 is covered with another layer (e.g., a conformal gate oxide layer, a gate material or a dummy gate material) for the complementary field effect transistor on the second intermediate structure 10, a cleaning step is performed to remove the residues. In some embodiments of the present invention, the cleaning step is performed using a solution containing hydrogen fluoride.
[0099] Dry etching can damage the oxide, in this embodiment the hard mask 4, which may be caused by collisions between plasma ions and the oxide. The damaged oxide has a higher oxidation state and charge, which results in a higher etching rate when a solution containing hydrogen fluoride is applied to the oxide, so that the oxide is etched, e.g., partially removed, which is undesirable.
[0100] The exposed oxide surface of the hard mask 4 is in the chemical formula R—Si(R 1 ) n (OR 2 ) 3-n The silane compound is reacted with R, wherein R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and organic groups, and n is an integer selected from 0 to 2. The silane compound for reacting with the exposed oxide surface can be dispersed in a solvent. A solution comprising a solvent and silane can be applied or dispensed to the surface of the second intermediate structure 10 using a spinning tool or a spin coating device. The solution can be used at room temperature or an elevated temperature, for example at a temperature of 20 to 100° C., for example 30 to 60° C., for example 40° C. The solution can be applied for 10 to 120 seconds. Applying the solution can include continuously dispensing the solution onto the second intermediate structure 10 during this period. For example, when the second intermediate structure 10 is contained in a 12-inch wafer, the solution can be applied at a rate of 100 to 500 ml / min. Any unreacted silane remains in the solution and is removed after a period of time, for example by rinsing the second intermediate structure 10.
[0101] See also Figure 3 Thus, the oxide surface of the hard mask 4 is covered with the silane compound 5 bonded to the oxide surface, the silane compound having the chemical formula R—Si(R 1 ) n (OR 2 ) 2-n , where R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2.
[0102] See also Figure 4 Subsequently, a solution 6 containing hydrogen fluoride is applied to the surface of the second intermediate structure 10. The silane compound 5 protects the hard mask 4, thereby preventing the solution 6 containing hydrogen fluoride from reaching the hard mask 4. The silane compound 5 can form a barrier between the solution 6 and the hard mask 4, so that the hard mask 5 can remain undamaged during cleaning with the solution 6.
[0103] Afterwards (but not shown), the solution 6 containing hydrogen fluoride can be removed, for example, by rinsing with water. Subsequently, the silane compound 5 can be removed to expose the surface of the hard mask 4. The removal of the silane compound 5 can be performed by any suitable method, for example, using a dry stripping step by applying an oxidizing or non-oxidizing plasma; or exposing the silane compound 5 to ultraviolet radiation.
[0104] Example 2: Cleaning after (pseudo) gate layer etching
[0105] In this example, a second exemplary method for forming one or more fin-type or complementary field effect transistors according to an embodiment of the present invention is described in detail.
[0106] See also Figure 5 , which is a preliminary intermediate structure 11 according to an embodiment of the present invention. The preliminary intermediate structure 11 includes a plurality of fins 31 including a channel material. The channel material can be a channel material, such as silicon (which is a typical channel material for a fin-type field effect transistor) or a layer stack for forming a nanosheet (which is a typical channel material for a complementary field effect transistor). The fins protrude from the substrate 2. The preliminary intermediate structure 11 includes a recess 21 in the upper portion 20 of the substrate 2 between the fins 31. In this embodiment, the preliminary intermediate structure includes a preliminary hard mask 41 superimposed on and aligned with the fins 31. In this embodiment, the substrate 2 and the fins 31 can be formed of different materials (for example, when the method is used to form a complementary field effect transistor), but the difference is that the substrate 2 and the fins 31 can be formed of the same material such as Si (for example, when the fins 31 are used to form the channel of a fin-shaped field effect transistor).
[0107] The preliminary intermediate structure 11 can be formed using a method similar to the first embodiment described in detail above. The preliminary intermediate structure 11 can be formed by providing a substrate 2, then providing a layer containing a channel material on the substrate 2, then providing a preliminary hard mask 41 having an opening 42 above the layer containing the channel material (e.g., on the layer containing the channel material), and then dry etching the layer containing the channel material and the upper portion 20 of the substrate 2 through the opening 42 in the preliminary hard mask 41.
[0108] Subsequently, shallow trench isolations are formed. This can be done by covering the preliminary intermediate structure 11 including the preliminary hard mask, thereby filling the spaces between the fins 31 and the recesses 21 containing the channel material with oxide material. Subsequently, chemical mechanical polishing can be performed, followed by etch-back, to remove the oxide material located outside the trenches. In this embodiment, the preliminary hard mask 41 is also removed by the etch-back. As a result, the recesses 21 are filled with oxide material, such as silicon dioxide, thereby forming shallow trench isolations 23 in the upper portion 20 of the substrate 2, such as Fig. 6A Top view and Figure 6B As shown in the vertical section, Figure 6B It is along Fig. 6A The cross section is shown in dashed line.
[0109] See also Figure 7 Subsequently, an oxide material 7, such as silicon oxide, may be deposited to conformally cover the substrate 2, the shallow trench isolation 23 and the fin 31 comprising the channel material. The conformal oxide material 7 may be used as a gate oxide in a fin-type or complementary field effect transistor to be formed. The deposition may be performed by chemical vapor deposition or chemical vapor deposition such as atomic layer deposition. In an alternative embodiment, no conformal oxide material 7 is deposited.
[0110] See also Fig. 8A , Figure 8B and Figure 8C , Fig. 8A is a top view of a first intermediate structure 12 according to an embodiment of the present invention; Figure 8B For along Fig. 8A A vertical section of line X shown in; Figure 8C For along Fig. 8A A vertical cross section of line Y is shown. A gate or dummy gate material 8 layer is deposited to cover at least the substrate 2, the shallow trench isolation 23 and the fin 31 including the channel material. Since this embodiment includes a conformal oxide material 7, the conformal oxide material 7 is also covered with a gate or dummy gate material 8 layer.
[0111] Subsequently, a first hard mask 9 having an opening 91 is provided over, for example above, the gate or dummy gate material 8 .
[0112] Thus, the first intermediate structure 12 of this embodiment according to an embodiment of the present invention is formed. Here, the first intermediate structure 12 includes a substrate 2 and a plurality of fins 31 including a channel material protruding from the substrate 2. The first intermediate structure 12 also includes a recess in the substrate 2 between the fins 31, and a shallow trench isolation 23 located in the recess and formed of an oxide material. The first intermediate structure 12 also includes a conformal oxide material 7, which covers the substrate 2, the shallow trench isolation 34, and embeds the plurality of fins 31. The first intermediate structure 12 also includes a layer 8 to be patterned, that is, a gate or dummy gate material 8 layer in this embodiment, in which the gate or dummy gate material 8 layer covers the conformal oxide material 7, covers the substrate 2, the shallow trench isolation 34, and embeds the plurality of fins 31. The first intermediate structure 12 also includes a first hard mask 9 having an opening 91.
[0113] Through the openings 91 in the hard mask 9, a dry etch, typically an anisotropic or directional etch, such as a plasma etch, is performed on the layer to be patterned 8 and the conformal oxide material 7. Fig. 9A , Fig. 9B and Fig. 9C , Fig. 9A is a top view of a second intermediate structure 13 according to an embodiment of the present invention; Fig. 9B For along Fig. 9A A vertical section of line X shown in; Fig. 9C For along Fig. 9A A vertical cross section of line Y is shown. By the dry etching, a second intermediate structure 13 is formed. Here, the layer to be patterned has been dry etched to form a plurality of gates or dummy gates 80, which are stacked on and aligned with the patterned conformal oxide material 70. A first hard mask 9 is stacked on and aligned with the plurality of gates or dummy gates 80.
[0114] The second intermediate structure 13 includes one or more exposed oxide surfaces. In this embodiment, the shallow trench isolation 23, the first hard mask 9, and the patterned conformal oxide material 70 are each formed of an oxide material, including exposed oxide surfaces, in this embodiment.
[0115] See also Fig.10 , which is Fig. 9C A vertical cross section of the same cross section shown, but after the oxide surface has been reacted with a silane compound. In order to remove the residue (not shown) by dry etching without further damaging the exposed oxide surface, the exposed oxide surface is etched with a chemical formula of R—Si(R 1 ) n (OR 2 ) 3-n The silane compound is reacted with R, wherein R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2. Thus, the oxide surface is covered with a silane compound bonded to the oxide surface, the silane compound having the chemical formula R—Si(R 1 ) n (OR 2 ) 2-n , where R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2.
[0116] Subsequently, the second intermediate structure 13 (i.e., the intermediate forming a plurality of fin-type or complementary field effect transistors according to an embodiment of the present invention and having a reacted oxide surface) is cleaned by contacting it with a solution (not shown) containing hydrogen fluoride. Subsequently, the silane compound bound to the oxide surface can be removed.
[0117] Next, other steps may be performed to form a plurality of fin-type or complementary field effect transistors, including forming source / drain contacts and interconnects (not shown).
[0118] Although in the above-mentioned first embodiment, the cleaning is performed after dry etching to form a channel, and in the second embodiment, the cleaning is performed while protecting the oxide surface with silane after dry etching to form a gate or a dummy gate, these embodiments can be combined with each other, and cleaning can be performed while protecting the oxide surface with silane both after dry etching to form a channel and after dry etching to form a gate or a dummy gate.
[0119] It should be understood that although preferred embodiments, specific constructions and configurations, and materials of the device of the present invention have been discussed herein, various changes or modifications in form and detail may be made without departing from the scope of the present invention. Steps may be added or reduced to the methods described within the scope of the present invention.
Claims
1. A method of forming one or more fin-type or complementary field effect transistors, the method comprising: i) Providing a first intermediate structure (1, 12), the first intermediate structure comprising: - a layer to be patterned (3, 8), and - a first hard mask (4, 9) having openings (40, 91), ii) dry etching the layer (3, 8) through the opening (40, 91) in the hard mask (4, 9) to form a second intermediate structure (10, 13), wherein the second intermediate structure (10, 13) comprises one or more exposed oxide surfaces, iii) contacting the exposed oxide surface with a chemical formula R—Si(R 1 ) n (OR 2 ) 3-n The silane compound (5) is reacted, wherein R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2, then, iv) cleaning the second intermediate structure (10, 13) having a reactive oxide surface by contacting it with a solution (6) containing hydrogen fluoride.
2. The method of claim 1, wherein: The layer to be patterned is a gate or dummy gate material layer (8), wherein the second intermediate structure (13) comprises one or more gates or dummy gates (80).
3. The method of claim 2, wherein: The method is used to form a plurality of fin-type or complementary field effect transistors, wherein the first intermediate structure (12) comprises: - a substrate (2), - a plurality of fins (31) comprising channel material protruding from the substrate (2), and - recesses (21) in the substrate (2) between the fins (31), - a shallow trench isolation (23) located in the recess (21) and formed of an oxide material, The gate or dummy gate material layer (8) covers the substrate (2), the shallow trench isolation portion (23) and embeds a plurality of fins (31).
4. The method of claim 3, wherein: Forming the first intermediate structure (12) includes: 1a) providing a substrate (2), then, 1b) providing a layer comprising a channel material on a substrate (2), 1c) providing a preliminary hard mask (41) having openings (42) on the layer comprising the channel material, 1d) dry etching a) the layer containing the channel material and b) the upper portion (20) of the substrate (2) through the openings (42) in the preliminary hard mask (41) to form a preliminary intermediate structure (11), the preliminary intermediate structure (11) comprising a plurality of fins (31) containing the channel material and recesses (21) in the substrate (2) between the fins (31) containing the channel material, the fins (31) protruding from the substrate (2), 1e) forming a shallow trench isolation portion (23) by filling the recess (21) with an oxide material, If) covering the substrate (2), the shallow trench isolation portion (23) and the fin (31) containing the channel material with a gate or dummy gate material layer (8), and Ig) providing a first hard mask (9) having an opening (91) on the gate or dummy gate material (8).
5. The method according to claim 4, further comprising a step Ie' between step Ie and step If: conformally covering the substrate (2), the shallow trench isolation portion (23) and the fin (31) with an oxide material (7), and wherein, Step If covers the oxide material (6).
6. The method according to any one of claims 3 to 5, wherein: A plurality of fins (31) containing channel materials comprises a patterned stack of layers for forming a nanosheet.
7. The method of claim 1, wherein: The method is used to form one or more complementary field effect transistors, wherein the layer (3) to be patterned comprises a layer stack (3) for forming a nanosheet.
8. The method of claim 8, wherein: The layer stack (3) comprises alternating layers of silicon and silicon germanium.
9. A method as claimed in any one of the preceding claims, wherein: The radical R of the silane compound comprises an atom chain having a chain length of 1 to 30 atoms.
10. A method as claimed in any one of the preceding claims, wherein: The group R of the silane compound 1 and / or group R 2 Includes atomic chains with chain lengths of 1 to 30 atoms.
11. A method as claimed in any one of the preceding claims, wherein: The group R of the silane compound is selected from: (C1-C30) alkyl, (C6-C20) aryl, (C2-C30) alkenyl, (C6-C20) aryl (C1-C30) alkyl, (C1-C30) alkyl (C6-C20) aryl and (C1-C30) alkoxy; R 1 is selected from the group consisting of: hydrogen, hydroxy, halogen, (C1-C30)alkyl, (C6-C20)aryl, (C6-C20)aryl(C1-C30)alkyl, (C2-C30)alkenyl, and (C1-C30)alkyl(C6-C20)aryl; and R 2 is selected from the group consisting of hydrogen, (C1-C30)alkyl, halogenated (C1-C30)alkyl, (C6-C20)aryl, (C6-C20)aryl(C1-C30)alkyl, and (C1-C30)alkyl(C6-C20)aryl, and R is alkyl, alkenyl, aryl, aralkyl, alkoxy or alkaryl, and R 1 The alkyl, haloalkyl, alkenyl, aryl, aralkyl or alkaryl group may be further substituted by one or more substituents selected from the group consisting of halogen, hydroxyl, -N(R 11 )(R 12 ),—S(R 13 ), -C(=O)R 14 , and -OC(=O)R 15 , where R 11 , R 12 , R 13 , R 14 and R 15 Each is independently selected from hydrogen and (C1-C30)alkyl, (C6-C20)aryl and (C2-C30)alkenyl.
12. The method according to claim 11, wherein the group R of the silane compound is selected from the group consisting of: (C3-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C3-C20)alkyl, (C3-C20)alkyl(C6-C12)aryl; R 1 is selected from the group consisting of hydrogen, hydroxy, halogen, (C1-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C1-C20)alkyl, and (C1-C20)alkyl(C6-C12)aryl; and R 2 is selected from the group consisting of hydrogen, (C1-C20)alkyl, halogenated (C1-C20)alkyl, (C6-C12)aryl, (C6-C12)aryl(C1-C20)alkyl, and (C1-C20)alkyl(C6-C12)aryl, and R is an alkyl, aryl, aralkyl, or alkaryl group and R 1 The alkyl, aryl, aralkyl or alkaryl group may be further substituted by one or more substituents selected from the group consisting of halogen, hydroxyl, -N(R 11 )(R 12 ), and—S(R 13 ),in, R 11 , R 12 , and R 13 Each is independently selected from hydrogen and (C1-C20)alkyl.
13. A method as claimed in any one of the preceding claims, wherein: The hydrogen fluoride concentration of the solution (6) is at most 2% by weight.
14. A method as claimed in any one of the preceding claims, wherein: The solution (6) is applied to the surface of the second intermediate structure (10, 13) over a period of at most 120 seconds.
15. An intermediate (13) for forming a plurality of fin-type or complementary field effect transistors, the intermediate (13) comprising: - a substrate (2), - a plurality of fins (31) comprising channel material protruding from the substrate (2), and - recesses (21) in the substrate (2) between the fins (31), - a shallow trench isolation (23) located in the recess (21) and formed of an oxide material, and - a plurality of gates or dummy gates (80), and - a first hard mask (9) superimposed on the plurality of gates or dummy gates (80) and aligned with the plurality of gates or dummy gates (80), The intermediate (13) comprises an oxide surface covered with a silane compound (5) bonded to the oxide surface, the silane compound (5) having the chemical formula R—Si(R 1 ) n (OR 2 ) 2-n , where R is an organic group, R 1 is selected from hydrogen, hydroxyl, halogen and organic groups, R 2 is selected from hydrogen and an organic group, and n is an integer selected from 0 to 2.