Bias current generating circuit and method, electrical device and vehicle

Abstract

The invention relates to a bias current generation circuit and method, an electrical device and a vehicle, and the bias current generation circuit comprises a first current generation module which is used for generating positive temperature coefficient bias current; the second current generation module is used for generating negative temperature coefficient bias current; and the current superposition module is electrically connected with the first current generation module and the second current generation module and is used for superposing the positive temperature coefficient bias current and the negative temperature coefficient bias current to obtain zero temperature coefficient bias current. The bias current generation circuit is provided with a first current generation module used for generating positive temperature coefficient bias current, a second current generation module used for generating negative temperature coefficient bias current and a current superposition module used for superposing the positive temperature coefficient bias current and the negative temperature coefficient bias current. The current superposition module can finally output the zero-temperature coefficient bias current, so that the influence of temperature is eliminated, and the precision of the bias current is improved.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a bias current generating circuit, method, electrical device and vehicle. Background Art

[0002] The bias current generating circuit generates bias current to provide a stable static operating point for the chip circuit, allowing it to achieve specific functions under specified input conditions.

[0003] However, although the traditional bias current generating circuit is less affected by the power supply voltage, it is greatly affected by temperature, so the bias current generated by it is greatly affected by temperature. Since the chip circuit performs related work based on the bias current generated by the bias current generating circuit, the static current obtained based on the bias current required for the chip circuit to work is also affected by temperature, which ultimately affects its accuracy. Summary of the invention

[0004] The embodiments of the present application provide a bias current generating circuit, method, electrical device and vehicle, which can generate a zero temperature coefficient bias current, thereby improving the accuracy of the bias current to at least partially solve the above-mentioned technical problems.

[0005] In order to achieve the above object, according to a first aspect of the present application, a bias current generating circuit is provided, comprising:

[0006] A first current generating module, used for generating a positive temperature coefficient bias current;

[0007] A second current generating module, used to generate a negative temperature coefficient bias current; and

[0008] The current superposition module is electrically connected to the first current generating module and the second current generating module respectively, and is used to superimpose the positive temperature coefficient bias current and the negative temperature coefficient bias current to obtain a zero temperature coefficient bias current.

[0009] Optionally, the first current generating module includes a first current generating unit and a first current adjusting unit;

[0010] The first current generating unit includes an output end electrically connected to the input end of the first current adjusting unit, and the first current adjusting unit also includes an output end electrically connected to the first input end of the current superposition module;

[0011] The first current generating unit is used to generate a positive temperature coefficient bias current according to the acquired first working bias current and output it to the current superposition module through the first current adjusting unit.

[0012] Optionally, the first current adjustment unit includes a first current mirror unit;

[0013] The first current mirror unit includes an input tube connected in series with the output end of the first current generating unit and an output tube connected in series with the first input end of the current superposition module.

[0014] Optionally, the first current mirror unit includes a cascaded current mirror pair of tubes, including an input tube connected in series with the output end of the first current generating unit and an output tube connected in series with the first input end of the current superposition module.

[0015] Optionally, the first current generating unit includes a first PMOS tube, a second PMOS tube and a first resistor;

[0016] The first PMOS transistor includes a source electrode electrically connected to the source electrode of the second PMOS transistor and used for accessing the working voltage, a gate electrode electrically connected to the drain electrode of the second PMOS transistor and the first end of the first resistor, and a drain electrode for grounding, and the second PMOS transistor also includes a gate electrode electrically connected to the second end of the first resistor and the input end of the first current adjustment unit, respectively;

[0017] The first PMOS tube is used to generate a first working bias current according to a working voltage.

[0018] Optionally, the second current generating module includes a second current generating unit and a second current adjusting unit;

[0019] The second current generating unit includes an input end for receiving the second working bias current and an output end electrically connected to the input end of the second current adjusting unit, and the second current adjusting unit also includes an output end electrically connected to the second input end of the current superposition module;

[0020] The second current generating unit is used to generate a negative temperature coefficient bias current according to the second working bias current and output the negative temperature coefficient bias current to the current superposition module through the second current adjusting unit.

[0021] Optionally, the second current adjustment unit includes a second current mirror unit;

[0022] The second current mirror unit includes an input tube connected in series with the output end of the second current generating unit and an output tube connected in series with the second input end of the current superposition module.

[0023] Optionally, the second current generating unit includes a first NMOS transistor, a second NMOS transistor and a second resistor;

[0024] The first NMOS tube includes a drain electrode electrically connected to the gate electrode of the second NMOS tube and used for receiving the second working bias current, a gate electrode electrically connected to the source electrode of the second NMOS tube and the first end of the second resistor respectively, and a source electrode used for grounding, the second resistor also includes a second end used for grounding, and the second NMOS tube also includes a drain electrode electrically connected to the input end of the second current adjustment unit.

[0025] Optionally, the second current generating unit includes an input terminal electrically connected to the first current generating module, so as to use the positive temperature coefficient bias current connected from the first current generating module as the second working bias current.

[0026] Optionally, the second current generating module further includes a current transfer unit;

[0027] The current transfer unit comprises an input terminal electrically connected to the first current generating module, so as to receive the positive temperature coefficient bias current from the first current generating module and output it to the second current generating unit.

[0028] Optionally, the current transfer unit includes a third current mirror unit;

[0029] The third current mirror unit includes an input tube connected in series with the output end of the first current generating module and an output tube connected in series with the input end of the second current generating unit.

[0030] Optionally, the current superposition module includes a third NMOS tube;

[0031] The third NMOS tube includes a drain electrode electrically connected to the first current generating module and the second current generating module respectively and used for outputting a zero temperature coefficient bias current, a source electrode used for grounding, and a gate electrode connected to the drain electrode.

[0032] According to a second aspect of the present application, a bias current generating method is provided, which is applied to the bias current generating circuit in any of the above embodiments. The bias current generating method includes:

[0033] Generate a positive temperature coefficient bias current through a first current generating module;

[0034] generating a negative temperature coefficient bias current through a second current generating module; and

[0035] The positive temperature coefficient bias current and the negative temperature coefficient bias current are superimposed by the current superposition module to obtain a zero temperature coefficient bias current.

[0036] According to a third aspect of the present application, there is provided an electrical device, comprising the bias current generating circuit in any one of the above embodiments and a chip circuit electrically connected to a current superposition module in the bias current generating circuit;

[0037] The bias current generating circuit is used to provide a zero temperature coefficient bias current to the chip circuit.

[0038] According to a fourth aspect of the present application, a vehicle is provided, comprising the electrical device in any one of the above embodiments.

[0039] The bias current generating circuit of the embodiment of the present application is respectively provided with a first current generating module for generating a positive temperature coefficient bias current, a second current generating module for generating a negative temperature coefficient bias current, and a current superposition module for superimposing the positive temperature coefficient bias current and the negative temperature coefficient bias current, so that the current superposition module can finally output a zero temperature coefficient bias current, thereby greatly eliminating the influence of temperature, improving the accuracy of the bias current, and further improving the accuracy of the static current obtained by the chip circuit based on the bias current.

[0040] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0042] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0043] Figure 1 is a schematic structural diagram of a bias current generating circuit provided in an exemplary embodiment of the present application;

[0044] Figure 2 is a schematic structural diagram of a bias current generating circuit including a first current generating module and a second current generating module in an exemplary embodiment of the present application;

[0045] Figure 3 is a schematic structural diagram of a bias current generating circuit in which a second current generating unit is electrically connected to a first current generating module provided in an exemplary embodiment of the present application;

[0046] Figure 4 is a structural schematic diagram of a bias current generating circuit in which the second current generating module provided in an exemplary embodiment of the present application further includes a current transfer unit;

[0047] Figure 5 is a schematic diagram of a specific circuit implementation of a bias current generating circuit provided in an exemplary embodiment of the present application;

[0048] Figure 6 is a schematic diagram of the structure of an electrical device provided in an exemplary embodiment of the present application.

[0049] Description of reference numerals:

[0050] NM1-NM9, NMOS tube; PM1-PM7, PMOS tube; R1, first resistor; R2, second resistor; I PTAT , positive temperature coefficient bias current; I CTAT , negative temperature coefficient bias current; I P , the current obtained by copying the positive temperature coefficient bias current through the current mirror; I C , the current obtained by copying the negative temperature coefficient bias current through the current mirror; VDD, power supply voltage; GND, power ground. DETAILED DESCRIPTION

[0051] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0052] According to the first aspect of the present application, Figure 1 As shown, a bias current generating circuit is provided, including a first current generating module, a second current generating module and a current superposition module.

[0053] exist Figure 1 In the embodiment, the current superposition module is electrically connected to the first current generating module and the second current generating module respectively.

[0054] The first current generating module is used for generating a positive temperature coefficient bias current.

[0055] Among them, the positive temperature coefficient (PTC) refers to the situation that the value of a physical quantity increases with the increase of temperature. The positive temperature coefficient bias current generated by the first current generating module can compensate the positive temperature coefficient of the bias current so that the obtained bias current is not affected by the positive temperature coefficient of related devices in the device.

[0056] The second current generating module is used for generating a negative temperature coefficient bias current.

[0057] On the contrary, the negative temperature coefficient (NTC) refers to the situation where a certain property or parameter of a substance decreases as the temperature increases. The negative temperature coefficient bias current generated by the second current generating module can compensate for the negative temperature coefficient of the bias current, so that the obtained bias current is not affected by the negative temperature coefficient of the related components in the device.

[0058] The current superposition module is used to superimpose the positive temperature coefficient bias current and the negative temperature coefficient bias current to obtain a zero temperature coefficient bias current.

[0059] The zero temperature coefficient, relative to the positive temperature coefficient and the negative temperature coefficient, refers to the fact that as the temperature rises, a certain property or parameter of a substance neither increases nor decreases. The above embodiments have mentioned that the positive temperature coefficient bias current generated by the first current generating module can achieve compensation on the positive temperature coefficient, and the negative temperature coefficient bias current generated by the second current generating module can achieve compensation on the negative temperature coefficient. Therefore, the zero temperature coefficient bias current obtained by superimposing the positive temperature coefficient bias current and the negative temperature coefficient bias current can simultaneously achieve compensation on the positive temperature coefficient and the negative temperature coefficient, so that the bias current is basically not affected by temperature.

[0060] The bias current generating circuit of the embodiment of the present application is respectively provided with a first current generating module for generating a positive temperature coefficient bias current, a second current generating module for generating a negative temperature coefficient bias current, and a current superposition module for superimposing the positive temperature coefficient bias current and the negative temperature coefficient bias current, so that the current superposition module can finally output a zero temperature coefficient bias current, thereby greatly eliminating the influence of temperature and improving the accuracy of the bias current.

[0061] like Figure 2 As shown, optionally, the first current generating module includes a first current generating unit and a first current adjusting unit.

[0062] exist Figure 2 In the embodiment, the first current generating unit includes an output end electrically connected to the input end of the first current adjusting unit, and the first current adjusting unit also includes an output end electrically connected to the first input end of the current superposition module.

[0063] Among them, since the first current generating unit needs to generate a corresponding positive temperature coefficient bias current, and the premise for realizing current output is current input, only when there is current input can the first current generating unit work normally to realize the generation of positive temperature coefficient bias current.

[0064] The first current generating unit is used to generate a positive temperature coefficient bias current according to the acquired first working bias current and output it to the current superposition module through the first current adjusting unit.

[0065] The first current generating unit may be directly connected to the first working bias current input from the outside, or the first current generating unit may generate the corresponding first working bias current based on the connected working voltage.

[0066] Among them, the positive temperature coefficient bias current is mainly used to achieve positive temperature coefficient compensation, thereby eliminating the influence of the positive temperature coefficient on the bias current. The first current generating unit can offset the positive temperature coefficient effect of the original component or circuit by introducing a component or circuit with a negative temperature coefficient, which can maintain the parameter stability of the component or circuit to a certain extent, making it have more reliable performance at different temperatures, and finally output a positive temperature coefficient bias current with positive temperature coefficient compensation.

[0067] Among them, the first current adjustment unit is used to adjust the positive temperature coefficient bias current so that it meets the compensation requirements of the positive temperature coefficient; in addition, the first current adjustment unit is also used to accurately and reliably transmit the positive temperature coefficient bias current generated by the first current generating unit to the current superposition module on the basis of adjustment, so that the current superposition module can superimpose the accurate positive temperature coefficient bias current to ensure the accuracy of the zero temperature coefficient bias current finally output.

[0068] Optionally, the first current adjustment unit includes a first current mirror unit.

[0069] The first current mirror unit includes an input tube connected in series with the output end of the first current generating unit and an output tube connected in series with the first input end of the current superposition module.

[0070] Among them, the current mirror is a circuit structure composed of two or more transistors, which is used to generate an output current equal to or proportional to the input current. In this embodiment, the first current mirror unit is used to copy a certain proportion of the positive temperature coefficient bias current generated by the first current generating unit, and then provide it to the current superposition module.

[0071] The positive temperature coefficient bias current is adjusted and transmitted by means of a current mirror, which has the advantages of high stability and low power consumption. Specifically, the current mirror can provide a stable current output that is not affected by load changes, and the current mirror can also offset the effect of temperature changes on the current to a certain extent. This is because the transistors in the current mirror usually have the same temperature characteristics, making the output current less responsive to temperature changes; in addition, the current mirror usually uses low-power transistors, so the power consumed during operation is low.

[0072] Optionally, the first current mirror unit includes a cascaded current mirror pair of tubes, including an input tube connected in series with the output end of the first current generating unit and an output tube connected in series with the first input end of the current superposition module.

[0073] Among them, the cascade current mirror pair adopts the Cascode current mirror structure. The Cascode current mirror structure has a higher input impedance and can effectively isolate the influence between the input signal source and the output load, which helps to improve the stability and anti-interference ability of the circuit. The Cascode current mirror structure can provide a lower output impedance, making the circuit less sensitive to load changes, which helps to improve the linearity and driving ability of the circuit. The Cascode current mirror structure can effectively suppress the generation of second harmonics and improve the linearity and signal quality of the circuit.

[0074] The cascode current mirror structure is usually composed of more than two MOS transistors. In other embodiments, the first current mirror unit may also adopt a conventional current mirror structure composed of two MOS transistors.

[0075] like Figure 2 As shown, optionally, the second current generating module includes a second current generating unit and a second current adjusting unit.

[0076] exist Figure 2 In the embodiment, the second current generating unit includes an output end electrically connected to the input end of the second current adjusting unit, and the second current adjusting unit also includes an output end electrically connected to the second input end of the current superposition module.

[0077] Among them, since the second current generating unit needs to generate a corresponding negative temperature coefficient bias current, the premise for realizing current output is current input. Only when there is current input can the second current generating unit work normally to realize the generation of negative temperature coefficient bias current.

[0078] The second current generating unit is used to generate a negative temperature coefficient bias current according to the acquired second working bias current and output the negative temperature coefficient bias current to the current superposition module through the second current adjusting unit.

[0079] The second current generating unit may be directly connected to the second working bias current input from the outside, or the second current generating unit may generate the corresponding second working bias current based on the connected working voltage.

[0080] Among them, the negative temperature coefficient bias current is mainly used to achieve negative temperature coefficient compensation, thereby eliminating the influence of the negative temperature coefficient on the bias current. The second current generating unit can offset the negative temperature coefficient effect of the original component or circuit by introducing a component or circuit with a positive temperature coefficient, which can maintain the parameter stability of the component or circuit to a certain extent, making it have more reliable performance at different temperatures, and finally output a negative temperature coefficient bias current with negative temperature coefficient compensation.

[0081] Among them, the second current adjustment unit is used to adjust the negative temperature coefficient bias current so that it meets the compensation requirements of the negative temperature coefficient; in addition, the second current adjustment unit is also used to accurately and reliably transmit the negative temperature coefficient bias current generated by the second current generating unit to the current superposition module on the basis of adjustment, so that the current superposition module can superimpose the accurate negative temperature coefficient bias current to ensure the accuracy of the zero temperature coefficient bias current finally output.

[0082] Optionally, the second current adjustment unit includes a second current mirror unit;

[0083] The second current mirror unit includes an input tube connected in series with the output end of the second current generating unit and an output tube connected in series with the second input end of the current superposition module.

[0084] In this embodiment, the second current mirror unit is used to copy a certain proportion of the negative temperature coefficient bias current generated by the second current generating unit, and then provide it to the current superposition module.

[0085] The second current mirror unit may adopt a conventional current mirror structure composed of two MOS tubes.

[0086] like Figure 3 As shown, optionally, the second current generating unit includes an input terminal electrically connected to the first current generating module, so as to use the positive temperature coefficient bias current connected from the first current generating module as the second working bias current.

[0087] Among them, the above embodiments have mentioned that the second current generating unit can also generate the corresponding second working bias current by connecting the working voltage like the first current generating unit, but this requires the layout of corresponding devices, increasing the hardware cost and wiring complexity. In this embodiment, the first current generating module itself can output the positive temperature coefficient bias current, on this basis, the second current generating unit can directly use it as the second working bias current, which can save the relevant hardware cost and reduce the wiring complexity.

[0088] Among them, Figure 3 In the embodiment, the second current generating unit is specifically electrically connected to the second current adjusting unit in the first current generating module. In other embodiments, the second current generating unit may also be directly electrically connected to the first current generating unit in the first current generating module.

[0089] Similarly, when the second current generating unit generates the second working bias current according to the working voltage, the first current generating unit can also directly use the negative temperature coefficient bias current generated by the second current generating unit as the first working bias current.

[0090] like Figure 4As shown, optionally, the second current generating module further includes a current transferring unit.

[0091] exist Figure 4 In the embodiment, the current transfer unit includes an input terminal electrically connected to the first current generating module, so as to receive the positive temperature coefficient bias current from the first current generating module and output it to the second current generating unit.

[0092] Among them, the current transfer unit is mainly used to accurately and reliably transfer the positive temperature coefficient bias current generated by the first current generating unit in the first current generating module to the second current generating unit, so that the second current generating unit can operate based on the accurate second working bias current to ensure the accuracy of the negative temperature coefficient bias current finally output.

[0093] Among them, during the current transmission process, when the output load changes, if the output impedance is low, the corresponding current may also change, thereby affecting the accuracy of the transmitted current. Therefore, the current transmission unit is mainly used to increase the output impedance on the transmission line, so that the transmitted current does not change with the change of the output load, ensuring the constancy of the transmitted current, so as to achieve accurate and reliable current transmission.

[0094] Optionally, the current transfer unit includes a third current mirror unit;

[0095] The third current mirror unit includes an input tube connected in series with the output end of the first current generating module and an output tube connected in series with the input end of the second current generating unit.

[0096] In this embodiment, the third current mirror unit is used to copy a certain proportion of the positive temperature coefficient bias current generated by the first current generating unit, and then provide the copy to the second current generating unit.

[0097] Among them, the current mirror has high output impedance, which can solve the current change problem caused by the output load and realize accurate and reliable current transmission.

[0098] like Figure 5 As shown, optionally, the first current generating unit includes a first PMOS tube (including PMOS tube PM1), a second PMOS tube (including PMOS tube PM2) and a first resistor R1; the first current adjusting unit includes NMOS tube NM1, NMOS tube NM2, NMOS tube NM3, NMOS tube NM4, NMOS tube NM5, NMOS tube NM6, PMOS tube PM3 and PMOS tube PM7.

[0099] Among them, the source of the PMOS tube PM1 is connected to the power supply voltage VDD, the gate of the PMOS tube PM1 is electrically connected to the first end of the first resistor R1 and the drain of the PMOS tube PM2 respectively, the source of the PMOS tube PM2 is connected to the power supply voltage VDD, and the gate of the PMOS tube PM2 is connected to the second end of the first resistor R1; the gate and drain of the NMOS tube NM1 are connected to the gate of the NMOS tube NM2 respectively, the source of the NMOS tube NM1 is connected to the gate and drain of the NMOS tube NM3, the gate of the NMOS tube NM3 is connected to the gate of the NMOS tube NM4, the source of the NMOS tube NM3 is connected to the power ground GND, and the drain of the NMOS tube NM4 is connected to the NMOS tube NM The source of the NMOS tube NM2 is connected to the power ground GND, the source of the NMOS tube NM4 is connected to the power ground GND, the gate of the NMOS tube NM5 is connected to the gate of the NMOS tube NM1, the drain of the NMOS tube NM5 is connected to the drain of the PMOS tube PM3, the source of the NMOS tube NM5 is connected to the drain of the NMOS tube NM6, the gate of the NMOS tube NM6 is connected to the gate of the NMOS tube NM3, the source of the NMOS tube NM6 is connected to the power ground GND, the gate and drain of the PMOS tube PM3 are connected, the source of the PMOS tube PM3 is connected to the power supply voltage VDD, the gate of the PMOS tube PM7 is connected to the gate of the PMOS tube PM3, and the source of the PMOS tube PM7 is connected to the power supply voltage VDD.

[0100] The NMOS tube NM1, NMOS tube NM2, NMOS tube NM3, NMOS tube NM4, NMOS tube NM5 and NMOS tube NM6 constitute a Cascode current mirror structure, wherein the NMOS tube NM5 and NMOS tube NM6 serve as output tubes of the Cascode current mirror structure respectively.

[0101] It is necessary to add that:

[0102] First, the core of the Cascode current mirror structure is NMOS tube NM1, NMOS tube NM2, NMOS tube NM3, and NMOS tube NM4, among which NMOS tube NM2 and NMOS tube NM4 can be used as output tubes, but because the bias current needs to be output to other loops in this embodiment, NMOS tube NM5 and NMOS tube NM6 are additionally used for output, and at this time, NMOS tube NM5 and NMOS tube NM6 can also be understood as output tubes.

[0103] Secondly, NMOS tube NM5 and NMOS tube NM6 are used to transfer the current of the first current adjustment unit to the second current generating unit, and they belong to the connecting part of the two. However, since they adopt the structure of two MOS tubes, this is a specific structure that exists depending on the Cascode current mirror structure. Therefore, the Cascode current mirror structure defined in this embodiment may include NMOS tube NM1, NMOS tube NM2, NMOS tube NM3, NMOS tube NM4, NMOS tube NM5, and NMOS tube NM6.

[0104] The current flowing through the PMOS tube PM1 can be accurately copied to the current flowing through the PMOS tube PM2. Assuming that the current flowing through the PMOS tube PM1 is I1 and the current flowing through the PMOS tube PM2 is I2, the positive temperature coefficient bias current I PTAT for:

[0105]

[0106] Among them, V TH1 is the conduction threshold voltage of PMOS tube PM1, V TH2 is the conduction threshold voltage of PMOS tube PM2, u is the mobility, C OX is the oxide layer capacitance, V GSP2 is the gate-source voltage of PMOS tube PM2, V GSP1 is the gate-source voltage of PMOS tube PM1, is the size of the PMOS tube PM1, It is the size of PMOS tube PM2.

[0107] From the above formula, we can get the positive temperature coefficient bias current I PTAT It is determined by the size of the first resistor R1, the size of the PMOS transistor PM1 and the size of the PMOS transistor PM2, and has nothing to do with the power supply voltage, but will increase with the increase of the operating temperature (V GSP2 -V GSP1 The value of changes with temperature).

[0108] It should be noted that the PMOS transistor PM3 and the PMOS transistor PM7 form a current mirror for converting the positive temperature coefficient bias current I PTAT Copied to the current superposition module at a certain ratio.

[0109] It should be added that Figure 5 In the circuit connection relationship shown, the current on the NMOS tubes NM5 and NM6 is not convenient to be directly transferred to the NMOS tube NM9 as a current superposition module, so the current is additionally transferred through the current mirror composed of the PMOS tubes PM3 and PM7.

[0110] That is to say, in this embodiment, the first current mirror unit includes the cascade current mirror pair mentioned above and the current mirror pair composed of the PMOS tube PM3 and the PMOS tube PM7, and the current mirror pair here is supplemented based on the actual circuit routing conditions, so as to transfer the current of the cascade current mirror pair to the current superposition module. Of course, in other embodiments, the current mirror pair here can also be removed and other methods can be used to transfer the current of the cascade current mirror pair to the current superposition module.

[0111] like Figure 5 As shown, optionally, the second current generating unit includes a first NMOS tube (including NMOS tube NM7), a second NMOS tube (including NMOS tube NM8) and a second resistor R2; the second current adjusting unit includes PMOS tube PM5 and PMOS tube PM6; and the current transfer unit includes PMOS tube PM3 and PMOS tube PM4.

[0112] Among them, the gate of the PMOS tube PM4 is connected to the gate of the PMOS tube PM3, the drain of the PMOS tube PM4 is connected to the drain of the NMOS tube NM7 and the gate of the NMOS tube NM8, the gate of the NMOS tube NM7 is connected to the drain of the NMOS tube NM8, the source of the NMOS tube NM7 is connected to the power ground GND, the first end of the second resistor R2 is connected to the gate of the NMOS tube NM7, the second end of the second resistor R2 is connected to the power ground GND, the gate and drain of the PMOS tube PM5 are respectively connected to the source of the NMOS tube NM8, the gate of the PMOS tube PM6 is connected to the gate of the PMOS tube PM5, and the source of the PMOS tube PM6 is connected to the power supply voltage VDD.

[0113] Among them, NMOS tube NM5, NMOS tube NM6 and PMOS tube PM3 are used to form a current mirror to replicate the positive temperature coefficient bias current I PTAT , as the negative temperature coefficient bias current I CTATThe generated working bias current, NMOS tube NM7 and NMOS tube NM8 form a negative feedback control circuit. In the initial state, NMOS tube NM7 and NMOS tube NM8 are in the off state due to the low gate voltage. When current flows through the drain of PMOS tube PM4, the gate voltage of NMOS tube NM8 is raised, and current gradually flows through NMOS tube NM8. The gate voltage of NMOS tube NM7 is gradually raised, and current gradually flows through NMOS tube NM7. The gate voltage of NMOS tube NM8 will decrease until the current flowing through NMOS tube NM7 is equal to the current flowing through PMOS tube PM4, and the circuit finally reaches a stable state. Since the current flowing through PMOS tube PM4 is small, NMOS tube NM7 and NMOS tube NM8 both work in the subthreshold region. Assuming that the current flowing through NMOS tube NM7 and NMOS tube NM8 is I3 and I4, the negative temperature coefficient bias current I generated is CTAT It can be obtained by the following formula:

[0114]

[0115]

[0116] In the above formula, exp represents the exponential function, α is the proportionality coefficient, ξ is an ideal factor, I0 represents the saturation leakage current, k is the Boltzmann constant, T is the temperature, q is the charge, m is the current mirror replication factor, is the size of NMOS tube NM7, V GS7 is the gate-source voltage of NMOS tube NM7, is the size of NMOS tube NM8, V GS8 is the gate-source voltage of NMOS tube NM8. CTAT The working bias current generated by the current is a positive temperature coefficient bias current I PTAT , it can be seen from formula (8) that I CTAT The positive temperature coefficient bias current I PTAT The negative temperature coefficient bias current, whose magnitude is determined by the positive temperature coefficient bias current I PTAT In addition, the negative feedback control loop formed by the NMOS transistors NM7 and NMOS transistors NM8 weakens the influence of the power supply voltage change.

[0117] It should be noted that the PMOS transistor PM5 and the PMOS transistor PM6 form a current mirror for converting the negative temperature coefficient bias current I CTAT Copied to the current superposition module at a certain ratio.

[0118] like Figure 5 As shown, optionally, the current superposition module includes a third NMOS tube (including the NMOS tube NM9).

[0119] The drain of the PMOS transistor PM6 is connected to the drain of the NMOS transistor NM9 , the drain of the PMOS transistor PM7 is connected to the drain of the NMOS transistor NM9 , and the source of the NMOS transistor NM9 is connected to the power ground GND.

[0120] The current I flowing through the PMOS tube PM6 C The positive temperature coefficient bias current I is replicated by the current mirror CTAT , the current I flowing through the PMOS tube PM7 P The negative temperature coefficient bias current I is replicated by the current mirror PTAT Then the current flowing through the PMOS tube PM6 and the current flowing through the PMOS tube PM7 are superimposed and flow through the NMOS tube NM9, so that the final temperature-compensated zero temperature coefficient bias current I OUT , whose value is:

[0121]

[0122] In the above formula, a and b are the current mirror replication multiples. By adjusting a, b, the first resistor R1 and the second resistor R2, a zero temperature coefficient bias current I can be obtained. OUT .

[0123] According to a second aspect of the present application, a bias current generating method is provided, which is applied to the bias current generating circuit in any of the above embodiments. The bias current generating method includes:

[0124] Generate a positive temperature coefficient bias current through a first current generating module;

[0125] generating a negative temperature coefficient bias current through a second current generating module; and

[0126] The positive temperature coefficient bias current and the negative temperature coefficient bias current are superimposed by the current superposition module to obtain a zero temperature coefficient bias current.

[0127] According to the third aspect of this application, Figure 6 As shown, an electrical device is provided, comprising the bias current generating circuit in any one of the above embodiments and a chip circuit electrically connected to the current superposition module in the bias current generating circuit;

[0128] The bias current generating circuit is used to provide a zero temperature coefficient bias current to the chip circuit.

[0129] The electrical device of the embodiment of the present application is respectively provided with a first current generating module for generating a positive temperature coefficient bias current, a second current generating module for generating a negative temperature coefficient bias current, and a current superposition module for superimposing the positive temperature coefficient bias current and the negative temperature coefficient bias current, so that the current superposition module can finally output a zero temperature coefficient bias current, thereby greatly eliminating the influence of temperature and improving the accuracy of the bias current.

[0130] According to a fourth aspect of the present application, a vehicle is provided, comprising the electrical device in any one of the above embodiments.

[0131] The vehicle of the embodiment of the present application is respectively provided with a first current generating module for generating a positive temperature coefficient bias current, a second current generating module for generating a negative temperature coefficient bias current, and a current superposition module for superimposing the positive temperature coefficient bias current and the negative temperature coefficient bias current, so that the current superposition module can finally output a zero temperature coefficient bias current, thereby greatly eliminating the influence of temperature and improving the accuracy of the bias current.

[0132] The vehicle may be a pure fuel vehicle, or a pure electric vehicle, a plug-in hybrid vehicle, an extended-range hybrid vehicle or other new energy vehicle, and this application does not make any specific limitations on this.

[0133] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0134] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0135] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0136] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. In the embodiments of the present application, the description of each embodiment has its own focus. For the parts not described in detail in a certain embodiment, please refer to the relevant contents of other embodiments. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A bias current generating circuit, characterized in that: include: A first current generating module, used for generating a positive temperature coefficient bias current; A second current generating module, used for generating a negative temperature coefficient bias current; as well as The current superposition module is electrically connected to the first current generating module and the second current generating module respectively, and is used to superimpose the positive temperature coefficient bias current and the negative temperature coefficient bias current to obtain a zero temperature coefficient bias current.

2. The bias current generating circuit according to claim 1, characterized in that: The first current generating module includes a first current generating unit and a first current adjusting unit; The first current generating unit includes an output end electrically connected to the input end of the first current adjusting unit, and the first current adjusting unit also includes an output end electrically connected to the first input end of the current superposition module; The first current generating unit is used to generate the positive temperature coefficient bias current according to the acquired first working bias current and output it to the current superposition module through the first current adjusting unit.

3. The bias current generating circuit according to claim 2, characterized in that: The first current adjustment unit includes a first current mirror unit; The first current mirror unit includes an input tube connected in series with the output end of the first current generating unit and an output tube connected in series with the first input end of the current superposition module.

4. The bias current generating circuit according to claim 3, characterized in that: The first current mirror unit includes a cascade current mirror pair of tubes, including an input tube connected in series with the output end of the first current generating unit and an output tube connected in series with the first input end of the current superposition module.

5. The bias current generating circuit according to claim 2, characterized in that: The first current generating unit includes a first PMOS tube, a second PMOS tube and a first resistor; The first PMOS transistor includes a source electrode electrically connected to the source electrode of the second PMOS transistor and used for accessing an operating voltage, a gate electrode electrically connected to the drain electrode of the second PMOS transistor and the first end of the first resistor, and a drain electrode electrically connected to ground, and the second PMOS transistor also includes a gate electrode electrically connected to the second end of the first resistor and the input end of the first current adjustment unit, respectively; The first PMOS tube is used to generate the first working bias current according to the working voltage.

6. The bias current generating circuit according to any one of claims 1 to 5, characterized in that: The second current generating module includes a second current generating unit and a second current adjusting unit; The second current generating unit includes an input end for receiving a second working bias current and an output end electrically connected to the input end of the second current adjusting unit, and the second current adjusting unit also includes an output end electrically connected to the second input end of the current superposition module; The second current generating unit is used to generate the negative temperature coefficient bias current according to the second working bias current and output it to the current superposition module through the second current adjusting unit.

7. The bias current generating circuit according to claim 6, characterized in that: The second current adjustment unit includes a second current mirror unit; The second current mirror unit includes an input tube connected in series with the output end of the second current generating unit and an output tube connected in series with the second input end of the current superposition module.

8. The bias current generating circuit according to claim 6, characterized in that: The second current generating unit includes a first NMOS transistor, a second NMOS transistor and a second resistor; The first NMOS tube includes a drain electrode electrically connected to the gate electrode of the second NMOS tube and used for receiving the second working bias current, a gate electrode electrically connected to the source electrode of the second NMOS tube and the first end of the second resistor respectively, and a source electrode used for grounding, the second resistor also includes a second end used for grounding, and the second NMOS tube also includes a drain electrode electrically connected to the input end of the second current adjustment unit.

9. The bias current generating circuit according to claim 6, characterized in that: The second current generating unit includes an input terminal electrically connected to the first current generating module, so as to use the positive temperature coefficient bias current connected from the first current generating module as the second working bias current.

10. The bias current generating circuit according to claim 9, characterized in that: The second current generating module further includes a current transfer unit; The current transfer unit includes an input terminal electrically connected to the first current generating module, so as to receive the positive temperature coefficient bias current from the first current generating module and output it to the second current generating unit.

11. The bias current generating circuit according to claim 10, characterized in that: The current transfer unit includes a third current mirror unit; The third current mirror unit includes an input tube connected in series with the output end of the first current generating module and an output tube connected in series with the input end of the second current generating unit.

12. The bias current generating circuit according to claim 1, characterized in that: The current superposition module includes a third NMOS tube; The third NMOS transistor includes a drain electrode electrically connected to the first current generating module and the second current generating module respectively and used for outputting the zero temperature coefficient bias current, a source electrode used for grounding, and a gate electrode connected to the drain electrode.

13. A bias current generating method, applied to the bias current generating circuit according to any one of claims 1 to 12, characterized in that: The bias current generating method comprises: Generate a positive temperature coefficient bias current through a first current generating module; generating a negative temperature coefficient bias current through a second current generating module; and The positive temperature coefficient bias current and the negative temperature coefficient bias current are superimposed by a current superposition module to obtain a zero temperature coefficient bias current.

14. An electrical device, characterized in that: A chip circuit comprising the bias current generating circuit according to any one of claims 1 to 12 and electrically connected to a current superposition module in the bias current generating circuit; The bias current generating circuit is used for providing a zero temperature coefficient bias current to the chip circuit.

15. A vehicle, characterized in that: An electrical device comprising the electrical device of claim 14.

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