Semiconductor test data processing method and device, equipment and storage medium

Abstract

The invention provides a semiconductor test data processing method and device, semiconductor test equipment and a storage medium, and the method comprises the steps: obtaining the test data of a chip, and enabling the test data to be obtained through sampling based on a selected sampling channel; determining a compensation parameter corresponding to the test data based on the storage address of the test data; compensating the test data based on the compensation parameter to obtain target data; establishing a corresponding relationship between each piece of target data and each channel based on a channel mask value in the compensation parameter; and outputting the target data corresponding to each channel based on the corresponding relationship, so that the test data can be compensated, the precision is improved, and the corresponding relationship between the target data and each channel can be established for display, so that the displayed waveform is more intuitive.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor testing technology, and in particular, relates to a method, device, equipment and storage medium for processing semiconductor test data. Background Art

[0002] In chip testing, especially SOC testing, waveform capture technology plays a vital role. With the rapid development of semiconductor technology, the complexity and integration of chips are constantly improving, and the requirements for testing technology are getting higher and higher. The application background of waveform capture technology in chip testers is mainly reflected in many aspects, such as functional verification and debugging, fault analysis, multi-channel and high bandwidth requirements, automation and software integration, etc. In order to obtain the waveform data of the chip in related technologies, the oscilloscope measurement method is used to capture the voltage waveform, but the oscilloscope is expensive, large in size, and complicated to operate. In addition, the waveform captured by the oscilloscope has the problem of low accuracy and is not intuitive enough when displaying the waveform. Summary of the invention

[0003] The embodiments of the present application provide a method, device, equipment and storage medium for processing semiconductor test data, which can compensate the test data to improve the accuracy, and can establish a corresponding relationship between the target data and each channel for display, making the displayed waveform more intuitive.

[0004] In a first aspect, an embodiment of the present application provides a method for processing semiconductor test data, comprising:

[0005] Acquire test data of the chip, wherein the test data is obtained by sampling based on the selected sampling channel;

[0006] Determining a compensation parameter corresponding to the test data based on a storage address of the test data;

[0007] Compensating the test data based on the compensation parameters to obtain target data;

[0008] Establishing a correspondence between each target data and each channel based on the channel mask value in the compensation parameter;

[0009] The target data corresponding to each channel is output based on the corresponding relationship.

[0010] In some embodiments, the compensation parameters include: a value corresponding to each microvolt of the analog-to-digital AD conversion, a first adjustment coefficient, a second adjustment coefficient, a gain coefficient, and an offset value; the test data includes: voltage; and compensating the test data based on the compensation parameters to obtain target data includes:

[0011] Multiplying the voltage by the value corresponding to each microvolt of the AD conversion to obtain a measurement output value;

[0012] Multiplying the measured output value by the first adjustment coefficient and adding the second adjustment coefficient to obtain a device voltage output value;

[0013] The device voltage output value is multiplied by the gain coefficient and then added to the offset value to obtain a compensated voltage.

[0014] In some embodiments, the compensation parameter further includes: a resistance value and a third adjustment coefficient, the test data further includes: a current, and compensating the test data based on the compensation parameter to obtain the target data includes:

[0015] Subtracting the first adjustment coefficient from the measured output value to obtain a first intermediate value, and multiplying the first intermediate value by the second adjustment coefficient to obtain a second intermediate value;

[0016] Dividing the second intermediate value by the product of the resistance value and the third adjustment coefficient to obtain a device current output value;

[0017] The device current output value is multiplied by the gain coefficient and then added with the offset value to obtain the compensated current.

[0018] In some embodiments, the channel mask value includes: a mask value of a current channel and a mask value of a voltage channel, and establishing a correspondence between each target data and each channel based on the channel mask value in the compensation parameter includes:

[0019] Traversing the mask values ​​of the voltage channel to find an enabled flag;

[0020] When the number of enabled identifiers is less than the number of channels, traverse the mask values ​​of the current channels to find enabled identifiers;

[0021] When the total number of enabled flags is equal to the number of channels, the corresponding channels are determined based on the bits of the enabled flags in each mask value;

[0022] Establish the corresponding relationship between each target data and the corresponding channel.

[0023] In some embodiments, the method further comprises:

[0024] When the cursor function is enabled, in response to a first operation by the user, displaying a first cursor;

[0025] In response to the movement operation of the first cursor, updating the position of the first cursor and determining the data corresponding to the first cursor;

[0026] In response to a cursor switching event, displaying a second cursor;

[0027] In response to a movement event of the second cursor, updating a position of the second cursor and determining data corresponding to the second cursor;

[0028] A difference between the data corresponding to the first cursor and the data corresponding to the second cursor is determined, and the difference is output.

[0029] In some embodiments, when there are multiple channels, outputting target data corresponding to each channel based on the corresponding relationship includes:

[0030] Synchronize the sampling point moment of each channel;

[0031] When the sampling points of each channel are synchronized, the target data corresponding to each channel is output based on the corresponding relationship.

[0032] In some embodiments, the step of obtaining chip test data includes:

[0033] Get the sampling parameters configured by the user;

[0034] Applying a test voltage and a test current to the chip based on the sampling parameters, and controlling a test machine to sample test data of the chip based on the sampling parameters;

[0035] When the sampling is completed, the test data of the chip is obtained.

[0036] In a second aspect, an embodiment of the present application provides a semiconductor test data processing device, comprising:

[0037] An acquisition module, used for acquiring test data of the chip, wherein the test data is obtained by sampling based on a selected sampling channel;

[0038] A determination module, configured to determine a compensation parameter corresponding to the test data based on a storage address of the test data;

[0039] A compensation module, compensating the test data based on the compensation parameters to obtain target data;

[0040] An establishing module, used for establishing a corresponding relationship between each target data and each channel based on the channel mask value in the compensation parameter;

[0041] The output module is used to output the target data corresponding to each channel based on the corresponding relationship.

[0042] In a third aspect, an embodiment of the present application provides a semiconductor testing device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the above-described methods when executing the computer program.

[0043] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, any of the methods described above is implemented.

[0044] In a fifth aspect, an embodiment of the present application provides a computer program product, which, when executed on a terminal device, enables a semiconductor testing device to execute any of the methods described above.

[0045] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0046] The semiconductor test data processing method provided in the embodiment of the present application is obtained by acquiring the test data of the chip, wherein the test data is sampled based on the selected sampling channel; the compensation parameters corresponding to the test data are determined based on the storage address of the test data; the test data is compensated based on the compensation parameters to obtain the target data; the correspondence between each target data and each channel is established based on the channel mask value in the compensation parameters; the target data corresponding to each channel is output based on the correspondence, the test data can be compensated, thereby improving the accuracy, and the correspondence between the target data and each channel can be established for display, so that the displayed waveform is more intuitive.

[0047] It can be understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0049] Figure 1 A schematic diagram of the structure of a semiconductor test data processing system provided in an embodiment of the present application;

[0050] Figure 2 A schematic diagram of a process flow of a semiconductor test data processing method provided for the implementation of the present application;

[0051] Figure 3 A schematic diagram of a display interface for outputting target data corresponding to each channel provided in an embodiment of the present application;

[0052] Figure 4 A schematic diagram of the structure of a semiconductor test data processing device provided in an embodiment of the present application;

[0053] Figure 5 A schematic diagram of the structure of a semiconductor testing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0055] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0056] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0057] As used in the specification of this application and the appended claims, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting" depending on the context. Similarly, the phrases "if it is determined" or "if it is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce detected" or "in response to detecting" depending on the context.

[0058] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0059] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. appearing in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways.

[0060] Based on the technical problems of the related art, the embodiment of the present application provides a method for processing semiconductor test data that can be applied to semiconductor test equipment such as mobile phones, tablet computers, wearable devices, vehicle-mounted devices, augmented reality (AR) / virtual reality (VR) devices, laptops, ultra-mobile personal computers (UMPC), netbooks, personal digital assistants (PDA), etc. The embodiment of the present application does not impose any restrictions on the specific type of semiconductor test equipment. The semiconductor test equipment can be an electronic control unit ECU, and the ECU stores software for the method for processing semiconductor test data. The function implemented by the method for processing semiconductor test data provided in the embodiment of the present application can be implemented by calling program code by the processor of the semiconductor test equipment, wherein the program code can be stored in a computer storage medium.

[0061] Figure 1 A schematic diagram of a semiconductor test data processing system provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the semiconductor test data processing system includes: an ECU and a test machine, and the test machine may include: a microcontroller unit (MCU), a field programmable gate array (FPGA), a double data rate memory (DDR) and an analog-to-digital converter (ADC).

[0062] In the embodiment of the present application, ECU: runs the host computer software, is responsible for issuing instructions to MCU, and reading data in DDR. ECU is also responsible for parsing the data read from DDR, and generating waveform display according to the parsing results. MCU: is responsible for communicating with ECU, receiving control instructions, and transmitting system status and data back to ECU. In addition, MCU is also responsible for communicating with FPGA and coordinating data acquisition and processing tasks of FPGA. FPGA: is responsible for controlling the sampling process of ADC, collecting digital data converted by ADC, and moving these data to DDR for storage. FPGA exchanges data with ADC and DDR through a high-speed data bus to ensure the real-time and accuracy of data. DDR: is responsible for storing data received from FPGA. DDR has high bandwidth and low latency characteristics, can quickly store and read large amounts of data, and meets the system's requirements for data storage and access speed. ADC: is responsible for converting analog signals into digital signals, and supports 4-way simultaneous acquisition. ADC ensures accurate digitization of analog signals through high-precision sampling and conversion, and provides high-quality digital data for subsequent data processing and analysis.

[0063] Based on the aforementioned semiconductor test data processing system, the present application embodiment provides a semiconductor test data processing method. Figure 2 A schematic diagram of the implementation flow of a method for processing semiconductor test data provided for the implementation of this application is as follows: Figure 2 As shown, the method for processing semiconductor test data includes:

[0064] Step S101, acquiring chip test data, wherein the test data is obtained by sampling based on a selected sampling channel.

[0065] In the embodiment of the present application, the test data may be data related to electrical characteristics or performance, and the test data may include: current data and / or voltage data. In the embodiment of the present application, there are multiple sampling channels in the test machine, each sampling channel can be connected to the pins of the chip, and after applying voltage and current to the chip, the test data of the chip can be sampled by the test machine. The user can select the sampling channel through the semiconductor test equipment, so that the test machine samples the corresponding channel to obtain the test data.

[0066] In an embodiment of the present application, after the test machine obtains the test data, the test data of the chip obtained by the test machine can be stored in a DDR memory. The test data can be the original data of analog-to-digital conversion, and the semiconductor testing equipment can obtain the test data of the chip from the DDR memory.

[0067] In the embodiment of the present application, the data in the DDR memory can be stored in a 64-bit storage unit, each unit contains information of four channels, each channel occupies 16 bits, and the test data sampled multiple times can be arranged and stored in the DDR in sequence. Table 1 is a schematic table of DDR storage test data provided in the embodiment of the present application, as shown in Table 1,

[0068] Table 1 is a schematic table of DDR storage test data provided by an embodiment of the present application

[0069]

[0070] In the embodiment of the present application, the data of the 0th channel is stored in bit0 to bit15, the data of the 1st channel is stored in bit16 to bit31, the data of the 2nd channel is stored in bit32 to bit47, and the data of the 3rd channel is stored in bit48 to bit63, and the data range of each channel is from -32768 to 32767.

[0071] Step S102: determining compensation parameters corresponding to the test data based on the storage address of the test data.

[0072] In the embodiment of the present application, the compensation parameters are used to correct the test data to eliminate the influence of environmental factors or equipment errors.

[0073] In the embodiment of the present application, a compensation parameter table can be established in advance, and the compensation parameters corresponding to the storage addresses in the compensation parameter table can be determined in the equipment design stage and exist in the semiconductor test equipment. The compensation parameter table can include: compensation parameters under different channels, characteristics and conditions. After obtaining the storage address of the test data, the address can be used to search in the compensation parameter table to determine the compensation parameters corresponding to the test data.

[0074] In some embodiments, the compensation parameters may also be stored in the DDR of the tester, and the semiconductor test equipment may be connected to the tester for communication and obtain the compensation parameters from the DDR of the tester.

[0075] In the embodiment of the present application, the compensation parameters may include: gain value, offset value, value corresponding to each microvolt of AD conversion, resistance value, first adjustment coefficient, second adjustment coefficient, third adjustment coefficient, mask value of voltage channel, mask value of current channel. The first adjustment coefficient can be represented by coefficient a, the second adjustment coefficient can be represented by coefficient b, and the third adjustment coefficient can be represented by coefficient c. The first adjustment coefficient, the second adjustment coefficient, and the third adjustment coefficient can be obtained by querying the compensation manual of the chip.

[0076] In the embodiment of the present application, the compensation parameters may be stored in a preset data structure table. For example, Table 2 is a schematic table of compensation parameters provided in the embodiment of the present application. As shown in Table 2,

[0077] Table 2 is a schematic table of compensation parameters provided in the embodiment of the present application.

[0078] Parameter name Data Types describe gain float[4] Gain value offset float[4] Offset value ADperu float The value corresponding to each microvolt of AD conversion R float[4] Resistance Value a float[4] Coefficient a b float[4] Coefficient b c float[4] Coefficient c MaskCh_V uint32_t[3] Mask value for voltage channel MaskCh_I uint32_t[3] Mask value for the current channel

[0079] Step S103: compensating the test data based on the compensation parameters to obtain target data.

[0080] In the embodiment of the present application, a preset formula can be used to supplement the test data to obtain target data. The compensated target data may include: compensated voltage and compensated current.

[0081] In some embodiments, the compensation parameters include: a value corresponding to each microvolt of the analog-to-digital AD conversion, a first adjustment coefficient, a second adjustment coefficient, a gain coefficient, and an offset value. Step S103 can be implemented by the following steps:

[0082] Step S1031, multiplying the voltage by the value corresponding to each microvolt of the AD conversion to obtain a measurement output value.

[0083] In the embodiment of the present application, the value corresponding to each microvolt of the AD conversion can be represented by ADperuV, the voltage can be represented by SourceAD, and the measured output value can be represented by Measout_uV. Then, the voltage is multiplied by the value corresponding to each microvolt of the AD conversion, and the measured output value can be represented by the following calculation formula:

[0084] Measout_uV=ADperuV×SourceAD.

[0085] Step S1032: multiply the measured output value by the first adjustment coefficient, and add the second adjustment coefficient to obtain a device voltage output value.

[0086] In the embodiment of the present application, the first adjustment coefficient can be represented by a[chNum], the second adjustment coefficient can be represented by b[chNum], and the device voltage output value can be represented by Dut_uV. Then, the measured output value is multiplied by the first adjustment coefficient, and the second adjustment coefficient is added to obtain the device voltage output value which can be represented by the following formula:

[0087] Dut_nV=Measout_uV×a[chNum]+b[chNum].

[0088] Step S1033: multiply the device voltage output value by the gain coefficient, and add the offset value to obtain a compensated voltage.

[0089] In the embodiment of the present application, the gain coefficient can be represented by gain[chNum], the offset value can be represented by offset[chNum], and the compensated voltage is represented by CompValue. Then, the device voltage output value is multiplied by the gain coefficient, and the compensated voltage obtained by adding the offset value can be represented by the following formula:

[0090] CompValue=Dut_uV×gain[chNum]+offset[chNum].

[0091] In some embodiments, the compensation parameter further includes: resistance value and a third adjustment coefficient, the test data further includes: current, and step S103 may further include:

[0092] Step S1034: subtract the first adjustment coefficient from the measured output value to obtain a first intermediate value, and multiply the first intermediate value by the second adjustment coefficient to obtain a second intermediate value.

[0093] In the embodiment of the present application, the first intermediate value can be expressed as: Measout_uV-a[chNum]. The second intermediate value can be expressed as: (Measout_uV-a[chNum])×b[chNum.

[0094] Step S1035: Divide the second intermediate value by the product of the resistance value and the third adjustment coefficient to obtain the device current output value.

[0095] In the embodiment of the present application, the device current output value can be represented by Dut_uA, the third adjustment coefficient can be represented by c[chNum], and the resistance value can be represented by R[chNum]. Then, the second intermediate value is divided by the product of the resistance value and the third adjustment coefficient, and the device current output value can be represented by the following formula:

[0096]

[0097] Step S1036, multiplying the device current output value by the gain coefficient, and adding the offset value to obtain a compensated current.

[0098] In the embodiment of the present application, the compensated current can be represented by CompValue, and the device current output value is multiplied by the gain coefficient, and then the offset value is added, and the compensated current can be represented by the following formula:

[0099] CompValue=Dut_uA×gain[chNum]+offset[chNum].

[0100] Step S104: establishing a correspondence between each target data and each channel based on the channel mask value in the compensation parameter.

[0101] In the embodiment of the present application, there is a corresponding relationship between the channel mask value and the channel, and the channel mask value includes: the mask value of the current channel and the mask value of the voltage channel.

[0102] In the embodiment of the present application, step S104 can be implemented by the following steps:

[0103] Step S1041, traverse the mask values ​​of the voltage channel to find an enabled flag.

[0104] In the embodiment of the present application, the enabled flag can be represented by 1, and the disabled flag can be represented by 0.

[0105] Exemplarily, there are 32 channels, the mask value of the channel may be a 32-bit mask, the mask value of the voltage channel may be represented by MaskCh_V, and each mask value represents the enable state of the 32 channels, where 1 represents that the channel is enabled, and 0 represents that the channel is disabled.

[0106] In the embodiment of the present application, the semiconductor test equipment can parse the mask value of the voltage channel, obtain a specific value after parsing, and find the enabled flag by traversing the mask value of the voltage channel. Exemplarily, find the bit marked as 1 in the mask value of the voltage channel.

[0107] Step S1042: When the number of enabled flags is less than the number of channels, traverse the mask values ​​of the current channels to find enabled flags.

[0108] In the embodiment of the present application, the number of enabled identifiers and the number of channels may be compared. If the number of enabled identifiers is less than the number of channels, the mask values ​​of the current channels are traversed to find the enabled identifiers.

[0109] The mask value of the current channel can be represented by MaskCh_I. Each mask value represents the enable status of 32 channels. 1 represents that the channel is enabled, and 0 represents that the channel is disabled.

[0110] In the embodiment of the present application, if the number of enabled identifiers is the same as the number of channels, the corresponding channels are determined directly based on the bits of the enabled identifiers in the mask.

[0111] Step S1043: When the total number of enabled flags is equal to the number of channels, the corresponding channels are determined based on the bits of the enabled flags in each mask value.

[0112] Step S4044, establishing a corresponding relationship between each target data and the corresponding channel.

[0113] In the embodiment of the present application, each channel number can be mapped to the corresponding target data in sequence, thereby establishing a corresponding relationship between each target data and the corresponding channel.

[0114] In the embodiment of the present application, since there is a corresponding relationship between the channel and the pin, the target data can be bound to the actual pin number.

[0115] For example, assuming that the value of MaskCh_V is 000000000000000000000000000101010, and the value of MaskCh_I is 00000001000000000000000000000000000, then the first three bits that are 1 can be found in MaskCh_V to be the 1st, 3rd and 5th bits, respectively. Since the number of enabled flags is less than the number of channels, the first bit that is 1 is found in MaskCh_I to be the 24th bit. Therefore, ADC channels 0-3 will be mapped to actual pin channels 1, 3, 5 and 24, respectively, and then the target data can be mapped to channels 1, 3, 5 and 24.

[0116] The method provided in the embodiment of the present application establishes a correspondence between each target data and the corresponding channel, and displays the waveform through the correspondence, so that the displayed waveform is more intuitive.

[0117] Step S105: outputting target data corresponding to each channel based on the corresponding relationship.

[0118] In the embodiment of the present application, the target data corresponding to each channel can be output in a visual manner. When the visual display is performed, each channel corresponds to the target data. Figure 3 A schematic diagram of a display interface for outputting target data corresponding to each channel provided in an embodiment of the present application, such as Figure 3 As shown, channel 0 corresponds to one target data, and channel 1, channel 2, and channel 3 each correspond to one target data. The target data here is waveform data.

[0119] In the embodiment of the present application, outputting the target data corresponding to each channel in a visual manner can be achieved by the following steps:

[0120] First, the graphical interface can be initialized.

[0121] In the embodiment of the present application, a custom QCustomPlot control can be created in the application development framework QT and initialized. In the constructor, set the background color, interaction mode (such as drag and zoom), and clear the original layout. Then, create a new layout grid (QCPLayoutGrid) and add it to the layout of QCustomPlot. In addition, mouse events (such as click, double-click and move) can also be linked for subsequent processing. After initializing the image interface, the coordinate axis can be initialized.

[0122] Then, create the corresponding number of QCPAxisRect objects based on the number of coordinate axes passed in.

[0123] In the embodiment of the present application, each QCPAxisRect represents an independent axis area, for which you can set minimum and maximum sizes, automatic margins and margins, labels and other properties. At the same time, ensure that the horizontal range of each axis area can be scaled and dragged. Finally, these axis areas are added to the layout grid, and a QCPGraph object is created for each area for drawing data.

[0124] Finally, the waveform data can be set.

[0125] When setting the waveform data, you can add the incoming data (key and value) to the specified QCPGraph object. The range of the X axis is set by default, and the range of the Y axis is automatically adjusted to fit the data. Finally, call the replot method to refresh the graph.

[0126] The above method can realize visual display of the target data corresponding to each channel.

[0127] The semiconductor test data processing method provided in the embodiment of the present application is obtained by acquiring the test data of the chip, wherein the test data is sampled based on the selected sampling channel; the compensation parameters corresponding to the test data are determined based on the storage address of the test data; the test data is compensated based on the compensation parameters to obtain the target data; the correspondence between each target data and each channel is established based on the channel mask value in the compensation parameters; the target data corresponding to each channel is output based on the correspondence, the test data can be compensated, thereby improving the accuracy, and the correspondence between the target data and each channel can be established for display, so that the displayed waveform is more intuitive.

[0128] In some embodiments, the method further comprises:

[0129] Step S106: when the cursor function is enabled, in response to a first operation of the user, display a first cursor.

[0130] In the embodiment of the present application, in the user interface, the cursor function can be enabled by setting a flag. The user can click or touch the screen, and the event listener of the semiconductor test equipment captures this action, and then the cursor function is enabled.

[0131] In an embodiment of the present application, two XItemTracer objects can be created as cursors, and their colors, styles, and sizes can be set. The two cursors may include: a first cursor and a second cursor. The user may trigger a first operation by clicking to display the first cursor. The first cursor may be any cursor. When the first cursor is displayed, the second cursor is hidden.

[0132] Step S107 , in response to the movement operation of the first cursor, updating the position of the first cursor and determining the data corresponding to the first cursor.

[0133] In the embodiment of the present application, the user can move the first cursor through operation, and at this time, the semiconductor testing device can determine the position of the first cursor and determine the data corresponding to the position of the first cursor. The data here may include: a key and a value.

[0134] In the embodiment of the present application, the user's movement operation on the first cursor can be captured through an event listener.

[0135] Step S108: Displaying a second cursor in response to the cursor switching event.

[0136] In the embodiment of the present application, after determining the data corresponding to the first cursor, the user can switch the cursor through operations, so that the second cursor can be displayed.

[0137] In the embodiment of the present application, the semiconductor test device can realize cursor switching through a specific event, such as clicking a switch button or the number of clicks. Taking the number of clicks as an example, the cursor can be switched according to the number of clicks. For example, when the user double-clicks for the first time, the first cursor is displayed and the second cursor is hidden. When the user double-clicks for the second time, the second cursor is displayed and the first cursor is hidden.

[0138] Step S109: in response to the movement event of the second cursor, updating the position of the second cursor and determining the data corresponding to the second cursor.

[0139] In the embodiment of the present application, the user can move the second cursor through operation, and at this time, the semiconductor testing device can determine the position of the second cursor and determine the data corresponding to the position of the second cursor. The data here may include: a key and a value.

[0140] Step S110, determining a difference between data corresponding to the first cursor and data corresponding to the second cursor, and outputting the difference.

[0141] In the embodiment of the present application, the difference between two data can be calculated and then output to the user.

[0142] The method provided in the embodiment of the present application can realize an interactive and friendly cursor function, so that users can intuitively select and compare data.

[0143] In some embodiments, step S105 may be implemented by the following steps:

[0144] Step S1051, synchronizing the sampling point time of each channel.

[0145] In the embodiment of the present application, the minimum time and the maximum time of the sampling points in all channels can be found to determine the time range. After finding the time range, the starting time points of all channels can be aligned to the minimum time point, and the missing data can be processed by interpolation (such as linear interpolation) or by smoothing (such as averaging), so as to achieve the synchronization of the sampling points of each channel.

[0146] Step S1052: when the sampling points of each channel are synchronized, output the target data corresponding to each channel based on the corresponding relationship.

[0147] In the embodiment of the present application, by synchronizing the sampling point time of each channel, it can be ensured that the acquired data accurately reflects the status of all channels at the same time, thereby facilitating user comparison.

[0148] In some embodiments, step S101 may be implemented by the following steps:

[0149] Step S1011, obtaining sampling parameters configured by the user.

[0150] In the embodiment of the present application, the user can input sampling parameters through the user interface, so that the semiconductor testing equipment obtains the sampling parameters configured by the user.

[0151] In the embodiment of the present application, the sampling parameters may include: the sampling channel, the sampling time interval, the total number of sampling times, etc.

[0152] Step S1012: applying a test voltage and a test current to the chip based on the sampling parameters, and controlling a test machine to sample test data of the chip based on the sampling parameters.

[0153] In the embodiment of the present application, after the sampling parameters are determined, the sampling process can be started by calling a trigger instruction to enable the test machine, and the test machine can execute the corresponding instructions to apply a test voltage and a test current to the chip.

[0154] The instructions sent by the semiconductor test equipment may include: parameter configuration, trigger sampling, enable / disable, wait for acquisition to be completed, obtain acquisition data, etc. One or more of the following, Table 3 is a description table of an instruction provided in an embodiment of the present application, as shown in Table 3,

[0155] Table 3 is a description table of an instruction provided in an embodiment of the present application

[0156] interface describe SetScopeWaveformParams Parameter configuration ScopeWaveformTrigger Trigger sampling SetScpoeWaveformEnable Enable / disable WaitScopeWavefromFinished Waiting for collection to complete GetScopeWavefromData Get collected data

[0157] Step S1013, when sampling is completed, obtaining test data of the chip.

[0158] In the embodiment of the present application, when all sampling parameters are configured and the instructions are executed, the test machine sampling is completed. At this time, the semiconductor test equipment can send an instruction to obtain the collected data, thereby obtaining the test data of the chip from the test machine.

[0159] The method provided in the embodiment of the present application obtains sampling parameters configured by the user; applies test voltage and test current to the chip based on the sampling parameters, and controls the test machine to sample the test data of the chip based on the sampling parameters; when the sampling is completed, obtains the test data of the chip, and processes based on the test data, which can support multi-channel voltage and current acquisition, and facilitate debugging and data analysis.

[0160] In some embodiments, the user can use a mouse to zoom in, zoom out, and horizontally drag the graphical interface.

[0161] In some embodiments, the semiconductor testing equipment can communicate with the testing machine in real time, thereby achieving real-time updating and display of data. The semiconductor testing equipment can also be in an offline module, so that existing data can be analyzed.

[0162] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0163] According to the aforementioned embodiments, the embodiments of the present application provide a semiconductor test data processing device, wherein the modules included in the device and the units included in the modules can be implemented by a processor in a computer device; of course, they can also be implemented by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU, Central Processing Unit), a microprocessor (MPU, Microprocessor Unit), a digital signal processor (DSP, Digital Signal Processing) or a field programmable gate array (FPGA, Field Programmable Gate Array), etc.

[0164] The present application provides a semiconductor test data processing device. Figure 4 A schematic diagram of a semiconductor test data processing device provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the semiconductor test data processing device 400 includes:

[0165] An acquisition module 401 is used to acquire test data of a chip, wherein the test data is obtained by sampling based on a selected sampling channel;

[0166] A determination module 402, configured to determine a compensation parameter corresponding to the test data based on a storage address of the test data;

[0167] A compensation module 403, compensating the test data based on the compensation parameters to obtain target data;

[0168] An establishing module 404, configured to establish a corresponding relationship between each target data and each channel based on the channel mask value in the compensation parameter;

[0169] The output module 405 is used to output the target data corresponding to each channel based on the corresponding relationship.

[0170] In some embodiments, the compensation parameters include: a value corresponding to each microvolt of the analog-to-digital AD conversion, a first adjustment coefficient, a second adjustment coefficient, a gain coefficient and an offset value, and the test data includes: voltage, a compensation module, including:

[0171] A first calculation unit, used for multiplying the voltage by a value corresponding to each microvolt of the AD conversion to obtain a measurement output value;

[0172] a second calculation unit, configured to multiply the measured output value by the first adjustment coefficient, and add the second adjustment coefficient to obtain a device voltage output value;

[0173] The third calculation unit is used to multiply the device voltage output value by the gain coefficient and add the offset value to obtain a compensated voltage.

[0174] In some embodiments, the compensation parameter further includes: a resistance value and a third adjustment coefficient, the test data further includes: a current, and the compensation module further includes:

[0175] a fourth calculation unit, configured to subtract the first adjustment coefficient from the measured output value to obtain a first intermediate value, and multiply the first intermediate value by the second adjustment coefficient to obtain a second intermediate value;

[0176] a fifth calculation unit, configured to divide the second intermediate value by the product of the resistance value and the third adjustment coefficient to obtain a device current output value;

[0177] The sixth calculation unit is used to multiply the device current output value by the gain coefficient and add the offset value to obtain a compensated current.

[0178] In some embodiments, the channel mask value includes: a mask value of a current channel and a mask value of a voltage channel, and the establishment module includes:

[0179] A first traversal unit, used for traversing the mask value of the voltage channel to find an enabled flag;

[0180] A second traversal unit, configured to traverse the mask values ​​of the current channels to find out the enabled flags when the number of the enabled flags is less than the number of the channels;

[0181] A determination unit, configured to determine corresponding channels based on the bits of the enabled identifiers in each mask value when the total number of enabled identifiers is equal to the number of channels;

[0182] The establishing unit is used to establish the corresponding relationship between each target data and the corresponding channel.

[0183] In some embodiments, the semiconductor test data processing apparatus further includes:

[0184] A first cursor display module, configured to display a first cursor in response to a first operation of a user when the cursor function is enabled;

[0185] A first data determination module, configured to update the position of the first cursor and determine data corresponding to the first cursor in response to a movement operation of the first cursor;

[0186] A second cursor display module, used for displaying a second cursor in response to a cursor switching event;

[0187] A second data determination module, configured to update the position of the second cursor and determine data corresponding to the second cursor in response to a movement event of the second cursor;

[0188] The calculation module is used to determine the difference between the data corresponding to the first cursor and the data corresponding to the second cursor, and output the difference.

[0189] In some embodiments, when there are multiple channels, the output module includes:

[0190] A synchronization module is used to synchronize the sampling point moment of each channel;

[0191] The output unit is used to output the target data corresponding to each channel based on the corresponding relationship when the sampling point of each channel is synchronized.

[0192] In some embodiments, the acquisition module includes:

[0193] A first acquisition unit, used to acquire sampling parameters configured by a user;

[0194] A testing unit, used for applying a test voltage and a test current to the chip based on the sampling parameters, and controlling a testing machine to sample test data of the chip based on the sampling parameters;

[0195] The second acquisition unit is used to acquire the test data of the chip when the sampling is completed.

[0196] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0197] in addition, Figure 4 The semiconductor test data processing device shown may be a software unit, a hardware unit, or a unit combining software and hardware, or may be integrated into the semiconductor test equipment as an independent accessory, or may exist as an independent terminal device.

[0198] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0199] Figure 5 This is a schematic diagram of the structure of a semiconductor testing device provided in an embodiment of the present application. Figure 5 As shown, the semiconductor testing device 3 of this embodiment may include: at least one processor 30 ( Figure 5 Only one processor 30 is shown in the figure), a memory 31, and a computer program 32 stored in the memory 31 and executable on at least one processor 30. When the processor 30 executes the computer program 32, the steps in any of the above-mentioned method embodiments are implemented, for example Figure 2 Steps S101 to S105 in the illustrated embodiment. Alternatively, when the processor 30 executes the computer program 32, the functions of each module / unit in the above-mentioned device embodiments are implemented, for example Figure 4 Functions of modules 401 to 405 are shown.

[0200] Exemplarily, the computer program 32 may be divided into one or more modules / units, one or more modules / units are stored in the memory 31, and are executed by the processor 30 to complete the present application. One or more modules / units may be a series of computer program 32 instruction segments capable of completing specific functions, and the instruction segments are used to describe the execution process of the computer program 32 in the semiconductor test equipment 3.

[0201] The embodiment of the present application further provides a computer-readable storage medium, which stores a computer program 32. When the computer program 32 is executed by the processor 30, the steps in the above-mentioned method embodiments can be implemented.

[0202] An embodiment of the present application provides a computer program product. When the computer program product is run on a semiconductor testing device, the steps in the above-mentioned method embodiments can be implemented when the vehicle executes the computer program product.

[0203] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. According to this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program 32, and the computer program 32 can be stored in a computer-readable storage medium, and the computer program 32 can implement the steps of the above-mentioned various method embodiments when executed by the processor 30. Among them, the computer program 32 includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may at least include: any entity or device capable of carrying the computer program code to the terminal, a recording medium, a computer memory, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), an electric carrier signal, a telecommunication signal, and a software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0204] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0205] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0206] In the embodiments provided in the present application, it should be understood that the disclosed devices / network equipment and methods can be implemented in other ways. For example, the device / network equipment embodiments described above are merely schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0207] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0208] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for processing semiconductor test data, characterized in that: The method comprises: Acquire test data of the chip, wherein the test data is obtained by sampling based on the selected sampling channel; Determining a compensation parameter corresponding to the test data based on a storage address of the test data; Compensating the test data based on the compensation parameters to obtain target data; Establishing a correspondence between each target data and each channel based on the channel mask value in the compensation parameter; The target data corresponding to each channel is output based on the corresponding relationship.

2. The method according to claim 1, characterized in that The compensation parameters include: a value corresponding to each microvolt of the analog-to-digital AD conversion, a first adjustment coefficient, a second adjustment coefficient, a gain coefficient and an offset value, the test data includes: voltage, and compensating the test data based on the compensation parameters to obtain target data includes: Multiplying the voltage by the value corresponding to each microvolt of the AD conversion to obtain a measurement output value; Multiplying the measured output value by the first adjustment coefficient and adding the second adjustment coefficient to obtain a device voltage output value; The device voltage output value is multiplied by the gain coefficient and then added to the offset value to obtain a compensated voltage.

3. The method according to claim 2, characterized in that The compensation parameters further include: a resistance value and a third adjustment coefficient, the test data further includes: a current, and compensating the test data based on the compensation parameters to obtain target data includes: Subtracting the first adjustment coefficient from the measured output value to obtain a first intermediate value, and multiplying the first intermediate value by the second adjustment coefficient to obtain a second intermediate value; Dividing the second intermediate value by the product of the resistance value and the third adjustment coefficient to obtain a device current output value; The device current output value is multiplied by the gain coefficient and then added with the offset value to obtain the compensated current.

4. The method according to claim 3, characterized in that The channel mask value includes: a mask value of a current channel and a mask value of a voltage channel, and the corresponding relationship between each target data and each channel is established based on the channel mask value in the compensation parameter, including: Traversing the mask values ​​of the voltage channel to find an enabled flag; When the number of enabled identifiers is less than the number of channels, traverse the mask values ​​of the current channels to find enabled identifiers; When the total number of enabled flags is equal to the number of channels, the corresponding channels are determined based on the bits of the enabled flags in each mask value; Establish the corresponding relationship between each target data and the corresponding channel.

5. The method according to claim 1, characterized in that The method further comprises: When the cursor function is enabled, in response to a first operation by the user, displaying a first cursor; In response to the movement operation of the first cursor, updating the position of the first cursor and determining the data corresponding to the first cursor; In response to a cursor switching event, displaying a second cursor; In response to a movement event of the second cursor, updating a position of the second cursor and determining data corresponding to the second cursor; A difference between the data corresponding to the first cursor and the data corresponding to the second cursor is determined, and the difference is output.

6. The method according to claim 1, characterized in that In the case where there are multiple channels, outputting target data corresponding to each channel based on the corresponding relationship includes: Synchronize the sampling point moment of each channel; When the sampling points of each channel are synchronized, the target data corresponding to each channel is output based on the corresponding relationship.

7. The method according to any one of claims 1 to 6, characterized in that: The step of obtaining chip test data includes: Get the sampling parameters configured by the user; Applying a test voltage and a test current to the chip based on the sampling parameters, and controlling a test machine to sample test data of the chip based on the sampling parameters; When the sampling is completed, the test data of the chip is obtained.

8. A semiconductor test data processing device, characterized in that: include: An acquisition module, used for acquiring test data of the chip, wherein the test data is obtained by sampling based on a selected sampling channel; A determination module, configured to determine a compensation parameter corresponding to the test data based on a storage address of the test data; A compensation module, compensating the test data based on the compensation parameters to obtain target data; An establishing module, used for establishing a corresponding relationship between each target data and each channel based on the channel mask value in the compensation parameter; The output module is used to output the target data corresponding to each channel based on the corresponding relationship.

9. A semiconductor testing device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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