Switched capacitor DC-DC power converter with section switch

Abstract

The present disclosure relates to a switched capacitor DC-DC converter comprising at least one input terminal, at least one output terminal, a plurality of power switches and a plurality of flying capacitors, and a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal by switched capacitor power conversion, where at least one of the plurality of power switches is a segment switch, and a plurality of power switches including at least one internal switching segment disposed on the first semiconductor die and at least one external switching segment disposed on the second semiconductor die, and a plurality of gate drivers configured to drive the plurality of power switches. A programmable switch array for a switched capacitor DC-DC converter and a method for performing switched capacitor DC-DC conversion are also disclosed.

Description

Technical Field

[0001] The present disclosure relates to a high voltage switched capacitor converter including segmented switches. The present disclosure also relates to a programmable switch array for a switched capacitor DC-DC converter and a method for performing switched capacitor DC-DC conversion. Background Art

[0002] Segmenting the power stage of a switched capacitor DC-DC converter by using several transistors is sometimes used for voltage regulation and to reduce peak current in relatively simple charge pump integrated circuits. The cost of segmenting the power stage in a low voltage switched capacitor DC-DC converter or more generally in a charge pump is relatively low because the power stage driver design is relatively simple. Since the gate driver that constitutes the power stage driver is not floating relative to the source potential of the transistors that constitute the switches of the power stage, there is little or no added cost to segment the transistors of the power stage into smaller sub-segments. However, in switched capacitor DC-DC converters used in high voltage, high power applications, discrete components (such as separately packaged transistors, level shifters, and / or gate drivers) are used to implement the power stage. The cost of segmenting the power stage is then higher because each sub-segment requires a separately packaged level shifter and gate driver.

[0003] In addition, starting a high voltage, high power switched capacitor DC-DC converter causes a large transient current, which can reduce the reliability and life of the switched capacitor DC-DC converter, or even be destructive in some cases. Existing solutions to this problem include various types of separate pre-charge circuits or additional transistors connected in series with the power stage. The addition of series transistors for limiting large transient currents or inrush currents results in lower performance of the switched capacitor DC-DC converter when it exits from the startup mode. It is worth noting that input surge current or inrush current is a term inherited from an inductor-based boost converter, and it is mainly applicable to simple charge pumps based on a single flying capacitor, because the single problematic current loop used to start such a converter is connected in series with the input or output terminals.

[0004] It would be beneficial to be able to provide an efficient switched capacitor DC-DC solution that can be used for loads that require higher power. Therefore, it is desirable to provide a switched capacitor DC-DC converter that has an efficient way to start the power stage when high output power is required, and in which high electron mobility transistors (HEMTs) can be implemented as switches to sustain high power applications without increasing implementation cost and complexity. Summary of the invention

[0005] The present disclosure relates to a switched capacitor DC-DC converter, comprising at least one input terminal, at least one output terminal, a plurality of power switches and a plurality of flying capacitors, wherein the plurality of flying capacitors are configured to convert a DC input voltage from the at least one input terminal into a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch, comprising at least one internal switch segment disposed on a first semiconductor die of a first semiconductor manufacturing technology and at least one external switch segment disposed on a second semiconductor die of a second semiconductor manufacturing technology different from the first semiconductor manufacturing technology, and a plurality of gate drivers configured to drive the plurality of power switches.

[0006] Gallium nitride (GaN) transistors are very energy-efficient switches. Unfortunately, their monolithic implementation with low-power digital blocks (such as clock generators and serial communication interfaces, which are mainly designed with silicon (Si) transistors) is relatively complex. There are solutions to implement both technologies on the same die, but these are quite complex, inefficient or expensive. By having at least one of the multiple power switches disposed on a first semiconductor die and at least one external switch segment disposed on a second semiconductor die, while having multiple gate drivers configured to drive the multiple power switches, a power-efficient switched capacitor DC-DC converter implementation is achieved. The ability to drive at least one external switch segment with multiple gate drivers allows the switched capacitor DC-DC converter to include power transistors optimized for high channel conductance, such as high electron mobility transistors or GaN transistors, used as power switches without having to implement them in silicon on the first semiconductor die.

[0007] At least one of the plurality of power switches is a segmented switch. This provides a solution for limiting inrush current during startup of a switched capacitor DC-DC converter. This is particularly a problem in switched capacitor DC-DC converters that may deliver high current at at least one output terminal because the low channel resistance of the plurality of power switches creates a low resistance path and therefore a high peak current when the plurality of flying capacitors are initially charged during startup.

[0008] The present disclosure also relates to a programmable switch array for a switched capacitor DC-DC converter, comprising at least one input terminal, at least one output terminal, a plurality of power switches, and a plurality of flying capacitor terminals connectable to a plurality of flying capacitors, wherein the plurality of flying capacitors are configured to convert a DC input voltage from the at least one input terminal into a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch, comprising at least one internal switch segment disposed on a first semiconductor die of a first semiconductor manufacturing technology, and at least one switch segment terminal connectable to at least one external switch segment disposed on a second semiconductor die of a second semiconductor manufacturing technology different from the first semiconductor manufacturing technology, and a plurality of gate drivers configured to drive the plurality of power switches.

[0009] A method for performing switched capacitor DC-DC conversion is also disclosed, the method comprising the following steps: providing a switched capacitor DC-DC converter, the switched capacitor DC-DC converter comprising at least one input terminal, at least one output terminal, a plurality of power switches and a plurality of flying capacitors, the plurality of flying capacitors being configured to convert a DC input voltage from the at least one input terminal into a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch, comprising at least one internal switch segment disposed on a first semiconductor die of a first semiconductor manufacturing technology and at least one external switch segment disposed on a second semiconductor die of a second semiconductor manufacturing technology different from the first semiconductor manufacturing technology, configured to drive a plurality of gate drivers of the plurality of power switches; and performing switched capacitor DC-DC conversion by switching the plurality of power switches using the at least one internal switch segment and the at least one external switch segment so as to convert the DC input voltage into a DC output voltage.

[0010] As will be appreciated by those skilled in the art, the presently disclosed method for performing switched capacitor DC-DC conversion may be performed using any embodiment of the presently disclosed switched capacitor DC-DC converter or programmable switch array for a switched capacitor DC-DC converter, and vice versa. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Embodiments and examples will be described in more detail below with reference to the accompanying drawings. The drawings are examples of embodiments and are not limiting of the presently disclosed switched capacitor DC-DC converter and method for performing switched capacitor DC-DC conversion.

[0012] Figure 1 shows a schematic diagram of an embodiment of a switched capacitor DC-DC converter,

[0013] Figure 2 shows a schematic diagram of an embodiment of a switched capacitor DC-DC converter comprising at least one external switching segment,

[0014] Figure 3A -D shows an embodiment of some possible implementations of multiple flying capacitors and multiple power switches for performing switched capacitor DC-DC conversion,

[0015] Figure 4 A schematic diagram showing an embodiment of one of a plurality of power switches,

[0016] Figure 5 A schematic diagram showing an embodiment of one of a plurality of gate drivers,

[0017] Figure 6 A schematic diagram showing an embodiment of a programmable switch array for a switched capacitor DC-DC converter,

[0018] Figure 7 A flow chart of the presently disclosed method of performing switched capacitor DC-DC conversion is shown. DETAILED DESCRIPTION

[0019] The present disclosure relates to a DC-DC converter including a plurality of power switches and a plurality of flying capacitors configured to convert a DC input voltage into a DC output voltage through power conversion, wherein at least one of the plurality of power switches is a segmented switch.

[0020] Figure 1 A schematic diagram of an embodiment of a switched capacitor DC-DC converter is shown. The switched capacitor DC-DC converter includes at least one input terminal, at least one output terminal, a plurality of power switches, and a plurality of flying capacitors. The at least one input terminal is referred to as VIN, which corresponds to a DC input voltage of the switched capacitor DC-DC converter, and the at least one output terminal is referred to as VOUT, which corresponds to a DC output voltage of the switched capacitor DC-DC converter. The switched capacitor DC-DC converter also includes a plurality of gate drivers, such as GDRV0-GDRV7, which are configured to independently drive a plurality of power switches, such as SW0-SW7. Figure 1In the example of FIG. 1 , the flying capacitors (i.e., C1, C2, C3, C4, and C5) are configured with a plurality of power switches in a Ladder 1 / 4 configuration. This particular configuration gives a voltage ratio of 4 between the DC input voltage and the DC output voltage, and wherein the DC output voltage is lower than the DC input voltage. The power switches are segmented into 3 switch segments, wherein the 3 switch segments are included in the same semiconductor die as the other components included in the switched capacitor DC-DC converter. Each switch segment is directly driven by its associated and unique gate driver. Each of the plurality of gate drivers is driven from Figure 1 The control unit, referred to as a "controller" in the example, receives an independent control signal. The independent control signal may be a clock signal. It is buffered by multiple gate drivers and then possibly reshaped. The independent control signal may be sent to multiple power switches in order to control their switching states. Figure 1 As shown in , a bootstrap circuit is implemented to provide a boosted voltage to the topmost gate driver GDRV7. The bootstrap circuit includes a bootstrap capacitor called CBST and a bootstrap diode DBST. The topmost gate driver GDRV7 may require a positive supply voltage, which cannot be provided by connecting the GDRV7 positive supply terminal to VTOP and connecting the GDRV7 negative supply terminal to the source terminal of SW7, because the voltage from VTOP to the source of SW7 is approximately zero when SW7 is turned on. The bootstrap diode can provide a charging path from VTOP to the CBST boost capacitor when SW7 is turned on (off), and the diode blocks when SW7 is turned off (on). The result of the bootstrap circuit operation is a stable supply voltage of GDRV7 relative to the negative supply terminal of GDRV7 connected to the source terminal of SW7. A decoupling capacitor COUT is connected to at least one output terminal to filter the DC output voltage of the switched capacitor DC-DC converter, and a decoupling capacitor CIN is connected to at least one input terminal to filter the DC input voltage of the switched capacitor DC-DC converter.

[0021] like Figure 1 The switched capacitor DC-DC converter shown in can also be configured for switched capacitor DC-DC boost conversion. In this particular configuration, the DC input voltage is VOUT and the DC output voltage is VIN. This gives a voltage ratio of 4 between the DC input voltage and the DC output voltage, and wherein the DC output voltage is higher than the DC input voltage.

[0022] A flying capacitor may be a capacitor for transferring charge from at least one input terminal to at least one output terminal, directly or indirectly. A flying capacitor may be periodically charged and discharged by means of a plurality of power switches that provide a charging and discharging path defined by a switched capacitor DC-DC converter topology or configuration. A flying capacitor may be defined as "flying" in the sense that the common mode voltage (i.e., the average voltage between the two capacitor terminals) has a square waveform relative to the ground voltage. This is the case of a flying capacitor in a switched capacitor DC-DC converter with a Dickson topology, for example. However, a flying capacitor may also have a stable common mode voltage, such as in a ladder converter, where some of the flying capacitors are used to decouple an intermediate voltage at a nominal voltage level that is an integer fraction of the input voltage. A flying capacitor is different from a decoupling capacitor, which is usually placed close to the converter input and output terminals to reduce the voltage swing at these voltage nodes. Removing the decoupling capacitor will not significantly reduce the ability of the DC-DC converter to convert power, while removing the flying capacitor will essentially make the DC-DC converter unable to convert power.

[0023] Segmentation of the power switches may allow safe startup of a switched capacitor DC-DC converter by potentially limiting the inrush current due to the presence of multiple low impedance loops in the switched capacitor DC-DC converter. Second, segmentation of the power switches may allow a system or user to enable only some of the switch segments, thereby limiting the power consumption of the switched capacitor DC-DC converter by potentially reducing parasitic losses caused by charging and discharging multiple parasitic capacitances. If the output load requires a small current, only a few switch segments may be required because the conduction losses of the several switch segments may be small compared to the parasitic losses. For example, in the case where a switched capacitor DC-DC converter is powering a CPU, if the CPU is in throttling mode, it may not require as much current as when it can be configured in normal mode, where more current may be required. Segmentation of the power switches may reduce the voltage rise and fall times of nodes between multiple power switches during phase changes. to help reduce electromagnetic interference. A switched capacitor DC-DC converter can operate in at least two states, where each state can represent a unique connection of a flying capacitor and a power converter terminal. These states can be configured by a clock signal that drives each of a plurality of power switches. These clock signals can have a 180 degree phase shift and can be non-overlapping with the dead time between each clock signal. When the switched capacitor DC-DC converter transitions from one switching state to the next switching state, large voltage transitions can occur at the internal nodes between the plurality of power switches because the plurality of flying capacitors can interact differently between them in each state. The rise and fall times of these voltage transitions are a function of the parasitic capacitance present in the internal nodes between the plurality of power switches and the conductance of the plurality of power switches. The plurality of flying capacitors may experience only a small voltage ripple, while the internal nodes between the plurality of power switches may experience a large voltage swing. Switching high power transistors, especially HEMTs such as GaN FETs, can result in very rapid charging and discharging of the parasitic capacitance in the plurality of power switches. Through the gate-drain capacitance of the power transistors, the high Electromagnetic interference may be generated and kickback may be generated in one or more of the multiple power switches being turned on (off). Kickback may generate positive gate-source voltage (Vg) spurs, preferably for NMOS devices, which may generate cross conduction if the Vg spurs approach or exceed the device threshold voltage. The kickback problem may preferably be solved by a very complex gate driver system that can provide a negative Vg when the switch is turned on (off) so as to have a large margin to the threshold voltage to accommodate the Vg kickback spurs. The kickback problem may be reduced by turning off (on) the minimum switching segment only during, for example, the first 10ns of the converter state. This ensures that relatively small conductance switching segments are used to charge and / or discharge the parasitic capacitors, and the result can be lower Lower This may allow the use of a relatively simpler gate driver structure that does not provide a negative Vg in the on (off) state. Other switching segments may be delayed, potentially in a time-interleaved manner, after a 10ns delay, for example. This 10ns delay may be a small fraction of the total state duration, which is approximately 500ns in a 1MHz two-state topology such as Dickson 1 / 4.

[0024] Figure 2An example of a schematic diagram of an embodiment of a switched capacitor DC-DC converter is shown, wherein a plurality of power switches are segmented switches, but wherein at least one switch segment is an external switch segment disposed on a second semiconductor die. At least one input terminal is referred to as VIN, which corresponds to a DC input voltage of the switched capacitor DC-DC converter, and at least one output terminal is referred to as VOUT, which corresponds to a DC output voltage of the switched capacitor DC-DC converter. The switched capacitor DC-DC converter also includes a plurality of gate drivers, such as GDRV0-GDRV7, which are configured to independently drive a plurality of power switches, such as SW0-SW7 and SW0E and SW2E. As described above, according to a first embodiment of the presently disclosed switched capacitor DC-DC converter, at least one internal switch segment is disposed on a first semiconductor die, and at least one external switch segment is disposed on a second semiconductor die. As Figure 2 As shown in the example of , two switch segments are external, namely SW0E and SW2E. It is possible to have a minimum of one external switch segment disposed on the second semiconductor die. Figure 1 Each of the two switch segments in is an external switch segment of one of the multiple power switches. For example, SW0E is the external switch segment of SW0. They are connected in parallel through terminals VBOT and HB0M. The external switch segment SW0E is driven by one of the gate drivers GDRV0 through terminal G_EXT0. The same process applies to the other external switch segment SW2E. By having the option of implementing one of the switch segments externally, this gives the possibility to configure this external switch segment with different characteristics than the internal switch segment, so as to be able to achieve more power, possibly less noise and some other advantages inherent to the specific external switch segment technology. As Figure 2As shown in , two inductors (i.e., L1 and L2) are connected to the output terminal VOUT. This enables a hybrid configuration of a switched capacitor DC-DC converter. The hybrid configuration can add some benefits to a switched capacitor DC-DC converter without an inductor. Depending on where at least one inductor is placed, a hybrid switched capacitor converter can be classified as resonant or soft charging. Adding the at least one inductor in series with one or more of a plurality of flying capacitors produces a resonant topology. Adding at least one inductor having an inductor terminal connected to the converter input, output, ground / reference terminal, or intermediate DC bus produces a soft charging converter. In a resonant switched capacitor DC-DC converter, an inductor is added in series with at least one flying capacitor to produce a resonant LC tank circuit with low impedance at a given resonant frequency. The inductor will have zero DC current because it is connected in series with one or more capacitors. The resonant configuration allows the use of smaller capacitors in conjunction with one or more inductors. Depending on the available capacitor and inductor technology for implementing the passive components of the converter, it may be beneficial to use a resonant topology (such as a switched tank converter) in some cases to utilize a combination of inductors and capacitors rather than just capacitors to achieve certain converter performance. In addition, the resonant switched capacitor power converter has approximately sinusoidal current and voltage waveforms, which have lower high-frequency spectral energy compared to the approximately square wave waveform of the switched capacitor power converter without an inductor. This may be beneficial in some applications, however the benefit is a trade-off with the larger radiated magnetic field from the inductor, which is not a problem in the switched capacitor power converter without an inductor. A bootstrap circuit is implemented to provide a boost voltage for the topmost gate driver GDRV7. The bootstrap circuit includes a bootstrap capacitor called CBST and a bootstrap diode DBST. The topmost gate driver GDRV7 may require a positive supply voltage that cannot be provided by connecting the GDRV7 positive supply terminal to VTOP and the GDRV7 negative supply terminal to the source terminal of SW7 because the voltage from VTOP to the source of SW7 is approximately zero when SW7 is turned on. The bootstrap diode can provide a charging path from VTOP to the CBST boost capacitor when SW7 is open (off), and the diode blocks when SW7 is closed (on). The result of the bootstrap circuit operation is a regulated supply voltage of GDRV7 relative to the negative supply terminal of GDRV7 connected to the source terminal of SW7. A decoupling capacitor COUT is connected to at least one output terminal to filter the DC output voltage of the switched capacitor DC-DC converter, and a decoupling capacitor CIN is connected to at least one input terminal to filter the DC input voltage of the switched capacitor DC-DC converter.

[0025] The presently disclosed switched capacitor DC-DC converter can be configured to have a DC input voltage between 12 and 400 V, preferably between 36 and 60 V. It can be configured for step-up and step-down power conversion, where the DC input voltage can be lower or higher than the DC output voltage, with many possible power conversion ratios, depending on the configuration of the power switch and the flying capacitor. The architecture of multiple power switches can allow the system or user to use a wide range of DC input voltages.

[0026] Multiple power switches and multiple flying capacitors can be configured to perform various power conversions, such as Dickson type power conversion, such as Dickson 1 / 4 or Dickson 1 / 6. Other variations of power conversion, such as Ladder 1 / 3, Divider 1 / 2, or Ladder 1 / 5, can also be performed. In addition, Cockroft-Walton, serial-parallel, fractional, exponential, and Pelliconi type power conversions can also be performed. Figure 3A -D shows an embodiment of some possible implementations of multiple flying capacitors and multiple power switches.

[0027] Different switched capacitor DC-DC converter configurations (such as Dickson, ladder, Cockroft-Walton, serial-parallel, fractional, exponential or Pelliconi) have different inherent performance characteristics. The switched capacitor DC-DC converter configuration may have an inherent ideal voltage conversion ratio, which is the ratio between the DC output voltage and the DC input voltage that the converter can approach when no load current is drawn from the switched capacitor DC-DC converter. Typically, several different configurations may be used to achieve a given ideal voltage conversion ratio, such as 1 / 3, 1 / 4, 2 / 5 or 1 / 6. For a given ideal voltage conversion ratio, each configuration may define different ways of connecting multiple power switches and multiple flying capacitors. These components in each configuration may have different charge flow vectors. The charge flow vector may define how much current flows through each of these components. A trade-off may be made between multiple power switches and multiple flying capacitor sizes to optimize efficiency by minimizing power consumption. Some configurations make better use of multiple flying capacitors, such as serial-parallel configurations, and some configurations make better use of multiple power switches, such as Dickson configurations. In addition, each configuration may require a different voltage rating for each of the multiple power switches, which must be considered along with the available devices in the semiconductor process used to implement the multiple power switches. Furthermore, different configurations may have different voltage swings in the internal nodes of the power stage. Depending on the relative parasitic capacitances of the multiple power switches, the multiple flying capacitors, and / or the load current, one configuration may be preferred over another to minimize parasitic capacitance losses.

[0028] Figure 3A A Dickson 1 / 6 configuration is shown, which is a step-down power converter with a ratio between the DC input voltage and the DC output voltage of 6, and where the DC output voltage is lower than the DC input voltage. The configuration includes 10 switches and 5 flying capacitors. Figure 3B A Ladder 1 / 3 configuration is shown, which is a step-down power converter with a ratio of 3 between the DC input voltage and the DC output voltage, and where the DC output voltage is lower than the DC input voltage. The configuration includes 10 switches and 3 flying capacitors. Figure 3C A Divider 1 / 2 configuration is shown, which is a step-down power converter with a ratio of 2 between the DC input voltage and the DC output voltage, and where the DC output voltage is lower than the DC input voltage. The configuration includes 10 switches and one flying capacitor. Figure 3D A dual inductor hybrid converter (DIHC) 1 / 4 configuration is shown, which is a step-down power converter with a variable voltage conversion ratio, with a minimum ratio between the DC input voltage and the DC output voltage of 4, and where the DC output voltage is lower than the DC input voltage. The configuration includes 10 switches, three flying capacitors, and two inductors. These different possible configurations of a switched capacitor DC-DC converter can affect the power conversion ratio between the input voltage and the output voltage. A switched capacitor DC-DC converter (such as Figure 3D A hybrid configuration of a switched capacitor DC-DC converter (shown in ) can have the benefit of offsetting the potential disadvantages of a switched capacitor DC-DC converter based solely on capacitors while improving the performance of a conventional inductor-based DC-DC converter (such as a buck or boost power converter). In fact, conventional inductor-based buck converters require bulky inductors and switches rated for the full input voltage and full output current of the desired application. Low-loss inductors can be difficult to integrate when dealing with high power densities. Compared to an inductor-based buck or boost converter, a switched capacitor DC-DC converter requires only capacitors, which can have significantly higher power density.

[0029] In order to perform power conversion, the switched capacitor DC-DC converter may need to turn on and off multiple power switches within a specific time period, and each power switch may have different times for the open and closed states. In this case, the multiple power switches can be independently controlled by multiple gate drivers. Each gate driver can be configured to control the state of the power switch, such as the open or closed state of the power switch. Each of the internal and / or external switch segments can be controlled individually and / or independently by multiple gate drivers. Depending on the desired application, the output impedance of the multiple gate drivers can be configured to drive multiple power switches with the correct impedance matching.

[0030] The internal and / or external switch segments included in each of the plurality of power switches may be connected in parallel, such as Figure 2 Since they are independently controlled by multiple gate drivers, they can be switched independently, depending on the desired switched capacitor DC-DC converter configuration and the switched capacitor DC-DC converter output load.

[0031] Each of the plurality of power switches may include a positive terminal and a negative terminal, such as a drain terminal and a source terminal, respectively. Figure 4 A schematic diagram of an embodiment of a power switch is shown. The power switch has three switch segments connected in parallel. The three switch segments have 3 terminals, namely "g", "s" and "d". "g" can stand for "gate", "d" can stand for "drain", and "s" can potentially stand for "source".

[0032] Each of the internal switch segments may include a field effect transistor, preferably a metal oxide semiconductor field effect transistor (MOSFET). A metal oxide semiconductor field effect transistor is a type of insulated gate field effect transistor that is manufactured by controlled oxidation of a semiconductor (usually silicon). The voltage applied to the gate determines the conductivity of the device. This ability to change conductivity with the amount of applied voltage can be used to switch electronic signals. This is one of the reasons it can be used as a power switch, because the gate of the MOSFET can be driven by a gate driver, thereby changing the state of the switch.

[0033] In one embodiment, the internal switch segment does not include stacked or cascaded field effect transistors. In fact, at least one of the field effect transistors can be a power MOSFET device, such as a lateral double diffused metal oxide semiconductor (LDMOS) or a super junction double diffused metal oxide semiconductor (SJ-LDMOS). The power MOSFET can maintain a relatively high voltage, preferably included between 10 and 500V. In this case, the power MOSFET can maintain the maximum value of the possible DC input voltage of the currently disclosed switch capacitor DC-DC converter. The field effect transistor can be an N-type transistor, such as an N-channel MOSFET. They can be an asymmetric transistor type, wherein the maximum drain-source voltage (Vd) is higher than the maximum gate-source voltage (Vg). The asymmetric transistor type can allow very large drain-source voltages while being driven with a lower voltage on the gate to allow switching between on and off states. This can make them suitable for high voltage, high power switch capacitor DC-DC converter applications.

[0034] At least one internal switch segment may be implemented on a silicon substrate. A silicon substrate may also be referred to as a silicon wafer, which is a thin slice of semiconductor used to manufacture integrated circuits. Other types of substrates may be used, such as III-V or II-VI materials such as gallium arsenide (GaAs), gallium nitride (GaN), or silicon carbide (SiC). Silicon may be preferred for at least one internal switch segment due to its relatively low cost compared to other materials.

[0035] At least one external switch segment can be a vertical MOSFET optimized for low channel conductance. By using a vertical structure, the transistor can maintain a high blocking voltage and a high current. Vertical MOSFETs are generally not fabricated on a first semiconductor die that implements a planar device, and are preferably optimized for low power circuits. Therefore, at least one external switch segment can be implemented on a second semiconductor die.

[0036] At least one external switch segment may be a high electron mobility transistor (HEMT). A HEMT is a field effect transistor that contains a junction between two materials with different band gaps as a channel rather than a doped region. A material combination such as gallium nitride (GaN) may be used to obtain a GaN-based HEMT. Other material combinations are GaAs with AlGaAs, but there are wide variations depending on the application. The advantages of HEMTs are the possible high gain, high switching speeds, and very low channel resistance. They may have the disadvantage of being quite expensive compared to MOSFETs. By having the option of implementing at least one external switch segment as a HEMT, this gives the possibility of driving larger output loads that require more current for a given DC output voltage, and potentially reduces the switching losses of the switched capacitor DC-DC converter.

[0037] The first semiconductor die may be optimized for implementing advanced analog and digital circuits, such as level shifters, gate drivers, clock generation circuits, clock controllers, linear voltage regulators, or temperature sensors. Semiconductor processes optimized for advanced analog and digital circuits may require more processing steps and photomasks to achieve a wider selection of electronic components. In order to support the possible wider selection of electronic components, trade-offs must be made in semiconductor material characteristics, which may reduce the performance of power transistors implemented using the same semiconductor process.

[0038] In one embodiment, a plurality of gate drivers are disposed on a first semiconductor die. The plurality of gate drivers may be designed using a semiconductor process that may be optimized for low power consumption and high integration density. If relatively low conductance may be desired at the output of the plurality of gate drivers, the plurality of gate drivers may also be designed and implemented on a semiconductor process optimized for power transistor implementation.

[0039] The second semiconductor die may be manufactured using a semiconductor process optimized for power transistor implementations. These semiconductor processes optimized for power transistor implementations may use a vertical transistor structure in which the transistor drain-source terminals are arranged on opposite sides of the transistor die. This may be beneficial for high voltage power transistor implementations, but may not be beneficial for advanced analog and digital circuits that are preferably designed for low power consumption. In addition, power transistors may benefit from possible implementations using high electron mobility materials such as GaN or SiC. Semiconductor processes based on such materials may not be well suited for implementing p-type transistors, which may be required for implementing digital logic circuits using complementary metal oxide semiconductor (CMOS) technology.

[0040] The second semiconductor die may have technology for implementing at least one external GaN FET and / or at least one external vertical power MOSFET. At least one external switch segment may include at least one external GaN FET and / or at least one external vertical power MOSFET. GaN FETs are field effect transistors manufactured with GaN technology. GaN FETs offer several advantages over conventional silicon-based FETs, particularly in high power and high frequency applications. GaN FETs may be manufactured on different substrates including silicon (GaN on silicon) or silicon carbide (GaN on SiC). The second semiconductor die may include at least one GaN on silicon external switch segment. GaN on silicon may offer cost advantages due to compatibility with existing silicon manufacturing infrastructure, while GaN on SiC offers excellent thermal conductivity and higher breakdown voltage capabilities. Vertical power MOSFETs may be a type of power transistor that may have a vertical structure. They may be designed with multiple layers of semiconductor material and have a vertical current flow path. The second semiconductor die may include a channel region oriented perpendicular to the substrate surface. Vertical power MOSFETs may be specifically designed to handle high voltages and high currents. They may be suitable for power electronics applications that may require efficient power switching and control.

[0041] The second semiconductor die may include at least one external switch segment based on GaN on silicon (GaN on Si). GaN has a wider bandgap than conventional silicon, which allows for higher voltage operation, higher breakdown voltage, and higher operating temperature. This can make GaN on silicon devices suitable for high power and high frequency applications.

[0042] The first semiconductor die may have MOS and / or bipolar CMOS-DMOS technology, preferably manufactured with lateral integration. Lateral or horizontal integration may refer to the ability to integrate different components or devices within the same plane or layer of a semiconductor substrate. It may involve placing devices side by side in a two-dimensional layout, thereby allowing compact and efficient circuit design. Lateral integration may also refer to the integration of various transistors and passive components within a single layer of semiconductor material. This integration can be achieved by exploiting the planar nature of the MOS process, where devices can be manufactured on the surface of the substrate.

[0043] In one embodiment, the second semiconductor die has a direct bandgap semiconductor technology, such as gallium nitride technology. In direct bandgap semiconductor technology, the minimum energy point of the conduction band (to which electrons are excited when conducting current) can be aligned with the maximum energy point of the valence band (where electrons reside when not conducting current) with the same momentum in the electronic band structure. Direct bandgap semiconductor technology can include indium phosphide (InP), gallium arsenide (GaAs), or aluminum gallium nitride (AlGaN).

[0044] The second semiconductor die can be adapted for power transistor implementation. The second semiconductor die can preferably be manufactured using a semiconductor manufacturing process that can be suitable for a more efficient power transistor implementation. The adapted process can include doping and diffusion steps to introduce specific dopants into semiconductor materials for, for example, implementing super junction and / or double diffused MOSFETs. This customization of dopant distribution may be advantageous for achieving the desired conductivity and performance characteristics of power transistors. In addition, bipolar CMOS-DMOS (BCD) semiconductor manufacturing processes can implement both analog, digital and power transistors. Advantageously, in order to effectively implement power transistors, a dedicated BCD process can be selected, which can preferably include necessary process steps and photolithography masks dedicated to power transistor devices. This selective method can avoid including process steps and photolithography masks that may be required for implementing digital low-voltage transistors. A significant advantage of the BCD process can be its cost-effectiveness in manufacturing power transistors. By only utilizing the basic process steps and masks required to produce semiconductor die, efficient use of resources can be ensured.

[0045] In another embodiment, the first semiconductor die is a silicon-based semiconductor die. A silicon-based semiconductor die may refer to a die made primarily of silicon. The first semiconductor die may be composed of silicon. Silicon may provide excellent electrical properties, such as its ability to act as a semiconductor by controlling the flow of electric current. The die may be a separate unit that may be separated from a larger wafer on which the die may be processed, and may be used as an independent electronic component.

[0046] A plurality of power switches may be segmented switches, including at least one internal switch segment disposed on a first semiconductor die fabricated with a first material composition and at least one external switch segment disposed on a second semiconductor die fabricated with a second material composition different from the first material composition. Preferably, in the case of semiconductors, the material composition may refer to a specific combination or mixture of elements used to produce semiconductor materials. The material composition may determine the properties and characteristics of the semiconductor, including its electrical conductivity, band gap energy, carrier mobility, and thermal properties. Semiconductor material compositions may generally be represented using chemical formulas or symbols that indicate the elements and their proportions present in the material. These compositions may be represented in different ways, depending on the specific semiconductor material system in question. A specific combination of elements and their proportions in a semiconductor material composition may affect its electrical properties. By adjusting the material composition, semiconductor properties may be tailored to meet the specific requirements of various applications, such as power electronics or integrated circuits.

[0047] GaN transistors may cause EMI problems due to their high switching speed. That is, when the GaN transistor is turned on, the rapid increase in drain-source current (high di / dt) may cause high dv / dt on the switch node of the converter. EMI problems can be alleviated by using a segmented switch, in which at least one of the segments is a GaN transistor and the other segment is a silicon-based transistor with a higher channel resistance than the GaN-based segment. Therefore, at least one internal switch segment is a silicon-based transistor and at least one external switch segment is GaN-based. By turning on the silicon-based segment with a higher channel resistance slightly before turning on the GaN-based segment, dv / dt can be reduced, thereby reducing the EMI problem of the converter while still obtaining the advantages of the low channel resistance of the GaN transistor. In addition, the lower dv / dt of the power stage switch node will reduce the Miller kickback effect of the power switch that is turned off in a given switching state. High dv / dt on the switch node can cause current injection through the drain-gate capacitance, which may cause the transistor to turn on in a so-called parasitic turn-on event. This is highly undesirable as it significantly increases power dissipation and is ultimately destructive to the power transistors as it shorts out a portion of the power stage.

[0048] Arranging the power transistor on the second semiconductor die can provide multiple advantages. If the power transistor is to be placed on the same semiconductor die, the power transistor may be subjected to large heat dissipation, and this will affect the temperature sensitive circuit arranged on the first semiconductor die. Higher temperatures may reduce the conductivity of the gate driver, which will result in poor drive strength, and therefore lead to potentially higher power consumption of the switched capacitor DC-DC converter. Therefore, by having a gate driver on the first semiconductor die and a power transistor on the second semiconductor die, this will benefit the total power consumption and performance of the switched capacitor DC-DC converter. In another embodiment, at least one of the plurality of power switches has a positive terminal connected to the first flying capacitor in the plurality of flying capacitors and a negative terminal connected to the second flying capacitor in the plurality of flying capacitors. By having at least one of the plurality of power switches in the previously described configuration, the internal and / or potentially external switch segments of at least one of the plurality of power switches can allow the potential discharge of the internal low impedance nodes in the switched capacitor DC-DC converter to be controlled. This can limit the inrush current in the internal nodes of the switched capacitor DC-DC converter, thus potentially improving reliability.

[0049] Figure 5 A schematic diagram of an embodiment of a gate driver is shown. The gate driver includes a level shifter, a buffer, and at least one linear voltage regulator. At least two of the multiple gate drivers can be powered directly from a DC input voltage. This can allow for a gentle and controlled startup of a switched capacitor DC-DC converter. At least two of the multiple gate drivers can also include an internal linear voltage regulator. The internal linear voltage regulator is configured to provide the correct supply voltage to the gate driver by converting the DC input voltage of the switched capacitor DC-DC converter to an appropriate gate driver DC supply voltage.

[0050] The plurality of gate drivers have floating ground terminals from the positive terminals or the negative terminals of the plurality of power switches. Figure 1 or Figure 2 As shown in , multiple gate drivers have floating grounds that follow the voltage from the positive or negative terminals of the multiple power switches they drive. This allows the gate drivers to be supplied with appropriate voltages, thus preventing any voltage across the gate drivers from being outside the safe operating area of ​​the devices used in the multiple gate drivers. This can also allow the gate drivers to drive the multiple power switches with the appropriate voltages across the switches. More specifically, the multiple gate drivers can deliver the correct voltages to the gates of the internal switch segments and / or external switch segments in order to properly turn the switch segments on or off.

[0051] In one embodiment, the switched capacitor DC-DC converter further includes at least one inductor connected in series with at least one of the flying capacitors. Figure 2 Two inductors L1 and L2 connected in series with C2 and C1 or C3 are shown. This enables a hybrid configuration of a switched capacitor DC-DC converter. The hybrid configuration can add some benefits to a switched capacitor DC-DC converter without an inductor (such as those previously described in this disclosure). At least one inductor has an inductance between 15nH and 100uH. In some low-power applications, capacitors can also be implemented on a chip using, for example, metal-oxide-metal, metal-insulator-metal or metal-oxide-semiconductor capacitor technology with multiple gate drivers. On-chip capacitors may have very low capacitance values, which makes them unsuitable for high-power applications, but the monolithic integration of capacitors with multiple gate drivers and multiple power switches can provide a very compact switched capacitor DC-DC converter for low-power applications. The switching frequency can be selected to maximize efficiency. A higher switching frequency can allow more energy to be transferred through multiple flying capacitors per unit time. However, a higher switching frequency may also increase dynamic switching and parasitic losses, which may increase power dissipation. Additionally, parasitic inductance in the multiple flying capacitor charge / discharge loops can increase the impedance of these loops at higher frequencies.

[0052] The control unit may also be included in the switched capacitor DC-DC converter. The control unit may be designed to provide the required control signals to the multiple gate drivers. Depending on the target application, these control signals may be clocked, pseudo-random or random. Depending on the configuration of the switched capacitor DC-DC converter, the control unit may provide a clock with a specific frequency.

[0053] The control unit also includes a clock controller and a serial communication bus. The clock controller can provide various clock signals with different clock frequencies and / or phases. The serial communication bus can allow the secondary system to communicate with the switched capacitor DC-DC converter. This can also allow the system or user to program the switched capacitor DC-DC converter accordingly. The system may include a microcontroller or any other suitable microcomputer or processing unit for programming and / or controlling the switched capacitor DC-DC converter.

[0054] The serial communication bus can be an inter-integrated circuit (I2C) serial bus protocol, a serial peripheral interface (SPI) serial bus protocol, a system management bus (SMBus), a power management bus (PMBus), an adaptive voltage scaling bus (AVSBus), or a USB protocol. Using a serial communication bus, data bits are transmitted one at a time in a sequential manner on a data bus or communication channel. Parallel communication, such as a small computer system interface (SCSI) or a peripheral component interconnect (PCI), can also be used. Due to the inherent disadvantages of the architecture of parallel communication, such as crosstalk, the number of cables used, or possible clock deviations, serial communication is usually preferred. However, parallel interfaces can still be used for static configuration of chips, such as selecting the serial address of the chip or setting a fixed operating mode.

[0055] In another aspect, a programmable switch array for a switched capacitor DC-DC converter is disclosed. The programmable switch array for a switched capacitor DC-DC may include at least one input terminal, at least one output terminal, a plurality of power switches, and a plurality of flying capacitor terminals connectable to a plurality of flying capacitors, wherein the plurality of flying capacitors are configured to convert a DC input voltage from at least one input terminal to a DC output voltage to at least one output terminal by switched capacitor power conversion. At least one of the plurality of power switches is a segmented switch, including at least one internal switch segment disposed on a first semiconductor die, and at least one switch segment terminal connectable to at least one external switch segment disposed on a second semiconductor die. A plurality of gate drivers may be configured to drive the plurality of power switches.

[0056] Figure 6A schematic diagram of an embodiment of a programmable switch array for a switched capacitor DC-DC converter is shown, wherein a plurality of power switches are segmented switches, but wherein at least one switch segment is an external switch segment disposed on a second semiconductor die. A plurality of flying capacitor terminals are connectable to a plurality of flying capacitors C1-C3, wherein the plurality of flying capacitors are configured to convert a DC input voltage from at least one input terminal to a DC output voltage to at least one output terminal by switched capacitor power conversion. At least one input terminal is referred to as VTOP, which corresponds to the DC input voltage of the programmable switch array switched capacitor DC-DC converter, and at least one output terminal is referred to as S4, which corresponds to the DC output voltage of the programmable switch array. The programmable switch array also includes a plurality of gate drivers (such as GDRV0-GDRV7), which are configured to independently drive a plurality of power switches (such as SW0-SW7), and at least one switch segment terminal connectable to at least one external switch segment (such as SW0E-SW7E). GDRV0-GDRV7 includes four independent gate drivers, wherein each of the gate drivers drives at least one internal switch segment and at least one external switch segment disposed on the same die as the programmable switch array. For example, GDRV7 includes four independent gate drivers, three of which drive three internal switch segments included in the power switch SW7, and one external switch segment terminal, which drives the external switch segment SW7E through the terminal G7. The plurality of gate drivers are controlled by a unit CLK_CNTRL, which transmits control signals s[0]-s[7] to the plurality of gate drivers GDRV0-GDRV7. A bootstrap circuit may be implemented to provide a boost voltage for the topmost gate driver GDRV7. The bootstrap circuit includes a bootstrap capacitor, referred to as CBST, which is arranged outside the programmable switch array and connected to the programmable switch array through terminals VTOP and VBST, and a bootstrap diode DBST. The topmost gate driver GDRV7 may require a positive supply voltage, which cannot be provided by connecting the GDRV7 positive supply terminal to VTOP and the GDRV7 negative supply terminal to the source terminal of SW7, because the voltage from VTOP to the source of SW7 is approximately zero when SW7 is turned on. The bootstrap diode can provide a charging path from VTOP to the CBST boost capacitor when SW7 is open (off) and the diode blocks when SW7 is closed (on). The result of the bootstrap circuit operation is a stable supply voltage of GDRV7 relative to the negative supply terminal of GDRV7 connected to the source terminal of SW7. A decoupling capacitor COUT is connected to at least one output terminal to filter the DC output voltage of the programmable switch array, and a decoupling capacitor CIN is connected to at least one input terminal to filter the DC input voltage of the programmable switch array.

[0057] The plurality of gate drivers may have a plurality of terminals connectable to at least one external switching segment. The plurality of gate drivers may have the same characteristics as the gate drivers previously described in this disclosure.

[0058] The plurality of terminals include at least one switch terminal. The at least one switch terminal can be used to control the switch state of at least one external switch segment. The switch state of at least one external switch segment can be configured as a plurality of states, but is preferably open or closed, or more generally referred to as on or off.

[0059] On the other hand, a method for performing switched capacitor DC-DC conversion includes the following steps: providing a switched capacitor DC-DC converter, which includes at least one input terminal, at least one output terminal, a plurality of power switches and a plurality of flying capacitors, wherein the plurality of flying capacitors are configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch, including at least one internal switch segment disposed on a first semiconductor die and at least one external switch segment disposed on a second semiconductor die, and a plurality of gate drivers configured to drive the plurality of power switches, and performing switched capacitor DC-DC conversion by switching the plurality of power switches using the at least one internal switch segment and the at least one external switch segment so as to convert the DC input voltage into a DC output voltage.

[0060] Figure 7 A flow chart of the presently disclosed method (700) for performing switched capacitor DC-DC conversion is shown. The method for performing switched capacitor DC-DC conversion includes the following steps, which are providing a switched capacitor DC-DC converter (701) and performing switched capacitor DC-DC conversion (702). Figure 7 A flow chart of the presently disclosed method described in the preceding paragraphs is shown.

[0061] Further details of the invention

[0062] 1. A switched capacitor DC-DC converter, comprising:

[0063] at least one input terminal;

[0064] at least one output terminal;

[0065] a plurality of power switches and a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch including at least one inner switch segment disposed on a first semiconductor die and at least one outer switch segment disposed on a second semiconductor die; and

[0066] A plurality of gate drivers configured to drive the plurality of power switches.

[0067] 2. A switched capacitor DC-DC converter according to item 1, wherein the DC input voltage is between 12 and 400V, preferably between 36 and 60V.

[0068] 3. The switched capacitor DC-DC converter according to any one of the preceding clauses, wherein the plurality of power switches and the plurality of flying capacitors are configured to perform power conversion in a Dickson 1 / 4 or Ladder 1 / 5 or Dickson 1 / 6 configuration.

[0069] 4. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the at least one internal switching segment and the at least one external switching segment are independently controlled by a plurality of gate drivers.

[0070] 5. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the at least one internal switching segment and / or the at least one external switching segment are connected in parallel.

[0071] 6. The switched capacitor DC-DC converter of any of the preceding clauses, wherein the plurality of gate drivers are disposed on the first semiconductor die.

[0072] 7. The switched capacitor DC-DC converter according to any of the preceding clauses, wherein the switched capacitor DC-DC converter further comprises at least one secondary external switching segment disposed on a third semiconductor die.

[0073] 8. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein each of the plurality of power switches has a positive terminal such as a drain terminal and a negative terminal such as a source terminal.

[0074] 9. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the at least one internal switching segment comprises at least one field effect transistor, preferably at least one metal oxide semiconductor field effect transistor.

[0075] 10. The switched capacitor DC-DC converter of item 9, wherein the at least one field effect transistor is not a stacked or cascaded field effect transistor.

[0076] 11. A switched capacitor DC-DC converter according to any of items 9 to 10, wherein the at least one field effect transistor is a high voltage transistor, wherein the blocking voltage is preferably equal to or higher than the DC input voltage.

[0077] 12. A switched capacitor DC-DC converter according to any one of items 9 to 11, wherein the at least one field effect transistor is an N-type transistor.

[0078] 13. A switched capacitor DC-DC converter according to any one of items 9 to 12, wherein the at least one field effect transistor is of an asymmetric transistor type.

[0079] 14. The switched capacitor DC-DC converter of item 13, wherein the asymmetric transistor type has a maximum drain-source voltage (Vd) that is higher than a maximum gate-source voltage (Vg).

[0080] 15. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the at least one internal switching segment is implemented on a silicon substrate.

[0081] 16. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the at least one external switching segment is at least one high electron mobility transistor.

[0082] 17. The switched capacitor DC-DC converter of item 16, wherein the at least one high electron mobility transistor is at least one gallium nitride transistor.

[0083] 18. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the first semiconductor die is configured for advanced analog and digital circuits.

[0084] 19. The switched capacitor DC-DC converter of any of the preceding clauses, wherein the second semiconductor die is configured for a power transistor implementation.

[0085] 20. A switched capacitor DC-DC converter according to any of the preceding items, wherein at least two of the plurality of gate drivers are powered by a DC input voltage.

[0086] 21. A switched capacitor DC-DC converter according to any of the preceding items, wherein at least one of the plurality of power switches has a positive terminal connected to a first flying capacitor among the plurality of flying capacitors and a negative terminal connected to a second flying capacitor among the plurality of flying capacitors.

[0087] 22. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the plurality of gate drivers have floating ground terminals powered from positive terminals or negative terminals of the plurality of power switches.

[0088] 23. A switched capacitor DC-DC converter according to any of the preceding items, wherein at least two of the plurality of gate drivers further comprise a linear voltage regulator powered from a DC input voltage.

[0089] 24. The switched capacitor DC-DC converter of any of the preceding items, further comprising at least one inductor connected in series with at least one of the plurality of flying capacitors.

[0090] 25. A switched capacitor DC-DC converter according to any of the preceding clauses, wherein the at least one inductor has an inductance between 15 nH and 100 uH.

[0091] 26. A switched capacitor DC-DC converter according to any of the preceding items, wherein the plurality of flying capacitors have a capacitance between 100 nF and 100 uF, preferably between 500 nF and 30 uF.

[0092] 27. A switched capacitor DC-DC converter according to any of the preceding items, further comprising a control unit.

[0093] 28. The switched capacitor DC-DC converter of item 27, wherein the control unit comprises a clock controller and a serial communication bus.

[0094] 29. A switched capacitor DC-DC converter according to item 28, wherein the serial communication bus is an I2C serial bus.

[0095] 30. A programmable switch array for a switched capacitor DC-DC converter, comprising:

[0096] at least one input terminal;

[0097] at least one output terminal;

[0098] a plurality of power switches and a plurality of flying capacitor terminals connectable to a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal via switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch including at least one internal switch segment disposed on a first semiconductor die, and at least one switch segment terminal connectable to at least one external switch segment disposed on a second semiconductor die; and

[0099] A plurality of gate drivers configured to drive the plurality of power switches.

[0100] 31. A programmable switch array for a switched capacitor DC-DC converter according to item 30, wherein the plurality of gate drivers have a plurality of terminals connectable to the at least one external switching segment.

[0101] 32. A programmable switch array for a switched capacitor DC-DC converter according to any one of items 30 to 31, wherein the plurality of terminals includes at least one switch terminal.

[0102] 33. A programmable switch array for a switched capacitor DC-DC converter according to any one of items 30 to 32, wherein the at least one switch terminal controls the switching state of the at least one external switch segment.

[0103] 34. A method for performing switched capacitor DC-DC conversion, comprising the steps of:

[0104] A switched capacitor DC-DC converter is provided, the switched capacitor DC-DC converter comprising:

[0105] at least one input terminal;

[0106] at least one output terminal;

[0107] a plurality of power switches and a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch including at least one inner switch segment disposed on a first semiconductor die and at least one outer switch segment disposed on a second semiconductor die; and

[0108] a plurality of gate drivers configured to drive the plurality of power switches; and

[0109] Switched capacitor DC-DC conversion is performed by switching the plurality of power switches using the at least one internal switching segment and the at least one external switching segment to convert a DC input voltage into a DC output voltage.

[0110] 35. A method for performing switched capacitor DC-DC conversion according to item 34, wherein the switched capacitor DC-DC converter is a switched capacitor DC-DC converter according to any one of items 1-29.

Claims

1. A switched capacitor DC-DC converter, comprising: at least one input terminal; at least one output terminal; a plurality of power switches and a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch including at least one internal switch segment disposed on a first semiconductor die of a first semiconductor manufacturing technology and at least one external switch segment disposed on a second semiconductor die of a second semiconductor manufacturing technology different from the first semiconductor manufacturing technology; as well as A plurality of gate drivers configured to drive the plurality of power switches.

2. The switched capacitor DC-DC converter according to claim 1, wherein: The second semiconductor die has technology for implementing at least one external GaN FET and / or at least one external vertical power MOSFET.

3. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The at least one external switching segment includes at least one external GaN FET and / or at least one external vertical power MOSFET.

4. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The second semiconductor die includes at least one GaN-on-silicon based external switch segment.

5. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The first semiconductor die has MOS and / or bipolar CMOS-DMOS technology, preferably manufactured using lateral integration.

6. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The second semiconductor die has direct bandgap semiconductor technology, such as gallium nitride technology.

7. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The second semiconductor die is suitable for a power transistor implementation.

8. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The first semiconductor die is a silicon-based semiconductor die.

9. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: At least one internal switching segment comprises a MOS and / or bipolar CMOS-DMOS based transistor, and wherein at least one external switching segment comprises a GaN FET and / or an external vertical power MOSFET.

10. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: At least one inner switching segment is a silicon-based transistor and at least one outer switching segment is GaN-based.

11. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The DC input voltage is between 12 and 400V, preferably between 36 and 60V.

12. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: A plurality of the power switches are segmented switches including at least one inner switch segment disposed on a first semiconductor die fabricated from a first material composition and at least one outer switch segment disposed on a second semiconductor die fabricated from a second material composition different from the first material composition.

13. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The at least one inner switching segment and the at least one outer switching segment are independently controlled by the plurality of gate drivers.

14. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The at least one inner switching segment and / or the at least one outer switching segment are connected in parallel.

15. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The plurality of gate drivers are disposed on the first semiconductor die.

16. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The switched capacitor DC-DC converter also includes at least one secondary external switching segment disposed on a third semiconductor die.

17. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: Each of the plurality of power switches has a positive terminal, such as a drain terminal, and a negative terminal, such as a source terminal.

18. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The at least one internal switching segment comprises at least one field effect transistor, preferably at least one metal oxide semiconductor field effect transistor, and wherein the at least one field effect transistor is not a stacked or cascaded field effect transistor.

19. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: The at least one field effect transistor is a high voltage transistor having a blocking voltage which is preferably equal to or higher than the DC input voltage.

20. A switched capacitor DC-DC converter according to any preceding claim, wherein: The at least one external switching segment is at least one high electron mobility transistor.

21. A switched capacitor DC-DC converter according to any one of the preceding claims, wherein: At least two of the plurality of gate drivers are powered from a DC input voltage.

22. The switched capacitor DC-DC converter of any preceding claim, further comprising at least one inductor connected in series with at least one of the plurality of flying capacitors.

23. A programmable switch array for a switched capacitor DC-DC converter, comprising: at least one input terminal; at least one output terminal; a plurality of power switches and a plurality of flying capacitor terminals connectable to a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal via switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch including at least one internal switch segment disposed on a first semiconductor die of a first semiconductor manufacturing technology, and at least one switch segment terminal connectable to at least one external switch segment disposed on a second semiconductor die of a second semiconductor manufacturing technology different from the first semiconductor manufacturing technology; as well as A plurality of gate drivers configured to drive the plurality of power switches.

24. A method for performing switched capacitor DC-DC conversion, comprising the steps of: A switched capacitor DC-DC converter is provided, the switched capacitor DC-DC converter comprising: at least one input terminal; at least one output terminal; a plurality of power switches and a plurality of flying capacitors configured to convert a DC input voltage from the at least one input terminal to a DC output voltage to the at least one output terminal through switched capacitor power conversion, wherein at least one of the plurality of power switches is a segmented switch including at least one internal switch segment disposed on a first semiconductor die of a first semiconductor manufacturing technology and at least one external switch segment disposed on a second semiconductor die of a second semiconductor manufacturing technology different from the first semiconductor manufacturing technology; and a plurality of gate drivers configured to drive the plurality of power switches; and Switched capacitor DC-DC conversion is performed by switching the plurality of power switches using the at least one internal switching segment and the at least one external switching segment to convert a DC input voltage into a DC output voltage.

25. The method for performing switched capacitor DC-DC conversion according to claim 24, wherein: The switched capacitor DC-DC converter is a switched capacitor DC-DC converter according to any one of claims 1-22.

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