Preparation method of electrostatic drive MEMS Fabry-Perot filter

By using SOI wafer and misplaced bonding technology in the MEMS Fabry-Perot filter, the problems of low manufacturing yield and poor performance of MEMS Fabry-Perot filter chips in the prior art are solved, and higher manufacturing yield and performance are achieved, reducing process complexity and cost.

CN119861520AInactive Publication Date: 2025-04-22SHANGHAI INSTITUTE OF TECHNICAL PHYSICS CHINESE ACADEMY OF SCIENCES

Patent Information

Application Number
CN202510082706.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-20
Publication Date
2025-04-22
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The existing MEMS Fabry-Perot filter chip has low manufacturing yield, poor performance, insufficient design flexibility, and complex process, making it difficult to effectively solve the residual stress problem of the membrane layer.

Method used

Using the SOI wafer as the first substrate, the upper and lower Bragg mirrors and electrodes were prepared by ultrasonic cleaning and drying of water bath, and the bonding layer and the silica insulating layer were etched by a combination of advanced oxide etching and reactive ion etching to achieve misalignment bonding to lead the electrode.

Benefits of technology

The manufacturing yield and performance of MEMS Fabry-Perot filters are improved, the residual stress problem of membrane layer is solved, design flexibility is enhanced, and process complexity and cost are reduced.

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Abstract

The invention relates to the technical field of optical devices, and particularly discloses a preparation method of an electrostatic drive MEMS Fabry-Perot filter, an SOI wafer is used as a first substrate, top silicon of the SOI wafer is used as a drive structure of the MEMS Fabry-Perot filter, the thickness and mechanical characteristics of a cantilever can be accurately adjusted, and the MEMS Fabry-Perot filter can be manufactured. And meanwhile, the silicon dioxide insulating layer of the SOI wafer can also be used as an etching stopping layer, so that the condition of excessive etching is avoided, and the manufacturing yield of the filter is further improved. When the bonding layer and the silicon dioxide insulating layer of the SOI wafer are etched, an etching method combining advanced oxide etching and reactive ion etching is adopted, isotropy and anisotropy are integrated, and the limitation of a single process is overcome. A certain dislocation amount of linear offset is reserved during patterning of bonding metal, gold-tin eutectic bonding is adopted, the problem of leading-out of top and bottom electrodes is solved, and the machining cost and uncertainty are reduced.
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Description

Technical Field

[0001] The invention relates to the technical field of optical devices, and in particular to a method for preparing an electrostatically driven MEMS Fabry-Perot filter. Background Art

[0002] MEMS Fabry-Perot filters have shown many advantages in practical applications, but their manufacturing process still faces multiple challenges. The MEMS processing technology used by MEMS Fabry-Perot filters is the integrated circuit (IC) process, and is mainly based on silicon. However, the existing silicon-based preparation process has hindered the design flexibility and performance of MEMS Fabry-Perot filters to a certain extent. It is mainly based on non-standard highly customized processing, which limits the efficient processing of the filter chip. For example, there are limitations in material selection, the complexity of precise control of process parameters, and the difficulty of electrode lead-out during eutectic bonding.

[0003] At the same time, previous studies used surface micromachining in MEMS Fabry-Perot mainly to form a Fabry-Perot microcavity structure by release, but this method has low design flexibility and is more difficult to manufacture. After the release is completed, unnecessary film stress problems will be introduced, affecting device performance.

[0004] Therefore, there is a real need for a method for preparing an electrostatically driven MEMS Fabry-Perot filter to improve device performance and reliability and meet the growing application needs. Summary of the invention

[0005] The purpose of the present invention is to provide a method for preparing an electrostatically driven MEMS Fabry-Perot filter, which is used to solve the problems of low manufacturing yield and poor performance of MEMS Fabry-Perot filter chips in the prior art. By adopting the SOI body processing technology, greater flexibility can be provided to solve the problem of residual stress in the membrane layer, and the spacing of the Fabry-Perot cavity of the MEMS Fabry-Perot filter can be determined by bonding.

[0006] The present invention provides the following technical solutions:

[0007] A method for preparing an electrostatically driven MEMS Fabry-Perot filter comprises the following steps:

[0008] S1, performing water bath ultrasonic cleaning and drying on the SOI wafer, the SOI wafer serving as the first substrate, the SOI wafer having a top silicon layer, a silicon dioxide insulating layer and a bottom silicon layer;

[0009] S2, sequentially preparing an upper Bragg reflector and a top electrode on the upper surface of the top silicon layer, and patterning them, with the top electrode serving as a first bonding metal structure;

[0010] S3, etching through the top silicon to form a driving structure, protecting the front side of the top silicon by applying wax, and etching from the back side of the bottom silicon until the driving structure is exposed;

[0011] S4, using a fixed structure as the second substrate, performing water bath ultrasonic cleaning and drying;

[0012] S5, depositing a lower Bragg reflector, a bottom electrode, a bonding layer, and a second bonding metal on the upper surface of the fixed structure in sequence and patterning them, and depositing an anti-reflection structure on the back of the fixed structure at the same time;

[0013] S6, dicing the wafer where the first substrate is located and the wafer where the second substrate is located according to predetermined alignment marks by using a wafer cutting technology to separate them into a plurality of upper wafers and lower wafers, and performing staggered bonding on the upper wafer and the lower wafer by using a eutectic gold-tin staggered bonding process;

[0014] S7. Attach the bonded bare chip to the PCB driver circuit board, lead out the top electrode and the bottom electrode through wire bonding, and complete the preparation of the MEMS Fabry-Perot filter.

[0015] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, the upper Bragg reflector and the lower Bragg reflector are both formed by stacking a first layer of high refractive index material, a low refractive index material and a second layer of high refractive index material.

[0016] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, when the operating band is a mid-infrared band, the first layer of high refractive index material or the second layer of high refractive index material in the upper Bragg reflector and the lower Bragg reflector is made of any one of germanium, silicon, gallium arsenide and indium phosphide, or any combination thereof.

[0017] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, when the operating band is the mid-infrared band, the low refractive index material or the second layer of low refractive index material in the upper Bragg reflector and the lower Bragg reflector is any one of silicon dioxide, magnesium fluoride, germanium sulfide and aluminum oxide, or any combination thereof.

[0018] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, the specific etching step of the bottom silicon in step S3 includes deep silicon etching of the bottom silicon and dry combined etching of the silicon dioxide insulating layer.

[0019] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, the etching process of the bonding layer and the silicon dioxide insulating layer of the SOI wafer adopts dry etching combining advanced oxide etching and reactive ion etching.

[0020] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, the specific step of scribing according to the predetermined alignment mark in step S6 includes:

[0021] Use nitrogen to remove dirt from the surface of the driving structure and the fixed structure, and stick their bare chips on the blue film;

[0022] Cutting is performed according to the alignment marks and the plates are cleaned and cooled by deionized water.

[0023] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, the specific steps of the gold-tin dislocation bonding process in step S6 include:

[0024] Pre-treating the diced die with nitrogen and oxygen plasma;

[0025] The two are aligned according to the alignment marks, and the driving structure and the fixed structure are respectively adsorbed by vacuum and placed in an inert gas environment, so that the first bonding metal and the second bonding metal are mutually soluble, and nitrogen is introduced for cooling to complete the bonding.

[0026] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, both the first layer of high refractive index material and the second layer of high refractive index material are germanium.

[0027] The low refractive index material and the second layer of low refractive index material are both silicon dioxide.

[0028] In the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in at least one embodiment of the present disclosure, the material of the top electrode is a gold-tin alloy.

[0029] The bottom electrode is made of gold.

[0030] The bonding layer is made of silicon dioxide.

[0031] The material of the second bonding metal is gold-tin alloy.

[0032] The beneficial effects of the present invention are:

[0033] 1) The driving structure of the traditional MEMS Fabry-Perot filter is a conventional silicon substrate, which needs to be made into a device or device layer of predetermined thickness through multiple steps of wet or dry etching, resulting in errors in the thickness of the driving structure, which is difficult to control. In the preparation method proposed in the present invention, an SOI wafer is used as the first substrate, and its top silicon is used as the driving structure of the MEMS Fabry-Perot filter, which can accurately adjust the thickness of the cantilever and its mechanical properties. At the same time, the silicon dioxide insulating layer of the SOI wafer can also be used as a stop layer to avoid over-etching, further improving the manufacturing yield of the filter.

[0034] 2) In the previous preparation process, when a single etching method is used to pattern the bonding layer, the lower surface roughness is poor and the side wall morphology is not steep, which easily leads to depression or residue in the cavity. The present invention uses an etching method combining advanced oxide etching and reactive ion etching when etching the bonding layer and the silicon dioxide insulating layer of the SOI wafer, which combines isotropy and anisotropy, overcomes the limitations of a single process, has a high aspect ratio and smoothness, effectively improves the side wall morphology of the bonding layer and the silicon dioxide insulating layer, and reduces the surface roughness of the Bragg reflector under the lower surface of the bonding layer, further improving the optical performance of the device.

[0035] 3) In the conventional bulk processing process, the upper and lower electrodes are usually led out by etching through holes, which increases the complexity and instability of the process. The present invention solves the problem of leading out the top and bottom electrodes by staggering the driving structure and the fixed structure, leaving a certain amount of linear offset when patterning the bonding metal, and using gold-tin eutectic bonding, thereby reducing the cost and uncertainty of processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 It is a schematic diagram of the structure after processing in step S1 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0038] Figure 2 It is a schematic diagram of the structure after processing in step S2 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0039] Figure 3It is a schematic diagram of the structure after processing in step S3 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0040] Figure 4 It is a schematic diagram of the structure after processing in step S4 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0041] Figure 5 It is a schematic diagram of the structure after processing in step S5 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0042] Figure 6 It is a schematic diagram of the structure after processing in step S6 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0043] Figure 7 It is a schematic diagram of the structure after processing in step S7 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0044] Figure 8 It is a schematic diagram of the structure after processing in step S8 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0045] Fig. 9 It is a schematic diagram of the structure after processing in step S9 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0046] Fig.10 It is a schematic diagram of the structure after processing in step S10 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0047] Fig.11 It is a schematic structural diagram after processing in step S11 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0048] Fig.12 It is a schematic diagram of the structure after processing in step S13 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention;

[0049] Fig.13 It is a schematic diagram of the structure after processing in step S14 in the method for preparing an electrostatically driven MEMS Fabry-Perot filter provided in Example 1 of the present invention.

[0050] In the figure:

[0051] 1. SOI substrate; 1A, top silicon; 1B, silicon dioxide insulating layer; 1C, bottom silicon; 2. Upper Bragg reflector; 2A, first layer of high refractive index material I; 2B, low refractive index material I; 2C, second layer of high refractive index material I; 3. Top electrode; 4. Fixed structure; 5. Lower Bragg reflector; 5A, first layer of high refractive index material II; 5B, low refractive index material II; 5C, second layer of high refractive index material II; 6. Anti-reflection structure; 7. Bottom electrode; 8. Bonding layer; 9. Second bonding metal; 10. PCB driver circuit board; 11. Leads. DETAILED DESCRIPTION

[0052] The technical solutions in the embodiments will be described clearly and completely below in conjunction with the drawings in the embodiments. Obviously, the described embodiments are only a part of the embodiments, rather than all the embodiments.

[0053] It should be noted that the terms used in this application are generally terms commonly used by those skilled in the art. If there is any inconsistency with the commonly used terms, the terms in this application shall prevail.

[0054] The term "dry etching" is a process that uses plasma or reactive gas (without the involvement of liquid) to remove unwanted materials from the surface of solid materials on the wafer surface; the term "deposition" is plasma enhanced chemical vapor deposition, which uses plasma (partially ionized gas) to promote chemical reactions, thereby depositing various material films on the substrate, such as oxides, nitrides, carbides and silicides; the term "patterning" refers to the generation of regular surface structures at the nanoscale in at least one dimension. Patterning can be achieved using a variety of technologies, such as photolithography, scanning probe-based micromachining methods (Micromaching), microcontact printing (microcontact Printing), etc.; the term "bonding" is the strong interaction between two or more adjacent atoms, and the atoms are linked together in a "bonded" manner to form molecules.

[0055] The following is a detailed description of the implementation of the present application.

[0056] In embodiment 1 of the present invention, a method for preparing an electrostatically driven MEMS Fabry-Perot filter is provided, the method comprising:

[0057] S1. See Figure 1 , preparing an SOI wafer 1, the SOI wafer 1 being a first substrate, the SOI wafer 1 comprising, for example, a top silicon layer 1A having a thickness of 5 μm, a silicon dioxide insulating layer 1B having a thickness of 1 μm, and a bottom silicon layer 1C having a thickness of 450 μm, ultrasonically cleaning the wafer 1 with an acetone solution and deionized water respectively, and drying the wafer with nitrogen gas to remove surface dirt;

[0058] S2, see Figure 2 First, electron beam evaporation is used to deposit 250nm of the first layer of high refractive index material I2C in the upper Bragg reflector 2 on the top silicon 1A of the SOI wafer 1. The first layer of high refractive index material I2C is germanium, and its deposition rate is 0.2nm / s. The deposition time is 20min15s, the evaporation target material is germanium, and the vacuum pressure is 5×10 -4 Pa. Then, plasma enhanced chemical vapor deposition was used to grow 700nm of the low refractive index material I2B of the upper Bragg reflector 2. The low refractive index material I2B was silicon dioxide. The deposition rate was 80nm / min and the deposition time was 8min10s. Electron beam evaporation was used to deposit 250nm of the second layer of high refractive index material I2A of the upper Bragg reflector 2. The second layer of high refractive index material I2A was germanium. The deposition rate was 0.2nm / s and the deposition time was 20min15s. The evaporation target was germanium and the vacuum pressure was 5×10 -4 Pa. Finally, the upper Bragg reflector 2 was etched by ion beam etching, the ion energy was set to 350 eV, the etching thickness was 1.2 μm, the etching rate was 10 nm / min, and 3 cycles were performed, each cycle was 40 min;

[0059] S3, see Figure 3 , coating a 3 μm thick AZ5214 photoresist on the top silicon 1A of the SOI wafer 1, and performing photolithography, depositing a 1 μm thick gold-tin alloy top electrode 3 by thermal evaporation, and stripping the photoresist in an acetone organic solution by a stripping process to complete the preparation of the top electrode 3, and the top electrode 3 also serves as the first bonding metal;

[0060] S4. See Figure 4 The top silicon 1A is patterned by deep silicon etching to form a driving structure. The etching gases introduced are SF6, He, O2, and Ar. The etching rate is 10 μm / min and the etching time is 35 s.

[0061] S5. See Figure 5 , protect the front structure of the top silicon 1A by applying wax, select the back side of the bottom silicon 1C of the SOI wafer 1 for etching, and etch through to expose the driving structure 1A. First, coat the back side of the bottom silicon 1C with a thickness of 10μm with AZ4620 photoresist, and perform photolithography. Use deep silicon etching to remove the bottom silicon 1C, with an etching rate of 10μm / min and an etching time of 43min. Then use a combination of advanced oxide etching and reactive ion etching to remove the silicon dioxide insulating layer 1B in the SOI wafer 1. The etching rate of the former is 350nm / min, and that of the latter is 60-80nm / min, with etching times of 2min30s and 2min respectively. Finally, clean the first substrate with acetone and ethanol organic solutions;

[0062] S6. See Figure 6 A two-inch silicon wafer with a double-sided polishing thickness of 500 μm is used as the fixed structure 4, and the fixed structure 4 is the second substrate. The fixed structure 4 is ultrasonically cleaned by acetone solution and deionized water respectively, and blown dry by nitrogen to remove surface dirt;

[0063] S7, see Figure 7 , depositing a lower Bragg reflector 5 on the upper surface of the fixed structure 4, wherein the structure, material and deposition process of the lower Bragg reflector 5 are the same as those of the upper Bragg reflector 2 in step S2, and the thickness thereof is 1.2 μm. At the same time, a 700 nm thick silicon dioxide antireflection structure 6 is grown on the back of the fixed structure 4 by plasma enhanced chemical vapor deposition;

[0064] As shown in the figure, the lower Bragg reflector 5 is specifically formed by stacking a first layer of high refractive index material II5A, a low refractive index material II5B and a second layer of high refractive index material II5C.

[0065] S8, see Figure 8 , coating 3 μm thick AZ5214 photoresist on the upper surface of the lower Bragg reflector 5, and performing photolithography, depositing 200 nm gold as the bottom electrode 7 by magnetron sputtering, the deposition rate is 0.2 nm / s, the deposition time is 30 min, and the photoresist is stripped in an acetone organic solution by a stripping process to complete the preparation of the bottom electrode 7;

[0066] S9, see Fig. 9 , using plasma enhanced chemical vapor deposition to grow silicon dioxide as the bonding layer 8, the thickness of which is 1.8 μm;

[0067] S10, see Fig.10 , coating AZ5214 photoresist with a thickness of 3 μm on the upper surface of the bonding layer 8, and performing photolithography, depositing a gold-tin alloy with a thickness of 1 μm as the second bonding metal 9 by thermal evaporation, and stripping the photoresist in an acetone organic solution by a stripping process to complete the preparation of the second bonding metal 9;

[0068] S11, see Fig.11 , the silicon dioxide bonding layer 8 is patterned by combining advanced oxide etching and reactive ion etching to expose the bottom electrode 7. The etching rates of the two methods are 350nm / min and 60-80nm / min, respectively, and the etching time is 5min10s and 3min, respectively, to form a cavity structure; finally, the second substrate is cleaned by acetone and ethanol organic solutions;

[0069] S12, dicing the first substrate and the second substrate into a plurality of individual chips by using a wafer cutting technology;

[0070] S13, see Fig.12 , stagger bonding the first substrate and the second substrate after dicing, heating and pressing at a temperature of 300° C., a pressure of 6 kg, and a time of 10 minutes to complete eutectic bonding of the gold-tin alloy;

[0071] S14, see Fig.13 , the bonded bare chip is attached to the PCB driving circuit board 10, and the top electrode 3 and the bottom electrode 7 are led out through the lead 11, thereby completing the preparation of the electrostatically driven MEMS Fabry-Perot filter.

[0072] Example 2

[0073] This embodiment is formed on the basis of the embodiment 1, using the SOI wafer 1 as the first substrate, and using its top silicon 1A as the driving structure of the MEMS Fabry-Perot filter, the thickness of the cantilever and its mechanical properties can be accurately adjusted, and the silicon dioxide insulating layer 1B of the SOI wafer 1 can also be used as a stop layer to avoid over-etching, further improving the manufacturing yield of the filter. The specific method steps are:

[0074] S101, polishing the upper and lower surfaces of the prepared SOI wafer 1, ultrasonically cleaning it with acetone solution and deionized water respectively, and blowing it dry with nitrogen to remove surface dirt. The material parameters of the SOI wafer 1 are: 5μm top silicon 1A, 1μm silicon dioxide insulation layer 1B, 450μm bottom silicon 1C substrate. The subsequent drive structure preparation is all processed on the first substrate of the SOI wafer 1.

[0075] Example 3

[0076] This embodiment is formed on the basis of the embodiment 1. When etching the bonding layer 8 and the silicon dioxide insulating layer 1B of the SOI wafer 1, an etching method combining advanced oxide etching and reactive ion etching is adopted, which combines isotropy and anisotropy to effectively improve the sidewall morphology of the bonding layer 8 and the silicon dioxide insulating layer 1B, and reduce the surface roughness of the Bragg reflector under the lower surface of the bonding layer 8, thereby further improving the optical performance of the device. Since both steps adopt the combined etching method, the specific method steps are unified as follows:

[0077] S501, coating AZ4620 photoresist on the upper surface to be etched, the speed of the photoresist is 4000rad / min-30s, the thickness of the photoresist is 6.7μm, the exposure mode is HARD, the exposure time is 14.5s, the developer is TMAH, and the time is 90s. Then, in dry etching, firstly, advanced oxide etching is used, a heat-conducting medium is coated on the back of the fixed structure and pasted on the etching tray, the substrate temperature is set to 15°C, the ICP power is 2000W, the RF power is 300W, the etching gas introduced is SF6, O2 and H2, the etching rate is 350nm / min, the etching time is 2min30s, this etching method uses chemically active plasma for chemical reaction etching, and the etching rate is fast.

[0078] S502, then adopt reactive ion etching with a slower etching rate, set the RF power to 300W, and introduce etching gases such as SF6, CHF3, O2 and He. Since reactive ion etching realizes etching through chemical reaction and physical energy band ion bombardment, the rate is slower, and the residual substances after advanced oxide etching can be more effectively removed, the roughness of the lower surface is reduced, and the optical performance of the device is improved.

[0079] Example 4

[0080] This embodiment is formed on the basis of the embodiment 1, by staggering the driving structure and the fixed structure 4, leaving a certain linear offset stagger when patterning the bonding metal, using gold-tin eutectic bonding, solving the problem of leading out the top electrode 3 and the bottom electrode 7, and reducing the cost and uncertainty of processing. The specific method steps are:

[0081] like Fig.12 As shown, first, specific alignment marks are designed on the bonding surfaces of the first substrate and the second substrate, and then the wafer is diced in step S12 to obtain several separated upper wafers and lower wafers. Due to the special alignment mark design, the area of ​​the separated upper wafer is smaller than that of the lower wafer, and the upper wafer and the lower wafer are staggered bonded using the eutectic gold-tin bonding process to expose the second bonding metal 9 of the device. Because the second bonding metal 9 is connected to the top electrode 3, the top electrode 3 is then led out. In step S11, the silicon dioxide bonding layer 8 is patterned to expose the top electrode 3, so that the top electrode 3 is led out.

[0082] The staggered bonding technology utilizes a special scribing method and patterning to overcome the traditional bulk processing technology that uses etching through holes to lead out electrodes, reducing the risks in the process preparation process and improving the overall stability of the device.

[0083] Although the embodiments of the present application have been shown and described above, the scope of protection of the present invention is not limited thereto, and any changes or substitutions that are not conceivable through creative work should be included in the scope of protection of the present invention; unless explicitly stated, any elements, actions or instructions used in this document should not be interpreted as critical or necessary.

Claims

1. A method for preparing an electrostatically driven MEMS Fabry-Perot filter, characterized in that: The following steps are involved: S1, performing water bath ultrasonic cleaning and drying on the SOI wafer, the SOI wafer serving as the first substrate, the SOI wafer having a top silicon layer, a silicon dioxide insulating layer and a bottom silicon layer; S2, sequentially preparing an upper Bragg reflector and a top electrode on the upper surface of the top silicon layer, and patterning them, with the top electrode serving as a first bonding metal structure; S3, etching through the top silicon to form a driving structure, protecting the front side of the top silicon by applying wax, and etching from the back side of the bottom silicon until the driving structure is exposed; S4, using a fixed structure as the second substrate, performing water bath ultrasonic cleaning and drying; S5, depositing a lower Bragg reflector, a bottom electrode, a bonding layer, and a second bonding metal on the upper surface of the fixed structure in sequence and patterning them, and depositing an anti-reflection structure on the back of the fixed structure at the same time; S6, dicing the wafer where the first substrate is located and the wafer where the second substrate is located according to predetermined alignment marks by using a wafer cutting technology to separate them into a plurality of upper wafers and lower wafers, and performing staggered bonding on the upper wafer and the lower wafer by using a eutectic gold-tin staggered bonding process; S7. Attach the bonded bare chip to the PCB driver circuit board, lead out the top electrode and the bottom electrode through wire bonding, and complete the preparation of the MEMS Fabry-Perot filter.

2. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 1, characterized in that: The upper Bragg reflector and the lower Bragg reflector are both formed by stacking a first layer of high refractive index material, a low refractive index material and a second layer of high refractive index material.

3. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 2, characterized in that: When the working band is the mid-infrared band, the first layer of high refractive index material or the second layer of high refractive index material in the upper Bragg reflector and the lower Bragg reflector is made of any one of germanium, silicon, gallium arsenide and indium phosphide or any combination thereof.

4. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 2, characterized in that: When the working band is the mid-infrared band, the low refractive index material or the second layer of low refractive index material in the upper Bragg reflector and the lower Bragg reflector is any one of silicon dioxide, magnesium fluoride, germanium sulfide and aluminum oxide or any combination thereof.

5. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 1, characterized in that: The specific etching step of the bottom silicon in step S3 includes deep silicon etching of the bottom silicon and dry combined etching of the silicon dioxide insulating layer.

6. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 5, characterized in that: The etching process of the bonding layer and the silicon dioxide insulating layer of the SOI wafer adopts dry etching combining advanced oxide etching and reactive ion etching.

7. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 6, characterized in that: The specific steps of scribing according to the predetermined alignment mark in step S6 include: Use nitrogen to remove dirt from the surface of the driving structure and the fixed structure, and stick their bare chips on the blue film; Cutting is performed according to the alignment marks and the plates are cleaned and cooled by deionized water.

8. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 7, characterized in that: The specific steps of the gold-tin dislocation bonding process in step S6 include: Pre-treating the diced die with nitrogen and oxygen plasma; The two are aligned according to the alignment marks, and the driving structure and the fixed structure are respectively adsorbed by vacuum and placed in an inert gas environment, so that the first bonding metal and the second bonding metal are mutually soluble, and nitrogen is introduced for cooling to complete the bonding.

9. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 8, characterized in that: The first layer of high refractive index material and the second layer of high refractive index material are both germanium; The low refractive index material and the second layer of low refractive index material are both silicon dioxide.

10. The method for preparing an electrostatically driven MEMS Fabry-Perot filter according to claim 9, characterized in that: The material of the top electrode is gold-tin alloy; The material of the bottom electrode is gold; The material of the bonding layer is silicon dioxide; The material of the second bonding metal is gold-tin alloy.

Citation Information

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  • Adjustable infrared optical filter device

    US20230194853A1

  • Tunable optical filter device

    US20230341743A1

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