Polishing process for improving local flatness of silicon wafer

Abstract

The invention relates to a polishing process for improving local flatness of a silicon wafer, which belongs to the technical field of semiconductor manufacturing, and comprises the following operation steps of: 1, pretreating the silicon wafer, cleaning the silicon wafer, activating the surface of the silicon wafer, removing surface impurities and an oxide layer, and preparing for subsequent polishing; secondly, partition parameter setting is conducted, the wafer is scanned, the surface of the wafer is divided into a plurality of different areas, and independent polishing parameters are set for each area according to the material characteristics, the thickness and the preset flatness target of each area; and thirdly, dynamic polishing is conducted, specifically, multi-axis linkage polishing equipment is adopted, and the movement tracks and working parameters of the polishing head in different areas are dynamically adjusted in real time according to preset partition parameters. Through silicon wafer pretreatment, partition parameter setting and dynamic polishing process monitoring and feedback adjustment mechanisms, polishing process parameters can be accurately controlled, deviation in the polishing process can be corrected in time, and stability and consistency of polishing quality are ensured.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and more specifically to a polishing process for improving the local flatness of silicon wafers. Background Technology

[0002] In semiconductor manufacturing, the polishing process of semiconductor silicon wafers plays a crucial role in device performance and production yield. As chip integration continues to increase, the requirements for local flatness of the wafer surface become increasingly stringent. Traditional polishing processes, when processing eight-inch single-crystal silicon wafers, struggle to effectively ensure uniform material removal across different areas of the wafer surface, resulting in local flatness that fails to meet the ever-growing demands of high-precision manufacturing.

[0003] In advanced integrated circuit manufacturing, the flatness of the silicon wafer surface directly affects photolithography accuracy and device performance. Traditional CMP processes typically use globally uniform polishing parameters, which are insufficient to address the local flatness differences caused by uneven material thickness and stress distribution in different areas of the silicon wafer.

[0004] Current common polishing methods, such as chemical mechanical polishing, can achieve a certain degree of planarization, but they have the following problems when dealing with the high precision requirements of large silicon wafers: 1. Polishing parameters are difficult to accurately adapt: ​​Traditional processes usually use fixed polishing parameters, which cannot be dynamically adjusted according to the actual needs of different areas of the silicon wafer, resulting in some areas being over-polished while others are under-polished.

[0005] 2. Uneven distribution of polishing slurry: During the polishing process, it is difficult to ensure that the polishing slurry is distributed evenly on the wafer surface, which affects the synergistic effect of chemical etching and mechanical polishing, and thus affects the local flatness.

[0006] 3. Lack of real-time monitoring and feedback mechanism: Existing technology cannot monitor changes in local flatness in real time and adjust polishing process parameters in a timely manner based on monitoring results, resulting in a certain degree of blindness in the polishing process. Summary of the Invention

[0007] This invention addresses the shortcomings of existing technologies by providing a polishing process to improve the local flatness of silicon wafers. Through silicon wafer pretreatment, partition parameter setting, and dynamic polishing process monitoring and feedback adjustment mechanism, it can accurately control polishing process parameters, correct deviations in the polishing process in a timely manner, and ensure the stability and consistency of polishing quality.

[0008] The above-mentioned technical problems of the present invention are mainly solved by the following technical solutions: A polishing process for improving local flatness of silicon wafers includes the following steps: Step 1: Silicon wafer pretreatment. The silicon wafer is cleaned and surface activated to remove surface impurities and oxide layers, preparing it for subsequent polishing.

[0009] Step 2: Setting the zoning parameters. Using a high-precision wafer surface inspection device, the wafer is scanned and the wafer surface is divided into multiple different regions. Based on the material properties, thickness, and preset flatness target of each region, independent polishing parameters are set for each region, including polishing pressure, polishing head speed, polishing fluid flow rate, and chemical reagent concentration.

[0010] Step 3: Dynamic polishing process. During the polishing process, a multi-axis linkage polishing device is used to dynamically adjust the movement trajectory and working parameters of the polishing head in different areas in real time according to the preset partition parameters.

[0011] Preferably, during pretreatment, the silicon wafer is ultrasonically cleaned in a cleaning solution for 5-10 minutes, then rinsed with deionized water, and then soaked in an activator for 5-10 minutes.

[0012] Ultrasonic cleaning can effectively remove particulate contaminants, deionized water rinsing can avoid ion residue, and surface activation (usually using dilute hydrofluoric acid to remove the native oxide layer) can ensure consistent surface activity of silicon wafers.

[0013] Cleaning solution: Standard SC-1 (NH4OH / H2O2 / H2O) and SC-2 (HCl / H2O2 / H2O) cleaning solutions or commercially available specialized cleaning agents can be used.

[0014] Activator: Usually a very low concentration of hydrofluoric acid (such as 0.5% HF) is used to remove the native oxide layer (SiO2) on the surface of the silicon wafer, exposing the fresh silicon surface.

[0015] As a preferred option, for areas with thicker material, the polishing pressure and polishing fluid flow rate should be appropriately increased; for critical areas with extremely high flatness requirements, the polishing head speed and chemical reagent concentration should be precisely controlled.

[0016] As a preferred option, based on the material characteristics and thickness test results of each region, the area is divided into three zones: The central zone is set with a polishing pressure of 20–25 N, a polishing head speed of 150–180 rpm, a polishing fluid flow rate of 8–10 L / min, and a chemical reagent concentration of 5%–7%. The annular zone is set with a polishing pressure of 25–30 N, a polishing head speed of 180–200 rpm, a polishing fluid flow rate of 10–12 L / min, and a chemical reagent concentration of 7%–9%. The edge zone is set with a polishing pressure of 30–35 N, a polishing head speed of 200–220 rpm, a polishing fluid flow rate of 12–15 L / min, and a chemical reagent concentration of 9%–11%.

[0017] The three-zone model is a good starting point, but for the most advanced processes (such as 5nm and below), more refined partitioning may be needed, such as 5 zones, 7 zones, or even more. The partitioning should be based on actual surface scans (such as thickness maps) and automatically generated by algorithms, rather than fixed geometries.

[0018] Abrupt changes in parameters at region boundaries should be avoided. Advanced equipment should be able to achieve gradual or interpolated parameter control, meaning that the operating parameters transition continuously and smoothly as the polishing head moves from one region to another to eliminate boundary effects.

[0019] Parameter setting should not be based solely on the simple principle of "thicker surfaces require more polishing." Instead, a comprehensive physical model should be established, incorporating the Preston equation, fluid dynamics, and chemical reaction kinetics. Given an initial wafer planarity diagram, the model can predict the final planarity under different parameter combinations and, through an iterative optimization algorithm, find a set of optimal parameters that achieve the target flatness fastest.

[0020] Preferably, a polishing slurry supply system is used to ensure that the polishing slurry is evenly distributed in all areas of the wafer surface. Microfluidic technology is used to precisely control the flow rate and spray position of the polishing slurry according to the needs of different areas.

[0021] The present invention can achieve the following effects: This invention provides a polishing process to improve the local flatness of silicon wafers. Compared with the prior art, through silicon wafer pretreatment, partition parameter setting, and dynamic polishing process monitoring and feedback adjustment mechanism, the polishing process parameters can be precisely controlled, deviations in the polishing process can be corrected in a timely manner, and the stability and consistency of polishing quality can be ensured.

[0022] Precision and Customization: The core idea is "regional governance," which abandons the "one-size-fits-all" parameter settings in traditional CMP. By identifying the characteristics (thickness, material) of different regions of the wafer and setting differentiated polishing parameters, it achieves precise control over the polishing process. This is the key to solving the problem of local flatness.

[0023] Data-driven: The process begins with high-precision surface inspection, and all parameter settings are not based on experience but on actual measurement data. This greatly improves the stability and repeatability of the process, reflecting intelligent manufacturing.

[0024] Dynamic real-time control: The "multi-axis linkage," "real-time dynamic adjustment," and "microfluidic technology" mentioned in the solution elevate the polishing process from a static, preset mode to a dynamic, closed-loop control mode. This enables the equipment to respond to minute changes that may occur during the polishing process, further ensuring the accuracy of the final result.

[0025] It has a strong systematic nature: from "preprocessing" to ensure the consistency of the initial state, to "partition parameter setting" to formulate the operation blueprint, and then to "dynamic polishing process" to execute precision strikes, it forms a complete process chain. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the silicon wafer structure of the present invention.

[0027] In the diagram: central area 1, annular area 2, and edge area 3. Detailed Implementation

[0028] The technical solution of the invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings.

[0029] Example: Figure 1 As shown, a polishing process for improving the local flatness of silicon wafers includes the following steps: Step 1: Silicon wafer pretreatment. The silicon wafer is cleaned and surface activated to remove surface impurities and oxide layers, preparing it for subsequent polishing.

[0030] Place the silicon wafer in the cleaning solution and ultrasonically clean it for 5-10 minutes, then rinse it with deionized water, and then soak it in the activator for 5-10 minutes.

[0031] The purpose is clear: the cleaning and activation are aimed at obtaining a clean, chemically homogeneous starting surface, which is crucial for the uniformity of subsequent polishing.

[0032] After pretreatment, it is recommended to conduct random checks on the cleanliness of the silicon wafers using surface inspection equipment (such as particle counters and surface tension testers) to ensure that the pretreatment effect meets the standards.

[0033] Step 2: Setting the zoning parameters. Using a high-precision wafer surface inspection device, the wafer is scanned and the wafer surface is divided into multiple different regions. Based on the material properties, thickness, and preset flatness target of each region, independent polishing parameters are set for each region, including polishing pressure, polishing head speed, polishing fluid flow rate, and chemical reagent concentration.

[0034] For areas with thicker material, increase the polishing pressure and polishing fluid flow rate appropriately; for critical areas with extremely high flatness requirements, precisely control the polishing head speed and chemical reagent concentration.

[0035] Based on the material properties and thickness test results of each region, it is divided into three regions: the central region (1) with a polishing pressure of 20-25N, a polishing head speed of 150-180rpm, a polishing fluid flow rate of 8-10L / min, and a chemical reagent concentration of 5%-7%; the annular region (2) with a polishing pressure of 25-30N, a polishing head speed of 180-200rpm, a polishing fluid flow rate of 10-12L / min, and a chemical reagent concentration of 7%-9%; and the edge region (3) with a polishing pressure of 30-35N, a polishing head speed of 200-220rpm, a polishing fluid flow rate of 12-15L / min, and a chemical reagent concentration of 9%-11%.

[0036] Due to the deformation of the polishing pad and the centrifugal force, the actual contact pressure in the edge area is often lower than that in the center. This effect can be compensated by increasing the set pressure, so that the edge removal rate can keep up with that in the center.

[0037] The rotational speed increases from the center to the edge. A higher rotational speed means a higher relative linear velocity between the polishing pad and the silicon wafer surface. According to the Preston equation (removal rate ∝ pressure × relative velocity), this can effectively improve the material removal rate in the edge area.

[0038] The polishing slurry flow rate increases from the center to the edge. At the edge, due to centrifugal force, the polishing slurry is more easily thrown away, leading to insufficient supply. Increasing the flow rate ensures that there is enough polishing slurry at the edge to participate in the chemical reaction and mechanical friction, maintaining a stable removal rate.

[0039] The chemical reagent concentration increases from the center to the edge to compensate for the potentially lower chemical reaction rate in the edge areas. Higher concentrations of oxidants (such as H2O2) or other active ingredients can accelerate the chemical reaction in the edge areas, thereby improving the overall removal rate.

[0040] Step 3: Dynamic polishing process. During the polishing process, a multi-axis linkage polishing device is used to dynamically adjust the movement trajectory and working parameters of the polishing head in different areas in real time according to the preset partition parameters.

[0041] The polishing slurry supply system ensures that the polishing slurry is evenly distributed across all areas of the wafer surface. Microfluidic technology is used to precisely control the flow rate and spray position of the polishing slurry according to the needs of different areas.

[0042] Multi-axis linkage refers to the polishing head not only rotating and pressing down, but also performing complex, non-rotational movements in the X and Y planes. This allows the polishing head to "access" specific areas of the wafer "on demand" and apply preset parameters, which is the basis for achieving zoned polishing.

[0043] Microfluidic technology is key to ensuring the uniformity of the chemical environment. Traditional "spray-style" fluid supply cannot precisely control the composition and flow rate of the polishing slurry in localized areas. Microfluidic technology, through an array of micro-nozzles, works like a printer to "spray" polishing slurry with different compositions and flow rates at different locations on the wafer surface "on demand," achieving localized customization of the chemical environment.

[0044] Integrate in-situ monitoring sensors into polishing equipment, such as: Optical interferometer: Real-time monitoring of film thickness changes in specific areas of a wafer.

[0045] Motor current / torque sensor: Monitors the friction of the polishing head, indirectly reflecting changes in the removal rate. This real-time data can be fed back to the control system, compared with preset target values, and then the polishing parameters (such as pressure and speed) are dynamically fine-tuned, forming a "monitoring-comparison-adjustment" closed loop. This helps to cope with disturbances in the process of polishing pad wear and polishing fluid aging, achieving higher precision.

[0046] The specific process is as follows: Silicon wafer: 300mm p-type silicon wafer, initial thickness difference ±3μm; Pretreatment: Ultrasonic cleaning (SC1 solution, 8 minutes) → Rinse with deionized water → Activation (0.5% HF, 6 minutes).

[0047] Zone detection: White light interferometer scanning, divided into center (diameter 0-100mm), ring (100-140mm), and edge (140-150mm).

[0048] Polishing parameters: For the central region 1, the polishing pressure is set to 22 N, the polishing head speed to 160 rpm, the polishing slurry flow rate to 9 L / min, and the chemical reagent concentration to 6%. For the annular region 2, the polishing pressure is set to 27 N, the polishing head speed to 190 rpm, the polishing slurry flow rate to 11 L / min, and the chemical reagent concentration to 8%. For the edge region 3, the polishing pressure is set to 32 N, the polishing head speed to 210 rpm, the polishing slurry flow rate to 13.5 L / min, and the chemical reagent concentration to 10%.

[0049] For high-stress silicon wafers, the pressure in the edge region is increased to 35N, the flow rate is 15L / min, and other parameters are the same as in Example 1, resulting in a flatness improvement rate of 60%.

[0050] Dynamic control: The polishing head moves in a spiral trajectory, and the microfluidic system adjusts the amount of polishing fluid sprayed in real time according to the area.

[0051] Results: After polishing, the local flatness (SFQR) was <0.1μm, and the critical region Ra=0.18nm.

[0052] In summary, this polishing process for improving local flatness of silicon wafers, through silicon wafer pretreatment, zoning parameter setting, and a dynamic polishing process monitoring and feedback adjustment mechanism, can precisely control polishing process parameters, promptly correct deviations during the polishing process, and ensure the stability and consistency of polishing quality. The average local flatness SFQR value can be reduced from 0.19 μm to 0.11 μm.

[0053] The above description is only a specific embodiment of the present invention, but the structural features of the present invention are not limited thereto. Any changes or modifications made by those skilled in the art within the scope of the present invention are covered by the patent scope of the present invention.

Claims

1. A polishing process for improving local flatness of silicon wafers, characterized in that... The following steps are included: Step 1: Silicon wafer pretreatment, which involves cleaning and surface activation of the silicon wafer to remove surface impurities and oxide layers, preparing it for subsequent polishing; Step 2: Setting the zoning parameters. Using a high-precision wafer surface inspection device, the wafer is scanned and the wafer surface is divided into multiple different regions. Based on the material properties, thickness, and preset flatness target of each region, independent polishing parameters are set for each region, including polishing pressure, polishing head speed, polishing fluid flow rate, and chemical reagent concentration. Step 3: Dynamic polishing process. During the polishing process, a multi-axis linkage polishing device is used to dynamically adjust the movement trajectory and working parameters of the polishing head in different areas in real time according to the preset partition parameters.

2. The polishing process for improving local flatness of silicon wafers according to claim 1, characterized in that: During pretreatment, the silicon wafer is ultrasonically cleaned in the cleaning solution for 5-10 minutes, then rinsed with deionized water, and then soaked in the activator for 5-10 minutes.

3. The polishing process for improving local flatness of silicon wafers according to claim 1, characterized in that: For areas with thicker material, increase the polishing pressure and polishing fluid flow rate appropriately; for critical areas with extremely high flatness requirements, precisely control the polishing head speed and chemical reagent concentration.

4. The polishing process for improving local flatness of silicon wafers according to claim 3, characterized in that: Based on the material properties and thickness test results of each region, it is divided into three regions: the central region (1) with a polishing pressure of 20-25N, a polishing head speed of 150-180rpm, a polishing fluid flow rate of 8-10L / min, and a chemical reagent concentration of 5%-7%; the annular region (2) with a polishing pressure of 25-30N, a polishing head speed of 180-200rpm, a polishing fluid flow rate of 10-12L / min, and a chemical reagent concentration of 7%-9%; and the edge region (3) with a polishing pressure of 30-35N, a polishing head speed of 200-220rpm, a polishing fluid flow rate of 12-15L / min, and a chemical reagent concentration of 9%-11%.

5. The polishing process for improving local flatness of silicon wafers according to claim 1, characterized in that: The polishing slurry supply system ensures that the polishing slurry is evenly distributed across all areas of the wafer surface. Microfluidic technology is used to precisely control the flow rate and spray position of the polishing slurry according to the needs of different areas.

6. The polishing process for improving local flatness of silicon wafers according to claim 5, characterized in that: Microfluidic technology uses arrayed micro-nozzles, much like a printer, to "spray" polishing fluids of different compositions and flow rates at different locations on the wafer surface "on demand," achieving localized customization of the chemical environment.

7. The polishing process for improving local flatness of silicon wafers according to claim 1, characterized in that: Multi-axis linkage refers to the polishing head not only rotating and pressing down, but also performing complex, non-rotational movements in the X and Y planes.

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