Resistance temperature sensor and test method, measurement method, power switching system

Abstract

The application provides a resistance temperature sensor and a test method and a measurement method and a power switch system, which comprises a Wheatstone bridge, a driving stage circuit comprising a first driving circuit and a second driving circuit, two excitation ends connected to the Wheatstone bridge respectively, an analog-to-digital converter with a first input end and a second input end connected to two output voltage ends of the Wheatstone bridge respectively, one output end serving as an output end of the temperature sensor, a driving controller with an output end connected to the first driving circuit and the second driving circuit respectively and also connected to the analog-to-digital converter, and a sampling period comprising two measurement stages in sequence, the first driving circuit enabled in the first measurement stage and the second driving circuit enabled in the second measurement stage. The analog-to-digital converter is used to execute its working time sequence in sequence in a sampling period, quantize two measurement results respectively, and subtract the two quantization results to obtain an output result. The technical scheme of the application adopts correlated double sampling, and improves the precision of the measurement result.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of temperature sensors, in particular to a resistance temperature sensor, a testing method and a measuring method, and a power switch system. BACKGROUND

[0002] In recent years, with the gradual miniaturization and intelligentization of electronic equipment and the background of chip localization, stable, small, low-cost and easy-to-drive intelligent power switch chips are widely used in automotive electronics, aerospace, consumer electronics and military electronics. In the above-mentioned fields, the chip often works under the conditions of wide working temperature range and large current, so the temperature detection of the chip is indispensable. For the temperature sensor used for temperature detection, accuracy, power consumption, area and resolution are important indicators when designing.

[0003] The existing temperature sensors mainly have the following three types: 1. BJT-based temperature sensor, which uses the temperature-proportional Δ VBE to reflect the change of temperature; 2. MOS-based temperature sensor, which uses the temperature-negative-correlation V GS to reflect the change of temperature; 3. Thermistor-based temperature sensor, which uses the temperature-positive / negative-correlation resistance to reflect the change of temperature. The existing BJT-based temperature sensor has high temperature detection accuracy, but in order to make the BJT work in the forward amplification region, the BJT-based temperature sensor usually needs a power supply voltage greater than 1V, which is not suitable for low-power scenarios. In addition, the temperature sensitivity of the BJT-based temperature sensor is low, and it is sensitive to noise and bias voltage. The existing MOS-based temperature sensor has good temperature characteristics, but the drain current of the MOS tube is very large at high temperature, which will seriously affect the temperature measurement accuracy, and is not suitable for high-temperature scenarios. The temperature coefficient of the existing thermistor-based temperature sensor is basically constant, and the efficiency is high. Considering the low-power demand of high-side power switch chips and the working temperature range of-40℃ to 150℃, a resistance temperature sensor can be selected.

[0004] Although the resistance temperature sensor has many advantages in resolution, power consumption, etc., in the traditional temperature sensing module of the resistance temperature sensor, the offset voltage and noise voltage of the ADC will be sampled by the ADC together with the output signal of the resistance module, and the output result noise is large and not accurate enough. SUMMARY

[0005] The present application provides a resistance temperature sensor and a power switch system to solve the problem of large output result noise and inaccuracy in the prior art.

[0006] To solve the above technical problems, the present application is realized by the following technical solutions:

[0007] According to a first aspect of the present application, there is provided a resistance temperature sensor, comprising:

[0008] a Wheatstone bridge;

[0009] a driving stage circuit, comprising: a first driving circuit, a second driving circuit; an output end of the first driving circuit is connected to an excitation voltage end of the Wheatstone bridge, and an output end of the second driving circuit is connected to another excitation voltage end of the Wheatstone bridge;

[0010] an analog-to-digital converter, a first input end of which is connected to an output voltage end of the Wheatstone bridge, and a second input end of which is connected to another output voltage end of the Wheatstone bridge; and an output end of the analog-to-digital converter serves as an output end of the resistance temperature sensor;

[0011] a driving controller, an input end of which is connected to a driving control signal, and output ends of which are respectively connected to input ends of the first driving circuit and the second driving circuit; and the driving controller is further connected to the analog-to-digital converter;

[0012] In a sampling period, two measurement stages, i.e. a first measurement stage and a second measurement stage, are sequentially included, the driving controller is configured to control the enabling of the first driving circuit and the second driving circuit according to the driving control signal, and specifically configured to control the first driving circuit to be enabled once in the first measurement stage and control the second driving circuit to be enabled once in the second measurement stage in a sampling period; the analog-to-digital converter is configured to receive the driving control signal and control the working timing thereof according to the driving control signal, and specifically configured to sequentially execute the working timing thereof in a sampling period, and quantize the output voltage of the Wheatstone bridge when the first driving circuit is enabled and the output voltage of the Wheatstone bridge when the second driving circuit is enabled, respectively, and subtract the two quantization results to obtain an output result.

[0013] Optionally, the enabling duration of the first driving circuit is less than the duration of the first measurement stage, and the enabling duration of the second driving circuit is less than the duration of the second measurement stage.

[0014] Optionally, the nominal values of the four bridge arm resistors are equal.

[0015] The temperature coefficients of the two adjacent bridge arm resistors in the Wheatstone bridge are opposite in polarity and equal in absolute value.

[0016] Optionally, the enabling duration of the first driving circuit and the second driving circuit is proportional to the nominal value of the bridge arm resistor.

[0017] Optionally, the analog-to-digital converter is a successive approximation analog-to-digital converter, comprising: a comparator, a successive approximation controller, a digital-to-analog quantization capacitor module;

[0018] An input end of the comparator is connected to an output voltage end of the Wheatstone bridge as a first input end of the analog-to-digital converter;

[0019] Another input end of the comparator is connected to another output voltage end of the Wheatstone bridge as a second input end of the analog-to-digital converter, and an output end of the comparator is connected to an input end of the successive approximation controller;

[0020] The driving controller is further configured to control on-off of the time-controlled switch according to the driving control signal, and specifically configured to control the time-controlled switch to be turned on in a sampling stage of the working timing, and to be turned off in a reset stage and a conversion stage of the working timing;

[0021] The digital-to-analog quantization capacitor module comprises: a first quantization capacitor unit and a second quantization capacitor unit; an upper plate of the first quantization capacitor unit is connected to an input end of the comparator, and a lower plate of the first quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch; an upper plate of the second quantization capacitor unit is connected to another input end of the comparator, and a lower plate of the second quantization capacitor unit is connected to the successive approximation controller through the bidirectional power switch;

[0022] An output end of the successive approximation controller is connected to an output end of the resistive temperature sensor, and the successive approximation controller is further connected to the driving controller.

[0023] Optionally, the working timing of the analog-to-digital converter is: a sampling stage, a reset stage and a conversion stage.

[0024] During the working timing of the analog-to-digital converter, the successive approximation controller is configured to:

[0025] In the sampling stage, when the offset error is positive, a quantization capacitor unit connected to an input end with a high level of the comparator is set as an offset error calibration code; when the offset error is negative, a quantization capacitor unit connected to an input end with a low level of the comparator is set as the offset error calibration code.

[0026] In the reset stage, the first quantization capacitor unit and the second quantization capacitor unit are set as zero codes.

[0027] In the conversion stage, the quantization capacitor unit connected to the input end with the high level of the comparator is set as a zero code, and the quantization capacitor unit connected to the input end with the low level of the comparator is set as a successive approximation code.

[0028] Wherein, the low-level input terminal of the comparator refers to the input terminal of the comparator connected to the low-level output voltage terminal of the Wheatstone resistor bridge; the high-level input terminal of the comparator refers to the input terminal of the comparator connected to the high-level output voltage terminal of the Wheatstone resistor bridge.

[0029] Optionally, the analog-to-digital converter further includes a gain error calibration module, which includes a first gain error calibration capacitor unit and a second gain error calibration capacitor unit.

[0030] One end of the first gain error calibration capacitor unit is connected to one input terminal of the comparator, and the other end is grounded;

[0031] One end of the second gain error calibration capacitor unit is connected to the other input of the comparator, and the other end is grounded.

[0032] Optionally, the first gain error calibration capacitor unit and the second gain error calibration capacitor unit each include multiple programmable gain error calibration capacitors, which are used to fine-tune the capacitance values ​​of the first gain error calibration capacitor unit and the second gain error calibration capacitor unit based on the test results when testing the resistive temperature sensor.

[0033] Optionally, the analog-to-digital converter further includes: a nonlinear error calibration module, which includes: a first nonlinear error capacitor calibration unit and a second nonlinear error capacitor calibration unit;

[0034] One end of the first nonlinear error capacitor calibration unit is connected to one input terminal of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch.

[0035] One end of the second nonlinear error capacitor calibration unit is connected to the other input terminal of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch;

[0036] During the timing process of the analog-to-digital converter:

[0037] For the nonlinear error capacitor calibration unit connected to the low-level input of the comparator, the approximation converter is used to control it to be set to zero code;

[0038] For the nonlinear error capacitor calibration unit connected to the high-level input of the comparator, the successive approximation controller controls it according to the working sequence: during the sampling phase, the nonlinear error capacitor calibration unit is set to the nonlinear error calibration code; during the reset phase and the conversion phase, the nonlinear error capacitor calibration unit is set to the zero code.

[0039] Optionally, the nonlinear error calibration code is obtained by the following method:

[0040] The relationship between nonlinear error and temperature is a parabola, and the curve on both sides of the vertex of the parabola is divided into two segments respectively.

[0041] Starting from the lowest temperature, the four curves are processed using f(x) = ax, f(x) = ax - b, and f(x) = ax - b, respectively. We will use this to fit the data and obtain the values ​​of a and b; where x represents temperature and f(x) represents nonlinear error.

[0042] The values ​​of a and b are used to convert them into a nonlinear error calibration code.

[0043] Optionally, it also includes a power gate switch connected between the drive controller and its power supply terminal, used to disconnect the connection between the drive controller and its power supply terminal after the sampling period ends.

[0044] According to a second aspect of the present invention, a test method for a resistive temperature sensor is provided, which is a test performed on the resistive temperature sensor described above.

[0045] The method includes:

[0046] The test is performed using the lowest temperature in the fitted data as the test temperature. Specifically, this includes: without adding the offset error code, using the resistive temperature sensor for testing, comparing the obtained measured temperature with the test temperature; if the measured temperature is higher than the test temperature, the offset error is determined to be positive; if the measured temperature is lower than the test temperature, the offset error is determined to be negative; based on the sign of the offset error, the offset error code is added to the corresponding quantization capacitor unit; and the offset error code is adjusted according to the deviation between the measured temperature and the test temperature to make the measured temperature as close as possible to the test temperature.

[0047] After testing with the lowest temperature in the fitted data as the test temperature, the highest temperature in the fitted data is used as the test temperature to test the resistive temperature sensor. The test temperature is then used to determine whether there is a deviation between the measured temperature and the test temperature. If not, proceed to the next step. If so, adjust the value of the gain error calibration module to make the measured temperature as close as possible to the test temperature.

[0048] After testing with the highest temperature in the fitted data as the test temperature, any value between the lowest and highest temperatures in the fitted data is used as the test temperature. It is then determined which segment of the four-segment fitted data the test temperature falls into, thereby determining whether -b should be added to the nonlinear error calibration code. Based on this, the resistive temperature sensor is tested to determine whether there is a deviation between the measured temperature and the test temperature. If not, the test ends; if so, the code corresponding to 'a' in the nonlinear error calibration code is adjusted to make the measured temperature as close as possible to the test temperature.

[0049] According to a third aspect of the present invention, a temperature measurement method is provided, which is a method for measuring temperature using the resistive temperature sensor described above;

[0050] The method includes:

[0051] The nonlinear error calibration module is controlled to be inactive, and the estimated temperature is obtained by measuring the temperature using the resistive temperature sensor.

[0052] Determine which segment of the four-segment simulation the estimated temperature falls into, and in this way determine whether -b should be added to the nonlinear error calibration code;

[0053] Based on the determined nonlinear error calibration code, the measured temperature is obtained by using the resistive temperature sensor.

[0054] According to a fourth aspect of the present invention, a power switching system is provided, comprising: a power switching chip and a resistive temperature sensor as described in any of the preceding claims;

[0055] The resistive temperature sensor is used to detect the operating temperature of the power switch chip.

[0056] The resistive temperature sensor and power switch system provided by this invention employs correlated double sampling technology. During the measurement phase, the output voltage of the Wheatstone resistor bridge, along with the offset voltage and noise voltage of the analog-to-digital converter (ADC), are sampled by the ADC. Since the interval between the two measurements is short, it can be assumed that the offset voltage and noise voltage of the ADC have not changed. Therefore, subtracting the two quantization results removes the offset voltage and noise voltage of the ADC, thus suppressing the influence of the offset voltage and noise voltage of the ADC and improving the accuracy of the measurement results. Attached Figure Description

[0057] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0058] Figure 1 This is a schematic diagram of a resistive temperature sensor according to an embodiment of the present invention;

[0059] Figure 2 This is a schematic diagram of the working timing of a resistive temperature sensor according to an embodiment of the present invention.

[0060] Figure 3 This is a schematic diagram of a bidirectional power switch according to an embodiment of the present invention;

[0061] Figures 4-5 For the present invention in Figure 2 Schematic diagram of the working principle of a digital-to-analog converter under the working sequence;

[0062] Figure 6 This is a schematic diagram of the operating timing of a resistive temperature sensor according to another embodiment of the present invention;

[0063] Figure 7 This is a schematic diagram of a resistive temperature sensor according to another embodiment of the present invention;

[0064] Figure 8 This is a schematic diagram of a resistive temperature sensor according to another embodiment of the present invention;

[0065] Figure 9 This is a schematic diagram showing the fitting of the relationship between nonlinear error and temperature in another embodiment of the present invention.

[0066] Figures 10-11 This is a schematic diagram of the working principle of a nonlinear error calibration module according to another embodiment of the present invention;

[0067] Figure 12 This is a schematic diagram of a resistive temperature sensor according to another embodiment of the present invention. Detailed Implementation

[0068] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0069] In the description of this invention, it should be understood that the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention.

[0070] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0071] In the description of this invention, "a plurality of" means multiple, such as two, three, four, etc., unless otherwise explicitly specified.

[0072] In the description of this invention, unless otherwise explicitly specified and limited, the term "connection" and other such terms should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection, an electrical connection, or a connection that allows communication between the components; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0073] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0074] In one embodiment, a resistive temperature sensor is provided; please refer to [reference needed]. Figure 1 It includes: Wheatstone resistor bridge, power gating switch, analog-to-digital converter and drive controller.

[0075] The driver stage circuit includes: a first driver circuit and a second driver circuit. The output terminal of the first driver circuit is connected to one excitation voltage terminal of the Wheatstone resistor bridge, V in the figure. + The output of the second drive circuit is connected to the other excitation voltage terminal of the Wheatstone resistor bridge, V in the figure. — .

[0076] The first driving circuit and the second driving circuit are respectively composed of an inverter and a CMOS inverter connected in sequence. The CMOS inverter is composed of a PMOS transistor and an NMOS transistor. When the input of the driving circuit is high, the upper half of the corresponding CMOS inverter is turned on and the output terminal is connected to VDD. When the input is low, the lower half is turned on and the output terminal is grounded.

[0077] The first input terminal of the analog-to-digital converter is connected to one output voltage terminal of the Wheatstone resistor bridge, V in the diagram. OP Its second input terminal is connected to the other output voltage terminal of the Wheatstone resistor bridge, V in the figure. ONOne of its output terminals serves as the output terminal of the temperature sensor, as shown in the figure, D[8,0].

[0078] The input terminal of the drive controller is connected to the drive control signal, and its output terminal is connected to the input terminal of the first drive circuit and the input terminal of the second drive circuit respectively. The drive controller is also connected to an analog-to-digital converter to realize the mutual transmission of drive signals between the two.

[0079] The sampling period includes two measurement phases: the first measurement phase and the second measurement phase. Please refer to [the documentation / reference]. Figure 2 The drive controller is used to enable the first drive circuit and the second drive circuit according to the drive control signal. Specifically, it is used to enable the first drive circuit once in the first measurement phase and the second drive circuit once in the second measurement phase within one sampling period, thereby realizing correlated double sampling.

[0080] As one implementation, the drive control signal may include: a direction signal DIR and a clock signal CLK. Within one sampling period, the direction signal switches between positive and negative once, and one clock pulse is included within one direction of the direction signal. Please refer to [further details omitted]. Figure 2 In different directions of the direction signal, clock signals CLK1 for the first driving circuit and CLK2 for the second driving circuit are generated based on the clock signal. Based on clock signal CLK1, the first driving circuit is enabled once when DIR is high as shown in the figure, at which time V... + =VDD,V _ =GND, generating a signal V out1 The second drive circuit is enabled once when DIR is low, based on the clock signal CLK2. _ =VDD,V + =GND, generates a signal -V out1 .

[0081] In different embodiments, the driving circuit may also consist of multiple inverters.

[0082] The analog-to-digital converter (ADC) receives the CLK1 and CLK2 signals from the drive controller to determine the controller's operating timing. Specifically, within one sampling period, it sequentially executes the operating timing sequence, quantizing the output voltages of the first and second drive circuits respectively—that is, quantizing the double-sampled data to obtain two quantized results D. out1 D out2 The output result is obtained by subtracting the two quantization results.

[0083] The specific timing sequence of the analog-to-digital converter (ADC) is as follows: In the first measurement phase, when the CLK1 signal changes from high to low, the ADC transitions from the sampling phase to the subsequent phase. Figure 2 The process first transitions to the reset phase (implemented by the Reset signal in the diagram), and then to the conversion phase (implemented by the Conv signal in the diagram).

[0084] The drive controller also receives drive signals from the digital-to-analog converter. Its CLK1 and CLK2 signals are also constrained by the drive signals of the analog-to-digital converter (e.g., conv). For example, the start of the second measurement stage CLK2 is also controlled by the conv signal. That is, the second measurement stage sampling will begin after the analog-to-digital converter has completed the conversion of the data sampled in the first measurement stage.

[0085] The resistive temperature sensor provided in the above embodiment employs correlated double sampling technology. During the measurement phase, the output voltage of the Wheatstone resistor bridge, along with the offset voltage and noise voltage of the analog-to-digital converter (ADC), are sampled by the ADC. Since the interval between the two measurements is short, it can be assumed that the offset voltage and noise voltage of the ADC have not changed. Therefore, subtracting the two quantization results removes the offset voltage and noise voltage of the ADC, thus suppressing the influence of the offset voltage and noise voltage of the ADC and obtaining a more accurate output result.

[0086] In one embodiment, please continue to refer to Figure 2 Within one direction of the direction signal DIR, the pulse width of the clock signal CLK is less than the width of the direction signal. During the remaining time of that direction signal, the ADC is reset and converted. That is, the inputs of the first and second driving circuits are high except when enabled, and low at other times, where V+ = V- = 0V. Therefore, the Wheatstone resistor bridge only operates when the first and second driving circuits are enabled, and does not operate at other times, significantly reducing system power consumption. In contrast, in existing technologies, V+ is typically directly connected to VDD, and V- is directly grounded, with the resistor constantly operating, resulting in significant static losses.

[0087] The following is a brief introduction to the principle of the Wheatstone bridge resistor. Let R... N1 / 2 R P1 / 2 The nominal values ​​of the four bridge arm resistors are R1 to R4, and their first-order temperature coefficients are α1 and α2, respectively. The expression for the output voltage of the resistor bridge is shown in equation (1):

[0088]

[0089] To facilitate quantization by the analog-to-digital converter, in one embodiment, the nominal values ​​of the four bridge arm resistors are set to be the same, i.e., R1 = R2 = R3 = R4 = R, and the temperature coefficients of adjacent bridge arm resistors are opposite and have the same absolute value, i.e., α1 = -α2; then equation (1) can be simplified to:

[0090] 2 out =V OP -V ON =α2·ΔT·(V + -V - (2)

[0091] As can be seen, the output voltage has a linear relationship with temperature change, which facilitates quantization by the analog-to-digital converter.

[0092] In practical applications, in order to make the nominal values ​​of the four bridge arm resistors as equal as possible, all four bridge arm resistors can be set as adjustable resistors, and the nominal values ​​can be made equal by fine adjustment.

[0093] In one embodiment, the enable duration of the first driving circuit and the second driving circuit is proportional to R, i.e., t on = k·R, then the energy loss expression of the resistor bridge in a single measurement phase can be simplified as shown in equation (3):

[0094]

[0095] The first term represents the energy consumed by the resistors in the resistance bridge, and the second term represents the energy supplied to C. p Energy consumed during charging, C p Refers to parasitic capacitance, please refer to Figure 1 In reality, this does not exist. As can be seen from equation (3), when the enable duration of the driving circuit is proportional to R, the energy consumed by the resistor bridge is independent of R. Therefore, when selecting a resistor, a small resistance value can be selected, which reduces the occupied area and parasitics, further reducing the system power consumption. In existing resistive sensors, the system power consumption is related to the resistance value of the temperature sensing resistor. In order to reduce the system power consumption, a larger resistance value of the temperature sensing resistor is usually required, but this also means that a larger area needs to be occupied. A trade-off between power consumption and area is required.

[0096] In one embodiment, the analog-to-digital converter employs a successive approximation analog-to-digital converter, specifically including: a comparator, a successive approximation controller (SAR controller), and a digital-to-analog quantization capacitor module C. DAC One input terminal of the comparator serves as the first input terminal of the analog-to-digital converter, and is connected to the output voltage terminal V of the Wheatstone resistor bridge via a time-controlled switch M5. OP The other input terminal of the comparator serves as the second input terminal of the analog-to-digital converter, and is connected to the other output voltage terminal V of the Wheatstone resistor bridge via a time-controlled switch M6. ON The output of the comparator is connected to one of the inputs of the SAR controller.

[0097] The drive controller is also used to control the on / off state of the time control switch according to the clock signal. Specifically, during the sampling phase of the working timing, it controls the time control switch to be turned on to receive the output voltage of the Wheatstone resistor bridge. During the reset and conversion phase of the working timing, it controls the time control switch to be turned off to disconnect the connection with the Wheatstone resistor bridge.

[0098] The connection between the analog-to-digital converter and the drive controller is achieved through the SAR controller connecting to the drive controller.

[0099] Due to the use of correlated double sampling technology, the digital-to-analog (DAC) quantization capacitor module C DAC It consists of two parts: the first quantization capacitor unit C DAC1 Second quantization capacitor unit C DAC2 First quantization capacitor unit C DAC1 The upper plate is connected to one input terminal of the comparator, and the first quantization capacitor unit C DAC1 The lower electrode plate is connected to the SAR controller via a bidirectional power switch (BPS). The second quantization capacitor unit C... DAC2 The upper plate is connected to the other input terminal of the comparator, and the second quantization capacitor unit C DAC2 The lower electrode plate is connected to the SAR controller via a bidirectional power switch (BPS). Please refer to [reference needed]. Figure 3 The bidirectional power switch has one end connected to power supply VDD and the other end connected to ground GND. SAR control is achieved by controlling the bidirectional power switch to control the digital-to-analog quantization capacitor module C. DAC When the SAR gives a set code of 1, the corresponding bidirectional power switch is connected to the power supply; when the SAR gives a set code of 0, the corresponding bidirectional power switch is grounded.

[0100] In this embodiment, at each analog-to-digital conversion stage, the analog-to-digital quantization capacitor module C, which is connected to the end of the Wheatstone resistor bridge with the lower output voltage, is used. DAC Perform the operation, such as Figure 1 When the first drive circuit is enabled, V OP >V ON Then for V ON The connected second quantization capacitor unit C DAC2 Performing digital-to-analog conversion, the first quantization capacitor unit C DAC1 No digital-to-analog conversion is performed; the code is set to zero (D). zero Please refer to Figure 2 When the second drive circuit is enabled, V ON >V OP Then for V OP The first quantization capacitor unit C connected DAC1 Performing digital-to-analog conversion, the second quantization capacitor unit C DAC2 No digital-to-analog conversion is performed; the bit is set to zero (D). zero .

[0101] First quantization capacitor unit C DAC1 Second quantization capacitor unit C DAC2 Each includes multiple parallel quantization capacitors, such as 9-bit capacitors. The higher the number of bits, the more accurate the quantization. The multiple quantization capacitors are connected to the SAR controller through BPS.

[0102] In practical applications, resistors are quite sensitive to mismatch and process angle deviations, and the actual output voltage of the resistor bridge will not be as ideal as shown in the expression. Considering the relative error of the bridge arm resistors R1 to R4 as e1 to e4, and ignoring higher-order terms, the expression for the output voltage is as shown in equation (4):

[0103]

[0104] Among them, off whb The misalignment error is a constant term, and its expression is shown in equation (5); Gainerr whb The gain error is a first-order function of temperature, and its expression is shown in equation (6):

[0105]

[0106] Furthermore, regarding the assumption given above that the nominal values ​​of the four bridge arm resistors are equal, and that the temperature coefficients of adjacent bridge arm resistors are opposite and have the same absolute value, in practical applications, it is easy to make the nominal values ​​of the four resistors equal by fine-tuning the bridge arm resistors of the Wheatstone resistor bridge. However, the relationship α1 = -α2 is difficult to satisfy. Simplifying equation (1) yields equation (8):

[0107]

[0108] If (α2+α1)ΔT << 2, then equation (8) can be further simplified to equation (9):

[0109]

[0110] The above equation shows that the second-order distortion caused by the temperature coefficient is the main source of nonlinear error.

[0111] In summary, the main errors of the resistor bridge are offset error, gain error, and nonlinearity error. These errors can be compensated by adjusting the ADC. The compensation of these three errors is described below with reference to specific embodiments.

[0112] In one embodiment, offset error calibration is achieved by changing the operating timing of the ADC. Please refer to [reference needed]. Figures 4-5 , Figure 4 This is a schematic diagram illustrating the working principle of the sampling phase. Figure 5This is a schematic diagram illustrating the working principle of the reset phase.

[0113] The traditional ADC operating sequence is sampling-conversion-reset, except for the DAC control code in the conversion stage. ctrl For the corresponding code D SAR The remaining stages were reset to code zero D. zero In this embodiment, the ADC's operating timing is modified to sampling-reset-conversion. Here, assuming a negative offset (i.e., a negative offset error), CLK1 rises to a high level, and V... OP >V ON Let's take an example to illustrate. Please refer to... Figure 4 The upper part of the sampling phase C DAC DAC ctrl1 Set to code zero D zero At this time, the voltage of its upper plate is V. OP The lower electrode is GND (ground voltage); the lower half is C. DAC DAC ctrl2 Set to offset calibration code D off At this time, the voltage of its upper plate is V. ON The lower electrode is V off (Voltage corresponding to the offset calibration code). Please refer to... Figure 5 DAC with upper and lower half capacitors during reset phase ctrl All were set to code zero D zero However, since the ADC input is floating at this time, the lower half of C... DAC The voltage at the lower plate becomes V ON -V off During the conversion phase, the lower half of the capacitor performs analog-to-digital conversion to generate D[8:0]. At this time, the analog voltage corresponding to the digital output is V. OP -V ON +V off The operation of raising CLK2 to a high level is similar to that of raising CLK1 to a high level, except that the upper and lower halves of the operation are reversed.

[0114] If a positive misalignment exists (i.e., the misalignment error is positive), please refer to... Figure 6 CLK1 rises to a high level, and V OP >V ON During the sampling phase, the first half of C DAC DAC ctrl1 Set to offset calibration code D off lower half C DAC DAC ctrl2 Set to code zero D zero Reset and conversion phases of the upper and lower half DACs ctrl The settings are the same as for negative offset, at which point the analog voltage corresponding to the digital output is V. OP-V ON -V off The operation of raising CLK2 to a high level is similar to that of raising CLK1 to a high level, except that the upper and lower halves of the operation are reversed.

[0115] The offset error calibration scheme of the above embodiments can be ±2 N-1 Correction is achieved within the LSB range.

[0116] For a temperature sensor that has been manufactured, whether its offset error is positive or negative is already determined. This can be determined during the testing phase. Specifically, the lowest temperature T0 within the temperature measurement range of the sensor is used as the test temperature. It is generally assumed that the gain error and nonlinearity error are zero at this temperature. Therefore, the deviation between the measured temperature and the test temperature T0 is caused by the offset error. If the measured temperature is lower than the test temperature T0, the offset error is negative; if the measured temperature is higher than the test temperature T0, the offset error is positive. The deviation between the measured temperature and the test temperature is achieved by adding an offset calibration code Doff.

[0117] In another embodiment, please refer to Figure 7 By adding a gain error calibration module C to the ADC g To achieve gain error calibration, one end is connected to a comparator, and the other end is grounded. In C... g Under the influence of , the gain expression of the ADC is shown in equation (7):

[0118]

[0119] Based on the estimation of the gain change of the front end (resistor bridge), an appropriate value of C can be selected. g .

[0120] Because it employs dual sampling technology, the gain error calibration module consists of two parts: the first gain error calibration capacitor unit C g1 Second gain error calibration capacitor unit C g2 First gain error calibration capacitor unit C g1 One end is connected to one input of the comparator, and the other end is grounded; the second gain error calibration capacitor unit C g2 One end is connected to the other input of the comparator, and the other end is grounded.

[0121] In another embodiment, please refer to Figure 8 Nonlinear error calibration is achieved by adding a nonlinear error calibration module (CAUX) to the ADC. One end of CAUX is connected to a comparator, and the other end is connected to the SAR controller via a bidirectional power switch (BPS). Its working principle is as follows: Please refer to... Figure 2The SAR controller controls it according to the working sequence, such as Figure 2 The NLctrl shown is its control signal: during the sampling phase, NLctrl is set to the nonlinear error calibration code DNL; during the reset and conversion phases, NLctrl is set to the zero code Dzero. Since the ADC input is floating at this time, the comparator's input voltage becomes Vin-V. NL , where V NL The analog voltage corresponding to the digital nonlinear calibration code DNL is used to calibrate the nonlinear error.

[0122] Due to the adoption of dual correlation technology, the nonlinear error calibration module in this embodiment includes two parts: a first nonlinear error capacitance calibration unit C. AUX1 Second nonlinear error capacitor calibration unit C AUX2 First nonlinear error capacitance calibration unit C AUX1 One end is connected to one input of the comparator, and the other end is connected to the SAR controller via a bidirectional power switch; the second nonlinear error capacitor calibration unit C AUX2 One end is connected to the other input of the comparator, and the other end is connected to the SAR controller via a bidirectional power switch.

[0123] Referring to the embodiments described above, in each digital-to-analog conversion stage, the ADC modules connected to the low-level input terminal of the comparator operate. However, the nonlinear error capacitor calibration unit operates in the opposite way to the ADC, acting on the side connected to the high-level input terminal of the comparator. That is, the nonlinear error capacitor calibration unit on the side that does not perform digital-to-analog conversion is controlled in the manner described above, while the nonlinear error capacitor calibration unit on the side that performs digital-to-analog conversion is set to zero code D. zero .

[0124] In the above embodiments, the nonlinear error calibration code D NL It can be obtained in the following ways:

[0125] From equation (9), it can be concluded that the relationship between nonlinear error and temperature is a second-order function, i.e., a parabola. The relationship between nonlinear error and temperature can be fitted using a piecewise linear function. Specifically, the curve on both sides of the vertex of the parabola is divided into two segments. Please refer to [reference needed]. Figure 9 That is, it is divided into four segments, namely (T0, T1], (T1, T2], (T2, T′1], and (T′1, T′0).

[0126] Starting from the lowest temperature T0, the four curves are processed using f(x) = ax, f(x) = ax - b, ... To perform fitting, as shown in equation (8), the values ​​of a and b are obtained; where x represents temperature and f(x) represents nonlinear error;

[0127]

[0128] After obtaining the values ​​of a and b, they are converted into a nonlinear error calibration code using a capacitor array. For details, please refer to [link / reference needed]. Figure 10 Ax can be represented by a four-capacitor array, and -b can be represented by a single capacitor. In different embodiments, ax can also be represented by a single capacitor, but the more bits a capacitor has, the higher the precision.

[0129] It can be set that the ADC output code D[8:0] is at the intermediate level at the intermediate temperature T2, and the temperature change of the most significant bit D[8] is also T2. Therefore, the ADC output code needs to be determined as follows: First, determine if D[8] is equal to zero. If it is, then D[X] = D[X]; if not, then...

[0130] During actual measurement, it is necessary to determine whether the nonlinear error calibration code should introduce -b. Initially, the nonlinear error calibration can be disabled by keeping the nonlinear error calibration module inactive. This provides an estimated temperature. Then, it is determined which of the four segments mentioned above this estimated temperature falls into to decide whether to introduce -b. Once the nonlinear error calibration code is determined, the final temperature is obtained using the calibrated temperature sensor.

[0131] Here, CLK1 is raised to a high level, V OP >V ON The introduction of nonlinear error will be explained using an example. Please refer to [link / reference]. Figure 10 The upper part of the sampling phase C AUX NL ctrl1 Set as nonlinear error calibration code D NL At this time, the voltage of its upper plate is V. OP The lower electrode is V off (Voltage corresponding to the nonlinear error calibration code); lower half C AUX NL ctrl12 Set to code zero D zero At this time, the voltage of its upper plate is V. ON The lower electrode is GND (ground voltage). Please refer to [reference needed]. Figure 11 NL of the upper and lower halves of the capacitor during the reset phase ctrl All were set to code zero D zero However, since the ADC input is floating at this time, the upper part of C... DAC The voltage at the lower plate becomes V OP -V NL During the conversion phase, the lower half of the capacitor performs analog-to-digital conversion to generate D[8:0]. At this time, the analog voltage corresponding to the digital output is V. OP -VON -V NL .

[0132] It should be understood that the calibration of the three types of errors is described separately in the above embodiments. In one embodiment, it may include only the calibration of one type of error, or it may include the calibration of any two types of errors, or it may include the calibration of all three types of errors at the same time.

[0133] The error calibration capacitor values ​​and error calibration codes given above are from the design phase. However, during manufacturing, the parameters of each component may change slightly due to manufacturing tolerances, resulting in slight variations in error. Therefore, after manufacturing, the temperature sensor can be tested to fine-tune its error calibration capacitor values ​​and error calibration codes.

[0134] In one embodiment, for a circuit that includes all three error calibrations, the following method can be used for testing:

[0135] Within the test range, three test temperature points, T0, T2, and T0′, are selected from smallest to largest. T0 is the lowest temperature point, and T0′ is the highest temperature point. The nonlinear error is zero at these two points. Please refer to [reference needed]. Figure 8 .

[0136] Specifically, at the test temperature T0, the gain error and nonlinearity error are zero. Therefore, if the measured temperature deviates from the test temperature T0, it is due to offset error. We can first determine the sign of the offset error to determine which part to add the offset error code to, and then adjust the value of the offset error code. Specifically, this involves: First, without adding the offset error code, using a resistive temperature sensor for testing, comparing the measured temperature with the test temperature. If the measured temperature is higher than the test temperature, the offset error is considered positive; if the measured temperature is lower than the test temperature, the offset error is considered negative. Then, based on the sign of the offset error, add the offset error code to the upper / lower half of the capacitor array. Based on the deviation between the measured temperature and the test temperature, adjust the offset error code D. off Adjustments are made to make the measured temperature as close as possible to the test temperature. The specific adjustment for the offset error code is as follows: C DAC Including multi-position capacitors, the number of lower plates of the corresponding capacitors connected to VDD can be changed by adjusting the offset error code, that is, the multi-position capacitor array is reorganized, thereby further compensating for the offset error and making the measured temperature as close as possible to the test temperature.

[0137] After the T0 test is completed, the T0′ test is performed. At this point, since the nonlinear error is zero and the offset error calibration code was determined at T0, any deviation between the measured actual test temperature and the T0′ test temperature is caused by the gain error. In this case, the value of the gain error calibration module can be fine-tuned. The gain error calibration module includes a multi-bit programmable capacitor, allowing adjustment of whether the capacitor is connected or not, thereby fine-tuning C. g The value of is used to further compensate for the gain error, so that the measured temperature is as close as possible to the test temperature.

[0138] After the T0′ test is completed, the third test temperature is performed. Any value T between T0 and T0′ can be selected. n Since the offset error calibration and gain error calibration have been determined at T0 and T0′, if the actual test temperature measured at this time is different from the test temperature T... n The deviation is caused by nonlinear error; first, it is necessary to determine T. n Which of the four segments above does it belong to? Determine whether to introduce -b, and then fine-tune the nonlinear error calibration code based on this. C AUX The capacitors corresponding to ax include multiple capacitors. By adjusting the nonlinear error calibration code, the number of capacitors connected to VDD at the bottom plate corresponding to ax can be changed, thereby further compensating for the nonlinear error and making the measured temperature as close as possible to the test temperature.

[0139] In one embodiment, a power gate switch is also provided between the drive controller and its power supply. This switch is a controllable switch and can be implemented using MOS, such as... Figure 12 M shown PG When the temperature sensor is not working, M can be controlled. PG When the system is turned off, VDD drops to ground level, and the system enters standby mode, which can further save system power consumption.

[0140] In one embodiment, a method for measuring temperature using the three types of error-calibrated temperature sensors described above is also provided. Specifically, the tested temperature sensor described above can be used, and the method includes:

[0141] The nonlinear error calibration module is kept inactive, and the estimated temperature is obtained by measuring the temperature using a resistive temperature sensor.

[0142] After obtaining the predicted temperature, determine which segment of the four-segment simulation the predicted temperature falls into, and use this to determine whether -b should be added to the nonlinear error calibration code, thereby obtaining the determined nonlinear error calibration code.

[0143] Based on a defined nonlinear error calibration code, a resistive temperature sensor is used to measure the temperature and obtain the measured temperature.

[0144] In the description of this specification, the references to terms such as "an embodiment," "an example," "a specific implementation process," and "an example" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0145] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A resistive temperature sensor, characterized by The application relates to a resistance temperature sensor, which comprises the following components: a Wheatstone bridge; a driving circuit, which comprises a first driving circuit and a second driving circuit; an output end of the first driving circuit is connected to an excitation voltage end of the Wheatstone bridge, and an output end of the second driving circuit is connected to another excitation voltage end of the Wheatstone bridge; an analog-digital converter, a first input end of which is connected to an output voltage end of the Wheatstone bridge, a second input end of which is connected to another output voltage end of the Wheatstone bridge, and an output end of which is used as an output end of the resistance temperature sensor; a driving controller, an input end of which is connected to a driving control signal, output ends of which are respectively connected to input ends of the first driving circuit and the second driving circuit, and which is further connected to the analog-digital converter; wherein a sampling period comprises two measurement stages in sequence, i.e. a first measurement stage and a second measurement stage; the driving controller is used for controlling the first driving circuit and the second driving circuit according to the driving control signal, and is particularly used for controlling the first driving circuit to be enabled once in the first measurement stage and controlling the second driving circuit to be enabled once in the second measurement stage in a sampling period; the analog-digital converter is used for receiving the driving control signal and controlling the working time sequence thereof according to the driving control signal, and is particularly used for sequentially executing the working time sequence thereof in a sampling period and quantifying the output voltage of the Wheatstone bridge when the first driving circuit is enabled and the output voltage of the Wheatstone bridge when the second driving circuit is enabled, and subtracting the two quantification results to obtain an output result.

2. The resistive temperature sensor of claim 1, wherein, The enabling duration of the first driving circuit is less than the duration of the first measurement stage, and the enabling duration of the second driving circuit is less than the duration of the second measurement stage.

3. The resistive temperature sensor of claim 1, wherein, The nominal values of the four bridge arm resistors in the Wheatstone bridge are equal; The temperature coefficients of two adjacent bridge arm resistors in the Wheatstone bridge are opposite in polarity and equal in absolute value.

4. The resistive temperature sensor of claim 3, wherein, The enabling durations of the first driving circuit and the second driving circuit are proportional to the nominal values of the bridge arm resistors.

5. The resistive temperature sensor according to any one of claims 1 to 4, characterized in that The analog-digital converter is a successive approximation analog-digital converter, which comprises a comparator, a successive approximation controller and a digital-analog quantization capacitor module; one input end of the comparator is used as the first input end of the analog-digital converter and is connected to an output voltage end of the Wheatstone bridge through a time-controlled switch; the other input end of the comparator is used as the second input end of the analog-digital converter and is connected to another output voltage end of the Wheatstone bridge through the time-controlled switch, and the output end of the comparator is connected to an input end of the successive approximation controller; the driving controller is further used for controlling the on-off of the time-controlled switch according to the driving control signal, and is particularly used for controlling the time-controlled switch to be turned on in the sampling stage of the working time sequence and controlling the time-controlled switch to be turned off in the reset stage and the conversion stage of the working time sequence. The digital-analog quantization capacitor module comprises a first quantization capacitor unit and a second quantization capacitor unit; an upper plate of the first quantization capacitor unit is connected to an input end of the comparator, and a lower plate of the first quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch; an upper plate of the second quantization capacitor unit is connected to another input end of the comparator, and a lower plate of the second quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch; an output end of the successive approximation controller is used as an output end of the resistance temperature sensor; and the successive approximation controller is also connected to the drive controller.

6. The resistive temperature sensor of claim 5, wherein, The working timing of the analog-digital converter is: a sampling stage, a reset stage and a conversion stage; During the working timing of the analog-digital converter, the successive approximation controller is used for: in the sampling stage, when the offset error is positive, the quantization capacitor unit connected to the input end with a high level of the comparator is set as the offset error calibration code; when the offset error is negative, the quantization capacitor unit connected to the input end with a low level of the comparator is set as the offset error calibration code; in the reset stage, the first quantization capacitor unit and the second quantization capacitor unit are set as zero code; in the conversion stage, the quantization capacitor unit connected to the input end with a high level of the comparator is set as zero code, and the quantization capacitor unit connected to the input end with a low level of the comparator is set as the successive approximation code; wherein the input end with a low level of the comparator refers to the input end of the comparator connected to the output voltage end with a low level of the Wheatstone resistance bridge; and the input end with a high level of the comparator refers to the input end of the comparator connected to the output voltage end with a high level of the Wheatstone resistance bridge.

7. The resistive temperature sensor of claim 6, wherein, The analog-digital converter further comprises a gain error calibration module, which comprises a first gain error calibration capacitor unit and a second gain error calibration capacitor unit; one end of the first gain error calibration capacitor unit is connected to an input end of the comparator, and the other end is grounded; one end of the second gain error calibration capacitor unit is connected to another input end of the comparator, and the other end is grounded.

8. The resistive temperature sensor of claim 7, wherein, The first gain error calibration capacitor unit and the second gain error calibration capacitor unit respectively comprise multi-bit programmable gain error calibration capacitors, and are respectively used for fine tuning of the capacitance values of the first gain error calibration capacitor unit and the second gain error calibration capacitor unit based on test results when the resistance temperature sensor is tested.

9. The resistive temperature sensor of claim 7, wherein, The analog-digital converter further comprises a non-linear error calibration module, which comprises a first non-linear error capacitor calibration unit and a second non-linear error capacitor calibration unit; one end of the first non-linear error capacitor calibration unit is connected to an input end of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch; one end of the second non-linear error capacitor calibration unit is connected to another input end of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch; during the working timing of the analog-digital converter, For the nonlinear error capacitor calibration unit connected to the low level input end of the comparator, the successive approximation controller is used to control it to be zero code; For the nonlinear error capacitor calibration unit connected to the high level input end of the comparator, the successive approximation controller is used to control it according to the working time sequence: in the sampling stage, the nonlinear error capacitor calibration unit is set to the nonlinear error calibration code; in the reset stage and the conversion stage, the nonlinear error capacitor calibration unit is set to the zero code.

10. The resistive temperature sensor of claim 9, wherein, The nonlinear error calibration code is obtained by the following method: The relationship curve between the nonlinear error and the temperature is a parabola, and the curve on both sides of the vertex of the parabola is divided into two segments respectively; From the lowest temperature, the four-segment curve is fitted respectively by using , , , to obtain the values of a and b; wherein, represents the temperature, represents the nonlinear error; The a and b values are converted into the nonlinear error calibration code.

11. The resistive temperature sensor according to any one of claims 1 to 4 and 6 to 10, characterized in that, Further comprising: A power gating switch is connected between the driving controller and its power supply end, which is used to cut off the connection between the driving controller and its power supply end after the sampling period ends.

12. A method of testing a resistive temperature sensor, characterized by, It is a test for the resistance temperature sensor as claimed in claim 10; The method comprises: After testing with the lowest temperature in the fitting as the test temperature, testing with the highest temperature in the fitting as the test temperature, testing the resistance temperature sensor, and judging whether the measured temperature and the test temperature exist deviation, if not, entering the next step, if yes, adjusting the value of the gain error calibration module so that the measured temperature and the test temperature are closest; After testing with the highest temperature in the fitting as the test temperature, testing with any value between the lowest temperature and the highest temperature in the fitting as the test temperature, judging which segment the test temperature is in the four segments of the fitting, so as to determine whether-b should be added in the nonlinear error calibration code, and then testing the resistance temperature sensor based on this, judging whether the measured temperature and the test temperature exist deviation, if not, ending, if yes, adjusting the code corresponding to a in the nonlinear error calibration code so that the measured temperature and the test temperature are closest. It is a method for measuring with the resistance temperature sensor as claimed in claim 10; 13. A temperature measurement method, characterized by, The method comprises: Controlling the nonlinear error calibration module not to work, and using the resistance temperature sensor to measure the temperature to obtain an estimated temperature; Judging which segment the estimated temperature is in the four segments of the simulation, so as to determine whether-b should be added in the nonlinear error calibration code; ​ Based on the determined non-linear error calibration code, a temperature measurement is performed using the resistive temperature sensor to obtain a measured temperature.

14. A power switching system characterized by, Comprising: a power switch chip and a resistive temperature sensor according to any one of claims 1 to 11; the resistive temperature sensor is configured to detect an operating temperature of the power switch chip.

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