Design method of high-voltage ultra-low leakage current Socket

Abstract

The invention discloses a high-voltage ultra-low leakage current Socket design method, which comprises the following operation steps: carrying out PCB design on a DUT test board, adopting a Guard wire added with a via hole to surround the D end of the Socket in the PCB design stage to carry out design, enclosing the D end by the Guard wire to form a Faraday electric cage structure, and meanwhile, avoiding contact with the S end of the Socket to realize equipotential surrounding protection on the D end; fixing the Socket on the DUT test board refers to inserting a Socket pin into a corresponding position of the DUT test board, and welding the Socket pin to the DUT test board; and inserting the to-be-tested equipment into the Socket. According to the design method of the high-voltage ultra-low leakage current Socket, the PCB of the DUT test board is designed, the D end of the Socket is matched with the Guard line to form an equipotential region, and the via holes are uniformly formed in the Guard line to form a Faraday electric cage structure, so that the leakage current from the D end to the S end of the Socket is effectively inhibited, and the accuracy of the DUT leakage current test in a high-voltage test environment is improved.

Description

Technical Field

[0001] The invention relates to the technical field of automated testing, and in particular to a design method for a high-voltage and ultra-low leakage current Socket. Background Art

[0002] High voltage and ultra-low leakage current socket is an automated test socket. In automated testing, the socket (test socket) is a key component on the DUT test board. It provides a physical interface that allows the DUT (device under test) to be electrically connected to the test equipment. When the DUT is tested at a low voltage, the leakage current generated from the D end to the S end of the socket on the DUT test board is small and has almost no effect on the measurement results. However, when the high voltage test is performed (the voltage at the D end is greater than 200V), the leakage current generated from the D end to the S end of the socket on the DUT test board is too large, which will directly affect the accuracy of the test results. With the continuous development of science and technology, people's requirements for high voltage and ultra-low leakage current sockets are getting higher and higher.

[0003] The existing automated test has certain drawbacks when used. Although the existing leakage current suppression method can suppress the leakage current of the D terminal under low voltage conditions, the leakage current suppression effect is not obvious when the DUT is subjected to high voltage, which will affect the test results. Therefore, when the DUT is tested on the socket with high voltage, it is necessary to effectively suppress the leakage current generated by the D terminal of the socket on the DUT test board. The test deviation caused by the leakage current generated by the high voltage can be reduced by optimizing the PCB layout of the socket on the DUT test board. To this end, we propose a design method for a high-voltage ultra-low leakage current socket. Summary of the invention

[0004] Technical problem solved: In view of the shortcomings of the prior art, the present invention provides a design method for a high-voltage and ultra-low leakage current Socket. By designing the PCB of the DUT test board, an equipotential area is formed at the D end of the Socket in cooperation with the Guard line, and vias are evenly placed on the Guard line to form a Faraday cage structure, which effectively suppresses the leakage current from the D end of the Socket to the S end, improves the accuracy of the DUT leakage current test in a high voltage test environment, and can effectively solve the problems in the background technology.

[0005] Technical solution: To achieve the above purpose, the technical solution adopted by the present invention is: a design method of a high-voltage ultra-low leakage current Socket, comprising the following steps:

[0006] S1: Design the PCB for the DUT test board. During the PCB design stage, a Guard line with vias is used to surround the D end of the socket. The Guard line surrounds the D end to form a Faraday cage structure, while avoiding contact with the S end of the socket, thus achieving equipotential surrounding protection for the D end.

[0007] S2: Fixing the Socket on the DUT test board means inserting the Socket pins into the corresponding positions of the DUT test board and soldering the Socket pins to the DUT test board;

[0008] S3: Insert the device under test into the socket. The device under test is DUT. Insert the DUT into the socket on the DUT test board according to the pin name corresponding to the socket. Ensure that the electrical connection between the DUT and the test system is correct, and prepare for the subsequent leakage current test.

[0009] S4: Start the DUT high voltage leakage current test, set up the experimental environment required for the high voltage leakage current test, and prepare to start the high voltage leakage current test;

[0010] S5: Apply high voltage to the D terminal of the DUT. The test system provides high voltage to the D terminal of the DUT and measures the leakage current from the D terminal to the S terminal of the DUT at the same time.

[0011] S6: The source meter displays the leakage current of the DUT. By designing the PCB of the DUT test board, the leakage current from the D end to the S end of the socket can be suppressed under the high voltage test environment, so that the leakage current measured by the meter is the leakage current of the DUT itself.

[0012] S7: The high voltage leakage current test of DUT is completed. The high voltage leakage current test of DUT has been completed.

[0013] As a preferred technical solution of the present application, it includes a test socket, a Guard line and a via. The test socket is a physical interface when the device under test is tested, and the device under test is a DUT. The test socket and the DUT test board enable the DUT to be electrically connected to the test system, so as to perform various performance and function tests. The test socket includes a jack, a pin and a base. The DUT test board is part of the entire test system. The test socket is a component on the DUT test board. The DUT is placed in the test socket and connected to the circuit on the DUT test board through the test socket, and then electrically connected to the test equipment. The DUT test board and the test socket together constitute an interface in the leakage current test. The Guard line surrounds the D end of the test socket, wherein the potential of the Guard line is equal to the potential of the D end, creating an equipotential area. The vias are evenly distributed on the Guard line, and multiple vias form a Faraday cage structure, which together with the Guard line provide an equipotential shielding mechanism for protecting the leakage current from the D end of the test socket to the S end.

[0014] As a preferred technical solution of the present application, the jack is a component of the DUT connected to the test socket, which is made of low-impedance beryllium copper material and is cast into an elastic structure through a mold to provide contact force support and smaller contact impedance for the DUT contact. These contacts physically dock and electrically connect the test system with the pins of the DUT.

[0015] As a preferred technical solution of the present application, the pin is an extension of the DUT on the test socket, which electrically connects the DUT pin to the test system so that the test signal can be connected from the test system to the DUT pin, which is divided into G terminal, D terminal and S terminal, that is, divided into gate, drain and source levels.

[0016] As a preferred technical solution of the present application, in the leakage current test, a voltage signal is added to the D terminal to simulate the pressure conditions in the actual working environment to evaluate the performance and reliability of the DUT. Under low-voltage test conditions, that is, the voltage at the D terminal is less than V, the leakage current between the D terminal and the S terminal can be ignored. Under high-voltage test conditions, that is, the voltage at the D terminal is greater than V, the leakage current between the D terminal and the S terminal is too large, which will affect the test results.

[0017] As a preferred technical solution of the present application, the base is made of plastic and non-conductive material, supporting the entire test socket structure and connecting the test equipment.

[0018] As a preferred technical solution of the present application, during the high-voltage leakage current test of the DUT, the equipotential area created by the Guard line and the D terminal ensures that the current on the D terminal will not leak through the Guard line. Since there is no potential difference between the Guard line and the D terminal, there is no voltage to drive the current to flow, thereby preventing current leakage. The Guard line ensures that the leakage current on the D terminal will not leak to the S terminal, thereby achieving protection against leakage current under high-voltage conditions, while protecting the integrity of the signal and ensuring the stability and reliability of the signal during transmission.

[0019] As a preferred technical solution of the present application, the Guard line needs to be wired on the TOP layer and the Bottom layer of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer.

[0020] Beneficial effects: Compared with the prior art, the present invention provides a design method for a high-voltage and ultra-low leakage current Socket, which has the following beneficial effects: the design method for a high-voltage and ultra-low leakage current Socket, through the design of the PCB of the DUT test board, cooperates with the Guard line at the D end of the Socket to form an equipotential area, and evenly places vias on the Guard line to form a Faraday cage structure, which effectively suppresses the leakage current of the D end of the Socket to the S end, and improves the accuracy of the DUT leakage current test in a high-voltage test environment; the method is simple and efficient, and only needs to cooperate with the PCB design to achieve high-precision measurement. This method simplifies the operation process, reduces the demand for additional test equipment and corresponding maintenance expenses, thereby improving the economic benefits of the test; this method is not only used for high-voltage leakage current testing of DUT, but can also be extended to other electronic testing and measurement fields, effectively enhancing the performance and reliability of the test system, the entire high-voltage and ultra-low leakage current Socket has a simple structure, is easy to operate, and has a better effect than the traditional method. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 The present invention is a structural schematic diagram of a design method for a high-voltage and ultra-low leakage current Socket.

[0022] Figure 2 The present invention is a schematic diagram of the structure of a PCB in a design method for a high-voltage and ultra-low leakage current Socket.

[0023] Figure 3 The present invention is a schematic flow chart of a design method for a high-voltage and ultra-low leakage current Socket.

[0024] In the figure: 1. Test socket; 2. Guard line; 3. Via hole. DETAILED DESCRIPTION

[0025] The technical scheme of the present invention will be clearly and completely described below in conjunction with the accompanying drawings and specific embodiments, but it will be understood by those skilled in the art that the following described embodiments are part of embodiments of the present invention, rather than all embodiments, and are only used to illustrate the present invention, and should not be considered as limiting the scope of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative work are within the scope of protection of the present invention. If specific conditions are not specified in the embodiments, they are carried out according to normal conditions or conditions recommended by the manufacturer. If the manufacturer is not specified in the reagents or instruments used, they are all conventional products that can be purchased commercially.

[0026] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0027] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0028] like Figure 1-3 As shown, a design method for a high-voltage ultra-low leakage current socket includes the following steps:

[0029] S1: Design the PCB for the DUT test board. During the PCB design stage, a Guard line with vias is used to surround the D end of the socket. The Guard line surrounds the D end to form a Faraday cage structure, while avoiding contact with the S end of the socket, thus achieving equipotential surrounding protection for the D end.

[0030] S2: Fixing the Socket on the DUT test board means inserting the Socket pins into the corresponding positions of the DUT test board and soldering the Socket pins to the DUT test board;

[0031] S3: Insert the device under test into the socket. The device under test is DUT. Insert the DUT into the socket on the DUT test board according to the pin name corresponding to the socket. Ensure that the electrical connection between the DUT and the test system is correct, and prepare for the subsequent leakage current test.

[0032] S4: Start the DUT high voltage leakage current test, set up the experimental environment required for the high voltage leakage current test, and prepare to start the high voltage leakage current test;

[0033] S5: Apply high voltage to the D terminal of the DUT. The test system provides high voltage to the D terminal of the DUT and measures the leakage current from the D terminal to the S terminal of the DUT at the same time.

[0034] S6: The source meter displays the leakage current of the DUT. By designing the PCB of the DUT test board, the leakage current from the D end to the S end of the socket can be suppressed under the high voltage test environment, so that the leakage current measured by the meter is the leakage current of the DUT itself.

[0035] S7: The high voltage leakage current test of DUT is completed. The high voltage leakage current test of DUT has been completed.

[0036] Furthermore, it includes a test socket 1, a Guard line 2 and a via 3. The test socket 1 is a physical interface when the device under test is tested, and the device under test is a DUT. The test socket 1 and the DUT test board enable the DUT to be electrically connected to the test system, so as to perform various performance and function tests. The test socket 1 includes a jack, a pin and a base. The DUT test board is part of the entire test system. The test socket 1 is a component on the DUT test board. The DUT is placed in the test socket 1 and is connected to the circuit on the DUT test board through the test socket 1, and then electrically connected to the test equipment. The DUT test board and the test socket 1 together constitute an interface in the leakage current test. The Guard line 2 surrounds the D end of the test socket 1, wherein the potential of the Guard line 2 is equal to the potential of the D end, creating an equipotential area. The vias 3 are evenly distributed on the Guard line 2, and multiple vias 3 form a Faraday cage structure, which together with the Guard line 2 provide an equipotential shielding mechanism for protecting the leakage current from the D end of the test socket 1 to the S end.

[0037] Furthermore, the jack is a component of the DUT connection test socket 1, which is made of low-impedance beryllium copper material and is cast into an elastic structure through a mold to provide contact force support and smaller contact impedance for the DUT contact. These contacts physically connect and electrically connect the test system to the pins of the DUT.

[0038] Furthermore, the pins are extensions of the DUT on the test socket 1, which electrically connect the DUT pins to the test system so that the test signals can be connected from the test system to the DUT pins, which are divided into G terminal, D terminal and S terminal, that is, divided into gate, drain and source levels.

[0039] Furthermore, in the leakage current test, a voltage signal is added to the D terminal to simulate the stress conditions in the actual working environment to evaluate the performance and reliability of the DUT. Under low-voltage test conditions, that is, the voltage at the D terminal is less than 200V, the leakage current between the D terminal and the S terminal can be ignored. Under high-voltage test conditions, that is, the voltage at the D terminal is greater than 200V, the leakage current between the D terminal and the S terminal is too large and will affect the test results.

[0040] Furthermore, the base is made of plastic and non-conductive material, supporting the entire test socket structure and connecting the test equipment.

[0041] Furthermore, during the high-voltage leakage current test of the DUT, the equipotential area created by Guard line 2 and the D terminal ensures that the current on the D terminal will not leak through Guard line 2. Since there is no potential difference between Guard line 2 and the D terminal, there is no voltage to drive the current to flow, thereby preventing current leakage. Guard line 2 ensures that the leakage current on the D terminal will not leak to the S terminal, thereby achieving protection against leakage current under high-voltage conditions, while protecting the integrity of the signal and ensuring the stability and reliability of the signal during transmission.

[0042] Furthermore, Guard line 2 needs to be routed on the TOP layer and the Bottom layer of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer.

[0043] Example:

[0044] Figure 1 It is a design method structure diagram of a high-voltage ultra-low leakage current socket, including a socket (test socket), a guard line (guard ring), and a via;

[0045] Socket (test socket) is the physical interface for testing DUT (device under test). Socket and DUT test board enable electrical connection between DUT and test system, so as to perform various performance and functional tests. The main components of Socket include jack, pins and base.

[0046] The DUT test board is part of the entire test system, and the Socket is a component on the DUT test board. During the test, the DUT is placed in the Socket, connected to the circuit on the DUT test board through the Socket, and then electrically connected to the test equipment. The DUT test board and the Socket together constitute the key interface in the leakage current test.

[0047] The jack is the key part of the DUT connection socket. It is usually made of low-impedance beryllium copper material and cast into an elastic structure through a mold to provide contact force support and smaller contact impedance for DUT contact. These contacts can physically dock and electrically connect the test system with the DUT pins.

[0048] The pin is an extension of the DUT pin in the socket. The purpose is to electrically connect the DUT pin to the test system so that the test signal can be connected from the test system to the DUT pin. It is divided into the G terminal (gate), D terminal (drain) and S terminal (source). In the leakage current test, a voltage signal is usually added to the D terminal to simulate the stress conditions in the actual working environment to evaluate the performance and reliability of the DUT. Under low-voltage test conditions (D terminal voltage is less than 200V), the leakage current between the D terminal and the S terminal can be ignored; under high-voltage test conditions (D terminal voltage is greater than 200V), the leakage current between the D terminal and the S terminal is too large and will affect the test results.

[0049] The base is usually made of plastic or other non-conductive materials, supporting the entire test socket structure and connecting the test equipment.

[0050] The Guard line (guard ring) surrounds the D end of the Socket, where the potential of the Guard line is equal to the potential of the D end, creating an equipotential area to achieve the purpose of suppressing the leakage current of the D end under high-voltage test conditions. During the high-voltage leakage current test of the DUT, the equipotential area created by the Guard line and the D end ensures that the current on the D end will not leak through the Guard line. Since there is no potential difference between the Guard line and the D end, there is no voltage to drive the current to flow, thereby preventing current leakage. The Guard line ensures that the leakage current on the D end will not leak to the S end, achieving protection against leakage current under high-voltage conditions, while protecting the integrity of the signal and ensuring the stability and reliability of the signal during transmission.

[0051] The vias are evenly distributed on the Guard line. Multiple vias form a Faraday cage structure, which together with the Guard line provides an equipotential shielding mechanism to protect the leakage current from the D end of the Socket to the S end.

[0052] The Guard line needs to be routed on the TOP and Bottom layers of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer, reducing the risk of current leakage.

[0053] The vias are evenly distributed on the Guard line. Note that the via diameter is smaller than the Guard line width to ensure the continuity and integrity of the Guard line. The Faraday cage structure formed by the Guard line and the vias provides a continuous shielding path, forming a strong leakage current shielding effect. This structure effectively isolates internal and external electric fields and electromagnetic wave interference, protects the integrity of the signal, reduces the leakage current from the D end (drain) to the S end (source), and improves the overall performance of the test system. In this way, it can be ensured that the leakage current test results are more accurate and reliable under high-voltage test conditions.

[0054] Figure 2 It is a design method for high-voltage and ultra-low leakage current sockets and corresponding PCB design;

[0055] 1 is the high voltage signal line of the high voltage leakage current test of the socket. The PCB wiring on the DUT test board is wider, and the other end is led to the middle pin of the 4 socket, that is, the D end;

[0056] 2 is the Guard line, which surrounds the high-voltage signal line, i.e., the D-end wiring, on the Top and Bottom layers of the DUT test board;

[0057] 3 is vias, which are evenly placed on the Guard lines to connect the Guard lines of the Top layer and the Bottom layer;

[0058] The silk-screen positions of the socket on the DUT test board include the G end on the left, the D end in the middle, and the S end on the right. The D end is connected to the high-voltage signal line and is surrounded by the Guard line and vias to form a leakage current protection structure.

[0059] The combination of Guard lines and vias forms an effective leakage current suppression structure in PCB design;

[0060] Guard lines are arranged around the D end of the socket on the TOP and Bottom layers of the PCB, and vias are evenly placed on the Guard lines, which together form a Faraday cage shielding structure to effectively suppress leakage current under high-voltage test conditions.

[0061] Figure 3 It is a flow chart of the design method of high voltage and ultra-low leakage current socket;

[0062] S1 PCB design of DUT test board refers to the use of Guard wires with vias to surround the D end of the socket during the PCB design stage. The Guard wire surrounds the D end to form a Faraday cage structure, while avoiding contact with the S end of the socket, to achieve equipotential protection of the D end;

[0063] S2 fixes the Socket on the DUT test board by inserting the Socket pins into the corresponding positions of the DUT test board and soldering the Socket pins to the DUT test board;

[0064] S3 inserts the DUT (device under test) into the socket, which means inserting the DUT, such as MOS tube, IGBT, etc., into the socket on the DUT test board according to the pin name corresponding to the socket, ensuring that the electrical connection between the DUT and the test system is correct, and preparing for the subsequent leakage current test;

[0065] S4 starts the DUT high voltage leakage current test, which means that the experimental environment required for the high voltage leakage current test has been built and is ready to start the high voltage leakage current test;

[0066] S5 applies high voltage to the D terminal of DUT means that the test system provides high voltage to the D terminal of DUT and measures the leakage current from the D terminal to the S terminal of DUT at the same time;

[0067] The leakage current of DUT displayed by S6 source meter refers to the PCB design of DUT test board, which can suppress the leakage current from D end to S end of Socket under high voltage test environment, so that the leakage current measured by the instrument is the leakage current of DUT itself.

[0068] S7 DUT high voltage leakage current test completed means that the high voltage leakage current test of DUT has been completed.

[0069] It should be noted that, in this article, relational terms such as first and second (number one, number two), etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0070] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited by the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, and these changes and improvements all fall within the scope of the present invention to be protected.

Claims

1. A design method for a high-voltage ultra-low leakage current socket, characterized by: The steps include: S1: Design the PCB for the DUT test board. During the PCB design stage, a Guard line with vias is used to surround the D end of the socket. The Guard line surrounds the D end to form a Faraday cage structure, while avoiding contact with the S end of the socket, thus achieving equipotential surrounding protection for the D end. S2: Fixing the Socket on the DUT test board means inserting the Socket pins into the corresponding positions of the DUT test board and soldering the Socket pins to the DUT test board; S3: Insert the device under test into the socket. The device under test is DUT. Insert the DUT into the socket on the DUT test board according to the pin name corresponding to the socket. Ensure that the electrical connection between the DUT and the test system is correct, and prepare for the subsequent leakage current test. S4: Start the DUT high voltage leakage current test, set up the experimental environment required for the high voltage leakage current test, and prepare to start the high voltage leakage current test; S5: Apply high voltage to the D terminal of the DUT. The test system provides high voltage to the D terminal of the DUT and measures the leakage current from the D terminal to the S terminal of the DUT at the same time. S6: The source meter displays the leakage current of the DUT. By designing the PCB of the DUT test board, the leakage current from the D end to the S end of the socket can be suppressed under the high voltage test environment, so that the leakage current measured by the meter is the leakage current of the DUT itself. S7: The high voltage leakage current test of DUT is completed. The high voltage leakage current test of DUT has been completed.

2. The design method of a high-voltage ultra-low leakage current socket according to claim 1, characterized in that: The invention comprises a test socket (1), a guard line (2) and a via (3); the test socket (1) is a physical interface for testing a device under test, and the device under test is a DUT; the test socket (1) and a DUT test board enable the DUT to be electrically connected to a test system, thereby performing various performance and function tests; the test socket (1) comprises a jack, a pin and a base; the DUT test board is a part of the entire test system; the test socket (1) is a component on the DUT test board; the DUT is placed in the test socket (1) and is connected to the DUT test board through the test socket (1). The circuit on the test board is connected to the test device, and then electrically connected to the test equipment. The DUT test board and the test socket (1) together constitute an interface in the leakage current test. The Guard line (2) surrounds the D end of the test socket (1), wherein the potential of the Guard line (2) is equal to the potential of the D end, creating an equipotential area. The vias (3) are evenly distributed on the Guard line (2), and a plurality of vias (3) form a Faraday cage structure, which together with the Guard line (2) provide an equipotential shielding mechanism for protecting the leakage current from the D end of the test socket (1) to the S end.

3. The design method of a high-voltage ultra-low leakage current socket according to claim 2, characterized in that: The jack is a component of the DUT connected test socket (1), which is made of low-impedance beryllium copper material and is cast into an elastic structure through a mold to provide contact force support and low contact impedance for DUT contact. These contacts physically connect the test system with the pins of the DUT and electrically connect them.

4. The design method of a high-voltage ultra-low leakage current socket according to claim 2, characterized in that: The pins are extensions of the DUT on the test socket (1), electrically connecting the DUT pins to the test system so that the test signal can be connected from the test system to the DUT pins, and are divided into a G terminal, a D terminal and an S terminal, that is, divided into a gate, a drain and a source level.

5. The design method of a high-voltage ultra-low leakage current socket according to claim 4, characterized in that: In the leakage current test, a voltage signal is added to the D terminal to simulate the stress conditions in the actual working environment to evaluate the performance and reliability of the DUT. Under low-voltage test conditions, that is, the voltage at the D terminal is less than 200V, the leakage current between the D terminal and the S terminal can be ignored. Under high-voltage test conditions, that is, the voltage at the D terminal is greater than 200V, the leakage current between the D terminal and the S terminal is too large, which will affect the test results.

6. The design method of a high-voltage ultra-low leakage current socket according to claim 2, characterized in that: The base is made of plastic and non-conductive material, and supports the entire test seat structure and connects the test equipment.

7. The design method of a high-voltage ultra-low leakage current socket according to claim 2, characterized in that: During the high-voltage leakage current test of the DUT, the equipotential area created by the Guard line (2) and the D terminal ensures that the current on the D terminal will not leak through the Guard line (2). Since there is no potential difference between the Guard line (2) and the D terminal, there is no voltage to drive the current to flow, thereby preventing the leakage of current. The Guard line (2) ensures that the leakage current on the D terminal will not leak to the S terminal, thereby achieving protection against leakage current under high-voltage conditions, while protecting the integrity of the signal and ensuring the stability and reliability of the signal during transmission.

8. The method for designing a high-voltage ultra-low leakage current socket according to claim 2, characterized in that: The guard line (2) needs to be wired on the TOP layer and the Bottom layer of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer.

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