A detection circuit for capacitor sorting and testing circuit boards

Abstract

The present invention discloses a detection circuit for a capacitor sorting and testing circuit board, comprising: a test source, a test source current acquisition circuit, a control unit, a test source switching circuit, a detection loop switching circuit, a capacitor sorting and testing circuit board under test, a detection loop differential sampling circuit, a detection circuit for a control portion of the circuit board under test, and a drive circuit for the control portion of the circuit board under test. The present invention can automatically and quickly detect the forward conduction impedance, reverse conduction impedance, forward conduction time, reverse conduction time, forward turn-off time, and reverse turn-off time of a switch on the capacitor sorting and testing circuit board under test, the insulation impedance between channels of the switch, and the forward breakdown voltage and reverse breakdown voltage of a TVS clamping diode, thereby achieving automatic detection, improving detection quality, reducing detection costs, and enabling large-scale mass production, meeting the needs of various devices and facilitating widespread application.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic application testing, and in particular to a detection circuit for capacitor sorting and testing a circuit board. Background Art

[0002] In the related technology, in the field of MLCC capacitor testing, the existing technical solution for high-speed multi-channel testers is to install a capacitance meter on each track for the corresponding test. For example, for 8-channel measurement, 8 capacitance meters are required, resulting in a sharp increase in the number of capacitance meters used in the tester. In addition, the capacitance meters are expensive, the control interfaces increase, the process is complex, and the components are numerous. The MLCC capacitor being tested may have residual high voltage. If it is directly connected to the capacitance meter without a discharge circuit, there is a risk of burning the capacitance meter.

[0003] To ensure the quality of MLCC capacitor testing by high-speed multi-channel testers while reducing production costs and avoiding the risk of capacitor meter burnout, each tester needs to be equipped with multiple MLCC capacitor rapid detection, sorting, and switching circuit boards. However, the switches on these circuit boards contain numerous electronic components, and the soldering of each electronic component on the board must be ensured, as the performance of these electronic components directly affects the quality of the tester's MLCC capacitor testing.

[0004] Therefore, to ensure the performance of the electronic components of the switching switches on the MLCC capacitor rapid detection and sorting switching circuit boards, each electronic component must be tested and judged; if a series of testing tools such as a multimeter are used for manual testing, the detection speed is too slow, and too much testing time is consumed. There are also problems such as manual detection errors. It is difficult to carry out large-scale and batch production, cannot meet the needs of various customers, and is difficult to be widely used. Summary of the Invention

[0005] The present invention aims to address at least one of the technical problems existing in the prior art. To this end, the present invention provides a detection circuit for capacitor sorting and testing circuit boards. This circuit can automatically detect capacitor sorting and testing circuit boards, improve detection quality, reduce detection costs, and enable large-scale mass production, meeting various equipment requirements and customer testing needs, facilitating widespread application.

[0006] A detection circuit for a capacitor sorting and testing circuit board according to an embodiment of the present invention includes:

[0007] A test source for providing electrical energy;

[0008] a test source current acquisition circuit, wherein an input end of the test source current acquisition circuit is electrically connected to the test source, and the test source current acquisition circuit is used to acquire an output current of the test source;

[0009] a control unit electrically connected to an output end of the test source current acquisition circuit;

[0010] a test source switching circuit, wherein an input end of the test source switching circuit is electrically connected to the test source, a control end of the test source switching circuit is electrically connected to the control unit, and the test source switching circuit is used to adjust the voltage and current of the test source;

[0011] a detection loop switching circuit, wherein an input end of the detection loop switching circuit is electrically connected to an output end of the test source switching circuit, and a control end of the detection loop switching circuit is electrically connected to the control unit;

[0012] A test circuit board for sorting the capacitor under test, electrically connected to the detection end of the detection loop switching circuit;

[0013] a detection loop differential sampling circuit, electrically connected to the output end of the detection loop switching circuit and also electrically connected to the control unit;

[0014] A detection circuit for the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit;

[0015] The driving circuit of the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit.

[0016] According to some embodiments of the present invention, the further comprising:

[0017] a display screen, the display screen being electrically connected to the control unit;

[0018] A host computer is electrically connected to the control unit.

[0019] According to some embodiments of the present invention, the test source includes: a first voltage source, a second voltage source, a third voltage source, a first current limiting resistor, a second current limiting resistor, a third current limiting resistor, a first test source output terminal, a second test source output terminal, and a third test source output terminal; wherein, one end of the first current limiting resistor is electrically connected to the first voltage source, and the other end of the first current limiting resistor is electrically connected to the first test source output terminal; one end of the second current limiting resistor is electrically connected to the second voltage source, and the other end of the second current limiting resistor is electrically connected to the second test source output terminal; one end of the third current limiting resistor is electrically connected to the third voltage source, and the other end of the third current limiting resistor is electrically connected to the third test source output terminal.

[0020] According to some embodiments of the present invention, the test source switching circuit includes a test source switching circuit and a test source current direction switching circuit, and the test source switching circuit includes:

[0021] a first test source switching switch, wherein one end of the first test source switching switch is electrically connected to the other end of the first current limiting resistor;

[0022] a fourth test source output terminal electrically connected to the other end of the first test source switch;

[0023] a second test source switching switch, wherein one end of the second test source switching switch is electrically connected to the other end of the second current limiting resistor, and the other end of the second test source switching switch is electrically connected to the fourth test source output end;

[0024] a third test source switching switch, one end of the third test source switching switch being electrically connected to the other end of the third current limiting resistor, and the other end of the third test source switching switch being electrically connected to the fourth test source output end;

[0025] The test source current direction switching switch includes:

[0026] a first current direction switching switch, wherein one end of the first current direction switching switch is electrically connected to the other end of the first test source switching switch;

[0027] a second current direction switch, one end of the second current direction switch being electrically connected to the other end of the first current direction switch, and the other end of the second current direction switch being grounded;

[0028] a fifth test source output terminal electrically connected to the other end of the first current direction switching switch;

[0029] a third current direction switching switch, one end of the third current direction switching switch being electrically connected to the other end of the second test source switching switch;

[0030] a fourth current direction switch, one end of the fourth current direction switch being electrically connected to the other end of the third current direction switch, and the other end of the fourth current direction switch being grounded;

[0031] The sixth test source output terminal is electrically connected to the other end of the third current direction switching switch.

[0032] According to some embodiments of the present invention, the capacitor sorting and testing circuit board includes:

[0033] A plurality of switching units, each of which is provided with a plurality of switching switches;

[0034] a plurality of first radio frequency coaxial connectors, electrically connected to the switching unit and also used to be electrically connected to the detection end of the detection loop switching circuit;

[0035] a plurality of output terminals electrically connected to the switching unit, electrically connected to the first RF coaxial connector, and further configured to be electrically connected to a detection end of the detection loop switching circuit;

[0036] The control interface terminal is electrically connected to the control end of the switching unit and is also used to electrically connect to the detection circuit of the control part of the tested circuit board and the driving circuit of the control part of the tested circuit board.

[0037] According to some embodiments of the present invention, the detection loop switching circuit includes a first detection loop switching circuit and a second detection loop switching circuit, and the first detection loop switching circuit includes:

[0038] a plurality of first detection switching switches, wherein a control end of the first detection switching switch is electrically connected to the control unit, and one end of the first detection switching switch is electrically connected to an output end of the test source switching circuit;

[0039] a plurality of second RF coaxial connectors, one end of each of the second RF coaxial connectors being electrically connected to the other end of the first detection switch, and the other end of each of the second RF coaxial connectors being electrically connected to the first RF coaxial connector;

[0040] The second detection loop switching circuit includes:

[0041] a plurality of second detection switching switches, wherein a control end of the second detection switching switch is electrically connected to the control unit, and one end of the second detection switching switch is electrically connected to an output end of the test source switching circuit;

[0042] A plurality of connection terminals, one end of each connection terminal is electrically connected to the other end of the second detection switch, the other end of each connection terminal is electrically connected to the output terminal, and the connection terminal is also electrically connected to the second RF coaxial connector.

[0043] According to some embodiments of the present invention, the detection loop switching circuit further includes a first Darlington transistor array, one end of the first Darlington transistor being electrically connected to the control unit; the first detection switching switch includes a first optocoupler solid-state relay and a first current-limiting resistor, the first optocoupler solid-state relay being electrically connected to the other end of the first Darlington transistor via the first current-limiting resistor, the first optocoupler solid-state relay being further electrically connected to the output end of the test source switching circuit, and the first optocoupler solid-state relay being further electrically connected to one end of the second RF coaxial connector;

[0044] The detection loop switching circuit also includes a second Darlington transistor array, one end of the second Darlington transistor is electrically connected to the control unit; the second detection switching switch includes a second optocoupler solid-state relay and a second current-limiting resistor, the second optocoupler solid-state relay is electrically connected to the other end of the second Darlington transistor through the second current-limiting resistor, the second optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the second optocoupler solid-state relay is also electrically connected to one end of the wiring terminal.

[0045] According to some embodiments of the present invention, the detection loop differential sampling circuit includes:

[0046] a first analog switch electrically connected to the control unit and also electrically connected to the first detection loop switching circuit;

[0047] a first current limiting resistor, wherein one end of the first current limiting resistor is electrically connected to the first analog switch;

[0048] a second analog switch electrically connected to the control unit and also electrically connected to the second detection loop switching circuit;

[0049] a second current limiting resistor, one end of the second current limiting resistor being electrically connected to the second analog switch;

[0050] a third analog switch electrically connected to the control unit, electrically connected to the second detection loop switching circuit, and electrically connected to one end of the second current-limiting resistor;

[0051] a first differential amplifier circuit, wherein an input end of the first differential amplifier circuit is electrically connected to the other end of the first current-limiting resistor, and an output end of the first differential amplifier circuit is electrically connected to the control unit;

[0052] A second differential amplifier circuit, wherein an input end of the second differential amplifier circuit is electrically connected to the other end of the second current limiting resistor, and an output end of the second differential amplifier circuit is electrically connected to the control unit.

[0053] According to some embodiments of the present invention, the control part detection circuit of the circuit board under test includes:

[0054] a fourth analog switch, electrically connected to the control unit and also electrically connected to the capacitor sorting and testing circuit board;

[0055] a voltage-dividing resistor, one end of the voltage-dividing resistor being electrically connected to the control unit, and the other end of the voltage-dividing resistor being electrically connected to the fourth analog switch;

[0056] An amplifier circuit is electrically connected to the control unit.

[0057] According to some embodiments of the present invention, the driving circuit of the control part of the circuit board under test includes:

[0058] A MOS transistor, wherein the gate of the MOS transistor is electrically connected to the control unit, the drain of the MOS transistor is electrically connected to the capacitor sorting test circuit board under test, and the source of the MOS transistor is grounded.

[0059] The detection circuit for capacitor sorting and testing circuit boards according to the embodiments of the present invention has at least the following beneficial effects: by setting a test source, a test source current acquisition circuit, and a test source switching circuit, suitable voltage and current are selected for different detection needs to ensure the accuracy of each test data; by setting a detection loop switching switch circuit, a measurement loop or channel is established for the switch of the board under test; the forward conduction impedance, reverse conduction impedance, forward conduction time and reverse shutdown time of the switch of the board under test are measured by the detection loop differential sampling circuit; the quality of the electronic components of the control part circuit of the board under test is detected by the control part detection circuit of the board under test, and the accuracy of the test data is ensured by the control part detection circuit of the board under test. The driving circuit drives the on and off of the switching switch of the switching unit of the control part of the circuit in the tested circuit board; through the above structure, the circuit can automatically detect the forward on-impedance, reverse on-impedance, forward on-time, reverse on-time, forward off-time, reverse off-time of the switching switch of the tested MLCC capacitor quickly, the insulation impedance between the channels of the switching switch, the forward breakdown voltage and reverse breakdown voltage of the TVS clamping diode, and the circuit of the control part of the switching switch; it can be seen that automatic detection can be realized, the detection quality can be improved, the detection cost can be reduced, and large-scale mass production can be achieved to meet the needs of various equipment and various testing needs of customers, and it is convenient for wide application.

[0060] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0062] Figure 1 A module connection diagram of a detection circuit for a capacitor sorting and testing circuit board according to an embodiment of the present invention;

[0063] Figure 2 for Figure 1 A schematic diagram of a circuit board interface of a capacitor sorting and switching circuit board under test for a detection circuit of a capacitor sorting and testing circuit board is shown;

[0064] Figure 3 for Figure 1 A circuit board topology diagram of a capacitor sorting and switching circuit board under test for a detection circuit of a capacitor sorting and testing circuit board is shown;

[0065] Figure 4 for Figure 2 The first embodiment of the detailed schematic diagram of the switching unit of the tested capacitor sorting switching circuit board of the detection circuit of the capacitor sorting test circuit board is shown;

[0066] Figure 5 for Figure 2 The second embodiment of the detailed schematic diagram of the switching unit of the tested capacitor sorting switching circuit board of the detection circuit of the capacitor sorting test circuit board is shown;

[0067] Figure 6 for Figure 1 A circuit board topology diagram of a detection loop switching circuit of a detection circuit of a capacitor sorting test circuit board and a circuit board for sorting and switching the capacitors under test is shown;

[0068] Figure 7 for Figure 1 The first embodiment of the detailed schematic diagram of the test source switching circuit of the detection circuit of the capacitor sorting test circuit board is shown;

[0069] Figure 8 for Figure 1 The second embodiment of the detailed schematic diagram of the test source switching circuit of the detection circuit of the capacitor sorting test circuit board is shown;

[0070] Figure 9 for Figure 7 8 is a detailed schematic diagram of a driving circuit portion of a test source switching circuit of a detection circuit for a capacitor sorting test circuit board;

[0071] Figure 10 for Figure 1 A detailed schematic diagram of a test source circuit for a detection circuit of a capacitor sorting test circuit board is shown;

[0072] Figure 11 for Figure 1 The detailed schematic diagram of the detection loop switching circuit of the detection circuit of the capacitor sorting test circuit board is shown;

[0073] Figure 12 for Figure 1 The schematic diagram of the detection loop differential sampling circuit of the detection circuit of the capacitor sorting test circuit board is shown;

[0074] Figure 13 for Figure 1The detailed schematic diagram of the driving circuit and detection circuit of the control part of the tested circuit board of the detection circuit of the capacitor sorting test circuit board is shown;

[0075] Figure 14 for Figure 1 FIG. 1 shows a circuit diagram of a control unit 300 for a detection circuit of a capacitor sorting test circuit board.

[0076] Figure 1: Test source 100; Test source current acquisition circuit 200; Control unit 300; Test source switching circuit 400, Test source switching switch circuit 410, Test source current direction switching circuit 420; First detection loop switching switch circuit 510, Second detection loop switching switch circuit 520; Test capacitor sorting test circuit board 600; Detection loop differential sampling circuit 700; Test circuit board control part detection circuit 810, Test circuit board control part drive circuit 820; Host computer 900, Display screen 910. DETAILED DESCRIPTION

[0077] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0078] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention.

[0079] In the description of the present invention, "several" means more than one, "plurality" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" in the description is solely for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, implicitly specifying the number of the indicated technical features, or implicitly specifying the order of the indicated technical features.

[0080] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0081] In the description of the present invention, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the exemplary expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0082] Reference Figure 1-14 The present invention proposes a detection circuit for a capacitor sorting and testing circuit board, comprising:

[0083] A test source 100 is used to provide electrical energy;

[0084] A test source current acquisition circuit 200 , wherein an input end of the test source current acquisition circuit 200 is electrically connected to the test source 100 , and the test source current acquisition circuit 200 is used to acquire the output current of the test source 100 ;

[0085] A control unit 300 , the control unit 300 is electrically connected to the output end of the test source current acquisition circuit 200 ;

[0086] A test source switching circuit 400, wherein an input terminal of the test source switching circuit 400 is electrically connected to the test source 100, and a control terminal of the test source switching circuit 400 is electrically connected to the control unit 300, and the test source switching circuit 400 is used to adjust the voltage and current of the test source 100;

[0087] A detection loop switching circuit, wherein an input end of the detection loop switching circuit is electrically connected to an output end of the test source switching circuit 400 , and a control end of the detection loop switching circuit is electrically connected to the control unit 300 ;

[0088] The capacitor sorting test circuit board 600 is electrically connected to the detection end of the detection loop switching circuit;

[0089] The detection loop differential sampling circuit 700 is electrically connected to the output end of the detection loop switching circuit and is also electrically connected to the control unit 300;

[0090] The circuit board under test control part detection circuit 810 is electrically connected to the capacitor sorting test circuit board under test 600 and is also electrically connected to the control unit 300;

[0091] The driving circuit 820 of the circuit board under test control part is electrically connected to the capacitor sorting test circuit board 600 under test, and is also electrically connected to the control unit 300 .

[0092] Specifically, in this embodiment, the overall detection circuit block diagram of the detection circuit board for capacitor sorting test, that is, the detection circuit board for MLCC capacitor rapid detection and sorting switching is as shown in FIG. Figure 1 As shown, it includes a control unit 300 (MCU), a test source 100, a current acquisition circuit 200 of the test source, a switching circuit 410 of the test source, a current direction switching circuit 420 of the test source, a first detection loop switching circuit 510, a second detection loop switching circuit 520, a detection loop differential sampling circuit 700, a driving circuit 820 of the control part of the tested MLCC capacitor fast detection and sorting switching circuit board 600 and its detection circuit 810, a display screen 910, a PC-side host computer 900 and a tested MLCC capacitor fast detection and sorting switching circuit board 600;

[0093] It should be noted that the control unit 300 includes a single chip microcomputer, a PLC, an FPGA, etc. In this embodiment, the control unit 300 adopts an MCU.

[0094] The test source 100 is a voltage source that provides different voltages and currents to the test circuit;

[0095] The test source current acquisition circuit 200 is used to acquire the output current of the test source 100;

[0096] The switching switch circuit 400 of the test source is used to select appropriate voltage and current for different testing needs to ensure the accuracy of each test data. It provides power for performance testing of the forward conduction impedance, reverse conduction impedance, insulation resistance, forward conduction time, and direction shutdown time of the switching switch of the capacitor sorting test circuit board 600 under test, and the clamping TVS diode in the clamping protection circuit.

[0097] The current direction switching circuit 420 of the test source changes the measurement current direction for forward and reverse direction measurement;

[0098] The first detection loop switching circuit 510 establishes a measurement loop or channel for the switch of the board under test;

[0099] The second detection loop switching circuit 520 establishes a measurement loop or channel for the switch of the board under test;

[0100] The detection loop differential sampling circuit 700 is used to measure the forward conduction impedance, reverse conduction impedance, forward conduction time, and reverse turn-off time of the tested board.

[0101] The driving circuit 820 and the detection circuit 810 of the control part of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test are used to drive and control the control part circuit in the MLCC capacitor rapid detection and sorting switching circuit board 600 under test to control the conduction and disconnection of the switching unit switch thereof;

[0102] The detection circuit 810 of the control part of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test is used to detect the quality of the electronic components of the control part circuit in the MLCC capacitor rapid detection and sorting switching circuit board 600 under test;

[0103] Display screen 910, for displaying test results;

[0104] PC host computer 900, used to display the test results;

[0105] The MLCC capacitor rapid detection and sorting switching circuit board 600 is the object to be detected;

[0106] The detection circuit control unit 300 circuit is as follows Figure 14 shown.

[0107] Reference Figure 1 Furthermore, in some embodiments of the present invention, it further includes:

[0108] Display screen 910, display screen 910 is electrically connected to control unit 300;

[0109] The host computer 900 is electrically connected to the control unit 300 .

[0110] Specifically, in this embodiment, the display screen 910 and the PC host computer 900 are both used to display the detection results.

[0111] Further, refer to Figure 10 In some embodiments of the present invention, the test source 100 includes: a first voltage source, a second voltage source, a third voltage source, a first current limiting resistor, a second current limiting resistor, a third current limiting resistor, a first test source output terminal, a second test source output terminal, and a third test source output terminal; wherein, one end of the first current limiting resistor is electrically connected to the first voltage source, and the other end of the first current limiting resistor is electrically connected to the first test source output terminal; one end of the second current limiting resistor is electrically connected to the second voltage source, and the other end of the second current limiting resistor is electrically connected to the second test source output terminal; one end of the third current limiting resistor is electrically connected to the third voltage source, and the other end of the third current limiting resistor is electrically connected to the third test source output terminal.

[0112] Specifically, in this embodiment, the detailed schematic diagram of the test source 100 of the detection circuit is as follows: Figure 10 As shown:

[0113] The current-limiting resistor R15 of test source 1 (i.e., the first voltage source) has one end connected to 3.3V and the other end connected to Source1. The current-limiting resistor R16 of test source 2 (i.e., the second voltage source) has one end connected to 3.3V and the other end connected to Source2. The current-limiting resistor R15 of test source 3 (i.e., the third voltage source) has one end connected to 15V and the other end connected to Source3.

[0114] In the test source switching circuit SW29, the first pin of the optocoupler solid-state relay_MOS output U7 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U7 is connected to one end of the current-limiting resistor R18, the other end of the current-limiting resistor R18 is connected to Sig_Source_01n, the third pin of the optocoupler solid-state relay_MOS output U7 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U7 is connected to Source1; the first pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_01, and the 16th pin of U8 is connected to Sig_Source_01n;

[0115] In the test source switching circuit SW30, the first pin of the optocoupler solid-state relay_MOS output U10 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U10 is connected to one end of the current-limiting resistor R26, the other end of the current-limiting resistor R26 is connected to Sig_Source_02n, the third pin of the optocoupler solid-state relay_MOS output U10 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U10 is connected to Source2; the second pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_02, and the 15th pin of U8 is connected to Sig_Source_02n;

[0116] In the test source switching circuit SW31, the first pin of the optocoupler solid-state relay_MOS output U11 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U11 is connected to one end of the current-limiting resistor R30, the other end of the current-limiting resistor R30 is connected to Sig_Source_03n, the third pin of the optocoupler solid-state relay_MOS output U11 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U11 is connected to Source3; the third pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_03, and the 14th pin of U8 is connected to Sig_Source_03n;

[0117] The current direction switching circuit SW32 of the test source is connected. The first pin of the optocoupler solid-state relay_MOS output U12 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U12 is connected to one end of the current-limiting resistor R31, and the other end of the current-limiting resistor R31 is connected to Sig_Source_04n. The third pin of the optocoupler solid-state relay_MOS output U12 is connected to Source5, and the fourth pin of the optocoupler solid-state relay_MOS output U12 is connected to Source4; the fourth pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_04, and the 13th pin of U8 is connected to Sig_Source_04n.

[0118] The current direction switching circuit SW34 of the test source is connected. The first pin of the optocoupler solid-state relay_MOS output U15 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U15 is connected to one end of the current-limiting resistor R34, and the other end of the current-limiting resistor R34 is connected to Sig_Source_05n. The third pin of the optocoupler solid-state relay_MOS output U15 is connected to GND, and the fourth pin of the optocoupler solid-state relay_MOS output U15 is connected to Source5. The fifth pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_05, and the 12th pin of U8 is connected to Sig_Source_05n.

[0119] The current direction switching circuit SW33 of the test source is connected. The first pin of the optocoupler solid-state relay_MOS output U13 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U13 is connected to one end of the current-limiting resistor R32, and the other end of the current-limiting resistor R32 is connected to Sig_Source_06n. The third pin of the optocoupler solid-state relay_MOS output U13 is connected to Source6, and the fourth pin of the optocoupler solid-state relay_MOS output U13 is connected to Source4; the sixth pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_06, and the 11th pin of U8 is connected to Sig_Source_06n.

[0120] The current direction switching circuit SW35 of the test source is connected. The first pin of the optocoupler solid-state relay_MOS output U14 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U14 is connected to one end of the current-limiting resistor R33, and the other end of the current-limiting resistor R33 is connected to Sig_Source_07n. The third pin of the optocoupler solid-state relay_MOS output U45 is connected to GND, and the fourth pin of the optocoupler solid-state relay_MOS output U14 is connected to Source6. The seventh pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_07, and the tenth pin of U8 is connected to Sig_Source_07n.

[0121] The first pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_01, the second pin of U8 is connected to the control unit 300Sig_Source_02, the third pin of U8 is connected to the control unit 300Sig_Source_03, the fourth pin of U8 is connected to the control unit 300Sig_Source_04, the fifth pin of U8 is connected to the control unit 300Sig_Source_05, the sixth pin of U8 is connected to the control unit 300Sig_Source_06, the seventh pin of U8 is connected to the control unit 300Sig_Source_07, and the The 8th pin of U8 is connected to the control unit 300GND, the 9th pin of U8 is connected to the control unit 3005V, the 10th pin of U8 is connected to Sig_Source_07n, the 11th pin of U8 is connected to Sig_Source_06n, the 12th pin of U8 is connected to Sig_Source_05n, the 13th pin of U8 is connected to Sig_Source_04n, the 14th pin of U8 is connected to Sig_Source_03n, the 15th pin of U8 is connected to the control unit 300Sig_Source_02n, and the 16th pin of U8 is connected to Sig_Source_01n;

[0122] One end of the current limiting resistor R23 of the current acquisition circuit of the 100mA level test power supply is connected to Source1, and the other end is connected to ADC1 of the control unit 300; one end of the filter capacitor C3 is connected to GND, and the other end is connected to ADC1 of the control unit 300;

[0123] One end of the current limiting resistor R25 of the current acquisition circuit of the uA-level test power supply is connected to Source2, and the other end is connected to VCC3; one end of the filter capacitor C5 is connected to VCC3, and the other end is connected to GND; the third pin of the operational amplifier U9A is connected to VCC3; the second pin of the operational amplifier U9A is connected to the first pin output VCC4, the fourth pin of the operational amplifier U9A is connected to GND, and the eighth pin of the operational amplifier U9A is connected to 5V; one end of the current limiting resistor R24 is connected to VCC4, and the other end is connected to ADC2 of the control unit 300; one end of the filter capacitor C4 is connected to GND, and the other end is connected to ADC2 of the control unit 300;

[0124] One end of the voltage-divider and current-limiting resistor R28 of the current acquisition circuit of the TVS test power supply is connected to Source3, and the other end is connected to VCC6; one end of the voltage-divider resistor R29 is connected to VCC6, and the other end is connected to GND; one end of the filter capacitor C7 is connected to VCC6, and the other end is connected to GND; the 5th pin of the operational amplifier U9A is connected to VCC6; the 6th pin of the operational amplifier U9A is connected to the 7th pin output VCC7; one end of the current-limiting resistor R27 is connected to VCC7, and the other end is connected to ADC3 of the control unit 300; one end of the filter capacitor C6 is connected to GND, and the other end is connected to ADC3 of the control unit 300.

[0125] Reference Figure 7-9 Furthermore, in some embodiments of the present invention, the test source switching circuit 400 includes a test source switching circuit 410 and a test source current direction switching circuit 420. The test source switching circuit 410 includes:

[0126] a first test source switching switch, one end of the first test source switching switch being electrically connected to the other end of the first current limiting resistor;

[0127] a fourth test source terminal electrically connected to the other terminal of the first test source switch;

[0128] a second test source switching switch, one end of the second test source switching switch being electrically connected to the other end of the second current limiting resistor, and the other end of the second test source switching switch being electrically connected to the fourth test source end;

[0129] a third test source switching switch, one end of the third test source switching switch being electrically connected to the other end of the third current limiting resistor, and the other end of the third test source switching switch being electrically connected to the fourth test source end;

[0130] The test source current direction switching switch 420 includes:

[0131] a first current direction switching switch, one end of the first current direction switching switch being electrically connected to the other end of the first test source switching switch;

[0132] a second current direction switching switch, one end of the second current direction switching switch being electrically connected to the other end of the first current direction switching switch, and the other end of the second current direction switching switch being grounded;

[0133] a fifth test source terminal electrically connected to the other end of the first current direction switching switch;

[0134] a third current direction switching switch, one end of the third current direction switching switch being electrically connected to the other end of the second test source switching switch;

[0135] a fourth current direction switch, one end of the fourth current direction switch being electrically connected to the other end of the third current direction switch, and the other end of the fourth current direction switch being grounded;

[0136] The sixth test source terminal is electrically connected to the other end of the third current direction switching switch.

[0137] Specifically, in the first embodiment of this embodiment, the switching circuit SW29 of the test source works as follows: Figure 7 As shown, it includes a switching circuit and a driving circuit thereof; the switching circuit includes an optocoupler solid-state relay_MOS output U7 and a current-limiting resistor R18, the first pin of the optocoupler solid-state relay_MOS output U7 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U7 is connected to one end of the current-limiting resistor R18, the other end of the current-limiting resistor R18 is connected to Sig_Source_01n, the third pin of the optocoupler solid-state relay_MOS output U7 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U7 is connected to Sig_Source_01n. The pin is connected to Source1; the driving circuit includes resistors R19, R20, and N-channel MOS transistor Q9. One end of resistor R19 is connected to control unit 300Sig_Source_01, and the other end is connected to the gate of pin 1, G, of N-channel MOS transistor Q9. One end of resistor R20 is connected to GND, and the other end is connected to the gate of pin 1, G, of N-channel MOS transistor Q9. The drain of pin 2, D, of N-channel MOS transistor Q9 is connected to Sig_Source_01n. The source of pin 3, S, of N-channel MOS transistor Q9 is connected to GND.

[0138] In the second embodiment of this embodiment, the switching circuit SW29 of the test source works as follows: Figure 8As shown, it includes a switching circuit and a driving circuit thereof; the first pin of the optocoupler phototransistor U7 of the switching circuit is connected to 5V, the second pin of the optocoupler phototransistor U7 is connected to one end of the current limiting resistor R18, the other end of the current limiting resistor R18 is connected to Sig_Source_01n, the third pin of the optocoupler phototransistor U7 is respectively connected to the anode of the voltage stabilizing diode D15, the anode of the voltage stabilizing diode D16, the third pin S source of the N-channel MOS transistor Q10 and the third pin S source of the N-channel MOS transistor Q11, the fourth pin of the optocoupler phototransistor U7 is respectively connected to one end of the resistor R21 and the resistor R22; the other end of the resistor R21 is respectively connected to the cathode of the voltage stabilizing diode D15 and the gate of the first pin G of the N-channel MOS transistor Q10, the N-channel MOS transistor Q10 The drain of the second pin D is connected to Source1; the other end of the resistor R22 is respectively connected to the cathode of the voltage stabilizing diode D16 and the gate of the first pin G of the N-channel MOS transistor Q11, and the drain of the second pin D of the N-channel MOS transistor Q11 is connected to Source4; the driving circuit includes resistors R19, R20, and an N-channel MOS transistor Q9. One end of the resistor R19 is connected to the control unit 300Sig_Source_01, and the other end is connected to the gate of the first pin G of the N-channel MOS transistor Q9; one end of the resistor R20 is connected to GND, and the other end is connected to the gate of the first pin G of the N-channel MOS transistor Q9; the drain of the second pin D of the N-channel MOS transistor Q9 is connected to Sig_Source_01n; and the source of the third pin S of the N-channel MOS transistor Q9 is connected to GND.

[0139] The test source switching circuit driving circuit diagram is as follows Figure 9As shown, the Darlington transistor array U8, such as TBD62003, etc.; the first pin of U8 is connected to the control unit 300Sig_Source_01, the second pin of U8 is connected to the control unit 300Sig_Source_02, the third pin of U8 is connected to the control unit 300Sig_Source_03, the fourth pin of U8 is connected to the control unit 300Sig_Source_04, the fifth pin of U8 is connected to the control unit 300Sig_Source_05, the sixth pin of U8 is connected to the control unit 300Sig_Source_06, and the seventh pin of U8 is connected to the control unit 300Sig_Source_07. _Source_07, the 8th pin of U8 is connected to GND, the 9th pin of U8 is connected to 5V, the 10th pin of U8 is connected to Sig_Source_07n, the 11th pin of U8 is connected to Sig_Source_06n, the 12th pin of U8 is connected to Sig_Source_05n, the 13th pin of U8 is connected to the control unit 300Sig_Source_04n, the 14th pin of U8 is connected to Sig_Source_03n, the 15th pin of U8 is connected to Sig_Source_02n, and the 16th pin of U8 is connected to Sig_Source_01n;

[0140] Figure 7 、 Figure 8 The driving circuit of the switching circuit shown can be used Figure 10 The Darlington transistor array TBD62003 is used for driving control;

[0141] Figure 7 、 Figure 8 The N-channel MOS transistor Q9 of the driving circuit of the switching circuit shown can be replaced by an NPN transistor;

[0142] comprehensive Figure 6 、 Figure 7 、 Figure 8 and Figure 9 , Figure 6 The schematic diagram of the detection circuit switching switches SW25, SW26, SW27, SW28, SW30, SW31, SW32, SW33, SW34, SW35, SW36, SW37, SW38, SW39, SW40, SW41, SW42 and SW43 is as follows Figure 7 、 Figure 8 Detection circuit switching switch SW29 principle Figure 1 Sample.

[0143] Reference Figure 2-5Furthermore, in some embodiments of the present invention, the capacitor under test sorting and testing circuit board (also referred to as the MLCC capacitor under test fast detection and sorting switching circuit board 600 ) 600 includes:

[0144] A plurality of switching units, each of which is provided with a plurality of switching switches;

[0145] A plurality of first radio frequency coaxial connectors are electrically connected to the switching unit and are also used to be electrically connected to the detection end of the detection loop switching circuit;

[0146] A plurality of output terminals are electrically connected to the switching unit, are electrically connected to the first radio frequency coaxial connector, and are also used to be electrically connected to the detection end of the detection loop switching circuit;

[0147] The control interface terminal is electrically connected to the control end of the switching unit, and is also used to electrically connect to the detection circuit 810 of the control part of the tested circuit board and the driving circuit 820 of the control part of the tested circuit board.

[0148] Specifically, in this embodiment, the interface diagram of the MLCC capacitor rapid detection and sorting switching circuit board 600 is as follows: Figure 2 As shown, the RF coaxial connectors are RF1, RF2, RF3, RF4, RF5, and RF6, the output terminals are J1, J2, J3, J4, J5, J6, J7, and J8, and the interface terminal of the control part is J9;

[0149] The topology diagram of the 600 circuit board for rapid detection and sorting of the MLCC capacitor under test is as follows: Figure 3 As shown:

[0150] Pin 1 of the RF coaxial connector RF1 is connected to Guard#1, and pin 2 is connected to Guard#1. Pin 1 of the RF coaxial connector RF2 is connected to Pot#1, and pin 2 is connected to Guard#1. Pin 1 of the RF coaxial connector RF3 is connected to Cur#1, and pin 2 is connected to Guard#1. Pin 1 of the RF coaxial connector RF4 is connected to Cur#2, and pin 2 is connected to Guard#2. Pin 1 of the RF coaxial connector RF5 is connected to Pot#2, and pin 2 is connected to Guard#2. Pin 1 of the RF coaxial connector RF6 is connected to Guard#2, and pin 2 is connected to Guard#2.

[0151] Pin 1 of terminal J1 is connected to CH1, and pin 2 is connected to Guard#1; Pin 1 of terminal J2 is connected to CH2, and pin 2 is connected to Guard#1; Pin 1 of terminal J3 is connected to CH3, and pin 2 is connected to Guard#1; Pin 1 of terminal J4 is connected to CH4, and pin 2 is connected to Guard#1; Pin 1 of terminal J5 is connected to CH5, and pin 2 is connected to Guard#2; Pin 1 of terminal J6 is connected to CH6, and pin 2 is connected to Guard#2; Pin 1 of terminal J7 is connected to CH7, and pin 2 is connected to Guard#2; Pin 1 of terminal J8 is connected to CH8, and pin 2 is connected to Guard#2;

[0152] The pins of terminal J9 are connected to Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, Sig_ch8n, 5V and GND1 respectively;

[0153] The switching units CH1 have switches SW1, SW2, and SW3, and their control signal is Sig_ch1n. One end of SW1 is connected to Guard#1, and the other end is connected to CH1. One end of SW2 is connected to Pot#1, and the other end is connected to CH1. One end of SW3 is connected to Cur#1, and the other end is connected to CH1.

[0154] The switches in the switching unit CH2 are SW4, SW5, and SW6, and their control signal is Sig_ch2n. One end of SW4 is connected to Guard#1, and the other end is connected to CH2. One end of SW5 is connected to Pot#1, and the other end is connected to CH2. One end of SW6 is connected to Cur#1, and the other end is connected to CH2.

[0155] The switches in the switching unit CH3 are SW7, SW8, and SW9, and their control signal is Sig_ch3n. One end of SW7 is connected to Guard#1, and the other end is connected to CH3. One end of SW8 is connected to Pot#1, and the other end is connected to CH3. One end of SW9 is connected to Cur#1, and the other end is connected to CH3.

[0156] The switches in the switching unit CH4 are SW10, SW11, and SW12, and their control signal is Sig_ch4n. One end of SW10 is connected to Guard#1, and the other end is connected to CH4. One end of SW11 is connected to Pot#1, and the other end is connected to CH4. One end of SW12 is connected to Cur#1, and the other end is connected to CH4.

[0157] The switches in the switching unit CH5 are SW13, SW14, and SW15, and their control signal is Sig_ch5n. One end of SW13 is connected to Guard#2, and the other end is connected to CH5. One end of SW14 is connected to Pot#2, and the other end is connected to CH5. One end of SW15 is connected to Cur#2, and the other end is connected to CH5.

[0158] The switches in the switching unit CH6 are SW16, SW17, and SW18, and their control signal is Sig_ch6n. One end of SW16 is connected to Guard#2, and the other end is connected to CH6. One end of SW17 is connected to Pot#2, and the other end is connected to CH6. One end of SW18 is connected to Cur#2, and the other end is connected to CH6.

[0159] The switches in the switching unit CH7 are SW19, SW20, and SW21, and their control signal is Sig_ch7n. One end of SW19 is connected to Guard#2, and the other end is connected to CH7. One end of SW20 is connected to Pot#2, and the other end is connected to CH7. One end of SW21 is connected to Cur#2, and the other end is connected to CH7.

[0160] The switches in the switching unit CH8 are SW22, SW23, and SW24, and their control signal is Sig_ch8n. One end of SW22 is connected to Guard#2, and the other end is connected to CH8. One end of SW23 is connected to Pot#2, and the other end is connected to CH8. One end of SW24 is connected to Cur#2, and the other end is connected to CH8.

[0161] One end of the TVS diode D1 for clamping protection is connected to Guard#1, and the other end is connected to CH1; one end of the TVS diode D2 for clamping protection is connected to Guard#1, and the other end is connected to CH2; one end of the TVS diode D3 for clamping protection is connected to Guard#1, and the other end is connected to CH3; one end of the TVS diode D4 for clamping protection is connected to Guard#1, and the other end is connected to CH4; one end of the TVS diode D5 for clamping protection is connected to Guard#2, and the other end is connected to CH5; one end of the TVS diode D6 for clamping protection is connected to Guard#6, and the other end is connected to CH6; one end of the TVS diode D7 for clamping protection is connected to Guard#7, and the other end is connected to CH7; one end of the TVS diode D8 for clamping protection is connected to Guard#8, and the other end is connected to CH8;

[0162] Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 as shown in Example 1. Figure 4As shown, it includes a switching unit CH1 switching switch SW1, a switching unit CH1 switching switch SW2, a switching unit CH1 switching switch SW3 and a clamping protection circuit;

[0163] Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600. Example 1: Switch switch SW1, the first pin of the optocoupler phototransistor U3 is connected to 5V, the second pin of the optocoupler phototransistor U3 is connected to one end of the current limiting resistor R5, the other end of the current limiting resistor R5 is connected to SHch1, the third pin of the optocoupler phototransistor U3 is respectively connected to the anode of the Zener diode D11, the anode of the Zener diode D14, the third pin S source of the N-channel MOS transistor Q3, and the third pin S source of the N-channel MOS transistor Q7, the fourth pin of the optocoupler phototransistor U3 is respectively connected to one end of the resistor R3 and the resistor R10; the other end of the resistor R3 is respectively connected to the cathode of the Zener diode D11 and the first pin S source of the N-channel MOS transistor Q3. The gate of pin G is connected, and the drain of pin 2 D of N-channel MOS transistor Q3 is connected to Guard#1; the other end of resistor R10 is respectively connected to the cathode of Zener diode D14 and the gate of pin 1 G of N-channel MOS transistor Q7, and the drain of pin 2 D of N-channel MOS transistor Q7 is connected to CH1; the reverse drive circuit includes resistor R4, N-channel MOS transistor Q4 and filter capacitor C1 to form a signal inverter; one end of resistor R4 is connected to 5V, and the other end is connected to Sig_ch1n; one end of filter capacitor C1 is connected to GND1, and the other end is connected to Sig_ch1n; the gate of pin 1 G of N-channel MOS transistor Q4 is connected to Sig_ch1n, the drain of pin 2 D is connected to SHch1, and the source of pin 3 S is connected to GND1;

[0164] Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600. Example 1: Switch SW2, the first pin of the optocoupler phototransistor U2 is connected to 5V, the second pin of the optocoupler phototransistor U2 is connected to one end of the current limiting resistor R7, and the other end of the current limiting resistor R7 is connected to Sig_ch1n, and the third pin of the optocoupler phototransistor U2 is respectively connected to the anode of the Zener diode D10, the anode of the Zener diode D13, the source of the third pin of the N-channel MOS tube Q2, and the source of the N-channel MOS tube Q2. The source of the third pin S of the S-type transistor Q6 is connected in common. The fourth pin of the optocoupler phototransistor U2 is connected to one end of the resistor R2 and one end of the resistor R9 respectively. The other end of the resistor R2 is connected to the cathode of the voltage-stabilizing diode D10 and the gate of the first pin G of the N-channel MOS transistor Q2 respectively. The drain of the second pin D of the N-channel MOS transistor Q2 is connected to Pot#1. The other end of the resistor R9 is connected to the cathode of the voltage-stabilizing diode D13 and the gate of the first pin G of the N-channel MOS transistor Q6 respectively. The drain of the second pin D of the N-channel MOS transistor Q6 is connected to CH1.

[0165] Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test Example 1 Switching switch SW3, the first pin of the optocoupler phototransistor U1 is connected to 5V, the second pin of the optocoupler phototransistor U1 is connected to one end of the current limiting resistor R6, and the other end of the current limiting resistor R6 is connected to Sig_ch1n, and the third pin of the optocoupler phototransistor U1 is respectively connected to the anode of the Zener diode D9, the anode of the Zener diode D12, the source of the third pin of the N-channel MOS tube Q1, and the source of the N-channel MOS tube Q1. The source of the third pin S of the S-type transistor Q5 is connected in common. The fourth pin of the optocoupler phototransistor U1 is connected to one end of the resistor R1 and one end of the resistor R8 respectively. The other end of the resistor R1 is connected to the cathode of the voltage-stabilizing diode D9 and the gate of the first pin G of the N-channel MOS transistor Q1 respectively. The drain of the second pin D of the N-channel MOS transistor Q1 is connected to Cur#1. The other end of the resistor R8 is connected to the cathode of the voltage-stabilizing diode D12 and the gate of the first pin G of the N-channel MOS transistor Q5 respectively. The drain of the second pin D of the N-channel MOS transistor Q5 is connected to CH1.

[0166] Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor under test rapid detection and sorting switching circuit board 600. Example 1: One end of the clamping TVS diode D1 in the clamping protection circuit is connected to CH1, and the other end is connected to Guard#1;

[0167] Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600, if any Figure 5 As shown, it includes a switching unit CH1 switching switch SW1, a switching unit CH1 switching switch SW2, a switching unit CH1 switching switch SW3 and a clamping protection circuit;

[0168] Detailed schematic diagram of switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600, Example 2: Switch SW1, pin 1 of the optocoupler solid-state relay_MOS output U6 is connected to 5V, pin 2 of the optocoupler solid-state relay_MOS output U6 is connected to one end of the current-limiting resistor R12, the other end of the current-limiting resistor R12 is connected to SHch1, pin 3 of the optocoupler solid-state relay_MOS output U6 is connected to CH1, and pin 4 of the optocoupler solid-state relay_MOS output U6 is connected to Guard#1; the reverse drive circuit includes resistor R11, N-channel MOS transistor Q8, and filter capacitor C2 to form a signal inverter; resistor R13 has one end connected to 5V and the other end connected to Sig_ch1n; filter capacitor C2 has one end connected to GND1 and the other end connected to Sig_ch1n; pin 1 G of the N-channel MOS transistor Q13 is connected to the gate and Sig_ch1n, pin 2 D is connected to the drain and SHch1, and pin 3 S is connected to the source and GND1;

[0169] Detailed schematic diagram of switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600, Example 2: Switch SW2 is switched, the first pin of the optocoupler solid-state relay_MOS output U5 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U5 is connected to one end of the current-limiting resistor R14, the other end of the current-limiting resistor R14 is connected to Sig_ch1n, the third pin of the optocoupler solid-state relay_MOS output U5 is connected to CH1, and the fourth pin of the optocoupler solid-state relay_MOS output U5 is connected to Pot#1;

[0170] Detailed schematic diagram of switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600. Example 2: Switch SW3 is switched, the first pin of the optocoupler solid-state relay_MOS output U4 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U4 is connected to one end of the current-limiting resistor R13, the other end of the current-limiting resistor R13 is connected to Sig_ch1n, the third pin of the optocoupler solid-state relay_MOS output U4 is connected to CH1, and the fourth pin of the optocoupler solid-state relay_MOS output U4 is connected to Cur#1;

[0171] Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor under test rapid detection and sorting switching circuit board 600. Example 2: One end of the clamping TVS diode D1 in the clamping protection circuit is connected to CH1, and the other end is connected to Guard#1;

[0172] The detailed schematic diagrams of the switching units CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 in the topology diagram of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test are the same as those in Example 1 and Example 2, respectively; the corresponding control signals are Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n, respectively;

[0173] Combining the above Figure 2 and Figure 3 The MLCC capacitor rapid detection and sorting switching circuit board 600 under test is the detection target of the present invention, including the forward conduction impedance of the switch, the reverse conduction impedance of the switch, the insulation impedance of the switch, the forward conduction time of the switch, the direction off time of the switch and the performance test of the clamping TVS diode in the clamping protection circuit.

[0174] Reference Figure 1 and Figure 6Furthermore, in some embodiments of the present invention, the detection circuit switching circuit includes a first detection circuit switching circuit 510 and a second detection circuit switching circuit 520. The first detection circuit switching circuit 510 includes:

[0175] A plurality of first detection switching switches, wherein a control end of the first detection switching switch is electrically connected to the control unit 300 , and one end of the first detection switching switch is electrically connected to an output end of the test source switching circuit;

[0176] a plurality of second RF coaxial connectors, one end of the second RF coaxial connector being electrically connected to the other end of the first detection switch, and the other end of the second RF coaxial connector being electrically connected to the first RF coaxial connector;

[0177] The second detection loop switching circuit 520 includes:

[0178] A plurality of second detection switching switches, wherein a control end of the second detection switching switch is electrically connected to the control unit 300, and one end of the second detection switching switch is electrically connected to the output end of the test source switching circuit;

[0179] A plurality of connection terminals, one end of the connection terminal is electrically connected to the other end of the second detection switch, the other end of the connection terminal is electrically connected to the output terminal, and the connection terminal is also electrically connected to the second RF coaxial connector.

[0180] Specifically, in this embodiment, the topological structure diagram of the detection loop switching switch circuit 410 and the tested MLCC capacitor fast detection and sorting switching circuit board 600 is as shown in FIG. Figure 6 As shown:

[0181] Connect one end of the current-limiting resistor R15 of test source 1 to 3.3V and the other end to Source1; connect one end of the current-limiting resistor R16 of test source 2 to 3.3V and the other end to Source2; connect one end of the current-limiting resistor R15 of test source 3 to 15V and the other end to Source3;

[0182] One end of the test source switching switch SW29 is connected to Source1, and the other end is connected to Source4; one end of the test source switching switch SW30 is connected to Source2, and the other end is connected to Source4; one end of the test source switching switch SW31 is connected to Source3, and the other end is connected to Source4; one end of the test source current direction switching switch SW32 is connected to Source4, and the other end is connected to Source5; one end of the test source current direction switching switch SW33 is connected to Source4, and the other end is connected to Source6; one end of the test source current direction switching switch SW34 is connected to Source5, and the other end is connected to GND; one end of the test source current direction switching switch SW34 is connected to Source6, and the other end is connected to GND;

[0183] One end of the switch SW28 of the first detection loop switching circuit 510 is connected to Source5, and the other end is connected to Guard;

[0184] One end of the switch SW27 of the first detection loop switching circuit 510 is connected to Source5, and the other end is connected to the first pin of the RF coaxial connector RF8 and the first pin Cur of RF9, the second pin Guard of the RF coaxial connector RF8, and the second pin Guard of the RF coaxial connector RF9;

[0185] One end of the switch SW26 of the first detection loop switching circuit 510 is connected to Source5, and the other end is connected to the first pin (Pot) of the RF coaxial connector RF7 and the first pin (Pot) of RF10, the second pin (Guard) of the RF coaxial connector RF7, and the second pin (Guard) of the RF coaxial connector RF10;

[0186] One end of the switch SW25 of the first detection loop switching circuit 510 is connected to Source6, and the other end is connected to Pot;

[0187] A shielded coaxial cable is used to connect the RF coaxial connector RF7 of the first detection loop switching circuit 510 to the RF coaxial connector RF2 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is connected to the first pin of the RF coaxial connector RF7 and RF2 respectively, and the coaxial cable shielding net is connected to the second pin of the RF coaxial connector RF7 and RF2 respectively;

[0188] A shielded coaxial cable is used to connect the RF coaxial connector RF8 of the first detection loop switching circuit 510 to the RF coaxial connector RF3 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is connected to the first pin of the RF coaxial connector RF7 and RF2 respectively, and the coaxial cable shielding net is connected to the second pin of the RF coaxial connector RF8 and RF3 respectively;

[0189] A shielded coaxial cable is used to connect the RF coaxial connector RF9 of the first detection loop switching circuit 510 to the RF coaxial connector R4 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is connected to the first pin of the RF coaxial connector RF7 and RF2 respectively, and the coaxial cable shielding net is connected to the second pin of the RF coaxial connector RF9 and RF4 respectively;

[0190] A shielded coaxial cable is used to connect the RF coaxial connector RF10 of the first detection loop switching circuit 510 to the RF coaxial connector RF5 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is connected to the first pin of the RF coaxial connector RF7 and RF2 respectively, and the coaxial cable shielding net is connected to the second pin of the RF coaxial connector RF10 and RF5 respectively;

[0191] One end of the switch SW36 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH1' of the connection terminal J10, and the second pin of the connection terminal J10 is connected to Guard;

[0192] One end of the switch SW37 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH2' of the connection terminal J11, and the second pin of the connection terminal J11 is connected to Guard;

[0193] One end of the switch SW38 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH3' of the connection terminal J12, and the second pin of the connection terminal J12 is connected to Guard;

[0194] One end of the switch SW39 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH4' of the connection terminal J13, and the second pin of the connection terminal J13 is connected to Guard;

[0195] One end of the switch SW40 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH5' of the connection terminal J14, and the second pin of the connection terminal J14 is connected to Guard;

[0196] One end of the switch SW41 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH6' of the connection terminal J15, and the second pin of the connection terminal J15 is connected to Guard;

[0197] One end of the switch SW42 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH7' of the connection terminal J16, and the second pin of the connection terminal J16 is connected to Guard;

[0198] One end of the switch SW43 of the second detection loop switching circuit 520 is connected to Source6, and the other end is connected to the first pin CH8' of the connection terminal J17, and the second pin of the connection terminal J17 is connected to Guard;

[0199] A shielded coaxial cable is used to connect the connection terminal J10 of the second detection loop switching circuit 520 to the connection terminal J1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is connected to the first pin of the connection terminal J10 and J1 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J10 and J1 respectively;

[0200] A shielded coaxial cable is used to connect the connection terminal J11 of the second detection loop switching circuit 520 to the connection terminal J2 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is connected to the first pin of the connection terminal J11 and J2 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J11 and J2 respectively;

[0201] A shielded coaxial cable is used to connect the connection terminal J12 of the second detection loop switching circuit 520 to the connection terminal J3 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test. The center line of the coaxial cable is connected to the first pin of the connection terminal J12 and J3 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J12 and J3 respectively.

[0202] A shielded coaxial cable is used to connect the connection terminal J13 of the second detection loop switching circuit 520 to the connection terminal J4 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test. The center line of the coaxial cable is connected to the first pin of the connection terminal J13 and J4 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J13 and J4 respectively.

[0203] A shielded coaxial cable is used to connect the connection terminal J14 of the second detection loop switching circuit 520 to the connection terminal J5 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test. The center line of the coaxial cable is connected to the first pin of the connection terminal J14 and J5 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J14 and J5 respectively.

[0204] A shielded coaxial cable is used to connect the connection terminal J15 of the second detection loop switching circuit 520 to the connection terminal J6 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test. The center line of the coaxial cable is connected to the first pin of the connection terminal J15 and J6 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J15 and J6 respectively.

[0205] A shielded coaxial cable is used to connect the connection terminal J6 of the second detection loop switching circuit 520 to the connection terminal J7 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test. The center line of the coaxial cable is connected to the first pin of the connection terminal J16 and J7 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J16 and J7 respectively.

[0206] A shielded coaxial cable is used to connect the connection terminal J17 of the second detection loop switching circuit 520 to the connection terminal J8 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test. The center line of the coaxial cable is connected to the first pin of the connection terminal J17 and J8 respectively, and the coaxial cable shield is connected to the second pin of the connection terminal J17 and J8 respectively.

[0207] The control signals Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_chn, and Sig_ch8n of the switching unit of the MLCC capacitor rapid detection and sorting switching circuit board 600 are connected to the connection terminal J1 respectively.

[0208] In the above topology diagram of the detection loop switching circuit and the tested MLCC capacitor rapid detection and sorting switching circuit board 600, Guard is connected to Guard#1 and Guard#2 respectively, Cur is connected to Cur#1 and Cur#2 respectively, Pot is connected to Pot#1 and Pot#2 respectively, CH1' is connected to CH1, CH2' is connected to CH2, CH3' is connected to CH3, CH4' is connected to CH4, CH5' is connected to CH5, CH6' is connected to CH6, CH7' is connected to CH7, and CH8' is connected to CH8.

[0209] Reference Figure 11 Furthermore, in some embodiments of the present invention, the detection loop switching circuit further includes a first Darlington transistor array, one end of the first Darlington transistor being electrically connected to the control unit 300; the first detection switching switch includes a first optocoupler solid-state relay and a first current-limiting resistor, the first optocoupler solid-state relay being electrically connected to the other end of the first Darlington transistor via the first current-limiting resistor, the first optocoupler solid-state relay being further electrically connected to the output end of the test source switching circuit, and the first optocoupler solid-state relay being further electrically connected to one end of the second RF coaxial connector;

[0210] The detection loop switching circuit also includes a second Darlington transistor array, one end of the second Darlington transistor is electrically connected to the control unit 300; the second detection switching switch includes a second optocoupler solid-state relay and a second current-limiting resistor, the second optocoupler solid-state relay is electrically connected to the other end of the second Darlington transistor through the second current-limiting resistor, the second optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the second optocoupler solid-state relay is also electrically connected to one end of the wiring terminal.

[0211] Specifically, in this embodiment, the detailed principle diagram of the detection loop switching circuit is as follows: Figure 11 As shown:

[0212] The first detection loop switching circuit 510 switches the switch circuit SW25. The first pin of the optocoupler solid-state relay_MOS output U16 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U16 is connected to one end of the current-limiting resistor R35, and the other end of the current-limiting resistor R35 is connected to Sig_Pot_01n. The third pin of the optocoupler solid-state relay_MOS output U16 is connected to Pot, and the fourth pin of the optocoupler solid-state relay_MOS output U16 is connected to Source6. The first pin of the Darlington transistor array U20 is connected to Sig_Pot_01 of the control unit 300, and the 16th pin of U20 is connected to Sig_Pot_01n of the switching switch.

[0213] The first detection loop switching circuit 510 switches the switch circuit SW26. The first pin of the optocoupler solid-state relay_MOS output U17 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U17 is connected to one end of the current-limiting resistor R36, and the other end of the current-limiting resistor R36 is connected to Sig_Pot_02n. The third pin of the optocoupler solid-state relay_MOS output U17 is connected to Pot, and the fourth pin of the optocoupler solid-state relay_MOS output U17 is connected to Source5. The second pin of the Darlington transistor array U20 is connected to Sig_Pot_02 of the control unit 300, and the 15th pin of U20 is connected to Sig_Pot_02n of the switching switch.

[0214] The first detection loop switching circuit 510 switches the switch circuit SW27, the first pin of the optocoupler solid-state relay_MOS output U18 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U18 is connected to one end of the current-limiting resistor R37, the other end of the current-limiting resistor R37 is connected to Sig_Cur_01n, the third pin of the optocoupler solid-state relay_MOS output U18 is connected to Cur, and the fourth pin of the optocoupler solid-state relay_MOS output U18 is connected to Source5; the third pin of the Darlington transistor array U20 is connected to Sig_Cur of the control unit 300, and the 14th pin of U20 is connected to Sig_Cur_n of the switching switch;

[0215] The first detection loop switching circuit 510 switches the switch circuit SW28, the first pin of the optocoupler solid-state relay_MOS output U19 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U19 is connected to one end of the current-limiting resistor R38, the other end of the current-limiting resistor R38 is connected to Sig_Pot_01n, the third pin of the optocoupler solid-state relay_MOS output U19 is connected to Guard, and the fourth pin of the optocoupler solid-state relay_MOS output U19 is connected to Source5; the fourth pin of the Darlington transistor array U20 is connected to Sig_Guard of the control unit 300, and the 13th pin of U20 is connected to Sig_Guard_n of the switching switch;

[0216] The second detection loop switching circuit 520 switches the switch circuit SW36. The first pin of the optocoupler solid-state relay_MOS output U21 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U21 is connected to one end of the current-limiting resistor R39, and the other end of the current-limiting resistor R39 is connected to Sig_CH01n. The third pin of the optocoupler solid-state relay_MOS output U21 is connected to CH1', and the fourth pin of the optocoupler solid-state relay_MOS output U21 is connected to Source6. The fifth pin of the Darlington transistor array U20 is connected to Sig_CH01 of the control unit 300, and the 12th pin of U20 is connected to Sig_CH01n of the switching switch.

[0217] The second detection loop switching circuit 520 switches the switch circuit SW37. The first pin of the optocoupler solid-state relay_MOS output U22 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U22 is connected to one end of the current-limiting resistor R40, and the other end of the current-limiting resistor R40 is connected to Sig_CH02n. The third pin of the optocoupler solid-state relay_MOS output U22 is connected to CH2', and the fourth pin of the optocoupler solid-state relay_MOS output U22 is connected to Source6. The first pin of the Darlington transistor array U25 is connected to Sig_CH02 of the control unit 300, and the 16th pin of U20 is connected to Sig_CH02n of the switching switch.

[0218] The second detection loop switching circuit 520 switches the switch circuit SW38. The first pin of the optocoupler solid-state relay_MOS output U23 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U23 is connected to one end of the current-limiting resistor R41, and the other end of the current-limiting resistor R41 is connected to Sig_CH03n. The third pin of the optocoupler solid-state relay_MOS output U23 is connected to CH3', and the fourth pin of the optocoupler solid-state relay_MOS output U23 is connected to Source6. The second pin of the Darlington transistor array U25 is connected to Sig_CH03 of the control unit 300, and the 15th pin of U20 is connected to Sig_CH03n of the switching switch.

[0219] The second detection loop switching circuit 520 switches the switch circuit SW39, the first pin of the optocoupler solid-state relay_MOS output U24 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U24 is connected to one end of the current-limiting resistor R42, the other end of the current-limiting resistor R42 is connected to Sig_CH04n, the third pin of the optocoupler solid-state relay_MOS output U24 is connected to CH4', and the fourth pin of the optocoupler solid-state relay_MOS output U24 is connected to Source6; the third pin of the Darlington transistor array U25 is connected to Sig_CH04 of the control unit 300, and the 14th pin of U20 is connected to Sig_CH04n of the switching switch;

[0220] The second detection loop switching circuit 520 switches the switch circuit SW40. The first pin of the optocoupler solid-state relay_MOS output U26 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U26 is connected to one end of the current-limiting resistor R43, and the other end of the current-limiting resistor R43 is connected to Sig_CH05n. The third pin of the optocoupler solid-state relay_MOS output U26 is connected to CH5', and the fourth pin of the optocoupler solid-state relay_MOS output U26 is connected to Source6. The fourth pin of the Darlington transistor array U25 is connected to Sig_CH05 of the control unit 300, and the 13th pin of U20 is connected to Sig_CH05n of the switching switch.

[0221] The second detection loop switching circuit 520 switches the switch circuit SW41, the first pin of the optocoupler solid-state relay_MOS output U27 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U27 is connected to one end of the current-limiting resistor R44, the other end of the current-limiting resistor R44 is connected to Sig_CH06n, the third pin of the optocoupler solid-state relay_MOS output U27 is connected to CH6', and the fourth pin of the optocoupler solid-state relay_MOS output U27 is connected to Source6; the fifth pin of the Darlington transistor array U25 is connected to Sig_CH06 of the control unit 300, and the 12th pin of U20 is connected to Sig_CH06n of the switching switch;

[0222] The second detection loop switching circuit 520 switches the switch circuit SW42, the first pin of the optocoupler solid-state relay_MOS output U28 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U28 is connected to one end of the current-limiting resistor R45, the other end of the current-limiting resistor R45 is connected to Sig_CH07n, the third pin of the optocoupler solid-state relay_MOS output U28 is connected to CH7', and the fourth pin of the optocoupler solid-state relay_MOS output U28 is connected to Source6; the sixth pin of the Darlington transistor array U25 is connected to Sig_CH07 of the control unit 300, and the 11th pin of U20 is connected to Sig_CH07n of the switching switch;

[0223] The second detection loop switching circuit 520 switches the switch circuit SW43. The first pin of the optocoupler solid-state relay_MOS output U29 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U29 is connected to one end of the current-limiting resistor R46, and the other end of the current-limiting resistor R46 is connected to Sig_CH08n. The third pin of the optocoupler solid-state relay_MOS output U29 is connected to CH8', and the fourth pin of the optocoupler solid-state relay_MOS output U29 is connected to Source6. The seventh pin of the Darlington transistor array U25 is connected to Sig_CH08 of the control unit 300, and the tenth pin of U20 is connected to Sig_CH08n of the switching switch.

[0224] The 6th, 7th, and 8th pins of the Darlington transistor array U20 are connected to GND, and the 9th pin is connected to 5V; the 8th pin of the Darlington transistor array U20 is connected to GND, and the 9th pin is connected to 5V.

[0225] Reference Figure 12 Furthermore, in some embodiments of the present invention, the detection loop differential sampling circuit 700 includes:

[0226] The first analog switch is electrically connected to the control unit 300 and is also electrically connected to the first detection loop switching circuit 510;

[0227] a first current limiting resistor, one end of the first current limiting resistor being electrically connected to the first analog switch;

[0228] The second analog switch is electrically connected to the control unit 300 and is also electrically connected to the second detection loop switching circuit 520;

[0229] a second current limiting resistor, one end of the second current limiting resistor being electrically connected to the second analog switch;

[0230] a third analog switch electrically connected to the control unit 300, electrically connected to the second detection loop switching circuit 520, and electrically connected to one end of the second current limiting resistor;

[0231] a first differential amplifier circuit, wherein an input end of the first differential amplifier circuit is electrically connected to the other end of the first current-limiting resistor, and an output end of the first differential amplifier circuit is electrically connected to the control unit 300;

[0232] The second differential amplifier circuit has an input end electrically connected to the other end of the second current-limiting resistor, and an output end electrically connected to the control unit 300 .

[0233] Specifically, in this embodiment, the detection loop differential sampling circuit schematic is as follows: Figure 12 As shown,

[0234] Pin 11 of the analog switch U30 is connected to HSig_CD4051_A of the control unit 300, pin 10 is connected to HSig_CD4051_B of the control unit 300, pin 9 is connected to HSig_CD4051_C of the control unit 300, pins 6, 7, and 8 are connected to GND, pin 16 is connected to 15 V, pin 13 is connected to the first detection circuit switching circuit 510Cur, pin 14 is connected to the first detection circuit switching circuit 510Pot, pin 15 is connected to the first detection circuit switching circuit 510Guard, and pin 3 is connected to one end of the current-limiting resistor R47;

[0235] Pin 11 of the analog switch U31 is connected to LSig_CD4051_A1 of the control unit 300, pin 10 is connected to LSig_CD4051_B1 of the control unit 300, pin 9 is connected to LSig_CD4051_C1 of the control unit 300, pins 6, 7, and 8 are connected to GND, pin 16 is connected to 15 V, pin 13 is connected to the second detection circuit switching circuit 520CH1′, pin 14 is connected to the second detection circuit switching circuit 520CH2′, pin 15 is connected to the second detection circuit switching circuit 520CH3′, pin 12 is connected to the second detection circuit switching circuit 520CH4′, pin 1 is connected to the first detection circuit switching circuit 510Pot, and pin 3 is connected to one end of the current-limiting resistor R48;

[0236] Pin 11 of the analog switch U32 is connected to LSig_CD4051_A2 of the control unit 300, pin 10 is connected to LSig_CD4051_B2 of the control unit 300, pin 9 is connected to LSig_CD4051_C2 of the control unit 300, pins 6, 7, and 8 are connected to GND, pin 16 is connected to 15 V, pin 13 is connected to the second detection circuit switching circuit 520CH5', pin 14 is connected to the second detection circuit switching circuit 520CH6', pin 15 is connected to the second detection circuit switching circuit 520CH7', pin 12 is connected to the second detection circuit switching circuit 520CH8', and pin 3 is connected to one end of the current-limiting resistor R48;

[0237] The other end of the current limiting resistor R47 is connected to VCC8; one end of the filter capacitor C8 is connected to VCC8, and the other end is connected to GND; the third pin of the follower U33A is connected to VCC8, the second pin is connected to the first pin VCC10, the fourth pin is connected to GND, and the eighth pin is connected to 5V;

[0238] The other end of the current limiting resistor R48 is connected to VCC9; one end of the filter capacitor C9 is connected to VCC9, and the other end is connected to GND; the 5th pin of the follower U33B is connected to VCC9, and the 6th pin is connected to the 7th pin VCC11;

[0239] Differential amplifier circuit (I) includes resistors R49, R50, R55, R53, R57, a filter capacitor C10, and an operational amplifier U34A; one end of resistor R49 is connected to VCC11, and the other end is connected to VCC12; one end of resistor R50 is connected to VCC10, and the other end is connected to VCC13; one end of resistor R55 is connected to VCC12, and the other end is connected to VCC16; one end of resistor R53 is connected to VCC13, and the other end is connected to GND; the non-inverting input end of pin 3 of the operational amplifier is connected to VCC13, the inverting input end of pin 2 is connected to VCC12, the output end of pin 1 is connected to VCC16, the pin 4 is connected to GND, and the pin 8 is connected to 5V; one end of resistor R57 is connected to VCC16, and the other end is connected to ADC4 of the control unit 300; one end of filter capacitor C10 is connected to GND, and the other end is connected to ADC4 of the control unit 300;

[0240] The differential amplifier circuit (II) includes resistors R51, R52, R56, R54, R58, a filter capacitor C11, and an operational amplifier U34B; one end of the resistor R51 is connected to VCC10, and the other end is connected to VCC14; one end of the resistor R52 is connected to VCC11, and the other end is connected to VCC15; one end of the resistor R56 is connected to VCC14, and the other end is connected to VCC17; one end of the resistor R54 is connected to VCC15, and the other end is connected to GND; the non-inverting input end of pin 5 of the operational amplifier is connected to VCC15, the inverting input end of pin 6 is connected to VCC14, and the output end of pin 7 is connected to VCC17; one end of the resistor R58 is connected to VCC17, and the other end is connected to ADC5 of the control unit 300; one end of the filter capacitor C11 is connected to GND, and the other end is connected to ADC5 of the control unit 300.

[0241] Reference Figure 13 Furthermore, in some embodiments of the present invention, the control portion detection circuit 810 of the circuit board under test includes:

[0242] a fourth analog switch electrically connected to the control unit 300 and also electrically connected to the capacitor sorting test circuit board under test;

[0243] a voltage-dividing resistor, one end of the voltage-dividing resistor being electrically connected to the control unit 300 , and the other end of the voltage-dividing resistor being electrically connected to the fourth analog switch;

[0244] The amplifier circuit is electrically connected to the control unit 300 .

[0245] Reference Figure 13 Furthermore, in some embodiments of the present invention, the control portion driving circuit 820 of the tested circuit board includes:

[0246] MOS tube, the gate of the MOS tube is electrically connected to the control unit 300, the drain of the MOS tube is electrically connected to the capacitor sorting test circuit board under test, and the source of the MOS tube is grounded.

[0247] The detailed schematic diagram of the detection circuit of the control part of the MLCC capacitor rapid detection and sorting switching circuit board 600 is as follows: Figure 13As shown, the 11th pin of the analog switch U35 is connected to the K_CD4051_A of the control unit 300, the 10th pin of the analog switch U35 is connected to the K_CD4051_B of the control unit 300, the 9th pin of the analog switch U35 is connected to the K_CD4051_C of the control unit 300, the 6th, 7th and 8th pins of the analog switch U35 are connected to GND, the 16th pin of the analog switch U35 is connected to 5V, the 13th pin of the analog switch U35 is connected to the 1st pin Sig_ch1n of the control terminal J9 of the tested board, the 14th pin of the analog switch U35 is connected to the 2nd pin Sig_ch2n of the control terminal J9 of the tested board, the 15th pin of the analog switch U35 is connected to the 3rd pin Sig_ch3n of the control terminal J9 of the tested board, the 12th pin of the analog switch U35 is connected to the 4th pin Sig_ch4n of the control terminal J9 of the tested board, and the 15th pin of the analog switch U35 is connected to the 3rd pin Sig_ch4n of the control terminal J9 of the tested board. The first pin of the analog switch U35 is connected to the fifth pin Sig_ch5n of the control terminal J9 of the board under test, the second pin of the analog switch U35 is connected to the sixth pin Sig_ch6n of the control terminal J9 of the board under test, the third pin of the analog switch U35 is connected to the seventh pin Sig_ch7n of the control terminal J9 of the board under test, the fourth pin of the analog switch U35 is connected to the eighth pin Sig_ch8n of the control terminal J9 of the board under test, the ninth pin of the control terminal J9 of the board under test is connected to 5V, and the tenth pin of the control terminal J9 of the board under test is connected to GND1; the third pin of the analog switch U35 is connected to one end of the voltage dividing resistor R62, and the other end of the voltage dividing resistor R62 is connected to ADC6 of the control unit 300; one end of the voltage dividing resistor R60 is connected to ADC6 of the control unit 300, and the other end is connected to GND; one end of the filter capacitor C12 is connected to ADC6 of the control unit 300, and the other end is connected to GND;

[0248] The amplifier circuit includes resistors R64, R66, R675, a filter capacitor C13 and an operational amplifier U36A; one end of the resistor R64 is connected to VCC22, and the other end is connected to GND; one end of the resistor R66 is connected to VCC22, and the other end is connected to VCC23; the non-inverting input end of the 3rd pin of the operational amplifier U36A is connected to GND1, the inverting input end of the 2nd pin is connected to VCC22, the output end of the 1st pin is connected to VCC23, the 4th pin is connected to GND, and the 8th pin is connected to 5V; one end of the resistor R67 is connected to VCC23, and the other end is connected to ADC7 of the control unit 300; one end of the filter capacitor C13 is connected to GND, and the other end is connected to ADC7 of the control unit 300; one end of the current sampling resistor R65 is connected to GND, and the other end is connected to GND1;

[0249] The switching unit CH1 driving circuit of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 includes resistors R59, R61, R63 and an N-channel MOS transistor Q12. One end of the resistor R59 is connected to the control unit 300 Sig_ch1, and the other end is connected to the gate of the first pin G of the N-channel MOS transistor Q12; one end of the resistor R61 is connected to GND, and the other end is connected to the gate of the first pin G of the N-channel MOS transistor Q12; one end of the resistor R63 is connected to the switching unit CH1 control signal Sig_ch1n, and the other end is connected to the drain of the second pin D of the N-channel MOS transistor Q9; the source of the third pin S of the N-channel MOS transistor Q9 is connected to GND;

[0250] The driving circuits of switching unit CH2, switching unit CH3, switching unit CH4, switching unit CH5, switching unit CH6, switching unit CH7, and switching unit CH8 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test are the same as those of switching unit CH1, and the signals connected to the control unit 300 are Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 respectively.

[0251] The above is a detailed description of the circuit principle of the detection circuit for capacitor sorting and testing circuit boards according to an embodiment of the present invention. Based on the above circuit structure, more specifically, when using the detection circuit for capacitor sorting and testing circuit boards according to an embodiment of the present invention, the detailed working principle and detection steps when performing detection work are as follows:

[0252] The working principle of the detection loop differential sampling circuit 700 is as follows:

[0253] Since operational amplifiers U33A and U33B are follower circuits, VCC8=VCC10 (1), VCC9=VCC11 (2);

[0254] According to the "virtual short" working principle of operational amplifiers U34A and U34B, VCC12=VCC13 (3), VCC14=VCC15 (4);

[0255]

[0256]

[0257]

[0258]

[0259] From the above formulas (1), (2), (3), (5) and (6), we can get

[0260] From the above formulas (1), (2), (4), (7) and (8), we can get

[0261] In the embodiment of the present invention, R49=R50=R51=R52, R53=R54=R55=R56, then

[0262] Formula (9) can be simplified to

[0263] Formula (10) can be simplified to

[0264] When VCC8>VCC9, the control unit 300 selects ADC4 to collect measurement data, that is, VCC16 is the test voltage collected by ADC4;

[0265] When VCC8<VCC9, the control unit 300 selects ADC5 to collect measurement data, that is, VCC17 collects the test voltage for ADC4;

[0266] The test principle of the switch on-resistance, on-time and off-time of the switching circuit board 600 for the MLCC capacitor rapid detection and sorting is described in detail using SW1, SW2 and SW3 of the switching unit CH1 as an example:

[0267] ①Select 100mA level to test the power switch principle

[0268] The control unit 300 outputs Sig_Source_01 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U7 are connected, and the switching circuit SW29 of the test source corresponding to the topology diagram is turned on;

[0269] The control unit 300 outputs Sig_Source_02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U10 are cut off, and the switching circuit SW30 of the test source corresponding to the topology diagram is disconnected;

[0270] The control unit 300 outputs Sig_Source_03 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U11 are cut off, and the switching circuit SW31 of the test source corresponding to the topology diagram is disconnected;

[0271] From the above, the test source Source4 is equal to Source1;

[0272] ②Select uA level to test the power switch principle

[0273] The control unit 300 outputs Sig_Source_01 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U7 are cut off, and the switching circuit SW29 of the test source corresponding to the topology diagram is disconnected;

[0274] The control unit 300 outputs Sig_Source_02 at a high level, the third and fourth pins of the optocoupler solid-state relay _MOS output U10 are connected, and the switching circuit SW30 of the test source corresponding to the topology diagram is turned on;

[0275] The control unit 300 outputs Sig_Source_03 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U11 are cut off, and the switching circuit SW31 of the test source corresponding to the topology diagram is disconnected;

[0276] From the above, the test source Source4 is equal to Source2;

[0277] ③Select TVS to test the power switch principle

[0278] The control unit 300 outputs Sig_Source_01 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U7 are cut off, and the switching circuit SW29 of the test source corresponding to the topology diagram is disconnected;

[0279] The control unit 300 outputs Sig_Source_02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U10 are cut off, and the switching circuit SW30 of the test source corresponding to the topology diagram is disconnected;

[0280] The control unit 300 outputs Sig_Source_03 at a high level, the third and fourth pins of the optocoupler solid-state relay _MOS output U11 are connected, and the switching circuit SW31 of the test source corresponding to the topology diagram is turned on;

[0281] From the above, the test source Source4 is equal to Source2;

[0282] ④ Test the power supply current forward conduction switch principle and control unit 300ADC differential data acquisition selection

[0283] The control unit 300 outputs Sig_Source_04 at a high level, the third and fourth pins of the optocoupler solid-state relay _MOS output U12 are connected, and the current direction switching circuit SW32 of the test source corresponding to the topology diagram is turned on;

[0284] The control unit 300 outputs Sig_Source_05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U15 are cut off, and the current direction switching circuit SW34 of the test source corresponding to the topology diagram is disconnected;

[0285] The control unit 300 outputs Sig_Source_06 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U13 are cut off, and the current direction switching circuit SW33 of the test source corresponding to the topology diagram is disconnected;

[0286] The control unit 300 outputs Sig_Source_07 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U14 are connected, and the current direction switching circuit SW34 of the test source corresponding to the topology diagram is turned on;

[0287] Based on ① and ④, the current direction is 3.3V→Source1→Source5→the switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test→Source6→GND; the control unit 300 selects ADC4 to collect measurement data;

[0288] ⑤ Test the power supply current reverse conduction switch principle control unit 300ADC differential data acquisition selection

[0289] The control unit 300 outputs Sig_Source_04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U12 are cut off, and the current direction switching circuit SW32 of the test source corresponding to the topology diagram is disconnected;

[0290] The control unit 300 outputs Sig_Source_05 at a high level, the third and fourth pins of the optocoupler solid-state relay _MOS output U15 are connected, and the current direction switching circuit SW34 of the test source corresponding to the topology diagram is turned on;

[0291] The control unit 300 outputs Sig_Source_06 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U13 are connected, and the current direction switching circuit SW33 of the test source corresponding to the topology diagram is turned on;

[0292] The control unit 300 outputs Sig_Source_07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U14 are cut off, and the current direction switching circuit SW34 of the test source corresponding to the topology diagram is disconnected;

[0293] Based on ① and ⑤, the current direction is 3.3V→Source1→Source6→the switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test→Source5→GND; the control unit 300 selects ADC5 to collect measurement data;

[0294] ⑥ First detection circuit switching circuit 510Guard switching switch conduction circuit schematic diagram

[0295] The control unit 300 outputs Sig_Pot_01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U16 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW25 in the topology diagram is disconnected;

[0296] The control unit 300 outputs Sig_Pot_02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U17 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW26 in the topology diagram is disconnected;

[0297] The control unit 300 outputs Sig_Cur at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U18 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW27 in the topology diagram is disconnected;

[0298] The control unit 300 outputs Sig_Guard as a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U19 are connected, and the corresponding first detection loop switching circuit 510 switching switch circuit SW28 in the topology diagram is turned on;

[0299] ⑦ Principle diagram of the first detection circuit switching switch circuit 510Pot switching switch conduction circuit

[0300] The control unit 300 outputs Sig_Pot_01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U16 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW25 in the topology diagram is disconnected;

[0301] The control unit 300 outputs Sig_Pot_02 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U17 are connected, and the corresponding first detection loop switching circuit 510 switching switch circuit SW26 in the topology diagram is turned on;

[0302] The control unit 300 outputs Sig_Cur at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U18 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW27 in the topology diagram is disconnected;

[0303] The control unit 300 outputs Sig_Guard as a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U19 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW28 is disconnected;

[0304] ⑧ Schematic diagram of the first detection circuit switching switch circuit 510Cur switching switch conduction circuit

[0305] The control unit 300 outputs Sig_Pot_01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U16 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW25 in the topology diagram is disconnected;

[0306] The control unit 300 outputs Sig_Pot_02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U17 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW26 in the topology diagram is disconnected;

[0307] The control unit 300 outputs Sig_Cur at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U18 are connected, and the corresponding first detection loop switching circuit 510 switching switch circuit SW27 in the topology diagram is turned on;

[0308] The control unit 300 outputs Sig_Guard as a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U19 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW28 is disconnected;

[0309] ⑨ Schematic diagram of the switching circuit 520CH1' of the second detection circuit

[0310] The control unit 300 outputs Sig_CH01 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is turned on;

[0311] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0312] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0313] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0314] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0315] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0316] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0317] The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW43 in the topology diagram is disconnected;

[0318] ⑩ Schematic diagram of the second detection circuit switching switch circuit 520CH2' switching switch conduction circuit

[0319] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0320] The control unit 300 outputs Sig_CH02 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is turned on;

[0321] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0322] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0323] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0324] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0325] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0326] The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW43 in the topology diagram is disconnected;

[0327] ⑪ Schematic diagram of the second detection circuit switching switch circuit 520CH3' switching switch conduction circuit

[0328] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0329] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0330] The control unit 300 outputs Sig_CH03 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is turned on;

[0331] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0332] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0333] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0334] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0335] The control unit 300 outputs Sig_CH08 as a low level, the optocoupler solid-state relay _MOS output U29 between the 3rd and 4th pins is cut off, and the corresponding topology diagram of the second detection circuit switching circuit 520 switching switch circuit SW43 is disconnected.

[0336] ⑫ Schematic diagram of the second detection circuit switching switch circuit 520CH4' switching switch conduction circuit

[0337] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0338] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0339] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0340] The control unit 300 outputs Sig_CH04 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is turned on;

[0341] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0342] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0343] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0344] The control unit 300 outputs Sig_CH08 as a low level, the optocoupler solid-state relay _MOS output U29 between the 3rd and 4th pins is cut off, and the corresponding topology diagram of the second detection circuit switching circuit 520 switching switch circuit SW43 is disconnected.

[0345] ⑬ Schematic diagram of the second detection circuit switching switch circuit 520CH5' switching switch conduction circuit

[0346] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0347] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0348] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0349] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0350] The control unit 300 outputs Sig_CH05 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is turned on;

[0351] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0352] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0353] The control unit 300 outputs Sig_CH08 as a low level, the optocoupler solid-state relay _MOS output U29 between the 3rd and 4th pins is cut off, and the corresponding topology diagram of the second detection circuit switching circuit 520 switching switch circuit SW43 is disconnected.

[0354] ⑭ Schematic diagram of the second detection circuit switching switch circuit 520CH6' switching switch conduction circuit

[0355] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0356] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0357] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0358] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0359] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0360] The control unit 300 outputs Sig_CH06 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is turned off;

[0361] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0362] The control unit 300 outputs Sig_CH08 as a low level, the optocoupler solid-state relay _MOS output U29 between the 3rd and 4th pins is cut off, and the corresponding topology diagram of the second detection circuit switching circuit 520 switching switch circuit SW43 is disconnected.

[0363] ⑮ Schematic diagram of the second detection circuit switching switch circuit 520CH7' switching switch conduction circuit

[0364] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0365] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0366] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0367] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0368] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0369] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0370] The control unit 300 outputs Sig_CH07 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is turned on;

[0371] The control unit 300 outputs Sig_CH08 as a low level, the optocoupler solid-state relay _MOS output U29 between the 3rd and 4th pins is cut off, and the corresponding topology diagram of the second detection circuit switching circuit 520 switching switch circuit SW43 is disconnected.

[0372] ⑯ Schematic diagram of the second detection circuit switching switch circuit 520CH8' switching switch conduction circuit

[0373] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0374] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0375] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0376] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0377] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0378] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0379] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0380] The control unit 300 outputs Sig_CH08 as high level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U29 are connected, and the corresponding topology diagram of the second detection circuit switching circuit 520 switches the switch circuit SW43 to conduct.

[0381] ⑰ Schematic diagram of the second detection circuit switching circuit 520 with all switches disconnected

[0382] The control unit 300 outputs Sig_CH01 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected;

[0383] The control unit 300 outputs Sig_CH02 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected;

[0384] The control unit 300 outputs Sig_CH03 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is disconnected;

[0385] The control unit 300 outputs Sig_CH04 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected;

[0386] The control unit 300 outputs Sig_CH05 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected;

[0387] The control unit 300 outputs Sig_CH06 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is disconnected;

[0388] The control unit 300 outputs Sig_CH07 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is disconnected;

[0389] The control unit 300 outputs Sig_CH08 as a low level, the optocoupler solid-state relay _MOS output U29 between the 3rd and 4th pins is cut off, and the corresponding topology diagram of the second detection circuit switching circuit 520 switching switch circuit SW43 is disconnected.

[0390] ⑱ The second detection circuit switching switch circuit 520 is fully switched on to open the circuit principle diagram

[0391] The control unit 300 outputs Sig_CH01 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is turned on;

[0392] The control unit 300 outputs Sig_CH02 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is turned on;

[0393] The control unit 300 outputs Sig_CH03 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is turned on;

[0394] The control unit 300 outputs Sig_CH04 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is turned on;

[0395] The control unit 300 outputs Sig_CH05 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is turned on;

[0396] The control unit 300 outputs Sig_CH06 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is turned on;

[0397] The control unit 300 outputs Sig_CH07 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is turned on;

[0398] The control unit 300 outputs Sig_CH08 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW43 in the topology diagram is turned on;

[0399] The steps for detecting the forward conduction impedance of the switch SW1 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0400] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0401] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0402] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0403] Select ①, ④, ⑥, and ⑨ above. The current direction is 3.3V→Source1→Source4→Source5→Guard→Guard#1→SW1→CH1→CH1'→Source6→GND.

[0404] ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing into the switch SW1 of the switching unit CH1 in the forward direction as Isw1=(3.3V-VCC1) / R15 (13);

[0405] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any of the 1st, 2nd, 4th, and 5th pins;

[0406] VCC8 is the voltage at the upper end of the forward impedance Z1 of SW1, and VCC9 is the voltage at the lower end of the forward impedance Z1 of SW1;

[0407] The control unit 300 selects ADC4 to collect measurement data VCC16;

[0408] The control unit 300 calculates the forward conduction impedance of SW1 according to the volt-ampere characteristic and equations (11) and (13):

[0409]

[0410] Upload the forward conduction impedance of SW1 to the host computer or display screen;

[0411] The reverse conduction impedance detection steps of the switching unit CH1 switch SW1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0412] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0413] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0414] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0415] Select ①, ⑤, ⑥ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source6→CH1'→CH1→SW1→Guard#1→Guard→Source5→GND;

[0416] ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing in the reverse direction into the switch SW1 of the switching unit CH1 as Isw1'=(3.3V-VCC1) / R15 (15);

[0417] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any of the 1st, 2nd, 4th, and 5th pins;

[0418] VCC8 is the voltage at the upper end of the reverse conduction impedance Z1' of SW1, and VCC9 is the voltage at the lower end of the reverse conduction impedance Z1' of SW1;

[0419] The control unit 300 selects ADC5 to collect measurement data VCC17;

[0420] The control unit 300 calculates the reverse conduction impedance of SW1 according to the volt-ampere characteristic and equations (12) and (15):

[0421]

[0422] Upload the forward conduction impedance of SW1 to the host computer or display screen;

[0423] The steps for detecting the forward conduction impedance of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows:

[0424] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0425] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0426] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0427] Select ①, ④, ⑦ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source5→Pot→Pot#1→SW2→CH1→CH1'→Source6→GND;

[0428] ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing into the switch SW2 of the switching unit CH1 in the forward direction as Isw2=(3.3V-VCC1) / R15 (17);

[0429] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0430] VCC8 is the voltage at the upper end of the forward conduction impedance Z2 of SW2, and VCC9 is the voltage at the lower end of the forward conduction impedance Z2 of SW2;

[0431] The control unit 300 selects ADC4 to collect measurement data VCC16;

[0432] The control unit 300 calculates the forward conduction impedance of SW2 according to the volt-ampere characteristic and equations (11) and (17):

[0433]

[0434] Upload the forward conduction impedance of SW1 to the host computer or display screen;

[0435] The reverse conduction impedance detection steps of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows:

[0436] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0437] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0438] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0439] Select ①, ⑤, ⑦ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source6→CH1'→CH1→SW2→Pot#1→Pot→Source5→GND;

[0440] ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing in the reverse direction into the switch SW2 of the switching unit CH1 as Isw2'=(3.3V-VCC1) / R15 (19);

[0441] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0442] VCC8 is the voltage at the upper end of the reverse conduction impedance Z2' of SW2, and VCC9 is the voltage at the lower end of the reverse conduction impedance Z2' of SW2;

[0443] The control unit 300 selects ADC4 to collect measurement data VCC16;

[0444] The control unit 300 calculates the reverse conduction impedance of SW2 according to the volt-ampere characteristic and equations (12) and (19):

[0445]

[0446] Upload SW2 reverse conduction impedance to the host computer or display screen;

[0447] The steps for detecting the forward conduction impedance of the switch SW3 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows:

[0448] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0449] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0450] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0451] Select ①, ④, ⑧ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source5→Cur→Cur#1→SW3→CH1→CH1'→Source6→GND;

[0452] ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing into the switch SW3 of the switching unit CH1 in the forward direction as Isw3=(3.3V-VCC1) / R15 (21);

[0453] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0454] VCC8 is the voltage at the upper end of the forward conduction impedance Z3 of SW3, and VCC9 is the voltage at the lower end of the forward conduction impedance Z3 of SW3;

[0455] The control unit 300 selects ADC4 to collect measurement data VCC16;

[0456] The control unit 300 calculates the forward conduction impedance of SW3 according to the volt-ampere characteristic and equations (11) and (21):

[0457]

[0458] Upload the forward conduction impedance of SW1 to the host computer or display screen;

[0459] The reverse conduction impedance detection steps of the switch SW3 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows:

[0460] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0461] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0462] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0463] Select ①, ⑤, ⑧ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source6→CH1'→CH1→SW3→Cur#1→Cur→Source5→GND;

[0464] ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing in the reverse direction into the switch SW3 of the switching unit CH1 as Isw3'=(3.3V-VCC1) / R15 (23);

[0465] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0466] VCC8 is the voltage at the upper end of the reverse conduction impedance Z3' of SW3, and VCC9 is the voltage at the lower end of the reverse conduction impedance Z3' of SW3;

[0467] The control unit 300 selects ADC4 to collect measurement data VCC16;

[0468] The control unit 300 calculates the reverse conduction impedance of SW3 according to the volt-ampere characteristic and equations (12) and (23):

[0469]

[0470] Upload SW2 reverse conduction impedance to the host computer or display screen;

[0471] The steps for detecting the forward conduction time of the switch SW1 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0472] Select ①, ④, ⑥ and ⑨ above;

[0473] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any of the 1st, 2nd, 4th, and 5th pins;

[0474] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0475] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0476] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0477] VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level.

[0478] When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW1 forward conduction timing. Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage and are now output drive voltage, and the N-channel MOS transistors Q3 and Q7 are turned from off to on, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the third and fourth pins of the optocoupler phototransistor U2 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q2 and Q6 are turned from on to off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the third and fourth pins of the optocoupler phototransistor U1 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q1 and Q5 are turned from on to off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0479] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned from on to cut off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned from on to cut off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0480] Current direction: 3.3V → Source1 → Source4 → Source5 → Guard → Guard#1 → SW1 → CH1 → CH1' → Source6 → GND;

[0481] VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level, and the forward conduction timing of SW1 of the control unit 300 ends.

[0482] The control unit 300 counts the forward conduction time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0483] The steps for detecting the reverse conduction time of the switch SW1 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0484] Select ①, ⑤, ⑥ and ⑨ above;

[0485] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any of the 1st, 2nd, 4th, and 5th pins;

[0486] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0487] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0488] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0489] VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is high level.

[0490] When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW1 reverse conduction timing. Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage and are now output drive voltage, and the N-channel MOS transistors Q3 and Q7 are turned from off to on, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the third and fourth pins of the optocoupler phototransistor U2 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q2 and Q6 are turned from on to off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the third and fourth pins of the optocoupler phototransistor U1 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q1 and Q5 are turned from on to off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0491] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned from on to cut off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned from on to cut off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0492] Current direction: 3.3V → Source1 → Source4 → Source6 → CH1' → CH1 → SW1 → Guard#1 → Guard → Source5 → GND;

[0493] VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level, and the reverse conduction timing of SW1 of the control unit 300 ends.

[0494] The control unit 300 counts the reverse conduction time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0495] The steps for detecting the forward conduction time of the switch SW2 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0496] Select ①, ④, ⑦ and ⑨ above;

[0497] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0498] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0499] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0500] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0501] VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level.

[0502] When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts SW2 forward conduction timing. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS transistors Q3 and Q7 change from on to off, corresponding to the switching switch SW1 of the switching unit CH1 in the topological structure diagram changing from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS transistors Q2 and Q6 change from off to on, corresponding to the switching switch SW2 of the switching unit CH1 in the topological structure diagram changing from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS transistors Q1 and Q5 change from off to on, corresponding to the switching switch SW3 of the switching unit CH1 in the topological structure diagram changing from off to on;

[0503] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned off and on;

[0504] Current direction: 3.3V → Source1 → Source4 → Source5 → Pot → Pot#1 → SW2 → CH1 → CH1' → Source6 → GND;

[0505] VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level, and the forward conduction timing of SW2 of the control unit 300 ends.

[0506] The control unit 300 counts the forward conduction time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0507] The steps for detecting the reverse conduction time of the switch SW2 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0508] Select ①, ⑤, ⑦ and ⑨ above;

[0509] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0510] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0511] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0512] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0513] VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is high level.

[0514] When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts SW2 reverse conduction timing. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS transistors Q3 and Q7 change from on to off, corresponding to the switching switch SW1 of the switching unit CH1 in the topological structure diagram changing from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS transistors Q2 and Q6 change from off to on, corresponding to the switching switch SW2 of the switching unit CH1 in the topological structure diagram changing from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS transistors Q1 and Q5 change from off to on, corresponding to the switching switch SW3 of the switching unit CH1 in the topological structure diagram changing from off to on;

[0515] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned off and on;

[0516] Current direction: 3.3V → Source1 → Source4 → Source6 → CH1' → CH1 → SW2 → Pot#1 → Pot → Source5 → GND;

[0517] VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level, and the reverse conduction timing of SW2 of the control unit 300 ends.

[0518] The control unit 300 counts the reverse conduction time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0519] The steps for detecting the forward conduction time of the switch SW3 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0520] Select ①, ④, ⑧ and ⑨ above;

[0521] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0522] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0523] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0524] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0525] VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level.

[0526] When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts SW3 forward conduction timing. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS transistors Q3 and Q7 change from on to off, corresponding to the switching switch SW1 of the switching unit CH1 in the topological structure diagram changing from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS transistors Q2 and Q6 change from off to on, corresponding to the switching switch SW2 of the switching unit CH1 in the topological structure diagram changing from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS transistors Q1 and Q5 change from off to on, corresponding to the switching switch SW3 of the switching unit CH1 in the topological structure diagram changing from off to on;

[0527] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned off and on;

[0528] Current direction: 3.3V → Source1 → Source4 → Source5 → Cur → Cur#1 → SW3 → CH1 → CH1' → Source6 → GND;

[0529] VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level, and the forward conduction timing of SW3 of the control unit 300 ends.

[0530] The control unit 300 counts the forward conduction time of SW3 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0531] The steps for detecting the reverse conduction time of the switch SW3 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0532] Select ①, ⑤, ⑧ and ⑨ above;

[0533] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0534] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0535] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0536] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0537] VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is high level.

[0538] When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts SW3 reverse conduction timing. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS transistors Q3 and Q7 change from on to off, corresponding to the switching switch SW1 of the switching unit CH1 in the topological structure diagram changing from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS transistors Q2 and Q6 change from off to on, corresponding to the switching switch SW2 of the switching unit CH1 in the topological structure diagram changing from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS transistors Q1 and Q5 change from off to on, corresponding to the switching switch SW3 of the switching unit CH1 in the topological structure diagram changing from off to on;

[0539] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned off and on;

[0540] Current direction: 3.3V → Source1 → Source4 → Source6 → CH1' → CH1 → SW3 → Cur#1 → Cur → Source5 → GND;

[0541] VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level, and the reverse conduction timing of SW3 of the control unit 300 ends.

[0542] The control unit 300 counts the reverse conduction time of SW3 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0543] The steps for detecting the forward turn-off time of the switch SW1 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0544] Select ①, ④, ⑥ and ⑨ above;

[0545] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any of the 1st, 2nd, 4th, and 5th pins;

[0546] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0547] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0548] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0549] Current direction: 3.3V → Source1 → Source4 → Source5 → Guard → Guard#1 → SW1 → CH1 → CH1' → Source6 → GND;

[0550] VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level.

[0551] When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the forward shutdown timing of SW1. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS transistors Q3 and Q7 change from on to off, corresponding to the switching switch SW1 of the switching unit CH1 in the topological structure diagram changing from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS transistors Q2 and Q6 change from off to on, corresponding to the switching switch SW2 of the switching unit CH1 in the topological structure diagram changing from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS transistors Q1 and Q5 change from off to on, corresponding to the switching switch SW3 of the switching unit CH1 in the topological structure diagram changing from off to on;

[0552] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned off and on;

[0553] VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is high level, and the forward shutdown timing of SW1 of the control unit 300 ends.

[0554] The control unit 300 counts the forward shutdown time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0555] The steps for detecting the reverse turn-off time of the switch SW1 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0556] Select ①, ⑤, ⑥ and ⑨ above;

[0557] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any of the 1st, 2nd, 4th, and 5th pins;

[0558] The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels;

[0559] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS transistors Q3 and Q7 are turned on, and the corresponding switching unit CH1 switch SW1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS transistors Q2 and Q6 are turned off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS transistors Q1 and Q5 are turned off, and the corresponding switching unit CH1 switch SW3 in the topology diagram is disconnected;

[0560] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0561] Current direction: 3.3V → Source1 → Source4 → Source6 → CH1' → CH1 → SW1 → Guard#1 → Guard → Source5 → GND;

[0562] VCC8 is close to VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is at a low level.

[0563] When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the reverse shutdown timing of SW1. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS transistors Q3 and Q7 change from on to off, corresponding to the switching switch SW1 of the switching unit CH1 in the topological structure diagram changing from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS transistors Q2 and Q6 change from off to on, corresponding to the switching switch SW2 of the switching unit CH1 in the topological structure diagram changing from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS transistors Q1 and Q5 change from off to on, corresponding to the switching switch SW3 of the switching unit CH1 in the topological structure diagram changing from off to on;

[0564] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned off and on;

[0565] VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is high level, and the reverse shutdown timing of SW1 of the control unit 300 ends.

[0566] The control unit 300 counts the reverse shutdown time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0567] The steps for detecting the forward turn-off time of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows:

[0568] Select ①, ④, ⑦ and ⑨ above;

[0569] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0570] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0571] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0572] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0573] Current direction: 3.3V → Source1 → Source4 → Source5 → Pot → Pot#1 → SW2 → CH1 → CH1' → Source6 → GND;

[0574] VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level.

[0575] When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW2 forward conduction timing. Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage and are now output drive voltage, and the N-channel MOS transistors Q3 and Q7 are turned from off to on, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the third and fourth pins of the optocoupler phototransistor U2 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q2 and Q6 are turned from on to off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the third and fourth pins of the optocoupler phototransistor U1 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q1 and Q5 are turned from on to off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0576] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned from on to cut off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned from on to cut off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0577] VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is high level, and the forward shutdown timing of SW2 of the control unit 300 ends.

[0578] The control unit 300 counts the forward shutdown time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0579] The steps for detecting the reverse turn-off time of the switch SW2 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0580] Select ①, ⑤, ⑦ and ⑨ above;

[0581] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0582] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0583] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0584] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0585] Current direction: 3.3V → Source1 → Source4 → Source6 → CH1' → CH1 → SW2 → Pot#1 → Pot → Source5 → GND;

[0586] VCC8 is close to VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is at a low level.

[0587] When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW2 reverse conduction timing. Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage and are now output drive voltage, and the N-channel MOS transistors Q3 and Q7 are turned from off to on, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the third and fourth pins of the optocoupler phototransistor U2 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q2 and Q6 are turned from on to off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the third and fourth pins of the optocoupler phototransistor U1 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q1 and Q5 are turned from on to off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0588] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned from on to cut off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned from on to cut off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0589] VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is high level, and the SW2 of the control unit 300 turns off and the timing is over.

[0590] The control unit 300 counts the reverse shutdown time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0591] The steps for detecting the forward turn-off time of the switch SW3 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0592] Select ①, ④, ⑧ and ⑨ above;

[0593] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0594] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0595] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0596] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0597] Current direction: 3.3V → Source1 → Source4 → Source5 → Cur → Cur#1 → SW3 → CH1 → CH1' → Source6 → GND;

[0598] VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level.

[0599] When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW3 forward conduction timing. Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage and are now output drive voltage, and the N-channel MOS transistors Q3 and Q7 are turned from off to on, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the third and fourth pins of the optocoupler phototransistor U2 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q2 and Q6 are turned from on to off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the third and fourth pins of the optocoupler phototransistor U1 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q1 and Q5 are turned from on to off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0600] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned from on to cut off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned from on to cut off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0601] VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is high level, and the forward shutdown timing of SW3 of the control unit 300 ends.

[0602] The control unit 300 counts the forward shutdown time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0603] The steps for detecting the reverse turn-off time of the switch SW3 of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 are as follows:

[0604] Select ①, ⑤, ⑧ and ⑨ above;

[0605] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B, and HSig_CD4051_C, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1, and LSig_CD4051_C1, and the third pin and the 13th pin of the analog switch U30 are connected; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2, and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, and 5th pins;

[0606] The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels;

[0607] Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0608] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0609] Current direction: 3.3V → Source1 → Source4 → Source6 → CH1' → CH1 → SW3 → Cur#1 → Cur → Source5 → GND;

[0610] VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level.

[0611] When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW3 reverse conduction timing. Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage and are now output drive voltage, and the N-channel MOS transistors Q3 and Q7 are turned from off to on, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the third and fourth pins of the optocoupler phototransistor U2 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q2 and Q6 are turned from on to off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the third and fourth pins of the optocoupler phototransistor U1 have an output drive voltage and are now output drive voltage free, and the N-channel MOS transistors Q1 and Q5 are turned from on to off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0612] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching switch SW1 of the switching unit CH1 in the topology diagram being turned from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned from on to cut off, corresponding to the switching switch SW2 of the switching unit CH1 in the topology diagram being turned from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned from on to cut off, corresponding to the switching switch SW3 of the switching unit CH1 in the topology diagram being turned from on to off;

[0613] VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is high level, and the SW3 of the control unit 300 turns off and the timing is over.

[0614] The control unit 300 counts the reverse shutdown time of SW3 and uploads it to the host computer or display screen to judge whether it is good or bad;

[0615] In summary, the switching unit CH2 switches SW4, SW5, and SW6, the switching unit CH3 switches SW7, SW8, and SW9, the switching unit CH4 switches SW10, SW11, and SW12, the switching unit CH5 switches SW13, SW14, and SW15, the switching unit CH6 switches SW16, SW17, and SW18, the switching unit CH7 switches SW19, SW20, and SW21, and the switching unit CH8 switches SW22, SW23, and SW34. The detection principles of the on-resistance, on-time, and off-time of each switching switch are the same as those of the switching unit CH1 switches SW1, SW2, and SW3.

[0616] The insulation impedance test steps for the MLCC capacitor quick detection and sorting switching circuit board 600 between the Guard (i.e., Guard#1, Guard#2) and Cur (i.e., Cur#1, Cur#2), Pot (i.e., Pot#1, Pot#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 are as follows:

[0617] In order to reduce the influence of the differential measurement circuit on the insulation impedance test between the channels of the switching switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, the control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins.

[0618] Select ②, ④, ⑥ and ⑰ above to establish a detection circuit;

[0619] The control unit 300 outputs Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are high levels;

[0620] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0621] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0622] Similarly: corresponding to the switching unit CH2 in the topology diagram, the switching switch SW4 is disconnected, SW5 is turned on, and SW6 is turned on; corresponding to the switching unit CH3 in the topology diagram, the switching switch SW7 is disconnected, SW8 is turned on, and SW9 is turned on; corresponding to the switching unit CH4 in the topology diagram, the switching switch SW10 is disconnected, SW11 is turned on, and SW12 is turned on; corresponding to the switching unit CH5 in the topology diagram, the switching switch SW13 is disconnected, SW14 is turned on, and SW15 is turned on; corresponding to the switching unit CH6 in the topology diagram, the switching switch SW16 is disconnected, SW17 is turned on, and SW18 is turned on; corresponding to the switching unit CH7 in the topology diagram, the switching switch SW19 is disconnected, SW20 is turned on, and SW21 is turned on; corresponding to the switching unit CH8 in the topology diagram, the switching switch SW22 is disconnected, SW23 is turned on, and SW24 is turned on;

[0623] At this time, ADC2 of the control unit 300 collects the voltage VCC4, and U9A is an operational amplifier follower circuit, so VCC3=VCC4; VCC2=VCC3;

[0624] The insulation resistance between the Guard (i.e., Guard#1, Guard#2) and Cur (i.e., Cur#1, Cur#2), Pot (i.e., Pot#1, Pot#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 under test is

[0625] The control unit 300MUC uploads the insulation resistance measured this time to the host computer or display screen to judge whether it is good or bad;

[0626] The insulation impedance test steps for the tested MLCC capacitor quick detection and sorting switching circuit board 600 between the Pot (i.e., Pot#1, Pot#2) and Cur (i.e., Cur#1, Cur#2), Guard (i.e., Guard#1, Guard#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 are as follows:

[0627] In order to reduce the impact of the differential measurement circuit on the insulation impedance test between the channels of the switching switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, the control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins.

[0628] Select ②, ④, ⑦ and ⑱ above to establish a detection circuit;

[0629] The control unit 300 outputs Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are low levels;

[0630] Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, and the N-channel MOS tubes Q3 and Q7 are turned on, corresponding to the switching unit CH1 in the topology diagram. The switch SW1 is turned on;

[0631] The 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltages, the N-channel MOS tubes Q2 and Q6 are cut off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected;

[0632] The 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltages, the N-channel MOS tubes Q1 and Q5 are cut off, and the switching switch SW3 of the switching unit CH1 in the corresponding topology diagram is disconnected;

[0633] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0634] Similarly: corresponding to the switching unit CH2 in the topology diagram, the switching switch SW4 is turned on, SW5 is turned off, and SW6 is turned off; corresponding to the switching unit CH3 in the topology diagram, the switching switch SW7 is turned on, SW8 is turned off, and SW9 is turned off; corresponding to the switching unit CH4 in the topology diagram, the switching switch SW10 is turned on, SW11 is turned off, and SW12 is turned off; corresponding to the switching unit CH5 in the topology diagram, the switching switch SW13 is turned on, SW14 is turned off, and SW15 is turned off; corresponding to the switching unit CH6 in the topology diagram, the switching switch SW16 is turned on, SW17 is turned off, and SW18 is turned off; corresponding to the switching unit CH7 in the topology diagram, the switching switch SW19 is turned on, SW20 is turned off, and SW21 is turned off; corresponding to the switching unit CH8 in the topology diagram, the switching switch SW22 is turned on, SW23 is turned off, and SW24 is turned off;

[0635] At this time, ADC2 of the control unit 300 collects the voltage VCC4, and U9A is an operational amplifier follower circuit, so VCC3=VCC4; VCC2=VCC3;

[0636] The insulation resistance between the Pot (i.e. Pot#1, Pot#2) and Cur (i.e. Cur#1, Cur#2), Guard (i.e. Guard#1, Guard#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test is

[0637] The control unit 300MUC uploads the insulation resistance measured this time to the host computer or display screen to judge whether it is good or bad;

[0638] The insulation impedance test steps between the Cur (i.e., Cur#1, Cur#2) and the Pot (i.e., Pot#1, Pot#2), Guard#1, Guard#2, CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 are as follows:

[0639] In order to reduce the influence of the differential measurement circuit on the insulation impedance test between the channels of the switching switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, the control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins.

[0640] Select ②, ④, ⑧ and ⑱ above to establish a detection loop;

[0641] The control unit 300 outputs Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are low levels;

[0642] Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, and the N-channel MOS tubes Q3 and Q7 are turned on, corresponding to the switching unit CH1 in the topology diagram. The switch SW1 is turned on;

[0643] The 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltages, the N-channel MOS tubes Q2 and Q6 are cut off, and the corresponding switching unit CH1 switch SW2 in the topology diagram is disconnected;

[0644] The 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltages, the N-channel MOS tubes Q1 and Q5 are cut off, and the switching switch SW3 of the switching unit CH1 in the corresponding topology diagram is disconnected;

[0645] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching switch SW1 of the switching unit CH1 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching switch SW2 of the switching unit CH1 in the topology diagram is turned off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching switch SW3 of the switching unit CH1 in the topology diagram is turned off;

[0646] Similarly: corresponding to the switching unit CH2 in the topology diagram, the switching switch SW4 is turned on, SW5 is turned off, and SW6 is turned off; corresponding to the switching unit CH3 in the topology diagram, the switching switch SW7 is turned on, SW8 is turned off, and SW9 is turned off; corresponding to the switching unit CH4 in the topology diagram, the switching switch SW10 is turned on, SW11 is turned off, and SW12 is turned off; corresponding to the switching unit CH5 in the topology diagram, the switching switch SW13 is turned on, SW14 is turned off, and SW15 is turned off; corresponding to the switching unit CH6 in the topology diagram, the switching switch SW16 is turned on, SW17 is turned off, and SW18 is turned off; corresponding to the switching unit CH7 in the topology diagram, the switching switch SW19 is turned on, SW20 is turned off, and SW21 is turned off; corresponding to the switching unit CH8 in the topology diagram, the switching switch SW22 is turned on, SW23 is turned off, and SW24 is turned off;

[0647] At this time, ADC2 of the control unit 300 collects the voltage VCC4, and U9A is an operational amplifier follower circuit, so VCC3=VCC4; VCC2=VCC3;

[0648] The Cur (i.e. Cur#1, Cur#2) and Pot (i.e. Pot#1, Pot#2), Guard#1, Guard#2, CH1, CH2, CH3, CH4, CH5, CH6, CH7, CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 are

[0649] The control unit 300 (MCU) uploads the measured insulation resistance to the host computer or display screen to determine whether it is good or bad.

[0650] Principle of forward breakdown voltage detection of clamping diodes on the MLCC capacitor rapid detection and sorting switching circuit board 600:

[0651] Select ③, ④ and ⑥ above to establish a detection loop;

[0652] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins;

[0653] The control unit 300 outputs Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are high levels;

[0654] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0655] Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0656] Similarly: corresponding to the switching unit CH2 in the topology diagram, the switching switch SW4 is disconnected, SW5 is turned on, and SW6 is turned on; corresponding to the switching unit CH3 in the topology diagram, the switching switch SW7 is disconnected, SW8 is turned on, and SW9 is turned on; corresponding to the switching unit CH4 in the topology diagram, the switching switch SW10 is disconnected, SW11 is turned on, and SW12 is turned on; corresponding to the switching unit CH5 in the topology diagram, the switching switch SW13 is disconnected, SW14 is turned on, and SW15 is turned on; corresponding to the switching unit CH6 in the topology diagram, the switching switch SW16 is disconnected, SW17 is turned on, and SW18 is turned on; corresponding to the switching unit CH7 in the topology diagram, the switching switch SW19 is disconnected, SW20 is turned on, and SW21 is turned on; corresponding to the switching unit CH8 in the topology diagram, the switching switch SW22 is disconnected, SW23 is turned on, and SW24 is turned on;

[0657] Select the above step 9, i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH1'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D1 is VCC5=VCC6×(R28+R29) / R29;

[0658] Select the above (10), i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH2'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D2 is VCC5=VCC6×(R28+R29) / R29;

[0659] Select the above ⑪, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH3'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D3 is VCC5=VCC6×(R28+R29) / R29;

[0660] Select the above ⑫, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH4'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D4 is VCC5=VCC6×(R28+R29) / R29;

[0661] Select the above (9), i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH5'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D5 is VCC5=VCC6×(R28+R29) / R29;

[0662] Select the above ⑭, i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH6'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D6 is VCC5=VCC6×(R28+R29) / R29;

[0663] Select the above ⑮, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH7'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D7 is VCC5=VCC6×(R28+R29) / R29;

[0664] Select the above ⑯, i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH8'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D8 is VCC5=VCC6×(R28+R29) / R29;

[0665] The control unit 300 counts the forward breakdown voltage of the TVS clamping diode and uploads it to the host computer or display screen to determine whether it is good or bad;

[0666] Principle of reverse breakdown voltage detection of clamping diode on the PCB 600 for fast detection and sorting of MLCC capacitors under test:

[0667] Select ③, ⑤ and ⑥ above to establish a detection loop;

[0668] The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins;

[0669] The control unit 300 outputs Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are high levels;

[0670] Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS transistors Q3 and Q7 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS transistors Q2 and Q6 are turned on, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS transistors Q1 and Q5 are turned on, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0671] Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switch SW1 in the topology diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switch SW2 in the topology diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switch SW3 in the topology diagram is turned on;

[0672] Similarly: corresponding to the switching unit CH2 in the topology diagram, the switching switch SW4 is disconnected, SW5 is turned on, and SW6 is turned on; corresponding to the switching unit CH3 in the topology diagram, the switching switch SW7 is disconnected, SW8 is turned on, and SW9 is turned on; corresponding to the switching unit CH4 in the topology diagram, the switching switch SW10 is disconnected, SW11 is turned on, and SW12 is turned on; corresponding to the switching unit CH5 in the topology diagram, the switching switch SW13 is disconnected, SW14 is turned on, and SW15 is turned on; corresponding to the switching unit CH6 in the topology diagram, the switching switch SW16 is disconnected, SW17 is turned on, and SW18 is turned on; corresponding to the switching unit CH7 in the topology diagram, the switching switch SW19 is disconnected, SW20 is turned on, and SW21 is turned on; corresponding to the switching unit CH8 in the topology diagram, the switching switch SW22 is disconnected, SW23 is turned on, and SW24 is turned on;

[0673] Select the above 9, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH1'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D1 is VCC5=VCC6×(R28+R29) / R29;

[0674] Select the above (10), i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH2'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D2 is VCC5=VCC6×(R28+R29) / R29;

[0675] Select the above ⑪, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH3'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D3 is VCC5=VCC6×(R28+R29) / R29;

[0676] Select the above ⑫, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH4'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D4 is VCC5=VCC6×(R28+R29) / R29;

[0677] Select the above (9), i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH5'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D5 is VCC5=VCC6×(R28+R29) / R29;

[0678] Select the above ⑭, i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH6'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D6 is VCC5=VCC6×(R28+R29) / R29;

[0679] Select the above ⑮, that is, the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH7'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D7 is VCC5=VCC6×(R28+R29) / R29;

[0680] Select the above ⑯, i.e., the schematic diagram of the switching conduction circuit of the second detection circuit switching switch circuit 520CH8'; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, so VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D8 is VCC5=VCC6×(R28+R29) / R29;

[0681] The control unit 300 counts the reverse breakdown voltage of the TVS clamping diode and uploads it to the host computer or display screen to determine whether it is good or bad;

[0682] The detection circuit principle of the control part of the tested MLCC capacitor fast detection and sorting switching circuit board 600 is as follows:

[0683] The ADC7 of the control unit 300 collects the voltage VCC23. Based on the “virtual short” working principle of the operational amplifier, VCC22=GND1, formula (25);

[0684]

[0685] The above formulas (26) and (27) can be simplified to

[0686] The detection principle of the switching switch SW1 control part of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 is that the control unit 300 outputs Sig_ch1 as a low level, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch1n is high level, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig1; the following is the principle of the SW1 control part, Figure 4 When the N-channel FET Q4 is turned on, the first pin of the optocoupler phototransistor U3 and the LED at the second pin are working, the current Ig1 flows as follows: 5V → the first pin of U3 → the second pin of U3 → the current limiting resistor R5 → the second pin of Q4 → GND1 → the sampling resistor R65 → GND; Figure 5 When the N-channel field effect transistor Q8 is turned on, the first pin of the optocoupler solid-state relay _MOS output U3 and the LED of the second pin work, the current Ig1 flows as follows: 5V → the first pin of U3 → the second pin of U3 → the current limiting resistor R12 → the second pin of Q48 → GND1 → the sampling resistor R65 → GND; at this time, the ADC7 of the control unit 300 collects the voltage VCC23 and the above formula (27) can be used to calculate the current

[0687] The switching switch SW4 of the switching unit CH2 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch2 as a low level, Sig_ch1, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch2n is high level, and Sig_ch1n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig2;

[0688] The switch SW7 of the switching unit CH3 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch3 as a low level, Sig_ch1, Sig_ch2, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch3n is high, and Sig_ch1n, Sig_ch2n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig3;

[0689] The switch SW10 of the switching unit CH4 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch4 as a low level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch4n is high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig4;

[0690] The switch SW13 of the switching unit CH5 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch5 as a low level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch5n is high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig5;

[0691] The switch SW16 of the switching unit CH6 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch6 as a low level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch6n is high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig6;

[0692] The switch SW19 of the switching unit CH6 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch7 as a low level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, and Sig_ch8 are all high levels, then Sig_ch7n is high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU is collected to collect the voltage VCC23, and the current flowing out of GND1 is calculated to be Ig7;

[0693] The switch SW22 of the switching unit CH8 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch8 as a low level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, and Sig_ch7 are all high levels, then Sig_ch8n is high, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, and Sig_ch7n are all low levels; at this time, the ADC7 of the control unit MCU is collected to collect the voltage VCC23, and the current flowing out of GND1 is calculated to be Ig7;

[0694] The control part circuit GND1 of the switching switches SW1, SW4, SW7, SW10, SW13, SW16, SW19, and SW22 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 outputs the total detection principle. The control unit 300 outputs Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all high levels; at this time, the ADC7 of the control unit MCU is controlled to collect the voltage VCC23, and the total current flowing out of GND1 is calculated to be Ig9;

[0695] By detecting the GND1 outflow circuit of each switching unit and comparing the total GND1 outflow current, it is determined whether the performance of this part of the control circuit is OK;

[0696] The ADC6 of the control unit 300 collects the voltage VCC20, which can be calculated through the voltage divider resistors R62 and R60.

[0697]

[0698] The switching switches SW2 and SW3 of the switching unit CH1 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch1 as a high level, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch1n is low, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, Sig_ch8n are all low levels, then Sig_ch1n is low, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch8n are all low levels, then Sig_ch6n is low, Sig_ch7n, Sig_ch8n are all low levels, then Sig_ch1n is low, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n are all low levels, then Sig_ch6n is low, ...6n is low, Sig_ch6n is high, Sig_ch6n is high, Sig_ch7n, Sig_ch8n are all low levels, then Sig_ch1n is low, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n are all low levels, then Sig_ch6n is low, Sig_ch g_ch6n, Sig_ch7n, and Sig_ch8n are all high; N-channel MOS transistor Q12 is turned on; control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and pins 3 and 13 of analog switch U35 can be connected; at this time, ADC6 of control unit 300 collects voltage VCC20 and calculates output current Is1 of switching unit CH1's switching switches SW2 and SW3 control circuit to GND through voltage divider resistors R62 and R60; Figure 4In switching unit CH1, when switching switch SW3 connects the optocoupler phototransistor U1's pin 1 to the LED at pin 2, the current Isw3 flows as follows: 5V → U1's pin 1 → U1's pin 2 → current-limiting resistor R6 → Sig_ch1n. In switching unit CH1, when switching switch SW2 connects the optocoupler phototransistor U2's pin 1 to the LED at pin 2, the current Isw2 flows as follows: 5V → U2's pin 1 → U2's pin 2 → current-limiting resistor R7 → Sig_ch1n. The current flowing through pull-up resistor R4 is Ir1, and its flow is as follows: 5V → pull-up resistor R4 → Sig_ch1n. The current in the control circuit driving switches SW2 and SW3 in switching unit CH1 is summarized as Isw1 = Isw2 + Isw3 + Ir1, and its flow is as follows: Sig_ch1n → current-limiting resistor R63 → Q12's pin 2 → GND. Figure 5 In switching unit CH1, when the optocoupler solid-state relay SW3 switches the output of U4's pin 1 and the LED at pin 2, the current Isw3 flows as follows: 5V → U4's pin 1 → U4's pin 2 → current-limiting resistor R13 → Sig_ch1n. In switching unit CH1, when the optocoupler solid-state relay SW2 switches the output of U5's pin 1 and the LED at pin 2, the current Isw2 flows as follows: 5V → U5's pin 1 → U5's pin 2 → current-limiting resistor R14 → Sig_ch1n. The current flowing through pull-up resistor R11 is Ir1, and its flow process is as follows: 5V → pull-up resistor R11 → Sig_ch1n. The current in the driving control circuit of switching unit CH1 switches SW2 and SW3 is summarized as Isw1 = Isw2 + Isw3 + Ir1, and its current flow process is as follows: Sig_ch1n → current-limiting resistor R63 → Q12's pin 2 → GND.

[0699] At this time, the ADC6 of the control unit 300 collects the voltage VCC20 and the above formula (29) can calculate the current

[0700]

[0701] The switching switches SW5 and SW6 of the switching unit CH2 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle, the control unit 300 outputs Sig_ch2 as a high level, Sig_ch1, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, Sig_ch8 are all low levels, then Sig_ch2n is low level, Sig_ch1n, Sig_ch3n, Sig_ch4n ... ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and the 3rd and 14th pins of the analog switch U35 can be connected; at this time, ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is2 of the switching unit CH2's switching switches SW5 and SW6 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0702] The switching switches SW8 and SW9 of the switching unit CH3 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch3 as a high level, Sig_ch1, Sig_ch2, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch3n is low level, Sig_ch1n, Sig_ch2n, Sig_ch4n, ... ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and the 3rd and 15th pins of the analog switch U35 can be connected; at this time, ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is3 of the switching unit CH3's switching switches SW8 and SW9 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0703] The switching switches SW11 and SW12 of the switching unit CH4 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle, the control unit 300 outputs Sig_ch4 as a high level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch5, Sig_ch6, Sig_ch7, Sig_ch8 are all low levels, then Sig_ch4n is low level, Sig_ch1n, Sig_ch2n, Sig_ch3n ... ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and the 3rd and 12th pins of the analog switch U35 can be connected; at this time, ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is4 of the switching unit CH4's switching switches SW11 and SW12 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0704] The switching switches SW14 and SW15 of the switching unit CH5 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch5 as a high level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch5n is low level, Sig_ch1n, Sig_ch2n, Sig_ch3n, ...5n is low level, Sig_ch5n is low level, Sig_ch5n is low level, Sig_ch5n is low level, Sig_ch5n is low level, Sig_ ch4n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and both pin 3 and pin 1 of the analog switch U35 can be connected; at this time, ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is5 of the switching unit CH5's switching switches SW14 and SW15 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0705] The switching switches SW17 and SW18 of the switching unit CH6 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch6 as a high level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch6n is low, Sig_ch1n, Sig_ch2n, Sig_ch3n, ...6n is low, Sig_ch6n is low, Sig_ ch4n, Sig_ch5n, Sig_ch7n, and Sig_ch8n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and the 3rd and 5th pins of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is6 of the switching unit CH6's switching switches SW17 and SW18 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0706] The switching switches SW20 and SW21 of the switching unit CH7 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle, the control unit 300 outputs Sig_ch7 as a high level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch8 are all low levels, then Sig_ch7n is low level, Sig_ch1n, Sig_ch2n, Sig_ch3n ... ch4n, Sig_ch5n, Sig_ch6n, and Sig_ch8n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and the 3rd and 5th pins of the analog switch U35 can be connected; at this time, ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is7 of the switching unit CH7's switching switches SW20 and SW21 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0707] The switching switches SW23 and SW24 of the switching unit CH8 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch8 as a high level, Sig_ch1, Sig_ch2, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, and Sig_ch7 are all low levels, then Sig_ch8n is low, Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch7 are all low levels, and Sig_ch8n is low. ch4n, Sig_ch5n, Sig_ch6n, and Sig_ch7n are all high levels; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B, and K_CD4051_C, and the 3rd and 5th pins of the analog switch U35 can be connected; at this time, ADC6 of the control unit 300 collects the voltage VCC20, and the output current Is8 of the switching unit CH8's switching switches SW23 and SW24 control part circuit to GND can be calculated through the voltage divider resistors R62 and R60;

[0708] By detecting the currents Is1, Is2, Is3, Is4, Is5, Is6, Is7 and Is8 and performing comparative analysis, it can be determined whether the performance of this part of the control circuit is OK.

[0709] While the embodiments of the present invention have been described in detail above with reference to the accompanying drawings, the present invention is not limited to the embodiments described above. Various modifications may be made within the scope of knowledge possessed by a person skilled in the art without departing from the spirit of the present invention. Furthermore, the embodiments of the present invention and the features thereof may be combined with one another unless there is a conflict.

Claims

1. A detection circuit for capacitor sorting and testing circuit boards, characterized in that: include: A test source for providing electrical energy; a test source current acquisition circuit, wherein an input end of the test source current acquisition circuit is electrically connected to the test source, and the test source current acquisition circuit is used to acquire an output current of the test source; a control unit electrically connected to an output end of the test source current acquisition circuit; a test source switching circuit, wherein an input end of the test source switching circuit is electrically connected to the test source, a control end of the test source switching circuit is electrically connected to the control unit, and the test source switching circuit is used to adjust the voltage and current of the test source; a detection loop switching circuit, wherein an input end of the detection loop switching circuit is electrically connected to an output end of the test source switching circuit, and a control end of the detection loop switching circuit is electrically connected to the control unit; A test circuit board for sorting the capacitor under test, electrically connected to the detection end of the detection loop switching circuit; a detection loop differential sampling circuit, electrically connected to the output end of the detection loop switching circuit and also electrically connected to the control unit; A detection circuit for the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit; a driving circuit of the control part of the circuit board under test, electrically connected to the capacitor sorting test circuit board under test, and also electrically connected to the control unit; The capacitor sorting test circuit board comprises: A plurality of switching units, each of which is provided with a plurality of switching switches; a plurality of first radio frequency coaxial connectors, electrically connected to the switching unit and also used to be electrically connected to the detection end of the detection loop switching circuit; a plurality of output terminals electrically connected to the switching unit, electrically connected to the first RF coaxial connector, and further configured to be electrically connected to a detection end of the detection loop switching circuit; The control interface terminal is electrically connected to the control end of the switching unit and is also used to electrically connect to the detection circuit of the control part of the tested circuit board and the driving circuit of the control part of the tested circuit board.

2. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: Also includes: a display screen, the display screen being electrically connected to the control unit; A host computer is electrically connected to the control unit.

3. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The test source includes: a first voltage source, a second voltage source, a third voltage source, a first current limiting resistor, a second current limiting resistor, a third current limiting resistor, a first test source output end, a second test source output end, and a third test source output end; wherein, one end of the first current limiting resistor is electrically connected to the first voltage source, and the other end of the first current limiting resistor is electrically connected to the first test source output end; one end of the second current limiting resistor is electrically connected to the second voltage source, and the other end of the second current limiting resistor is electrically connected to the second test source output end; one end of the third current limiting resistor is electrically connected to the third voltage source, and the other end of the third current limiting resistor is electrically connected to the third test source output end.

4. The detection circuit for capacitor sorting and testing circuit board according to claim 3, characterized in that: The test source switching circuit includes a test source switching circuit and a test source current direction switching circuit, and the test source switching circuit includes: a first test source switching switch, wherein one end of the first test source switching switch is electrically connected to the other end of the first current limiting resistor; a fourth test source terminal electrically connected to the other end of the first test source switch; a second test source switching switch, wherein one end of the second test source switching switch is electrically connected to the other end of the second current limiting resistor, and the other end of the second test source switching switch is electrically connected to the fourth test source end; a third test source switching switch, one end of the third test source switching switch being electrically connected to the other end of the third current limiting resistor, and the other end of the third test source switching switch being electrically connected to the fourth test source end; The test source current direction switching circuit includes: a first current direction switching switch, wherein one end of the first current direction switching switch is electrically connected to the other end of the first test source switching switch; a second current direction switch, one end of the second current direction switch being electrically connected to the other end of the first current direction switch, and the other end of the second current direction switch being grounded; a fifth test source terminal electrically connected to the other end of the first current direction switching switch; a third current direction switching switch, one end of the third current direction switching switch being electrically connected to the other end of the second test source switching switch; a fourth current direction switch, one end of the fourth current direction switch being electrically connected to the other end of the third current direction switch, and the other end of the fourth current direction switch being grounded; The sixth test source terminal is electrically connected to the other end of the third current direction switching switch.

5. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The detection loop switching circuit includes a first detection loop switching circuit and a second detection loop switching circuit, and the first detection loop switching circuit includes: a plurality of first detection switching switches, wherein a control end of the first detection switching switch is electrically connected to the control unit, and one end of the first detection switching switch is electrically connected to an output end of the test source switching circuit; a plurality of second RF coaxial connectors, one end of each of the second RF coaxial connectors being electrically connected to the other end of the first detection switch, and the other end of each of the second RF coaxial connectors being electrically connected to the first RF coaxial connector; The second detection loop switching circuit includes: a plurality of second detection switching switches, wherein a control end of the second detection switching switch is electrically connected to the control unit, and one end of the second detection switching switch is electrically connected to an output end of the test source switching circuit; A plurality of connection terminals, one end of each connection terminal is electrically connected to the other end of the second detection switch, the other end of each connection terminal is electrically connected to the output terminal, and the connection terminal is also electrically connected to the second RF coaxial connector.

6. The detection circuit for capacitor sorting and testing circuit board according to claim 5, characterized in that: The detection loop switching circuit further includes a first Darlington transistor array, one end of the first Darlington transistor being electrically connected to the control unit; the first detection switching switch includes a first optocoupler solid-state relay and a first current-limiting resistor, the first optocoupler solid-state relay being electrically connected to the other end of the first Darlington transistor via the first current-limiting resistor, the first optocoupler solid-state relay being further electrically connected to the output end of the test source switching circuit, and the first optocoupler solid-state relay being further electrically connected to one end of the second RF coaxial connector; The detection loop switching circuit also includes a second Darlington transistor array, one end of the second Darlington transistor is electrically connected to the control unit; the second detection switching switch includes a second optocoupler solid-state relay and a second current-limiting resistor, the second optocoupler solid-state relay is electrically connected to the other end of the second Darlington transistor through the second current-limiting resistor, the second optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the second optocoupler solid-state relay is also electrically connected to one end of the wiring terminal.

7. The detection circuit for capacitor sorting and testing circuit board according to claim 5, characterized in that: The detection loop differential sampling circuit includes: a first analog switch electrically connected to the control unit and also electrically connected to the first detection loop switching circuit; a first current limiting resistor, wherein one end of the first current limiting resistor is electrically connected to the first analog switch; a second analog switch electrically connected to the control unit and also electrically connected to the second detection loop switching circuit; a second current limiting resistor, one end of the second current limiting resistor being electrically connected to the second analog switch; a third analog switch electrically connected to the control unit, electrically connected to the second detection loop switching circuit, and electrically connected to one end of the second current-limiting resistor; a first differential amplifier circuit, wherein an input end of the first differential amplifier circuit is electrically connected to the other end of the first current-limiting resistor, and an output end of the first differential amplifier circuit is electrically connected to the control unit; A second differential amplifier circuit, wherein an input end of the second differential amplifier circuit is electrically connected to the other end of the second current limiting resistor, and an output end of the second differential amplifier circuit is electrically connected to the control unit.

8. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The control part detection circuit of the circuit board under test includes: a fourth analog switch, electrically connected to the control unit and also electrically connected to the capacitor sorting and testing circuit board; a voltage-dividing resistor, one end of the voltage-dividing resistor being electrically connected to the control unit, and the other end of the voltage-dividing resistor being electrically connected to the fourth analog switch; An amplifier circuit is electrically connected to the control unit.

9. The detection circuit for capacitor sorting and testing a circuit board according to claim 1, characterized in that: The control part driving circuit of the circuit board under test includes: A MOS transistor, wherein the gate of the MOS transistor is electrically connected to the control unit, the drain of the MOS transistor is electrically connected to the capacitor sorting test circuit board under test, and the source of the MOS transistor is grounded.

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