TTL control circuit and phase shifter

Abstract

The invention relates to the technical field of microwave control circuits, and discloses a TTL control circuit and a phase shifter, and the circuit comprises transistors Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9 and Q10, resistors R4, R5, R6, R7, R8, R9, R10, R11 and R12, PIN ESD tubes D21 and D22, diodes D13, D14, D15, D16, D17, D18, D19 and D20, and capacitors C1 and C3. The TTL control circuit disclosed by the invention has the advantages of high integration level, simplicity in control and few control ports.

Description

Technical Field

[0001] The present invention relates to the technical field of microwave control circuits, and in particular to a TTL control circuit and a phase shifter. Background Art

[0002] TTL control circuit mainly plays the function of outputting complementary level and controlling circuit signal in electronic circuit. It is widely used in digital controlled attenuators, digital controlled phase shifters, radio frequency switches and other devices. The structure of traditional TTL control circuit is relatively simple, the input level range is relatively small, and a single positive level output is used. Summary of the invention

[0003] Based on this, it is necessary to propose a TTL control circuit to solve the technical problems of low integration, complex control and multiple control ports of the TTL control circuit in the prior art. The circuit includes: transistors Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, resistors R4, R5, R6, R7, R8, R9, R10, R11, R12, PINESD tubes D21 and D22, diodes D13, D14, D15, D16, D17, D18, D19, D20, capacitors C1 and C3;

[0004] One end of the resistor R4 is respectively connected to the TTL level input port, one end of the PIN ESD tube D21, and one end of the PIN ESD tube D22, the other end of the PIN ESD tube D21 is connected to the power supply VDD, and the other end of the PIN ESD tube D22 is grounded;

[0005] The anode of the diode D15 is respectively connected to the anode of the diode D13, the cathode of the diode D14, and the other end of the resistor R4, the cathode of the diode D13 is connected to the power supply, and the anode of the diode D14 is grounded; the cathode of the diode D15 is respectively connected to the source of the transistor Q2 and the drain of the transistor Q3, the source of the transistor Q3 is grounded through the resistor R6, the gate of the transistor Q3 is grounded, the gate of the transistor Q2 is connected to one end of the resistor R5, the drain of the transistor Q2 is connected to the other end of the resistor R5, and one end of the resistor R5 is respectively connected to the gate of the transistor Q5 and one end of the resistor R12;

[0006] The source of transistor Q5 is grounded, the drain of transistor Q5 is respectively connected to the anode of diode D16, one end of resistor R7, and the gate of transistor Q4, the other end of resistor R7 is connected to the source of transistor Q4, the drain of transistor Q4 is connected to the power supply VDD, the cathode of diode D16 is respectively connected to one end of resistor R8 and the drain of transistor Q6, the source of transistor Q6 is grounded through resistor R9, the gate of transistor Q6 is grounded, the other end of resistor R8 is connected to the gate of transistor Q8, the source of transistor Q8 is grounded, the drain of transistor Q8 is respectively connected to one end of resistor R10, the gate of transistor Q7, one end of capacitor C2, the cathode of diode D18, the anode of diode D17 and the first output end, the other end of resistor R10 is connected to the source of transistor Q7, the drain of transistor Q7 is connected to the power supply VDD, the other end of capacitor C2 is grounded, the anode of diode D18 is grounded, and the cathode of diode D17 is connected to the power supply VDD;

[0007] The other end of the resistor R12 is connected to the gate of the transistor Q10, the source of the transistor Q10 is grounded, the drain of the transistor Q10 is respectively connected to one end of the resistor R11, the gate of the transistor Q9, one end of the capacitor C3, the cathode of the diode D20, the anode of the diode D19 and the second output end, the other end of the resistor R11 is connected to the source of the transistor Q9, the drain of the transistor Q9 is connected to the power supply VDD, the other end of the capacitor C3 is grounded, the anode of the diode D20 is grounded, and the cathode of the diode D19 is connected to the power supply VDD.

[0008] In one embodiment, the phase shifter comprises a TTL control circuit as claimed in claim 1.

[0009] The TTL control circuit proposed by the present invention includes transistors Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, resistors R4, R5, R6, R7, R8, R9, R10, R11, R12, PIN ESD tubes D21 and D22, diodes D13, D14, D15, D16, D17, D18, D19, D20, capacitors C1 and C3; one end of the resistor R4 is respectively connected to the TTL level input port, one end of the PIN ESD tube D21, and one end of the PIN ESD tube D22, the other end of the PIN ESD tube D21 is connected to the power supply VDD, and the PIN The other end of the ESD tube D22 is grounded; the anode of the diode D15 is respectively connected to the anode of the diode D13, the cathode of the diode D14, and the other end of the resistor R4, the cathode of the diode D13 is connected to the power supply, and the anode of the diode D14 is grounded; the cathode of the diode D15 is respectively connected to the source of the transistor Q2 and the drain of the transistor Q3, the source of the transistor Q3 is grounded through the resistor R6, the gate of the transistor Q3 is grounded, the gate of the transistor Q2 is connected to one end of the resistor R5, the drain of the transistor Q2 is connected to the other end of the resistor R5, and one end of the resistor R5 is respectively connected to the gate of the transistor Q5 and one end of the resistor R12; the source of the transistor Q5 is grounded, the drain of the transistor Q5 is respectively connected to the anode of the diode D16, one end of the resistor R7, and the gate of the transistor Q4, the other end of the resistor R7 is connected to the source of the transistor Q4, the drain of the transistor Q4 is connected to the power supply VDD, the cathode of the diode D16 is respectively connected to one end of the resistor R8 and the drain of the transistor Q6, the source of the transistor Q6 is grounded through the resistor R9, and the transistor Q 6 is grounded, the other end of the resistor R8 is connected to the gate of the transistor Q8, the source of the transistor Q8 is grounded, the drain of the transistor Q8 is respectively connected to one end of the resistor R10, the gate of the transistor Q7, one end of the capacitor C2, the cathode of the diode D18, the anode of the diode D17 and the first output end, the other end of the resistor R10 is connected to the source of the transistor Q7, the drain of the transistor Q7 is connected to the power supply VDD, the other end of the capacitor C2 is grounded, the anode of the diode D18 is grounded, and the cathode of the diode D17 is connected to the power supply VDD; The other end of the resistor R12 is connected to the gate of the transistor Q10, the source of the transistor Q10 is grounded, the drain of the transistor Q10 is respectively connected to one end of the resistor R11, the gate of the transistor Q9, one end of the capacitor C3, the cathode of the diode D20, the anode of the diode D19 and the second output end, the other end of the resistor R11 is connected to the source of the transistor Q9, the drain of the transistor Q9 is connected to the power supply VDD, the other end of the capacitor C3 is grounded, the anode of the diode D20 is grounded, and the cathode of the diode D19 is connected to the power supply VDD. The TTL control circuit of the present invention has the advantages of high integration, simple control, and few control ports. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0011] in:

[0012] Figure 1 Schematic diagram of the circuit structure of a TTL control circuit in one embodiment;

[0013] Figure 2 FIG. 4 is a schematic diagram of a circuit structure of a phase shifter in an embodiment. DETAILED DESCRIPTION

[0014] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0015] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0016] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0017] See also Figure 1 As shown, Figure 1A circuit diagram of a TTL control circuit provided by an embodiment of the present invention includes: transistors Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, resistors R4, R5, R6, R7, R8, R9, R10, R11, R12, PI NESD tubes D21 and D22, diodes D13, D14, D15, D16, D17, D18, D19, D20, capacitors C1 and C3;

[0018] One end of the resistor R4 is respectively connected to the TTL level input port, one end of the PIN ESD tube D21, and one end of the PIN ESD tube D22, the other end of the PIN ESD tube D21 is connected to the power supply VDD, and the other end of the PIN ESD tube D22 is grounded;

[0019] The anode of the diode D15 is respectively connected to the anode of the diode D13, the cathode of the diode D14, and the other end of the resistor R4, the cathode of the diode D13 is connected to the power supply, and the anode of the diode D14 is grounded; the cathode of the diode D15 is respectively connected to the source of the transistor Q2 and the drain of the transistor Q3, the source of the transistor Q3 is grounded through the resistor R6, the gate of the transistor Q3 is grounded, the gate of the transistor Q2 is connected to one end of the resistor R5, the drain of the transistor Q2 is connected to the other end of the resistor R5, and one end of the resistor R5 is respectively connected to the gate of the transistor Q5 and one end of the resistor R12;

[0020] The source of transistor Q5 is grounded, the drain of transistor Q5 is respectively connected to the anode of diode D16, one end of resistor R7, and the gate of transistor Q4, the other end of resistor R7 is connected to the source of transistor Q4, the drain of transistor Q4 is connected to the power supply VDD, the cathode of diode D16 is respectively connected to one end of resistor R8 and the drain of transistor Q6, the source of transistor Q6 is grounded through resistor R9, the gate of transistor Q6 is grounded, the other end of resistor R8 is connected to the gate of transistor Q8, the source of transistor Q8 is grounded, the drain of transistor Q8 is respectively connected to one end of resistor R10, the gate of transistor Q7, one end of capacitor C2, the cathode of diode D18, the anode of diode D17 and the first output end, the other end of resistor R10 is connected to the source of transistor Q7, the drain of transistor Q7 is connected to the power supply VDD, the other end of capacitor C2 is grounded, the anode of diode D18 is grounded, and the cathode of diode D17 is connected to the power supply VDD;

[0021] The other end of the resistor R12 is connected to the gate of the transistor Q10, the source of the transistor Q10 is grounded, the drain of the transistor Q10 is respectively connected to one end of the resistor R11, the gate of the transistor Q9, one end of the capacitor C3, the cathode of the diode D20, the anode of the diode D19 and the second output end, the other end of the resistor R11 is connected to the source of the transistor Q9, the drain of the transistor Q9 is connected to the power supply VDD, the other end of the capacitor C3 is grounded, the anode of the diode D20 is grounded, and the cathode of the diode D19 is connected to the power supply VDD.

[0022] In this embodiment, the TTL control circuit includes a TTL level input port, two complementary output ports (Vout, Vout1), namely a first output port and a second output port, two two-stage inverters, a first-stage inverter, a voltage stabilizing circuit, an input ESD protection circuit, and an output protection circuit. In the TTL control circuit, Q2, Q3, Q4, Q6, Q7, and Q9 can use the same transistors, and Q5, Q8, and Q10 can use the same transistors. One transistor Q4 and one transistor Q5 form a two-stage inverter; one transistor Q7 and one transistor Q8 form another two-stage inverter circuit; the two-stage inverters formed by Q4 and Q5, Q7 and Q8 are connected between stages through D16 and resistor R8. One transistor Q9 and one transistor Q10 form a first-stage inverter circuit. The inverter structure can output an electrical signal opposite to the input level signal, so the circuit can output a set of complementary level signals. Among them, D13 and D14 are input ESD protection circuits, which adopt the method of multi-stage diode series connection. D21 and D22 are a pair of back-to-back PIN ES transistors added between Vdd and GND. When Vin positive and reverse ESD voltages come, D21 and D22 provide a discharge path for ESD, thereby enhancing the effect of ESD and the reliability of the chip. Q2 and R5, Q3 and R6, Q6 and R9 form a voltage regulator circuit. Their combination can be regarded as a large resistor to ensure that each inverter input node can have a fixed voltage. C2 and D17, D18 and C3 and D19, D20 form an output protection circuit to prevent the output level from changing, thereby ensuring the performance of the circuit. The protection circuit composed of C2, D17, D18 is connected behind the two-stage inverter composed of Q7 and Q8. The protection circuit composed of C3, D19, D20 is connected behind the first-stage inverter composed of Q9 and Q10.

[0023] In a preferred implementation, reference Figure 2, shows the application of TTL control circuit in 6-bit digital controlled phase shifter. The 6 phase shift units shown in the figure are connected in sequence. Since each phase shift unit requires two control ports, the 6-bit digital controlled phase shifter requires a total of 12 control ports. The low-power positive level TTL control circuit proposed by the present invention solves the problems of low integration, complex control, and multiple control ports of traditional circuits. Figure 2 In the embodiment, the first level conversion module, the second level conversion module, the third level conversion module, the fourth level conversion module, the fifth level conversion module, and the sixth level conversion module all refer to the TTL control circuit of the present invention, the first level conversion module provides a control voltage to the 5.625° phase shift unit, the second level conversion module provides a control voltage to the 11.25° phase shift unit, the third level conversion module provides a control voltage to the 22.5° phase shift unit, the fourth level conversion module provides a control voltage to the 45° phase shift unit, the fifth level conversion module provides a control voltage to the 90° phase shift unit, and the sixth level conversion module provides a control voltage to the 180° phase shift unit. Thus, the purpose of switching between the phase shift units can be achieved by using 6 control ports.

[0024] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A TTL control circuit, characterized in that: The TTL control circuit includes: transistors Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, resistors R4, R5, R6, R7, R8, R9, R10, R11, R12, PIN ESD tubes D21 and D22, diodes D13, D14, D15, D16, D17, D18, D19, D20, capacitors C1 and C3; One end of the resistor R4 is respectively connected to the TTL level input port, one end of the PIN ESD tube D21, and one end of the PIN ESD tube D22, the other end of the PIN ESD tube D21 is connected to the power supply VDD, and the other end of the PIN ESD tube D22 is grounded; The anode of the diode D15 is respectively connected to the anode of the diode D13, the cathode of the diode D14, and the other end of the resistor R4, the cathode of the diode D13 is connected to the power supply, and the anode of the diode D14 is grounded; the cathode of the diode D15 is respectively connected to the source of the transistor Q2 and the drain of the transistor Q3, the source of the transistor Q3 is grounded through the resistor R6, the gate of the transistor Q3 is grounded, the gate of the transistor Q2 is connected to one end of the resistor R5, the drain of the transistor Q2 is connected to the other end of the resistor R5, and one end of the resistor R5 is respectively connected to the gate of the transistor Q5 and one end of the resistor R12; The source of transistor Q5 is grounded, the drain of transistor Q5 is respectively connected to the anode of diode D16, one end of resistor R7, and the gate of transistor Q4, the other end of resistor R7 is connected to the source of transistor Q4, the drain of transistor Q4 is connected to the power supply VDD, the cathode of diode D16 is respectively connected to one end of resistor R8 and the drain of transistor Q6, the source of transistor Q6 is grounded through resistor R9, the gate of transistor Q6 is grounded, the other end of resistor R8 is connected to the gate of transistor Q8, the source of transistor Q8 is grounded, the drain of transistor Q8 is respectively connected to one end of resistor R10, the gate of transistor Q7, one end of capacitor C2, the cathode of diode D18, the anode of diode D17 and the first output end, the other end of resistor R10 is connected to the source of transistor Q7, the drain of transistor Q7 is connected to the power supply VDD, the other end of capacitor C2 is grounded, the anode of diode D18 is grounded, and the cathode of diode D17 is connected to the power supply VDD; The other end of the resistor R12 is connected to the gate of the transistor Q10, the source of the transistor Q10 is grounded, the drain of the transistor Q10 is respectively connected to one end of the resistor R11, the gate of the transistor Q9, one end of the capacitor C3, the cathode of the diode D20, the anode of the diode D19 and the second output end, the other end of the resistor R11 is connected to the source of the transistor Q9, the drain of the transistor Q9 is connected to the power supply VDD, the other end of the capacitor C3 is grounded, the anode of the diode D20 is grounded, and the cathode of the diode D19 is connected to the power supply VDD.

2. A phase shifter, characterized in that: The phase shifter comprises a TTL control circuit as claimed in claim 1.

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