Drive circuit for power transistor

Abstract

A driver circuit for a power transistor. The driver circuit allows for robust turn-off of the power transistor and allows for reduced power loss when the power transistor transitions back to on. The driving circuit controls what a voltage applied to a gate terminal of the power transistor is. The driving circuit prevents accidental conduction of the power transistor by applying a negative voltage to the gate terminal of the power transistor when transitioning to OFF. By allowing the gate terminal of the power transistor to increase from the negative voltage to a smaller negative voltage prior to applying a positive voltage to turn on the power transistor, the drive circuit allows power loss to be reduced when transitioning back to turn on.

Description

Background Art

[0001] Electronic circuits typically include transistors that act as electronic switches that regulate or control the flow of current in various parts of the circuit. One type of transistor is a field effect transistor, in which a voltage is applied to a gate terminal to turn the transistor on and off. A semiconductor channel region is disposed between a drain terminal and a source terminal. When the transistor is on, current flows through the semiconductor channel region between the drain terminal and the source terminal. When the transistor is off, little or no current flows through the semiconductor channel region between the drain terminal and the source terminal. A gate terminal is disposed over the semiconductor channel region between the drain terminal and the source terminal. The voltage on the gate terminal creates a field that affects whether the semiconductor channel region conducts current - hence the term "field effect transistor."

[0002] Typical transistors are used for amplification purposes and switching purposes in electronic circuits. Power transistors, on the other hand, are used to carry larger amounts of current, have higher voltage ratings, and may be more typically used in power supplies, battery charging, etc. Power transistors may typically operate at currents greater than 1 ampere up to 100 amperes, or even greater. Power transistors may carry power greater than 1 watt up to hundreds of watts, or even greater.

[0003] The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein may be practiced. Summary of the invention

[0004] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0005] Embodiments described herein relate to a driver circuit for a power transistor. The driver circuit allows both robust shut-off of the power transistor and reduced power loss when the power transistor is turned back on. The structure of the driver circuit according to the principles described herein will be discussed later. As an example, assume that the power transistor is a power field effect transistor having a gate terminal that controls whether current flows between the drain terminal and the source terminal of the power transistor.

[0006] The drive circuit can be used to control what voltage is applied to the gate terminal of the power transistor. For example, when the drive circuit applies a turn-on voltage (e.g., positive 6 volts) to the gate terminal, the power transistor can be turned on, and when the drive circuit applies a turn-off voltage (e.g., zero volts) to the gate terminal, the power transistor can be turned off. Phenomena such as Miller coupling and parasitic induction between the power transistor and the drive circuit may cause a short-term residual peak in the gate-to-source voltage after the power transistor has been turned off. The short-term residual peak in the gate-to-source voltage may be higher than the threshold voltage of the power transistor, and may therefore cause the power transistor to be turned on accidentally. This may cause serious damage to the power transistor and / or any circuit containing or coupled to the power transistor. Accordingly, in order to ensure that any short-term residual peak in the gate-to-source voltage of the power transistor does not exceed the threshold voltage of the power transistor after the power transistor has been turned off, the power transistor can be turned off by applying a negative turn-off voltage (e.g., negative 6 volts) to the gate terminal of the power transistor by the drive circuit instead.

[0007] However, when the power transistor is turned back on by applying a turn-on voltage to the gate terminal of the power transistor, the large voltage difference between the negative turn-off voltage and the positive turn-on voltage may cause significant power loss in the power transistor. According to the principles described herein, the drive circuit robustly turns off the power transistor, thereby reducing the risk of accidental turn-on, and also manages power loss when the power transistor is turned back on. This is achieved by: 1) robustly turning off the power transistor by initially applying a negative turn-off voltage to the gate terminal of the power transistor; and 2) allowing the voltage on the gate terminal of the power transistor to gradually increase (e.g., to approximately negative 1 volt) before the power transistor is turned back on. Accordingly, the power transistor can be robustly turned off, thereby avoiding accidental turn-on, while also reducing the voltage difference between the turn-off voltage and the turn-on voltage when transitioning back to turn-on, thereby reducing power loss.

[0008] Regarding the structure of the drive circuit, the drive circuit includes a capacitor, two resistors and a diode. The capacitor is connected between an AC voltage source and a control terminal output node. The control terminal output node can be connected to, for example, a gate terminal of a power transistor. The AC voltage source can provide a high voltage and a low voltage, which can be a turn-on voltage and a turn-off voltage, respectively. A first resistor is connected in parallel with the capacitor. The diode has an anode and a cathode, and the cathode is connected to the control terminal output node. A second resistor is connected between the anode of the diode and the negative terminal of the AC voltage source. If the AC voltage source alternates between, for example, ground and 12 volts, the structure reaches an appropriate voltage at the control terminal output node to robustly turn off the transistor while allowing management of power loss when the transistor is turned back on.

[0009] Additional features and advantages will be set forth in the following description and, in part, will be apparent from the description or may be learned by practice of the teachings herein. The features and advantages of the present invention may be realized and obtained by means of the tools and combinations particularly pointed out in the appended claims. The features of the present invention will become more fully apparent from the following description and the appended claims or may be learned by practice of the present invention as set forth below. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to describe the manner in which the advantages and features of the circuits, systems, and methods described herein can be obtained, a more particular description of the embodiments briefly described herein will be presented by reference to specific embodiments thereof illustrated in the accompanying drawings. It should be understood that these drawings depict only typical embodiments of the circuits, systems, and methods described herein, and therefore should not be considered limiting of their scope. Certain circuits, systems, and methods will be described and explained with additional specificity and detail through the use of the accompanying drawings, in which:

[0011] Figure 1 shows a driving circuit in which the principles described herein may be practiced;

[0012] Figure 2 Shown as Figure 1 An example of a driving circuit of the driving circuit; and

[0013] Figure 3 Shown is a display representation Figure 2 A signal diagram of an example of a voltage signal at a control terminal output node of a driving circuit. DETAILED DESCRIPTION

[0014] Embodiments described herein relate to a driver circuit for a power transistor. The driver circuit allows both robust shut-off of the power transistor and reduced power loss when the power transistor is turned back on. The structure of the driver circuit according to the principles described herein will be discussed later. As an example, assume that the power transistor is a power field effect transistor having a gate terminal that controls whether current flows between the drain terminal and the source terminal of the power transistor.

[0015] The drive circuit can be used to control what voltage is applied to the gate terminal of the power transistor. For example, when the drive circuit applies a turn-on voltage (e.g., positive 6 volts) to the gate terminal, the power transistor can be turned on, and when the drive circuit applies a turn-off voltage (e.g., zero volts) to the gate terminal, the power transistor can be turned off. Phenomena such as Miller coupling and parasitic induction between the power transistor and the drive circuit may cause a short-term residual peak in the gate-to-source voltage after the power transistor has been turned off. The short-term residual peak in the gate-to-source voltage may be higher than the threshold voltage of the power transistor, and may therefore cause the power transistor to be turned on accidentally. This may cause serious damage to the power transistor and / or any circuit containing or coupled to the power transistor. Accordingly, in order to ensure that any short-term residual peak in the gate-to-source voltage of the power transistor does not exceed the threshold voltage of the power transistor after the power transistor has been turned off, the power transistor can be turned off by applying a negative turn-off voltage (e.g., negative 6 volts) to the gate terminal of the power transistor by the drive circuit instead.

[0016] However, when the power transistor is turned back on by applying a turn-on voltage to the gate terminal of the power transistor, the large voltage difference between the negative turn-off voltage and the positive turn-on voltage may cause significant power loss in the power transistor. According to the principles described herein, the drive circuit robustly turns off the power transistor, thereby reducing the risk of accidental turn-on, and also manages power loss when the power transistor is turned back on. This is achieved by: 1) robustly turning off the power transistor by initially applying a negative turn-off voltage to the gate terminal of the power transistor; and 2) allowing the voltage on the gate terminal of the power transistor to gradually increase (e.g., to approximately negative 1 volt) before the power transistor is turned back on. Accordingly, the power transistor can be robustly turned off, thereby avoiding accidental turn-on, while also reducing the voltage difference between the turn-off voltage and the turn-on voltage when transitioning back to turn-on, thereby reducing power loss.

[0017] Figure 1 A drive circuit 100 is shown in which the principles described herein may be practiced, and is merely one example of a circuit consistent with the principles described herein. The drive circuit 100 allows both robust shut-off of a power transistor (not shown) and management of power losses when the power transistor is turned back on. Specifically, the drive circuit 100 applies an appropriate voltage on an output node 101 to control the switching state of the power transistor. Accordingly, the output node 101 will be referred to hereinafter as the control terminal output node 101.

[0018] As an example, the power transistor driven by the control terminal output node 101 may be a power field effect transistor having a gate terminal that controls whether current flows between the drain terminal and the source terminal of the power field effect transistor. Therefore, the control terminal output node 101 may have a gate voltage applied to the gate terminal of the power field effect transistor. As a more specific example, the power transistor may be a gallium nitride field effect transistor. However, the principles described herein are not limited to a particular type of power transistor. For the purpose of explanation, it is assumed hereinafter that the power transistor is actually an example of a power field effect transistor. This example will be explained in detail. Figure 1 The operation of the driving circuit 100 is frequently used.

[0019] The drive circuit 100 includes a capacitor 110, two resistors 120 and 130, and a diode 140, and may also include an AC voltage source 150. The capacitor 110 is connected between the AC voltage source 150 and the control terminal output node 101. As an example, the control terminal output node 101 can be connected to the gate terminal of a power field effect transistor, as shown by ellipsis 102, and can therefore be used to apply various voltages to the gate terminal of the power field effect transistor. In one embodiment, the capacitance of the capacitor 110 is 5 to 20 times larger than the gate terminal capacitance of the power field effect transistor. In another embodiment, the capacitance of the capacitor 110 is 10 to 15 times larger than the gate terminal capacitance of the power field effect transistor.

[0020] The AC voltage source 150 may provide a voltage that alternates between a high voltage (eg, positive 12 volts) and a low voltage (eg, zero volts) to a node adjacent to the capacitor 110 (ie, the left side of the capacitor 110), such as Figure 1 The first resistor 120 is connected in parallel with the capacitor 110. The cathode 142 of the diode 140 is connected to the control terminal output node 101. The second resistor 130 is connected between the anode 141 of the diode 140 and the negative terminal of the AC voltage source 150.

[0021] As previously described, the driver circuit 100 allows both robust turn-off of the power FET and management of power losses when the power FET is turned back on. To describe how the driver circuit 100 achieves this, an example of the operation of the driver circuit 100 will now be described.

[0022] In operation, the driver circuit 100 alternates between two operating modes—a first operating mode when the AC voltage source 150 provides a high voltage (e.g., positive 12 volts), and a second operating mode when the AC voltage source 150 provides a low voltage (e.g., zero volts). For purposes of explanation, an example of the operation of the driver circuit 100 will be described using example voltages. However, the principles described herein are not limited to any particular voltage provided by the AC voltage source 150 during any one operating mode. Other voltages described as occurring throughout the driver circuit 100 are also for example purposes only.

[0023] Assume that just before the first operating mode begins, the power field effect transistor is turned off, assume that the AC voltage source is providing zero volts, assume that the voltage at the control terminal output node 101 is approximately negative 1 volt, and therefore assume that the capacitor 110 is charged so that the capacitor 110 carries a 1 volt voltage difference. Hereinafter, when describing the "voltage difference" carried by the capacitor 110, the voltage difference is the voltage at the left terminal of the capacitor 110 minus the voltage at the right terminal of the capacitor 110.

[0024] When the drive circuit 100 switches to the first operating mode, the AC voltage source 150 switches from providing zero volts to providing positive 12 volts. If it were not for the diode 140 and the resistor 130 acting together as a clamping circuit, the 1 volt voltage difference across the capacitor 110 would cause the voltage at the control terminal output node 101 to rise to positive 11 volts almost immediately.

[0025] However, the diode 140 can be a Zener diode with a reverse breakdown voltage of about 5 volts. In addition, the voltage difference across the resistor 130 can cause the voltage at the anode 141 of the diode 140 to be about positive 1 volt. Therefore, as the voltage at the control terminal output node 101 increases sharply due to the 1 volt voltage difference on the capacitor 110, the control terminal output node 101 is only allowed to increase to about positive 6 volts before the diode 140 undergoes reverse breakdown. When the diode 140 undergoes reverse breakdown, the current flows downward through the diode 140 and the resistor 130 and flows to the negative terminal of the AC voltage source 150 (e.g., to ground). Therefore, the diode 140 and the resistor 130 effectively act as a clamping circuit that clamps the voltage at the control terminal output node 101 downward to a maximum of about positive 6 volts. Moreover, because the control terminal output node 101 is at about positive 6 volts, the connected power field effect transistor is turned on.

[0026] In addition, after the initial jump in the voltage at the control terminal output node 101, current flows from the AC voltage source 150 through the resistor 120 and to the control terminal output node 101. Therefore, during the steady state of the first operating mode, the control terminal output node 101 is continuously supplied with a charge at positive 6 volts, and the capacitor 110 is charged to have a voltage difference of 6 volts. In addition, during this first operating mode, the charge is supplied to the gate terminal of the power field effect transistor via the control terminal output node 101, and any remaining charge that will cause the control terminal output node 101 to increase in excess of positive 6 volts flows downward through the clamping circuit of the diode 140 and the resistor 130 (e.g., to ground).

[0027] When the drive circuit 100 switches to the second operating mode, the AC voltage source 150 switches back from providing positive 12 volts to providing zero volts. Since the capacitor 110 has been charged to have a voltage difference of 6 volts, the voltage at the control terminal output node 101 initially drops to negative 6 volts. Accordingly, in this second operating mode, the power field effect transistor is robustly turned off and accidental conduction is avoided. As a side note, the exact negative voltage to which the control terminal output node 101 drops when the drive circuit 100 is first switched to the second operating mode depends on the capacitance of the capacitor 110. That is, using a capacitor 110 with a higher capacitance will cause the control terminal output node 101 to initially drop to a more negative voltage (e.g., negative 6.5 volts), while using a capacitor 110 with a lower capacitance will cause the control terminal output node 101 to initially drop to a smaller negative voltage (e.g., negative 5.5 volts).

[0028] After the initial drop in voltage at the control terminal output node 101, charge flows from the negative terminal of the AC voltage source 150 (e.g., from ground) upward through the second resistor 130, the diode 140, and to the control terminal output node 101. In addition, current flows from the AC voltage source 150 (e.g., from ground) through the resistor 120. These two current flows cause the voltage at the control terminal output node 101 to gradually climb from the negative 6 volts initially provided for the robust turn-off of the power field effect transistor to approximately negative 1 volt (which is the forward threshold voltage of the diode 140). Also, as a side note, how fast the control terminal output node 101 climbs from the initial negative voltage (e.g., negative 6 volts) to a smaller negative voltage (e.g., negative 1 volt) depends on the resistance of the resistor 130. That is, using a larger resistor 130 will cause the voltage on the control terminal output node 101 to rise more slowly, while using a smaller resistor 130 will cause the voltage on the control terminal output node 101 to rise more quickly.

[0029] Since the AC voltage source provides zero volts, and since the control terminal output node 101 is at approximately negative 1 volt, the capacitor 110 is charged to have a 1 volt voltage difference. Recall that this is the state of the drive circuit 100 just before the first operating mode begins. Accordingly, when the drive circuit 100 transitions from the second operating mode back to the first operating mode, the gate terminal of the power field effect transistor only needs to increase from negative 1 volt to positive 6 volts, rather than from, for example, negative 6 volts to positive 6 volts. Therefore, power losses can be managed while transitioning the power field effect transistor back to conduction.

[0030] Accordingly, the driver circuit 100 allows robust shutdown of the power field effect transistor by initially applying a sufficiently negative voltage (e.g., negative 6 volts) to the control terminal output node 101 at the beginning of the second operating mode, thereby avoiding accidental turn-on of the power field effect transistor. In addition, the driver circuit 100 allows management of power losses when the power field effect transistor is turned back on. This is because the voltage at the control terminal output node 101 is allowed to increase from the initial negative voltage (e.g., negative 6 volts) to a smaller negative voltage (e.g., negative 1 volt) before the driver circuit 100 applies a positive voltage (e.g., positive 6 volts) to turn the power field effect transistor back on.

[0031] As mentioned above, the principles described herein are not limited to Figure 1 The specific drive circuit 100 of FIG. 100 is shown in FIG. 100 . In fact, the combination of the concepts of robust turn-off of the power field effect transistor and management of power loss when turning the power field effect transistor back on may be useful in a variety of circuits. For example, these concepts may be applicable to a variety of modified DC to DC voltage converters, synchronous rectifiers, buck converters, boost converters, buck-boost converters, etc. In addition, the drive circuit 100 itself may be (or act as) a part of a modified DC to DC voltage converter, synchronous rectifier, buck converter, boost converter, buck-boost converter, etc.

[0032] Figure 2 Shown as Figure 1 The driving circuit 200 of the driving circuit 100 is shown in FIG. 1 . Specifically, the driving circuit 200 includes a capacitor 210, resistors 220 and 230, a diode 240, an AC voltage source 250, and a control terminal output node 201, which are respectively Figure 1 1 , and a control terminal output node 101.

[0033] However, the drive circuit 200 also includes an additional diode 260 and additional resistors 270 and 280. The diode 260 has an anode 261 connected to both the anodes of the resistor 230 and the diode 240. The diode 260 also has a cathode 262 connected to the negative terminal of the AC voltage source 250.

[0034] Resistor 270 is connected between the left terminal of capacitor 210 and the positive terminal of AC voltage source 250. As an example, resistor 270 may represent the inherent switch resistance of AC voltage source 250. Resistor 280 is connected between control terminal output node 201 and the negative terminal of AC voltage source 250. For example, similar to Figure 1 Circuit 100, assuming that control terminal output node 201 has the gate terminal of the power field effect transistor connected thereto, as indicated by ellipsis 202. In addition, it is assumed that the source terminal of the power field effect transistor is connected to the negative terminal of the AC voltage source 250, as indicated by ellipsis 203. In this case, resistor 280 can represent the inherent gate-to-source resistance of the power field effect transistor. For the purpose of explanation, it is assumed that resistor 270 provides a very small resistance (e.g., effectively a short circuit), and it is assumed that resistor 280 provides a very large resistance (e.g., effectively an open circuit).

[0035] Similar to Figure 1 The driving circuit 100, Figure 2 The drive circuit 200 has two operating modes—a first operating mode is when the AC voltage source 250 provides a higher voltage (e.g., positive 12 volts), and a second operating mode is when the AC voltage source 250 provides a lower voltage (e.g., zero volts). Again, for purposes of explanation, an example of the operation of the drive circuit 200 will be described using example voltages. In addition, the example of Figure 3 Description to describe Figure 2 An explanation of the operation of the driver circuit 200 is given in FIG. Figure 3 An example waveform of the voltage on the control terminal output node 201 is shown.

[0036] Specifically, Figure 3 Shown is a display representation Figure 2300 is a signal diagram of an example of a signal 301 of a voltage at a control terminal output node 201. For the purpose of explanation, the signal 301 is divided into various signal portions 301A to 301F. The horizontal axis represents the time passed from left to right. The vertical axis represents the amplitude of the voltage of the signal 301. Time is divided into three approximate time periods 311, 312, and 313. Time period 311 is when the drive circuit 200 operates in the first operating mode, time period 312 is when the drive circuit 200 operates in the second operating mode, and time period 313 is when the drive circuit 200 returns to operate in the first operating mode. By way of example only, time periods 311 and 312 themselves can each last for a few microseconds, while the transition between those time periods can last only for a few nanoseconds.

[0037] Just before the first operating mode begins (just before time period 311), the power field effect transistor is turned off, the AC voltage source 250 is providing zero volts, the voltage at the control terminal output node 101 is approximately negative 1 volt (see signal portion 301A), and the capacitor 210 is charged so that the capacitor 210 carries a 1 volt voltage difference.

[0038] At the beginning of time period 311, when drive circuit 200 switches to the first operating mode, AC voltage source 150 switches from providing zero volts to providing positive 12 volts. As capacitor 210 is charged, the voltage on control terminal output node 201 increases rapidly (see signal portion 301B). However, similar to Figure 1 In the driving circuit 100 of FIG. 1 , the diode 240 and the diode 260 may be Zener diodes having a reverse breakdown voltage of approximately 5 volts. Accordingly, the diode 240, the diode 260 and the resistor 230 together act as a clamping circuit that only allows the voltage at the control terminal output node 201 to increase to approximately positive 6 volts (see signal portion 301C). Since the control terminal output node 201 is at approximately positive 6 volts, the power field effect transistor is turned on.

[0039] After the initial jump in the voltage at the control terminal output node 201, current flows from the AC voltage source 250 through the resistor 270, through the resistor 220 and to the control terminal output node 201. Therefore, during the remainder of the first operating mode, during the time period 311, the control terminal output node 201 is continuously supplied with a charge at positive 6 volts, and the capacitor 210 is charged to have a voltage difference of approximately positive 6 volts. In addition, similar to Figure 1 1. The circuit 100 will cause any remaining charge at the control terminal output node 201 to increase in excess of positive 6 volts to flow downward through the clamping circuit of diodes 240 and 260 and resistor 230 (eg, to ground).

[0040] At the beginning of time period 312, the drive circuit 100 switches to the second operating mode, wherein the AC voltage source 250 switches from providing positive 12 volts back to providing zero volts. Since the capacitor 210 has been charged with a voltage difference of 6 volts, the voltage at the control terminal output node 201 drops to negative 6 volts almost immediately (see signal portion 301D). As previously described, this allows for a robust turn-off of the power field effect transistor.

[0041] After the initial drop in voltage at the control terminal output node 201, charge flows upward from the negative terminal of the AC voltage source 250 (e.g., from ground) through the resistor 230, the diode 240, and to the control terminal output node 201. In addition, current flows from the positive terminal of the AC voltage source 250 (e.g., currently providing zero volts) through the resistors 270 and 220 to the control terminal output node 201. As shown in the signal portion 301E, these two current flows cause the voltage at the control terminal output node 201 to gradually climb from the negative 6 volts initially provided for the robust turn-off of the power field effect transistor to approximately negative 1 volt (to the forward threshold voltage of the diode 240). Once the control terminal output node 201 has reached approximately negative 1 volt, the capacitor 210 has been charged to have a voltage difference of 1 volt, which is the initial state of the drive circuit 200 just before the first operating mode at the beginning of the time period 311.

[0042] At the beginning of time period 313, the driver circuit 200 transitions from the second operating mode back to the first operating mode, resulting in the voltage at the control terminal output node 201 increasing from negative 1 volt to positive 6 volts (see signal portion 301F). As previously described, since the gate terminal of the power field effect transistor (connected to the control terminal output node 201) only needs to increase from negative 1 volt to positive 6 volts, power losses can be managed while the power field effect transistor is turned back on. The driver circuit 200 can continue to transition back and forth between the first operating mode and the second operating mode in order to perform correct switching of the power field effect transistor, as shown by ellipsis 302.

[0043] Therefore, the driver circuit 200 allows robust shutdown of the power field effect transistor by initially applying a sufficiently negative voltage (e.g., negative 6 volts) to the control terminal output node 201 at the beginning of the second operating mode, thereby avoiding accidental turn-on of the power field effect transistor. In addition, the driver circuit 200 allows management of power losses when the power field effect transistor is turned back on. This is because the voltage at the control terminal output node 201 is allowed to increase from the initial negative voltage (e.g., negative 6 volts) to a smaller negative voltage (e.g., negative 1 volt) before the driver circuit 100 applies a positive voltage (e.g., positive 6 volts) to turn the power field effect transistor back on.

[0044] Literal support part

[0045] Item 1: A drive circuit for a power transistor, the drive circuit comprising: a capacitor having a first capacitor terminal connected to an AC voltage source, the AC voltage source alternating between a first voltage and a second voltage lower than the first voltage, the capacitor having a second capacitor terminal connected to a control terminal output node; a first resistor, the first resistor connected between the first capacitor terminal and the second capacitor terminal; a diode, the diode having a cathode connected to the control terminal output node, the diode also having an anode; and a second resistor, the second resistor connected between the anode of the diode and a negative terminal of the AC voltage source.

[0046] Clause 2: The drive circuit of clause 1, wherein the drive circuit is part of a synchronous rectifier.

[0047] Clause 3: The driver circuit of clause 1, wherein the driver circuit is part of a buck converter.

[0048] Clause 4: The driver circuit of clause 1, wherein the driver circuit is part of a boost converter.

[0049] Clause 5: The driver circuit of clause 1, wherein the driver circuit is part of a DC to DC voltage converter.

[0050] Item 6: The drive circuit of Item 1, wherein the capacitance of the capacitor is 5 to 20 times greater than the control terminal capacitance of the power transistor.

[0051] Item 7: The drive circuit of Item 1, wherein the capacitance of the capacitor is 10 to 15 times greater than the control terminal capacitance of the power transistor.

[0052] Item 8: The driving circuit of Item 1, wherein when the AC voltage source provides the first voltage, the control terminal output node is at a first output voltage.

[0053] Clause 9: The drive circuit of clause 8, wherein when the AC voltage source provides the second voltage, the control terminal output node is initially at the second output voltage.

[0054] Clause 10: The drive circuit of clause 9, wherein the second output voltage at the control terminal output node depends on the capacitance of the capacitor.

[0055] Item 11: The driving circuit of Item 9, wherein when the AC voltage source provides the second voltage, after the control terminal output node is initially at the second output voltage, the control terminal output node gradually changes to a third output voltage.

[0056] Clause 12: The drive circuit of clause 11, wherein the first output voltage is a positive voltage, the second output voltage is a negative voltage, and the third output voltage is a voltage that is more positive than the second output voltage but less positive than the first output voltage.

[0057] Clause 13: The drive circuit of clause 11, wherein how fast the control terminal output node gradually changes from the second output voltage to the third output voltage depends on the resistance of the second resistor.

[0058] Clause 14: The drive circuit of clause 1, the diode being a first diode, the drive circuit further comprising a second diode having a cathode connected to the output of the reference voltage source and an anode connected to the anode of the first diode.

[0059] Clause 15: The drive circuit of clause 14, wherein the second diode is a Zener diode.

[0060] Clause 16: The drive circuit of clause 15, wherein the first diode is a Zener diode.

[0061] Clause 17: The drive circuit of clause 1, wherein the first diode is a Zener diode.

[0062] Clause 18: The drive circuit of clause 1, wherein the power transistor is a field effect transistor.

[0063] Clause 19: The driver circuit of clause 1, wherein the power transistor is a gallium nitride field effect transistor.

[0064] Although the subject matter has been described in language specific to structural features and / or methodological acts, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the features or acts or the order of the acts described above. Rather, the described features and acts are disclosed as example forms of implementing the claims.

[0065] The present disclosure may be embodied in other specific forms without departing from its essential characteristics. The described embodiments are to be considered in all respects as illustrative and non-restrictive. All changes made within the meaning and scope of the equivalents of the claims are included within the scope of the claims.

[0066] When introducing elements in the appended claims, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the elements. The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements.

Claims

1. A driving circuit for a power transistor, the driving circuit comprising: a capacitor having a first capacitor terminal connected to an AC voltage source that alternates between a first voltage and a second voltage lower than the first voltage, the capacitor having a second capacitor terminal connected to a control terminal output node; a first resistor connected between the first capacitor terminal and the second capacitor terminal; a diode having a cathode connected to the control terminal output node, the diode also having an anode; as well as A second resistor is connected between the anode of the diode and a negative terminal of the AC voltage source.

2. The drive circuit of claim 1, wherein the drive circuit is part of a synchronous rectifier.

3. The drive circuit of claim 1, wherein the drive circuit is part of a buck converter. The drive circuit of claim 1 , wherein the drive circuit is part of a boost converter.

5. The drive circuit of claim 1, wherein the drive circuit is part of a DC to DC voltage converter. 6 . The drive circuit according to claim 1 , wherein a capacitance of the capacitor is 5 to 20 times greater than a control terminal capacitance of the power transistor. 7 . The drive circuit according to claim 1 , wherein a capacitance of the capacitor is 10 to 15 times greater than a control terminal capacitance of the power transistor. 8 . The driving circuit of claim 1 , wherein when the AC voltage source provides the first voltage, the control terminal output node is at a first output voltage.

9. The drive circuit of claim 8, wherein when the AC voltage source provides the second voltage, the control terminal output node is initially at a second output voltage.

10. The drive circuit of claim 9, wherein the second output voltage at the control terminal output node depends on the capacitance of the capacitor.

11. The driving circuit according to claim 9, wherein when the AC voltage source provides the second voltage, after the control terminal output node is initially at the second output voltage, the control terminal output node gradually changes to a third output voltage. 12 . The drive circuit of claim 11 , wherein the first output voltage is a positive voltage, the second output voltage is a negative voltage, and the third output voltage is a voltage that is more positive than the second output voltage but less positive than the first output voltage. 13 . The drive circuit of claim 11 , wherein how fast the control terminal output node gradually changes from the second output voltage to the third output voltage depends on the resistance of the second resistor.

14. The drive circuit of claim 1, wherein the diode is a first diode, the drive circuit further comprising a second diode having a cathode connected to the negative terminal of the AC voltage source and an anode connected to the anode of the first diode.

15. The driving circuit of claim 14, wherein the second diode is a Zener diode. The drive circuit according to claim 15 , wherein the first diode is a Zener diode.

17. The driving circuit of claim 1, wherein the first diode is a Zener diode.

18. The drive circuit of claim 1, wherein the power transistor is a field effect transistor.

19. The driving circuit of claim 1, wherein the power transistor is a gallium nitride field effect transistor.

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