Voltage-controlled oscillator, phase-locked loop, electronic equipment and vehicle

Abstract

The invention discloses a voltage-controlled oscillator, a phase-locked loop, electronic equipment and a vehicle. The voltage-controlled oscillator comprises a positive feedback gain unit, a capacitor array unit, a positive output port VCOOP and a negative output port VCOON, wherein two ends of the positive feedback gain unit and the capacitor array unit which are connected in parallel are respectively connected with the positive output port VCOOP and the negative output port VCOON; the positive feedback gain unit is used for ensuring continuous oscillation of the voltage-controlled oscillator and allowing the oscillation frequency to be adjusted through an external voltage signal; and the capacitor array unit is used for providing wide-range frequency tuning capability for the voltage-controlled oscillator and compensating the frequency gain and the temperature coefficient of the voltage-controlled oscillator.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic appliances, and in particular to a voltage-controlled oscillator, a phase-locked loop, an electronic device and a vehicle. Background Art

[0002] The phase-locked loop (PLL) mainly includes a phase detector (PFD), a charge pump (CP), a loop filter (LPF), and a voltage-controlled oscillator (VCO). It is a negative feedback control system that uses the voltage generated by phase synchronization to tune the voltage-controlled oscillator to generate the target frequency. Due to its unique frequency synthesis, synchronization and phase detection functions, the phase-locked loop is widely used in many fields. With the continuous development of communication technology, the bandwidth index of the phase-locked loop is increasingly required, and the main factors affecting the bandwidth come from the frequency gain (Kvco) and temperature coefficient of the voltage-controlled oscillator. Therefore, how to make the voltage-controlled oscillator have a constant frequency gain and temperature coefficient is currently an urgent problem to be solved.

[0003] In the prior art, the frequency gain and temperature coefficient are usually compensated to keep them constant, but the compensation for the frequency gain and temperature coefficient are taken separately, which means that more components will be connected to the circuit. The more components connected, the worse the phase noise of the voltage-controlled oscillator will be, resulting in the worsening of the loop noise of the phase-locked loop. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a voltage-controlled oscillator, a phase-locked loop, an electronic device and a vehicle, which combine the compensation of frequency gain and temperature coefficient together, and ensure the constancy of frequency gain and temperature coefficient without adding more components to cause noise deterioration.

[0005] To achieve the purpose of the present invention, the present invention adopts the following technical solutions: According to a first aspect of the present invention, there is provided a voltage controlled oscillator, comprising: A positive feedback gain unit, a capacitor array unit, a positive output port VCO_OP and a negative output port VCO_ON, wherein two ends of the positive feedback gain unit and the capacitor array unit after being connected in parallel are respectively connected to the positive output port VCO_OP and the negative output port VCO_ON; the positive feedback gain unit is used to ensure the continuous oscillation of the voltage-controlled oscillator and allow the oscillation frequency to be adjusted by an external voltage signal; the capacitor array unit is used to provide a wide range of frequency tuning capability for the voltage-controlled oscillator, and compensate for the frequency gain and temperature coefficient of the voltage-controlled oscillator.

[0006] According to some embodiments of the present invention, the positive feedback gain unit includes a first P-type field effect transistor MP1, a second P-type field effect transistor MP2, a first N-type field effect transistor MN1 and a second N-type field effect transistor MN2; The gate G of the first P-type field effect transistor MP1 and the drain D of the second P-type field effect transistor MP2 are connected to the negative output port VCO_ON, the drain D of the first P-type field effect transistor MP1 and the gate G of the second P-type field effect transistor MP2 are connected to the positive output port VCO_OP, and the source S of the first P-type field effect transistor MP1 and the second P-type field effect transistor MP2 are connected to the first power supply voltage VDD1; the gate G of the first N-type field effect transistor MN1 and the drain D of the second N-type field effect transistor MN2 are connected to the negative output port VCO_ON, the drain D of the first N-type field effect transistor MN1 and the gate G of the second N-type field effect transistor MN2 are connected to the positive output port VCO_OP, and the source S of the first N-type field effect transistor MN1 and the second N-type field effect transistor MN2 are grounded through the first variable resistor R_turn1.

[0007] According to some embodiments of the present invention, the capacitor array unit includes a variable capacitor array module, a fixed capacitor array module and a bias voltage module. After the variable capacitor array module and the fixed capacitor array module are connected in parallel, both ends are respectively connected to the positive terminal plus and the negative terminal minus of the capacitor array unit; the bias voltage module is connected to the variable capacitor array module to provide a bias voltage; the variable capacitor array module, the fixed capacitor array module and the bias voltage module cooperate to provide a wide range of frequency coordination capabilities for the voltage-controlled oscillator, and compensate for the frequency gain and temperature coefficient of the voltage-controlled oscillator.

[0008] According to some embodiments of the present invention, the variable capacitor array module has a first end, a second end, a third end, a fourth end and a fifth end, and the fixed capacitor array module has a first end, a second end and a third end; a node after the second end of the variable capacitor array module and the second end of the fixed capacitor array module are connected is used as the positive end plus, and a node after the fifth end of the variable capacitor array module and the third end of the fixed capacitor array module are connected is used as the negative end minus; the first end of the variable capacitor array module is connected to a selector MUX to receive a first control voltage Vctr1<7:0>; the third end and the fourth end of the variable capacitor array module are connected to the bias voltage module; the first end of the fixed capacitor array module receives a second control word signal Band_sel<7:0>.

[0009] According to some embodiments of the present invention, the variable capacitor array module includes multiple variable capacitor branches, the multiple variable capacitor branches are connected in parallel, and each variable capacitor branch is controlled by a corresponding bit in the first control voltage Vctr1<7:0>, and the voltage connected to each variable capacitor branch is determined according to the value of the corresponding bit.

[0010] According to some embodiments of the present invention, the variable capacitor branch includes a first sub-branch, a second sub-branch, a third sub-branch and a fourth sub-branch; node a after the first sub-branch is connected to the fourth sub-branch serves as the third end of the variable capacitor array module; node b after the first sub-branch is connected to the fourth sub-branch and node c after the second sub-branch is connected to the third sub-branch serve as the first end of the variable capacitor array module; node d after the second sub-branch is connected to the third sub-branch serves as the fourth end of the variable capacitor array module; node e after the first sub-branch is connected to the second sub-branch serves as the second end of the variable capacitor array module, and node f after the third sub-branch is connected to the fourth sub-branch serves as the fifth end of the variable capacitor array module.

[0011] According to some embodiments of the present invention, the fixed capacitor array module includes multiple fixed capacitor branches, and the multiple fixed capacitor branches are connected in parallel; each of the fixed capacitor branches includes a fifth DC blocking capacitor C5, a switch k and a sixth DC blocking capacitor C6 connected in series in sequence, and a suspended end of the fifth DC blocking capacitor C5 serves as the second end of the fixed capacitor array module, and a suspended end of the sixth DC blocking capacitor C6 serves as the third end of the fixed capacitor array module.

[0012] According to some embodiments of the present invention, the bias voltage module includes a third P-type field effect transistor MP3, a fourth P-type field effect transistor MP4, an amplifier AMP1, a second variable resistor R_turn2 and a transistor Q1; The source S of the third P-type field effect transistor MP3 and the fourth P-type field effect transistor MP4 are connected to the second power supply voltage VDD2, the gate G of the third P-type field effect transistor MP3 and the fourth P-type field effect transistor MP4 are connected to the output pin of the amplifier AMP1, the drain D of the third P-type field effect transistor MP3 is connected to the positive input pin of the amplifier AMP1 and then grounded through the fifth resistor R5, and the reverse input pin of the amplifier AMP1 is connected to the reference voltage source Vbg; the drain D of the fourth P-type field effect transistor MP4 serves as an output end of the bias voltage module 23 to output the second bias voltage Vref2, the drain D of the fourth P-type field effect transistor MP4 is connected to the emitter E of the transistor Q1 through the second variable resistor R_turn2, the emitter E of the transistor Q1 serves as another output end of the bias voltage module 23 to output the first bias voltage Vref1, and the base B and collector C of the transistor Q1 are grounded.

[0013] A second aspect of the present invention provides a phase-locked loop, comprising the voltage-controlled oscillator described in any one of the first aspects.

[0014] A third aspect of the present invention provides an electronic device, comprising the voltage-controlled oscillator described in any one of the first aspect or the phase-locked loop described in the second aspect.

[0015] A fourth aspect of the present invention provides a vehicle, comprising the electronic device described in the third aspect.

[0016] According to the technical solution provided by the present invention, at least the following beneficial effects are achieved: the voltage-controlled oscillator ensures the continuation of oscillation through a positive feedback gain unit; the compensation of the frequency gain and the temperature coefficient are combined together through a capacitor array unit, and the constancy of the frequency gain and the temperature coefficient can be effectively ensured without adding more components to cause noise deterioration.

[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 is a structural diagram of a voltage controlled oscillator according to an embodiment of the present invention; Figure 2 is a circuit schematic diagram of a voltage-controlled oscillator according to an embodiment of the present invention; Figure 3 is a CV characteristic curve of the variable capacitance branch of an embodiment of the present invention; Figure 4 1 is a circuit schematic diagram of a bias voltage module according to an embodiment of the present invention and a temperature characteristic curve diagram of the bias voltage.

[0019] Reference numerals: Positive feedback gain unit 1, capacitor array unit 2, variable capacitor array module 21, fixed capacitor array module 22, variable capacitor branch 211, fixed capacitor branch 221, bias voltage module 23 DETAILED DESCRIPTION

[0020] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0021] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0022] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "set", "arrange", etc. should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0023] Reference below Figures 1 to 4 A voltage controlled oscillator according to an embodiment of a first aspect of the present invention is described.

[0024] like Figure 1 As shown, the voltage controlled oscillator according to the embodiment of the present invention includes a positive feedback gain unit 1, a capacitor array unit 2, a positive output port VCO_OP and a negative output port VCO_ON, and the two ends of the positive feedback gain unit 1 and the capacitor array unit 2 after being connected in parallel are respectively connected to the positive output port VCO_OP and the negative output port VCO_ON, and the positive output port VCO_OP and the negative output port VCO_ON are also connected to an inductor L. The positive feedback gain unit 1 is used to ensure the continuous oscillation of the voltage controlled oscillator and allow the oscillation frequency to be adjusted by an external voltage signal, and the capacitor array unit 2 is used to provide a wide range of frequency tuning capabilities for the voltage controlled oscillator, and compensate for the frequency gain and temperature coefficient of the voltage controlled oscillator to achieve more stable and accurate frequency control.

[0025] like Figure 2As shown, in some specific embodiments of the present invention, the positive feedback gain unit 1 includes a first P-type field effect transistor MP1, a second P-type field effect transistor MP2, a first N-type field effect transistor MN1 and a second N-type field effect transistor MN2. The gate G of the first P-type field effect transistor MP1 and the drain D of the second P-type field effect transistor MP2 are connected to the negative output port VCO_ON of the voltage-controlled oscillator, the drain D of the first P-type field effect transistor MP1 and the gate G of the second P-type field effect transistor MP2 are connected to the positive output port VCO_OP of the voltage-controlled oscillator, and the source S of the first P-type field effect transistor MP1 and the second P-type field effect transistor MP2 are connected to the first power supply voltage VDD1; the gate G of the first N-type field effect transistor MN1 and the drain D of the second N-type field effect transistor MN2 are connected to the negative output port VCO_ON, the drain D of the first N-type field effect transistor MN1 and the gate G of the second N-type field effect transistor MN2 are connected to the positive output port VCO_OP, the source S of the first N-type field effect transistor MN1 and the second N-type field effect transistor MN2 are connected to one end of the first variable resistor R_turn1, and the other end of the first variable resistor R_turn1 is grounded.

[0026] like Figure 1 , Figure 2 and Figure 4 As shown, in some specific embodiments of the present invention, the capacitor array unit 2 includes a variable capacitor array module 21, a fixed capacitor array module 22 and a bias voltage module 23. After the variable capacitor array module 21 and the fixed capacitor array module 22 are connected in parallel, the two ends are respectively connected to the positive terminal plus and the negative terminal minus of the capacitor array unit 2 (the positive terminal pius of the capacitor array unit 2 corresponds to the positive output port VCO_OP of the voltage-controlled oscillator, and the negative terminal minus of the capacitor array unit 2 corresponds to the negative output port VCO_ON of the voltage-controlled oscillator), and the bias voltage module 23 is connected to the variable capacitor array module 21 to provide a bias voltage. In this embodiment, the variable capacitor array module 21, the fixed capacitor array module 22 and the bias voltage module 23 cooperate to provide a wide range of frequency coordination capabilities for the voltage-controlled oscillator, and compensate for the frequency gain and temperature coefficient of the voltage-controlled oscillator.

[0027] Specifically, the variable capacitor array module 21 has a first end, a second end, a third end, a fourth end and a fifth end, and the fixed capacitor array module 22 has a first end, a second end and a third end. The node after the second end of the variable capacitor array module 21 and the second end of the fixed capacitor array module 22 are connected is used as the positive end plus of the capacitor array unit 2, and the node after the fifth end of the variable capacitor array module 21 and the third end of the fixed capacitor array module 22 are connected is used as the negative end minus of the capacitor array unit 2. The first end of the variable capacitor array module 21 is connected to the selector MUX to receive the first control voltage Vctr1<7:0>, and the selector MUX can select the fixed voltage Vfix or the control voltage Lpf_Vc as the first control voltage Vctr1<7:0> according to the first control word signal VAR_SEL<7:0>. The third and fourth ends of the variable capacitor array module 21 are connected to the bias voltage module 23 to receive the bias voltage. The first end of the fixed capacitor array module 22 receives the second control word signal Band_sel<7:0>.

[0028] It should be noted that the voltage value of the fixed voltage Vfix is ​​a fixed value, and the voltage value of the control voltage Lpf_Vc is a variable value, and the voltage value varies in the range of 0 to VDD1. The control voltage Lpf_Vc is the output voltage of the loop filter in the phase-locked loop. When the output frequency of the phase-locked loop is lower than the preset target value, the loop feedback will increase the control voltage Lpf_Vc until the output frequency of the voltage-controlled oscillator is equal to the preset target value of the phase-locked loop; when the output frequency of the phase-locked loop is higher than the preset target value, the loop feedback will reduce the control voltage Lpf_Vc until the output frequency of the voltage-controlled oscillator is equal to the preset target value of the phase-locked loop.

[0029] In some specific embodiments of the present invention, the variable capacitor array module 21 includes a plurality of variable capacitor branches 211, which are connected in parallel and share a positive terminal plus and a negative terminal minus. Each variable capacitor branch 211 corresponds to a bit in the first control voltage Vctr1<7:0> one by one, and the voltage connected to each variable capacitor branch 211 is determined to be Lpf_Vc or Vfix according to the value of the corresponding bit in the first control voltage Vctr1<7:0>.

[0030] Specifically, each variable capacitance branch 211 includes a first sub-branch, a second sub-branch, a third sub-branch and a fourth sub-branch. Node a after the first sub-branch is connected to the fourth sub-branch serves as the third end of the variable capacitance array module 21 (connected to the first bias voltage Vref1 output by the bias voltage module 23); node b after the first sub-branch is connected to the fourth sub-branch and node c after the second sub-branch is connected to the third sub-branch serves as the first end of the variable capacitance array module 21 (connected to the selector MUX to receive the first control voltage Vctr1 of the corresponding bit); node d after the second sub-branch is connected to the third sub-branch serves as the fourth end of the variable capacitance array module 21 (connected to the second bias voltage Vref2 output by the bias voltage module 23); node e after the first sub-branch is connected to the second sub-branch serves as the second end (positive end plus) of the variable capacitance array module 21, and node f after the third sub-branch is connected to the fourth sub-branch serves as the fifth end (negative end minus) of the variable capacitance array module 21.

[0031] Further, the first sub-branch includes a first DC blocking capacitor C1, a first variable capacitor VAR1 and a first resistor R1, one end of the first DC blocking capacitor C1 serves as the second end (positive end plus) of the variable capacitor array module 21, the other end of the first DC blocking capacitor C1 is connected to the positive electrode of the first variable capacitor VAR1, and the negative electrode of the first variable capacitor VAR1 serves as the first end of the variable capacitor array module 21 (connected to the control selector MUX to receive the first control voltage Vctr1<7:0> of the corresponding bit). At the same time, the other end of the first DC blocking capacitor C1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 serves as the third end of the variable capacitor array module 21 (connected to the bias voltage module 23 to receive the first bias voltage Vref1).

[0032] The second sub-branch includes a second DC blocking capacitor C2, a second variable capacitor VAR2, and a second resistor R2. One end of the second DC blocking capacitor C2 is connected to one end of the first DC blocking capacitor C1, the other end of the second DC blocking capacitor C2 is connected to the positive electrode of the second variable capacitor VAR2, and the negative electrode of the second variable capacitor VAR2 is connected to the negative electrode of the first variable capacitor VAR1. At the same time, the other end of the second DC blocking capacitor C2 is connected to one end of the second resistor R2, and the other end of the second resistor R2 serves as the fourth end of the variable capacitor array module 21 (connected to the bias voltage module 23 to receive the second bias voltage Vref2).

[0033] The third sub-branch includes a third DC blocking capacitor C3, a third variable capacitor VAR3 and a third resistor R3, one end of the third DC blocking capacitor C3 serves as the fifth end (negative end minus) of the variable capacitor array module 21, the other end of the third DC blocking capacitor C3 is connected to the positive electrode of the third variable capacitor VAR3, and the negative electrode of the third variable capacitor VAR3 is connected to the negative electrode of the first variable capacitor VAR1. At the same time, the other end of the third DC blocking capacitor C3 is connected to one end of the third resistor R3, and the other end of the third resistor R3 is connected to the other end of the second resistor R2.

[0034] The fourth sub-branch includes a fourth DC blocking capacitor C4, a fourth variable capacitor VAR4 and a fourth resistor R4, one end of the fourth DC blocking capacitor C4 is connected to one end of the third DC blocking capacitor C3, the other end of the fourth DC blocking capacitor C4 is connected to the positive electrode of the fourth variable capacitor VAR4, and the negative electrode of the fourth variable capacitor VAR4 is connected to the negative electrode of the first variable capacitor VAR1. At the same time, the other end of the fourth DC blocking capacitor C4 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the other end of the first resistor R1.

[0035] It should be noted that the variable capacitor branch 211 is configured in this way so that the capacitance value thereof has a good linear trend under the action of the first control voltage Vctrl in a wider range. Figure 3 The figure shows the CV characteristic curve of the variable capacitor branch 211. It can be seen that the capacitance value of the variable capacitor branch 211 has obtained a wider linear variation range, so that the frequency gain Kvco will not change with the change of the first control voltage Vctrl in a single sub-band, thereby achieving the effect of constant frequency gain Kvco on a single sub-band.

[0036] In this embodiment, in order to make the voltage controlled oscillator have a wider frequency tuning range, the variable capacitance array module 21 uses an 8-bit control word to control and adjust the frequency band of the voltage controlled oscillator (i.e., the size of the capacitance value connected to the resonant cavity), each control word corresponds to a sub-band, and the 8-bit control word controls a total of 256 sub-bands. Therefore, the variable capacitance array module 21 includes 8 variable capacitance branches 211, and the 8 variable capacitance branches 211 constitute 256 sub-bands. The capacitance value of each variable capacitance branch 211 corresponds to the relationship VAR 7 =2*VAR 6 =4*VAR 5 =8*VAR 4 =16*VAR 3 =32*VAR 2 =64*VAR 1 =128*VAR 0 (VAR 0 …VAR 7Representing the capacitance values ​​of the 0th variable capacitor branch to the 7th variable capacitor branch respectively). The bits in the first control word signal VAR_SEL<7:0> correspond to the bits in the first control voltage Vctrl<7:0> one by one. When the first control word signal VAR_SEL<7:0>=00000000, Vctrl<7:0> selects Lpf_Vc; when VAR_SEL<7:0>=11111111, Vctrl<7:0> selects Vfix. When a bit in VAR_SEL<7:0> is 0, the corresponding bit voltage in Vctrl<7:0> selects Lpf_Vc; when a bit in VAR_SEL<7:0> is 1, the corresponding bit voltage in Vctrl<7:0> selects Vfix. Therefore, when VAR_SEL<7:0> increases, the variable capacitance branch 211 controlled by the control voltage Lpf_Vc decreases, and the frequency gain Kvco of the voltage controlled oscillator decreases; when VAR_SEL<7:0> decreases, the variable capacitance branch 211 controlled by the control voltage Lpf_Vc increases, and the frequency gain Kvco of the voltage controlled oscillator increases.

[0037] In some specific embodiments of the present invention, the fixed capacitor array module 22 includes a plurality of fixed capacitor branches 221 , and the plurality of fixed capacitor branches 221 are connected in parallel and share a positive terminal plus and a negative terminal minus.

[0038] Specifically, each fixed capacitor branch 221 includes a fifth DC blocking capacitor C5, a switch k and a sixth DC blocking capacitor C6, and the fifth DC blocking capacitor C5, the switch K and the sixth DC blocking capacitor C6 are connected in series. The suspended end of the fifth DC blocking capacitor C5 serves as the second end (positive end plus) of the fixed capacitor array module 22, and the suspended end of the sixth DC blocking capacitor C6 serves as the third end (negative end minus) of the fixed capacitor array module 22.

[0039] In this embodiment, in order to make the voltage-controlled oscillator have a wider frequency tuning range, the fixed capacitor array module 22 uses an 8-bit control word to control and adjust the frequency band of the voltage-controlled oscillator (i.e., the size of the capacitance value connected to the resonant cavity), each control word corresponds to a sub-band, and the 8-bit control word controls a total of 256 sub-bands. Therefore, the fixed capacitor array module 22 includes 8 fixed capacitor branches 221, and the 8 fixed capacitor branches 221 constitute 256 sub-bands. The relationship between the capacitance value of each fixed capacitor branch 221 is C 7 =2*C 6 =4*C 5 =8*C 4 =16*C 3 =32*C 2 =64*C 1 =128*C0 (C 0 ……C 7 Respectively representing the capacitance values ​​of the 0th fixed capacitor branch to the 7th fixed capacitor branch), the second control word signal Band_sel<7:0> controls the opening and closing of the switches K of the 8 fixed capacitor branches 221 respectively. The bit corresponding to the second control word signal Band_sel<7:0> corresponds one to one to the bit of the switch K in the 7th to 0th fixed capacitor branches 221. When a bit in Band_sel<7:0> is 0, the switch K in the corresponding fixed capacitor branch 221 is closed; when a bit in Band_sel<7:0> is 1, the switch K in the corresponding fixed capacitor branch 221 is disconnected. When Band_sel<7:0>=00000000, the switches K of the 8 fixed capacitor branches 221 are all closed, and the ideal capacitance value connected at this time is 255*C 0 When Band_sel<7:0>=11111111, the switches K of the eight fixed capacitor branches 221 are all disconnected, and the ideal capacitance value connected at this time is 0. Therefore, when Band_sel<7:0> decreases, the number of fixed capacitor branches 221 connected to the resonant cavity increases; when Band_sel<7:0> increases, the number of fixed capacitor branches 221 connected to the resonant cavity decreases.

[0040] It should be noted that the method of adjusting the variable capacitor array module 21 and the fixed capacitor array module 22 in coordination can ensure that the frequency gain Kvco of the voltage-controlled oscillator will not change with the change of the frequency sub-band. When the second control word signal Band_sel<7:0> increases, VAR_SEL<7:0> increases together, so that the number of fixed capacitor branches 221 connected to the resonant cavity decreases, and at the same time, the number of variable capacitor branches 211 controlled by the control voltage Lpf_Vc also decreases. When the second control word signal Band_sel<7:0> decreases, VAR_SEL<7:0> decreases together, so that the number of fixed capacitor branches 221 connected to the resonant cavity increases, and at the same time, the number of variable capacitor branches 211 controlled by the control voltage Lpf_Vc also increases. In this way, by adjusting Band_sel<7:0> and VAR_SEL<7:0> in the same trend, the ratio of the variable capacitor to the overall capacitance of the resonant cavity can be made very small between different frequency bands, thereby achieving a small difference in the frequency gain Kvco corresponding to different frequency sub-bands, thereby achieving a constant frequency gain Kvco between different frequency sub-bands.

[0041] like Figure 4As shown, in some specific embodiments of the present invention, the bias voltage module 23 includes a third P-type field effect transistor MP3, a fourth P-type field effect transistor MP4, an amplifier AMP1, a second variable resistor R_turn2 and a transistor Q1, and the transistor Q1 is of PNP type.

[0042] Specifically, the source S of the third P-type field effect transistor MP3 and the fourth P-type field effect transistor MP4 is connected to the second power supply voltage VDD2, the gate G of the third P-type field effect transistor MP3 and the fourth P-type field effect transistor MP4 is connected to the output pin of the amplifier AMP1, the drain D of the third P-type field effect transistor MP3 is connected to the positive input pin of the amplifier AMP1 and then grounded through the fifth resistor R5, and the reverse input pin of the amplifier AMP1 is connected to the system bandgap reference voltage source Vbg. The drain D of the fourth P-type field effect transistor MP4 outputs the second bias voltage Vref2 as an output end of the bias voltage module 23, the drain D of the fourth P-type field effect transistor MP4 is connected to the emitter E of the transistor Q1 through the second variable resistor R_turn2, and the emitter E of the transistor Q1 outputs the first bias voltage Vref1 as another output end of the bias voltage module 23, and the base B and collector C of the transistor Q1 are grounded.

[0043] It should be noted that, since the positive electrodes of the first variable capacitor VAR1 and the fourth variable capacitor VAR4 are connected to the first bias voltage Vref1 through the first resistor R1 and the fourth resistor R4, respectively, and the positive electrodes of the second variable capacitor VAR2 and the third variable capacitor VAR3 are connected to the second bias voltage Vref2 through the second resistor R2 and the third resistor R3, respectively, it can be seen that the capacitance of the variable capacitor is proportional to the bias voltage. When the first bias voltage Vref1 increases, the capacitance of the first variable capacitor VAR1 and the fourth variable capacitor VAR4 increases, and when the first bias voltage Vref1 decreases, the capacitance of the first variable capacitor VAR1 and the fourth variable capacitor VAR4 decreases. Similarly, the second bias voltage Vref2 is related to the second variable capacitor VAR2 and the third variable capacitor VAR3.

[0044] Since the first bias voltage Vref1 and the second bias voltage Vref2 have negative temperature coefficients, when the temperature rises, the voltage values ​​of the first bias voltage Vref1 and the second bias voltage Vref2 decrease, and then the capacitance values ​​of the first variable capacitor VAR1, the fourth variable capacitor VAR4, the second variable capacitor VAR2 and the third variable capacitor VAR3 decrease; when the temperature decreases, the voltage values ​​of the first bias voltage Vref1 and the second bias voltage Vref2 increase, and then the capacitance values ​​of the first variable capacitor VAR1, the fourth variable capacitor VAR4, the second variable capacitor VAR2 and the third variable capacitor VAR3 increase; thereby compensating for the frequency change of the voltage-controlled oscillator caused by the change of inductance L with temperature, and realizing the temperature compensation characteristic.

[0045] It should be noted that, from the basic characteristics of the PNP transistor, the voltage Vbe between the base B and the emitter E of the transistor has a negative temperature coefficient, with a typical value of -1.5 mV / K, so that the first bias voltage Vref1 has a negative temperature coefficient.

[0046] The system bandgap reference voltage source Vbg is also insensitive to temperature. Thus, an amplifier AMP1 and a current mirror (composed of a third P-type field effect transistor MP3 and a fourth P-type field effect transistor MP4) are used to generate a reference current Iref=Vbg / R5 flowing through the fifth resistor R5. It can be seen that the second bias voltage Vref2 is the sum of the voltage drop of the mirror current on the second variable resistor R_turn2 and Vbe, that is, Vref2=Vbe+Irfe* R_turn2 =Vbe+ Vbg* R_turn2 / R5. Since the reference voltage source Vbg, the fifth resistor R5 and the second variable resistor R_turn2 are all independent of temperature, the second bias voltage Vref2 is only related to the voltage Vbe like the first bias voltage Vref1. The second bias voltage Vref2 also has a negative temperature coefficient. By adjusting the value of the second variable resistor R_turn2, the voltage values ​​of the first bias voltage Vref1 and the second bias voltage Vref2 can be made close. The temperature characteristic curves of the first bias voltage Vref1 and the second bias voltage Vref2 are shown in FIG. Figure 4 As shown, the voltage values ​​of the first bias voltage Vref1 and the second bias voltage Vref2 decrease as the temperature increases.

[0047] Through simulation and test data, it is found that when the temperature compensation function is used, the frequency variation of the voltage-controlled oscillator of the present invention with temperature is 1 / 5 of the frequency variation with temperature when the temperature compensation is not used. It can be seen that the temperature compensation effect is obvious when the voltage-controlled oscillator of the present invention is used.

[0048] By adopting the voltage-controlled oscillator in the above technical solution, a first bias voltage Vref1 and a second bias voltage Vref2 with a negative temperature coefficient are generated through a bias voltage module 23 to bias the variable capacitor branch 211 and the variable capacitor array module 21, thereby achieving temperature compensation; and the variable capacitor array module 21, the fixed capacitor array module 22 and the bias voltage module 23 are combined together, while achieving temperature compensation, the stability of the frequency gain Kvco is also guaranteed, and a group of variable capacitor array modules 21 for temperature compensation is saved, effectively avoiding the deterioration of noise caused by adding more components.

[0049] A phase-locked loop according to an embodiment of the second aspect of the present invention comprises the voltage-controlled oscillator described in the embodiment of the first aspect of the present invention.

[0050] The phase-locked loop in the above technical solution has all the beneficial effects of the above voltage-controlled oscillator, which will not be described in detail here.

[0051] The electronic device according to the third aspect of the present invention comprises the voltage-controlled oscillator described in the first aspect of the present invention or the phase-locked loop described in the second aspect of the present invention.

[0052] The electronic device using the above technical solution has all the beneficial effects of the above voltage-controlled oscillator or phase-locked loop, which will not be described in detail here.

[0053] A vehicle according to an embodiment of the fourth aspect of the present invention comprises the electronic device described in the embodiment of the third aspect of the present invention.

[0054] The vehicle adopting the above technical solution has all the beneficial effects of the above electronic equipment, which will not be described in detail here.

[0055] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0056] The embodiments of the present invention are described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made within the knowledge scope of ordinary technicians in the technical field without departing from the purpose of the present invention.

Claims

1. A voltage-controlled oscillator, characterized in that: include: A positive feedback gain unit (1), a capacitor array unit (2), a positive output port VCO_OP and a negative output port VCO_ON, wherein two ends of the positive feedback gain unit (1) and the capacitor array unit (2) are connected in parallel and are respectively connected to the positive output port VCO_OP and the negative output port VCO_ON; the positive feedback gain unit (1) is used to ensure that the oscillation of a voltage-controlled oscillator continues, and allows the oscillation frequency to be adjusted by an external voltage signal; the capacitor array unit (2) is used to provide a wide range of frequency tuning capability for the voltage-controlled oscillator, and to compensate for the frequency gain and temperature coefficient of the voltage-controlled oscillator.

2. The voltage controlled oscillator according to claim 1, characterized in that: The positive feedback gain unit (1) comprises a first P-type field effect transistor MP1, a second P-type field effect transistor MP2, a first N-type field effect transistor MN1 and a second N-type field effect transistor MN2; The gate G of the first P-type field effect transistor MP1 and the drain D of the second P-type field effect transistor MP2 are connected to the negative output port VCO_ON, the drain D of the first P-type field effect transistor MP1 and the gate G of the second P-type field effect transistor MP2 are connected to the positive output port VCO_OP, and the source S of the first P-type field effect transistor MP1 and the second P-type field effect transistor MP2 are connected to the first power supply voltage VDD1; the gate G of the first N-type field effect transistor MN1 and the drain D of the second N-type field effect transistor MN2 are connected to the negative output port VCO_ON, the drain D of the first N-type field effect transistor MN1 and the gate G of the second N-type field effect transistor MN2 are connected to the positive output port VCO_OP, and the source S of the first N-type field effect transistor MN1 and the second N-type field effect transistor MN2 are grounded through the first variable resistor R_turn1.

3. The voltage controlled oscillator according to claim 1, characterized in that: The capacitor array unit (2) comprises a variable capacitor array module (21), a fixed capacitor array module (22) and a bias voltage module (23); the variable capacitor array module (21) and the fixed capacitor array module (22) are connected in parallel, and the two ends are respectively connected to the positive terminal plus and the negative terminal minus of the capacitor array unit (2); the bias voltage module (23) is connected to the variable capacitor array module (21) to provide a bias voltage; the variable capacitor array module (21), the fixed capacitor array module (22) and the bias voltage module (23) cooperate to provide a wide range of frequency coordination capabilities for the voltage-controlled oscillator, and compensate for the frequency gain and temperature coefficient of the voltage-controlled oscillator.

4. The voltage controlled oscillator according to claim 3, characterized in that: The variable capacitor array module (21) has a first end, a second end, a third end, a fourth end and a fifth end, and the fixed capacitor array module (22) has a first end, a second end and a third end; a node formed by connecting the second end of the variable capacitor array module (21) and the second end of the fixed capacitor array module (22) serves as the positive end plus, and a node formed by connecting the fifth end of the variable capacitor array module (21) and the third end of the fixed capacitor array module (22) serves as the negative end minus; a first end of the variable capacitor array module (21) is connected to a selector MUX to receive a first control voltage Vctr1<7:0>; a third end and a fourth end of the variable capacitor array module (21) are connected to the bias voltage module (23); and a first end of the fixed capacitor array module (22) receives a second control word signal Band_sel<7:0>.

5. The voltage controlled oscillator according to claim 4, characterized in that: The variable capacitor array module (21) comprises a plurality of variable capacitor branches (211), the plurality of variable capacitor branches (211) are connected in parallel, and each variable capacitor branch (211) is controlled by a corresponding bit in the first control voltage Vctr1<7:0>, and a voltage connected to each variable capacitor branch (211) is determined according to the value of the corresponding bit.

6. The voltage controlled oscillator according to claim 5, characterized in that: The variable capacitance branch (211) comprises a first sub-branch, a second sub-branch, a third sub-branch and a fourth sub-branch; a node a after the first sub-branch is connected to the fourth sub-branch serves as the third end of the variable capacitance array module (21); a node b after the first sub-branch is connected to the fourth sub-branch and a node c after the second sub-branch is connected to the third sub-branch serve as the first end of the variable capacitance array module (21); a node d after the second sub-branch is connected to the third sub-branch serves as the fourth end of the variable capacitance array module (21); a node e after the first sub-branch is connected to the second sub-branch serves as the second end of the variable capacitance array module (21), and a node f after the third sub-branch is connected to the fourth sub-branch serves as the fifth end of the variable capacitance array module (21).

7. The voltage controlled oscillator according to claim 3, characterized in that: The fixed capacitor array module (22) comprises a plurality of fixed capacitor branches (221), and the plurality of fixed capacitor branches (221) are connected in parallel; each of the fixed capacitor branches (221) comprises a fifth DC blocking capacitor C5, a switch k, and a sixth DC blocking capacitor C6 which are sequentially connected in series; a suspended end of the fifth DC blocking capacitor C5 serves as a second end of the fixed capacitor array module (22), and a suspended end of the sixth DC blocking capacitor C6 serves as a third end of the fixed capacitor array module (22).

8. The voltage controlled oscillator according to claim 3, characterized in that: The bias voltage module (23) comprises a third P-type field effect transistor MP3, a fourth P-type field effect transistor MP4, an amplifier AMP1, a second variable resistor R_turn2 and a transistor Q1; The source S of the third P-type field effect transistor MP3 and the fourth P-type field effect transistor MP4 are connected to the second power supply voltage VDD2, the gate G of the third P-type field effect transistor MP3 and the fourth P-type field effect transistor MP4 are connected to the output pin of the amplifier AMP1, the drain D of the third P-type field effect transistor MP3 is connected to the positive input pin of the amplifier AMP1 and then grounded through the fifth resistor R5, and the reverse input pin of the amplifier AMP1 is connected to the reference voltage source Vbg; the drain D of the fourth P-type field effect transistor MP4 serves as an output end of the bias voltage module 23 to output the second bias voltage Vref2, the drain D of the fourth P-type field effect transistor MP4 is connected to the emitter E of the transistor Q1 through the second variable resistor R_turn2, the emitter E of the transistor Q1 serves as another output end of the bias voltage module 23 to output the first bias voltage Vref1, and the base B and collector C of the transistor Q1 are grounded.

9. A phase-locked loop, characterized in that: Comprising the voltage controlled oscillator as claimed in any one of claims 1 to 8.

10. An electronic device, characterized in that: It comprises a voltage controlled oscillator as claimed in any one of claims 1 to 8 or a phase locked loop as claimed in claim 9.

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