Micro LED module and preparation method thereof
By using a passivation protection structure with planarization and isolation layers in Micro LED modules, the problems of high precision and low transfer yield caused by the small size of microchip electrodes are solved, enabling low-cost large-scale mass production and improving the adaptability of display applications.
Patent Information
- Application Number
- CN202510014746.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-06
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2045-01-06
AI Technical Summary
Traditional chip transfer methods are not suitable for Micro LED chips smaller than 100μm, resulting in high precision requirements, low transfer yield and high costs.
A two-layer passivation protection structure with a planarization layer and an isolation layer is used on a support substrate. The electrodes of the micro LED chip are led out to the edge of the packaged device through fan-out electrodes, and a common cathode or common anode structure is formed by circuit interconnection, simplifying the process steps to three photolithography steps.
This technology enables the amplification of microchip electrodes, reduces precision requirements, improves transfer yield, simplifies application requirements, reduces packaging costs, and enhances compatibility with different display application scenarios.
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Figure CN119894197B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of optoelectronic technology, in particular to a Micro LED module and a preparation method thereof. BACKGROUND
[0002] When the LED chip is reduced to less than 100 mu m, the current traditional chip transfer method has been unable to apply, so a new technical route is needed to cooperate with the micro level chip application. At present, the industry mostly adopts a plurality of small chips to be transferred to a substrate with a good circuit for welding and packaging, but this way requires high precision of the substrate and the transfer, and causes high cost, low transfer yield and other problems. SUMMARY
[0003] The technical problem to be solved by the present application is to provide a preparation method of a Micro LED module, which solves the problems of high precision requirement, low transfer yield and large yield loss in the transfer process caused by the small size of the electrode of the micro chip.
[0004] The technical problem to be solved by the present application is also to provide a Micro LED module.
[0005] In order to solve the above technical problems, the present application provides a preparation method of a Micro LED module, a support substrate is provided, a plurality of groups of chips are arranged on the support substrate, the chip includes an electrode, the electrode includes a cathode and an anode, and the electrode is arranged in a direction away from the support substrate;
[0006] A planar layer is prepared on the support substrate, the planar layer is filled around the chip, and the top surface of the planar layer is flush with the top surface of the electrode in the vertical direction;
[0007] A cathode fan-out electrode and an anode fan-out electrode are respectively prepared on the cathode and the anode, and a spacing area is arranged between the cathode fan-out electrode and the anode fan-out electrode;
[0008] An isolation layer is prepared on the planar layer, the isolation layer fills the spacing area, and the thickness of the isolation layer is greater than the thickness of the cathode fan-out electrode or the anode fan-out electrode, so as to form a blank area above the cathode fan-out electrode and the anode fan-out electrode;
[0009] A cathode layer and an anode layer are respectively prepared on the cathode fan-out electrode and the anode fan-out electrode, the cathode layer and the anode layer fill the blank area, and the top surface of the cathode layer or the anode layer is not lower than the top surface of the isolation layer in the vertical direction.
[0010] In some embodiments, the planar layer is made of a photosensitive material, which includes one or more of photoresist, polyimide, and epoxy resin.
[0011] In some embodiments, the cathode fan-out electrode and the anode fan-out electrode each include one or more of Ti, Ni, Co, Sn, Cu, Au, Pt, Cr, and In.
[0012] In some embodiments, the isolation layer is made of a photosensitive material, which includes one or more of photoresist, polyimide, and epoxy resin.
[0013] In some embodiments, the cathode layer and the anode layer each include one or more of Ti, Ni, Co, Sn, Cu, Au, Pt, Cr, and In.
[0014] In some embodiments, the planar layer or the isolation layer is cured by a method including:
[0015] The baking is performed under a nitrogen atmosphere at a temperature of 100-400°C for 10-120 minutes.
[0016] In some embodiments, the electrodes are arranged to face away from the support substrate by a method including:
[0017] The chip is peeled off from the chip substrate and transferred to a temporary carrier, the electrodes of the chip are bonded to the temporary carrier, the temporary carrier is flipped, the electrodes of the chip are peeled off from the temporary carrier and transferred to the support substrate, so that the electrodes are arranged to face away from the support substrate.
[0018] In some embodiments, the chip includes a red chip, a green chip, and a blue chip.
[0019] In some embodiments, the red chip includes an R cathode and an R anode, the green chip includes a G cathode and a G anode, and the blue chip includes a B cathode and a B anode.
[0020] An R cathode fan-out electrode and an R anode fan-out electrode are respectively prepared on the R cathode and the R anode, a G cathode fan-out electrode and a G anode fan-out electrode are respectively prepared on the G cathode and the G anode, and a B cathode fan-out electrode and a B anode fan-out electrode are respectively prepared on the B cathode and the B anode.
[0021] The R cathode, the G cathode, and the B cathode are connected, or the R anode, the G anode, and the B anode are connected.
[0022] In order to solve the above technical problems, the application further provides a Micro LED module prepared by the preparation method of the Micro LED module.
[0023] The application has the following beneficial effects:
[0024] The preparation method of the Micro LED module provided by the application uses a two-layer passivation protection structure of a planar layer and an isolation layer to realize the leading-out of the micro LED chip electrode from the chip surface to the surrounding area, so as to achieve the effect of amplifying the micro chip electrode in the surrounding area, solve the problems of high precision requirement, low transfer yield and large yield loss in the transfer process caused by the small size of the electrode of the micro chip, greatly simplify the application requirement, and reduce the manufacturing cost of subsequent packaging and patching. Meanwhile, the planar layer is made on the surface of the support substrate, so that the edge area of the chip is flush with the electrode of the chip, so as to achieve the effect of planarization and prevent the phenomenon of fracture of the subsequent fan-out electrode metal caused by the large height difference between the chip electrode and the edge area.
[0025] Further, the application only needs to use three steps of photolithography to realize the electrode fan-out and wiring of the micro chip and the module, the process is simple, the cost is low, and the application is suitable for large-scale mass production.
[0026] The application leads out the electrode of the micro chip to the edge of the packaging device through the structure of the fan-out electrode. Further, the cathodes or anodes of all the chips can be connected together in a circuit interconnection mode to form a common cathode or common anode structure. Then, the remaining chip electrodes are respectively led out to different positions above the planar layer through evaporation or sputtering, so as to form a micro LED chip integrated array in a common cathode or common anode mode, so that any number of chips can be integrated together, thereby greatly improving the matching of different display application scenarios. BRIEF DESCRIPTION OF DRAWINGS
[0027] Figure 1 The operation schematic diagram for realizing the operation of arranging the electrode in the direction away from the support substrate 1 in the preparation method of the Micro LED module provided in an embodiment of the application is shown in the figure;
[0028] Figure 2 The structure schematic diagram of the support substrate provided with a plurality of groups of chips in the preparation method of the Micro LED module provided in an embodiment of the application is shown in the figure;
[0029] Figure 3 The structure schematic diagram of the planar layer prepared on the support substrate in the preparation method of the Micro LED module provided in an embodiment of the application is shown in the figure;
[0030] Figure 4A structural schematic diagram of a preparation method of a Micro LED module provided in an embodiment of the present application, in which a cathode fan-out electrode and an anode fan-out electrode are prepared on the cathode and the anode respectively;
[0031] Figure 5 A structural schematic diagram of a preparation method of a Micro LED module provided in an embodiment of the present application, in which a separation layer is prepared on the planar layer;
[0032] Figure 6 A structural schematic diagram of a preparation method of a Micro LED module provided in an embodiment of the present application, in which a cathode layer and an anode layer are prepared on the cathode fan-out electrode and the anode fan-out electrode respectively;
[0033] Figure 7 A structural schematic diagram of a preparation method of a Micro LED module provided in an embodiment of the present application, in which the cathodes of all the chips are connected together to form a common cathode structure. DETAILED DESCRIPTION
[0034] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. The examples of the embodiments are shown in the drawings, in which the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and cannot be used to limit the present application.
[0035] In the description of the present application, it should be understood that the terms “length”, “width”, “upper”, “lower”, “left”, “right”, “horizontal”, “top”, “bottom” and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present application and simplify the description, and therefore cannot be understood as indicating or implying that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.
[0036] In addition, the terms “first” and “second” are only used for description purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with “first” and “second” can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of “a plurality of” is two or more, unless otherwise specifically limited.
[0037] In the description of the present application, it is necessary to point out that, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "linking" should be understood in a broad sense, for example, it can be fixed connection, or detachable connection, or integrally connected; it can be mechanical connection, or electrical connection or can communicate with each other; it can be directly connected, or indirectly connected through intermediate medium, or the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0038] In the present application, unless otherwise explicitly specified and limited, the "upper" or "lower" of the first feature to the second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the "upper", "above" and "on" of the first feature to the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The "under", "below" and "under" of the first feature to the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.
[0039] The following disclosure provides many different embodiments or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, the components and arrangements of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeatedly refer to numbers and / or letters in different examples, and such repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or arrangements discussed. In addition, the present application provides examples of various specific processes and materials, but those skilled in the art can realize the application of other processes and / or the use of other materials.
[0040] In the present application, "preferably", "more preferably" are only used to describe the better effect of the implementation or embodiment, and it should be understood that it does not constitute a limitation on the protection scope of the present application. In the present application, the technical features described in an open manner include both the closed technical solutions composed of the listed features and the open technical solutions containing the listed features. In the present application, if there is no special instruction, the numerical interval includes both ends of the numerical interval.
[0041] To solve the above problems, the present application provides a preparation method of a Micro LED module, comprising the following steps:
[0042] (1) providing a support substrate 100, on which a plurality of groups of chips 200 are arranged, the chips 200 comprising electrodes, the electrodes comprising cathodes 210 and anodes 220, the electrodes being arranged in a direction away from the support substrate 100;
[0043] In some embodiments, the electrodes are arranged in a direction away from the support substrate 100 by the following method:
[0044] The chips 200 are peeled off from the chip 200 substrate and transferred to a temporary carrier 700, the electrodes of the chips 200 are bonded to the temporary carrier 700, the temporary carrier 700 is turned over, the electrodes of the chips 200 are peeled off from the temporary carrier 700 and the chips 200 are transferred to the support substrate 100, thereby arranging the electrodes in a direction away from the support substrate 100.
[0045] Preferably, the electrodes are arranged in a direction away from the support substrate 100 by the following method:
[0046] 1.1) spin-coating or pasting a layer of receiving glue on the temporary carrier 700, the material of the temporary carrier 700 being selected from one of glass, sapphire, diamond, PCB, and the receiving glue being selected from one or more of silicone, epoxy, and polyimide.
[0047] 1.2) transferring the RGB three-color chips to the temporary carrier 700 by laser peeling, thereby removing the sapphire substrate of the micro-chips, the wavelength of the laser being in the range of 193 nm to 265 nm.
[0048] More preferably, during the transferring of the RGB three-color chips, for example, the B blue chips, after transferring the first chip 200 at the first position by using the laser, the second blue chip 200 is transferred at the fourth position, the third chip 200 is transferred at the seventh position, and so on, so that the green chip 200 is transferred at the second, fifth, and eighth positions, and the red chip is transferred at the third, sixth, and ninth positions, thereby avoiding the interference between the chips 200 to be transferred and the chips 200 on the substrate.
[0049] 1.3) spin-coating or pasting a layer of receiving glue on the support substrate 100, the material of the support substrate 100 being selected from one of glass, sapphire, diamond, and PCB, and the receiving glue being selected from one or more of silicone, epoxy, and polyimide. The temporary carrier 700 is turned over, and the RGB three-color micro-chips on the carrier are peeled off and transferred to the support substrate 100 by laser mass transfer or stamp transfer in three times, and the electrodes of the chips 200 are arranged upward.
[0050] (2) preparing a planar layer 300 on the support substrate 100, the planar layer 300 filling around the chip 200, and the top surface of the planar layer 300 being flush with the top surface of the electrode in the vertical direction;
[0051] In some embodiments, the planar layer 300 is made of a photosensitive material, which includes one or more of photoresist, polyimide, and epoxy resin.
[0052] In some embodiments, the planar layer 300 is cured by the following method:
[0053] The baking is performed in a nitrogen atmosphere, at a temperature of 100-400°C, for 10-120 minutes.
[0054] Preferably, a planar layer 300 is prepared on the surface of the support substrate 100 by spin coating, so that the edge region of the chip is flush with the electrode of the chip 200, preventing the subsequent fan-out electrode metal from breaking due to a large height difference between the electrode of the chip 200 and the edge region. The planar layer 300 material above the electrode of the chip 200 is removed by exposure and development, and the planar layer 300 material is cured by baking in an oven in a nitrogen atmosphere, at a temperature of 150-350°C, for 60-90 minutes, to improve the passivation and insulation performance.
[0055] (3) preparing a cathode fan-out electrode 410 and an anode fan-out electrode 420 on the cathode 210 and the anode 220, respectively, and providing a spacing region 430 between the cathode fan-out electrode 410 and the anode fan-out electrode 420;
[0056] In some embodiments, the cathode fan-out electrode 410 and the anode fan-out electrode 420 each include one or more of Ti, Ni, Co, Sn, Cu, Au, Pt, Cr, and In.
[0057] Preferably, the cathode fan-out electrode 410 and the anode fan-out electrode 420 are deposited by evaporation or sputtering, and each include one or more of Sn, Cu, Au, Pt, Cr, and In, while the deposition of the metal layers is used to eliminate internal stress between the metals. The electrodes of the microchip are led to the edge of the packaged device through the structure of the fan-out electrode.
[0058] In some embodiments, the chip 200 includes a red chip, a green chip, and a blue chip.
[0059] Preferably, the red chip includes an R cathode and an R anode, the green chip includes a G cathode and a G anode, and the blue chip includes a B cathode and a B anode.
[0060] An R cathode fan-out electrode and an R anode fan-out electrode are respectively prepared on the R cathode and the R anode, a G cathode fan-out electrode and a G anode fan-out electrode are respectively prepared on the G cathode and the G anode, and a B cathode fan-out electrode and a B anode fan-out electrode are respectively prepared on the B cathode and the B anode;
[0061] The R cathode, the G cathode, and the B cathode are connected, or the R anode, the G anode, and the B anode are connected.
[0062] like Figure 7 As shown, in a preferred embodiment, the cathodes 210 or anodes 220 of all chips 200 are connected together by circuit interconnection to form a common cathode or common anode structure. At the same time, the electrodes of the remaining chips 200 are respectively led out to different positions above the flat layer 300 by evaporation or sputtering, thereby forming an integrated array of micro-LED chips 200 by common cathode or common anode. Therefore, any number of chips 200 can be integrated together, thereby greatly improving the matching of different display application scenarios. The advantage of this technology is that multiple LED chips can be integrated together to meet the needs of different display applications. Through the design of a common cathode or common anode structure, the circuit interconnection of the array can be flexibly controlled to optimize its electrical performance and display effect. In this way, the adaptability of the LED array in different display application scenarios can be greatly improved, and its compatibility and efficiency can be enhanced.
[0063] (4) preparing an isolation layer 500 on the planar layer 300, wherein the isolation layer 500 fills the spacer region 430, and the thickness of the isolation layer 500 is greater than the thickness of the cathode fan-out electrode 410 or the anode fan-out electrode 420, so as to form a blank region 510 above the cathode fan-out electrode 410 and the anode fan-out electrode 420;
[0064] In some embodiments, the isolation layer 500 is made of a photosensitive material, and the photosensitive material includes one or more of photoresist, polyimide, and epoxy resin.
[0065] In some embodiments, the isolation layer 500 is cured by the following method:
[0066] The baking is performed in a nitrogen atmosphere at a temperature of 100° C. to 400° C. for a time of 10 min to 120 min.
[0067] Preferably, a layer of isolation layer 500 is coated on the fan-out electrode by using the spin coating method, and the material of the isolation layer 500 directly above the chip 200 electrode is removed by using the exposure and development method, and the solidification of the isolation layer 500 material is realized by baking in an oven in a nitrogen atmosphere, and the ambient temperature and solidification time of the solidification are consistent with the solidification step of the flat layer 300 described above, so as to improve the passivation insulation performance. The materials of the isolation layer 500 and the flat layer 300 can be the same or different. Preferably, the same material is selected to reduce the reliability problems caused by the difference in the coefficient of thermal expansion of different materials.
[0068] (5) A cathode layer 610 and an anode layer 620 are respectively prepared on the cathode fan-out electrode 410 and the anode fan-out electrode 420, the cathode layer 610 and the anode layer 620 fill the blank area 510, and the top surface of the cathode layer 610 or the anode layer 620 is not lower than the top surface of the isolation layer 500 in the vertical direction.
[0069] In some embodiments, the cathode layer 610 and the anode layer 620 each include one or more of Ti, Ni, Co, Sn, Cu, Au, Pt, Cr, and In.
[0070] Preferably, the electroplated cathode layer 610 and the anode layer 620 are deposited on the cathode fan-out electrode 410 and the anode fan-out electrode 420, and the cathode layer 610 and the anode layer 620 each include one or more of Cu, Au, Pt, Cr, and In. The electroplating photoresist patterning is formed by using the photoresist coating method to expose the electrode area that needs to be electroplated, and the other areas are protected by using the photoresist. The thick electrode layer is electroplated in the electroplating solution by using the electroplating method.
[0071] In some embodiments, after step (5), the structure above the support substrate 100 is cut open by using the knife wheel cutting method to prevent damage to the structure of the device caused by high temperature generated by laser during subsequent laser cutting, and then the hard support substrate 100 is cut open by using the laser cutting method to realize the structural separation of the entire device or module. The single device or multi-device module is tested by using a multi-needle point testing machine, and is sorted.
[0072] Correspondingly, the application also provides a Micro LED module prepared by the preparation method of the Micro LED module.
[0073] In summary, the preparation method of the Micro LED module provided by the application uses the two-layer passivation protection structure of the planar layer 300 and the isolation layer 500, realizes the leading-out of the micro LED chip 200 electrode from the chip 200 surface to the surrounding area, and achieves the effect of amplifying the micro chip electrode in the surrounding area, solves the problems of high precision requirement, low transfer yield and large yield loss in the transfer process caused by the too small size of the electrode of the micro chip, greatly simplifies the application requirement, and reduces the manufacturing cost of subsequent packaging and patching. Meanwhile, the planar layer 300 is made on the surface of the support substrate 100, so that the edge area of the chip is flush with the electrode of the chip 200, thereby achieving the effect of planarization and preventing the phenomenon of fracture of the subsequent fan-out electrode metal caused by the large height difference between the electrode of the chip 200 and the edge area.
[0074] Further, the application only needs to use three steps of photolithography to realize the electrode fan-out and wiring of the micro chip and the module, the process is simple, the cost is low, and it is suitable for large-scale production requirements.
[0075] The application leads out the electrode of the micro chip to the edge of the packaging device through the structure of the fan-out electrode. Further, the cathode 210 or the anode 220 of all the chips 200 can be connected together in a circuit interconnection manner to form a common cathode or common anode structure. Then, the remaining electrodes of the chips 200 are respectively led out to different positions above the planar layer 300 through evaporation or sputtering, so as to form a micro LED chip 200 integrated array in a common cathode or common anode manner. Therefore, any number of chips 200 can be integrated together, so as to greatly improve the matching of different display application scenarios.
[0076] In the description of the present specification, the description of the terms "some embodiments", "exemplary embodiments", "examples", "specific examples", or "some examples" and the like means that the specific features, structures, materials or characteristics described in combination with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the exemplary description of the above terms does not necessarily mean the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0077] The above is the preferred embodiment of the application. It should be noted that those skilled in the art can make several improvements and refinements without departing from the principles of the application, and these improvements and refinements are also considered within the protection scope of the application.
Claims
1. A method for preparing a Micro LED module, characterized in that: The following steps are involved: Providing a supporting substrate, on which a plurality of chips are arranged, wherein the chips include electrodes, the electrodes include cathodes and anodes, and the electrodes are arranged in a direction away from the supporting substrate; Preparing a flat layer on the supporting substrate, wherein the flat layer is filled around the chip, and in the vertical direction, the top surface of the flat layer is flush with the top surface of the electrode; A cathode fan-out electrode and an anode fan-out electrode are respectively prepared on the cathode and the anode, and a spacing area is provided between the cathode fan-out electrode and the anode fan-out electrode; preparing an isolation layer on the flat layer, wherein the isolation layer fills the spaced area, and the thickness of the isolation layer is greater than the thickness of the cathode fan-out electrode or the anode fan-out electrode, so as to form a blank area above the cathode fan-out electrode and the anode fan-out electrode; A cathode layer and an anode layer are respectively prepared on the cathode fan-out electrode and the anode fan-out electrode, and the cathode layer and the anode layer fill the blank area. In the vertical direction, the top surface of the cathode layer or the anode layer is not lower than the top surface of the isolation layer.
2. The method for preparing a Micro LED module according to claim 1, wherein: The flat layer is made of photosensitive material, and the photosensitive material includes one or more of photoresist, polyimide, and epoxy resin.
3. The method for preparing a Micro LED module according to claim 1, wherein: The cathode fan-out electrode and the anode fan-out electrode both include one or more of Ti, Ni, Co, Sn, Cu, Au, Pt, Cr, and In.
4. The method for preparing a Micro LED module according to claim 1, wherein: The isolation layer is made of photosensitive material, and the photosensitive material includes one or more of photoresist, polyimide, and epoxy resin.
5. The method for preparing a Micro LED module according to claim 1, wherein: The cathode layer and the anode layer both include one or more of Ti, Ni, Co, Sn, Cu, Au, Pt, Cr, and In.
6. The method for preparing a Micro LED module according to claim 2 or 4, wherein: The flat layer or the isolation layer is cured by the following method: The baking is performed in a nitrogen atmosphere at a temperature of 100° C. to 400° C. for a time of 10 min to 120 min.
7. The method for preparing a Micro LED module according to claim 1, wherein: The electrode is arranged in a direction away from the supporting substrate by the following method: The chip is peeled off from the chip substrate and the chip is transferred to a temporary carrier, the electrodes of the chip are bonded to the temporary carrier, the temporary carrier is flipped over, the electrodes of the chip are peeled off from the temporary carrier and the chip is transferred to a supporting substrate, so that the electrodes are arranged in a direction away from the supporting substrate.
8. The method for preparing a Micro LED module according to claim 1, wherein: The chips include a red chip, a green chip and a blue chip.
9. The method for preparing a Micro LED module according to claim 8, wherein: The red chip includes an R cathode and an R anode, the green chip includes a G cathode and a G anode, and the blue chip includes a B cathode and a B anode; An R cathode fan-out electrode and an R anode fan-out electrode are respectively prepared on the R cathode and the R anode, a G cathode fan-out electrode and a G anode fan-out electrode are respectively prepared on the G cathode and the G anode, and a B cathode fan-out electrode and a B anode fan-out electrode are respectively prepared on the B cathode and the B anode; The R cathode, the G cathode, and the B cathode are connected, or the R anode, the G anode, and the B anode are connected.
10. A Micro LED module, characterized in that: The Micro LED module is manufactured by the method for manufacturing a Micro LED module according to any one of claims 1 to 9.
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