Silicon photonic device for lidar sensor and method of manufacturing

By designing silicon photonic devices for LIDAR, using a one-dimensional grating coupler structure to optimize the grating, metal layer and dielectric structure, the problems of insufficient coupling efficiency, wavelength sensitivity and reliability in the LIDAR system are solved, and higher link budget performance is achieved.

CN119916527APending Publication Date: 2025-05-02AURORA OPERATIONS INC
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Patent Information

Application Number
CN202510061094.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2021-11-24
Filing Date
2022-11-18
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

The coupling efficiency, wavelength sensitivity, reliability and link budget performance of various components in the LIDAR system leads to poor system performance.

Method used

A silicon photonic device for LIDAR is designed, including substrate members, antennas and photodiodes. The antenna adopts a one-dimensional grating coupler structure, which improves coupling efficiency and wavelength sensitivity by optimizing the design of grating structure, metal layer and dielectric structure.

Benefits of technology

Through optimized design, the coupling efficiency, wavelength sensitivity and reliability of silicon photonic devices are improved, the link budget performance of LIDAR systems is improved, and the problem of insufficient performance in the prior art is solved.

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Abstract

A silicon photonic device for a LIDAR sensor and a method of manufacture, the structure of the silicon photonic device including a first insulating structure and a second insulating structure disposed over one or more etched silicon structures covering a substrate member. A metal layer is disposed over the first insulating structure without pre-depositing a diffusion barrier and an adhesion layer. A thin insulating structure is disposed over the second insulating structure. A first configuration of the metal layer, the first insulating structure, and the one or more etched silicon structures form a free space coupler. A second configuration of the thin insulating structure over the second insulating structure forms an edge coupler.
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Description

[0001] This application is a divisional application of Chinese patent application No. 202280050339.5, filed on November 18, 2022, entitled “Silicon Photonic Devices and Manufacturing Methods for LIDAR Sensors”. Technical Field

[0002] The present disclosure relates generally to silicon photonic devices, and more particularly to silicon photonic devices and methods of fabricating the same for light detection and ranging (LIDAR) applications. Background Art

[0003] LIDAR (sometimes also referred to as laser RADAR) is used for a variety of applications, including imaging and collision avoidance. The various components used in LIDAR systems (e.g., modulators, filters, optical switches, optical waveguides, photodiodes, phase shifters, wavelength converters, etc.) are implemented on complementary metal oxide semiconductor (CMOS) compatible silicon photonic chips (e.g., silicon on insulator (SOI) platforms). A key challenge in the development of LIDAR systems is the inadequacy of the coupling efficiency, wavelength sensitivity, reliability, and link budget performance of the various components. Summary of the invention

[0004] According to some embodiments, the present disclosure describes the structure of a silicon photonic device for LIDAR. The silicon photonic device includes a substrate member, an antenna formed on the substrate member, and a photodiode formed on the substrate member and coupled to the antenna. The antenna is a one-dimensional grating coupler. The antenna includes a first configuration of a first grating structure on top of the substrate member, a second configuration of a first metal layer on top of the first grating structure, and a third configuration of a diffusion barrier and an adhesion layer on top of the first metal layer, the diffusion barrier and the adhesion layer and the first metal layer forming a reflector structure. For example, the first metal layer is a metal 0 (MT0) layer. For example, the first metal layer is one of the groups of aluminum, gold, silver, and copper. The antenna includes a first dielectric structure coupled to the first grating structure. For example, the first dielectric structure is one of the groups of silicon nitride and silicon. The antenna includes a second grating structure coupled to the substrate member and a first metal layer coupled to the second grating structure. The antenna includes an intermediate configuration of an oxide layer between the substrate member and the first configuration of the first grating structure and between the first configuration of the first grating structure and the second configuration of the first metal layer. The silicon photonic device also includes a second dielectric structure coupled to a third dielectric structure, the second dielectric structure and the third dielectric structure forming an edge coupler. For example, the first dielectric structure and the third dielectric structure are coplanar. For example, the diffusion barrier and the adhesion layer are one of the group of tantalum nitride, indium oxide, copper silicide, tungsten nitride, and titanium nitride. For example, a first distance between the bottom of the first dielectric structure and the top of the first grating structure is in a range between 100 nanometers and 500 nanometers, a second distance between the bottom of the first metal layer and the top of the first grating structure is in a range between 800 nanometers and 1200 nanometers, and a third distance between the top of the first dielectric structure and the bottom of the first metal layer is in a range between 500 nanometers and 1600 nanometers. For example, a fourth distance between the bottom of the second dielectric structure and the top of the third dielectric structure is about 450 nanometers. For example, the first dielectric structure and the third dielectric structure have the same height. For example, the height of the second dielectric structure is about 1 / 3 of the height of the third dielectric structure. For example, the height of the first metal layer is twice that of the diffusion barrier and the adhesion layer. The present disclosure describes a LIDAR sensor comprising a silicon photonic device as described herein. The present disclosure describes an autonomous vehicle control system comprising a silicon photonic device as described herein.

[0005] According to some embodiments, the present disclosure describes the structure of a silicon photonic device. The silicon photonic device includes a substrate member and a first antenna formed on the substrate member. The first antenna includes a first grating structure coupled to the substrate member, a first dielectric structure coupled to the first grating structure, and a first metal layer coupled to the first dielectric structure. The silicon photonic device also includes a second antenna formed on the substrate member. The second antenna includes a second grating structure coupled to the substrate member, and the first metal layer is coupled to the second grating structure. The silicon photonic device also includes a photodiode formed on the substrate member and coupled to the second antenna. The first antenna also includes a diffusion barrier and an adhesion layer on top of the first metal layer, the diffusion barrier and the adhesion layer and the first metal layer forming a reflector structure. The first antenna also includes an intermediate oxide layer between the first grating structure and the first dielectric structure and between the first dielectric structure and the first metal layer. For example, the first antenna is a one-dimensional grating coupler. For example, the first metal layer is a metal 0 (MT0) layer. For example, the first metal layer is one of the group of aluminum, gold, silver and copper. For example, the first dielectric structure and the second dielectric structure are coplanar. For example, the first dielectric structure, the second dielectric structure, and the third dielectric structure are formed using one from the group of silicon nitride and silicon. For example, the diffusion barrier and the adhesion layer are one from the group of tantalum nitride, indium oxide, copper silicide, tungsten nitride, and titanium nitride. For example, the first distance between the bottom of the first dielectric structure and the top of the first grating structure is in the range between 100 nanometers and 500 nanometers, the second distance between the bottom of the first metal layer and the top of the first grating structure is in the range between 800 nanometers and 1200 nanometers, and the third distance between the top of the first dielectric structure and the bottom of the first metal layer is in the range between 500 nanometers and 1600 nanometers. For example, the fourth distance between the top of the second dielectric structure and the bottom of the third dielectric structure is about 450 nanometers. For example, the first dielectric structure and the second dielectric structure have the same height. For example, the height of the third dielectric structure is about 1 / 3 of the height of the second dielectric structure. For example, the height of the first metal layer is twice that of the diffusion barrier and the adhesion layer. The present disclosure describes a LIDAR sensor including a silicon photonic device as described herein. The present disclosure describes an autonomous vehicle control system that includes a silicon photonic device as described herein.

[0006] According to some embodiments, the present disclosure describes a method for manufacturing a silicon photonic device for LIDAR. The method includes obtaining a substrate member and forming a silicon structure on the substrate member, forming a first dielectric structure and a second dielectric structure above the silicon structure, disposing a first oxide layer above the first dielectric structure and the second dielectric structure, forming a third dielectric structure above the first oxide layer and the second dielectric structure, forming a metal layer above the first oxide layer and the first dielectric structure, and forming a diffusion barrier and an adhesion layer above the metal layer. For example, the silicon structure is a grating. For example, the diffusion barrier and the adhesion layer above the metal layer form a reflector structure. For example, the diffusion barrier and the adhesion layer are one of the groups of tantalum nitride, indium oxide, copper silicide, tungsten nitride and titanium nitride. For example, the metal layer is one of the groups of aluminum, gold, silver and copper. For example, the first dielectric structure and the second dielectric structure are coplanar with each other. The method also includes forming the first dielectric structure in the following manner: disposing a first layer of an insulator compound above the silicon structure, and etching the first layer of the insulator compound to form the first dielectric structure. The method also includes: before etching the first layer of the insulator compound, setting a second layer of the insulator compound on the bottom side of the substrate member; and after forming the first dielectric structure, removing the second layer of the insulator compound set on the bottom side of the substrate member. For example, the first layer of the insulator compound and the second layer of the insulator compound are one of the group of silicon nitride (Si3N4) and silicon. For example, the method of setting the first layer of the insulator compound above the silicon structure and the second layer of the insulator compound on the bottom side of the substrate member is performed by a process from the group of a low pressure chemical vapor deposition (LPCVD) process and a plasma enhanced chemical vapor deposition (PECVD) process. The method also includes setting a film of a resistive metal alloy heater above the silicon structure. The method also includes forming a third dielectric structure in the following manner: setting a second oxide layer above the metal layer, etching an opening in the second oxide layer above the second dielectric structure, and forming a third dielectric structure in the opening above the second dielectric structure. The method also includes forming a second silicon structure on the substrate member, doping a portion of the second silicon structure to form a photodiode, and forming a metal contact for the photodiode over the doped portion of the second silicon structure. The method also includes forming a second silicon structure on the substrate member, forming a second diffusion barrier and adhesion layer over the second silicon structure, forming a second metal layer over the second diffusion barrier and adhesion layer and the second silicon structure, and forming a third diffusion barrier and adhesion layer over the second metal layer. The present disclosure describes silicon photonic devices manufactured by the methods described herein. The present disclosure also describes a LIDAR sensor system that includes a silicon photonic device manufactured by the methods described herein.

[0007] According to some embodiments, the present disclosure describes a method for manufacturing a silicon photonic device for a vehicle. The method includes obtaining a substrate member and forming a first silicon structure coupled to the substrate member, forming a first oxide layer on the first silicon structure, forming a metal layer on the first oxide layer and the first silicon structure, and forming an adhesion layer on the metal layer, the adhesion layer being configured to act as a diffusion barrier and adhere to the metal layer. The method also includes forming a first dielectric structure on the first oxide layer and the first silicon structure, and forming a second oxide layer on the first dielectric structure, wherein the second oxide layer is formed between the first oxide layer and the metal layer. The method also includes performing chemical mechanical polishing on the first oxide layer, and forming an insulator between the first silicon structure and the first dielectric structure. The method also includes: forming a second silicon structure on the first oxide layer, wherein the second oxide layer is formed on the second silicon structure; and forming a third silicon structure on the second silicon structure and the second oxide layer. For example, the first dielectric structure and the second silicon structure are coplanar with each other. The method also includes forming a first dielectric structure on the first oxide layer and the first silicon structure in the following manner: forming a first layer of an insulator compound on the first oxide layer, and etching the first layer of the insulator compound down to the first oxide layer to form a first dielectric structure on the first silicon structure. The method also includes forming a second layer of an insulator compound on the bottom side of the substrate member before etching the first layer of the insulator compound, and removing the second layer of the insulator compound formed on the bottom side of the substrate member after forming the first dielectric structure. The method also includes forming a third silicon structure on the second silicon structure and the second oxide layer by etching an opening in a second oxide layer formed on the second silicon structure and forming a third silicon structure in the opening. The method also includes forming a fourth silicon structure on the substrate member, doping one or more specific portions of the fourth silicon structure to form a photodiode, and forming one or more metal contacts for the photodiode over portions of the fourth silicon structure. For example, the first layer of the insulator compound and the second layer of the insulator compound include one of the group of silicon nitride (Si3N4) and silicon. For example, a method of forming a first layer of an insulator compound on a first oxide layer and a second layer of an insulator compound on a bottom side of a substrate member is performed by one of the group of low pressure chemical vapor deposition (LPCVD) and plasma enhanced chemical vapor deposition (PECVD). For example, the first silicon structure is a grating structure. For example, the metal layer includes one of the group of aluminum, gold, silver, and copper. For example, the adhesion layer includes one of the group of tantalum nitride, indium oxide, copper silicide, tungsten nitride, and titanium nitride. The present disclosure describes a silicon photonic device manufactured by the method described herein. The present disclosure also describes a LIDAR sensor system comprising a silicon photonic device manufactured by the method described herein.

[0008] Those skilled in the art will appreciate that the present disclosure is illustrative only and is not intended to be limiting in any way. Any feature described herein may be used together with any other feature, and any subset of these features may be used in combination according to various embodiments. Other aspects, inventive features and advantages of the apparatus and / or process described herein, which are limited only by the claims, will become apparent in the detailed description set forth herein and in conjunction with the accompanying drawings. In addition, the language used in this disclosure is selected primarily for readability and instructional purposes, rather than for limiting the scope of the subject matter disclosed herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Embodiments are illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like reference numerals refer to similar elements and in which:

[0010] Figure 1A is a block diagram illustrating an example of a hardware and software environment for an autonomous vehicle according to some embodiments.

[0011] Figure 1B is a high-level schematic diagram of a silicon photonic device for a coherent LIDAR system, according to some embodiments.

[0012] Figure 2 Describes representations according to some embodiments Figure 1B Schematic cross-sectional view of the structure of a silicon photonic device is shown.

[0013] Figures 3 to 17 Depicted is a method for manufacturing a Figure 1B A schematic cross-sectional view of a method for a silicon photonic device is shown.

[0014] It should be understood that alternative embodiments of the structures and methods shown herein may be employed without departing from the principles described herein. DETAILED DESCRIPTION

[0015] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various aspects of different exemplary embodiments. Note that in various cases, any particular exemplary embodiment may be practiced without all of the specific details and / or with variations, permutations, and combinations of the various features and elements described herein. Reference will now be made in detail to embodiments of the present disclosure, examples of which are shown in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the specification to refer to the same or similar parts.

[0016] In addition, relative terms, such as "lower" or "bottom" or "back" or "below" and "upper" or "top" or "front" or "above", may be used herein to describe the relationship of one element to another element, as shown in the figures. It should be understood that relative terms are intended to include different orientations of the device in addition to the orientations described in the figures. For example, if the device in one of the figures is turned over, then the element described as being on the "lower" side of the other elements will then be oriented on the "upper" side of the other elements. Therefore, the exemplary term "lower" can include both "lower" and "upper" orientations, depending on the specific orientation of the figure. Similarly, if the device in one of the figures is turned over, then the element described as being "below" or "below" the other elements will then be oriented "above" the other elements. Therefore, the exemplary term "below" or "below" can include both upper and lower orientations.

[0017] Referring to the drawings, wherein like numerals represent like parts throughout the several views, Figure 1A An exemplary hardware and software environment of an autonomous vehicle 100 is shown in which the various techniques disclosed herein may be implemented. For example, the vehicle 100 may include a powertrain 102 including a prime mover 104 powered by an energy source 106 and capable of providing power to a drive train 108, and a control system 110 including a directional controller 112, a powertrain controller 114, and a brake controller 116. The vehicle 100 may be implemented as any number of different types of vehicles, including vehicles capable of transporting people and / or cargo and capable of traveling on land, and it should be understood that the aforementioned components 102-116 may vary widely based on the type of vehicle in which they are used.

[0018] For simplicity, the embodiments discussed below focus on wheeled land vehicles, such as cars, vans, trucks, buses, etc. In such embodiments, the prime mover 104 may include one or more electric motors and / or internal combustion engines (etc.). The energy source 106 may include, for example, a fuel system (e.g., providing gasoline, diesel, hydrogen, etc.), a battery system, a solar panel or other renewable energy source, and / or a fuel cell system. The transmission 108 includes wheels and / or tires and a transmission and / or any other mechanical drive component suitable for converting the output of the prime mover 104 into vehicle motion, as well as one or more brakes configured to controllably stop or slow the vehicle 100 and a direction or steering component suitable for controlling the trajectory of the vehicle 100 (e.g., a rack and pinion steering linkage that enables one or more wheels of the vehicle 100 to pivot around a substantially vertical axis to change the angle of the plane of rotation of the wheel relative to the longitudinal axis of the vehicle). In some embodiments, a combination of powertrains and energy sources may be used (e.g., in the case of an electric / gas hybrid vehicle), and in other embodiments, multiple electric motors (e.g., dedicated to a single wheel or axle) may be used as prime mover 104. In the case of a hydrogen fuel cell embodiment, prime mover 104 may include one or more electric motors, and energy source 106 may include a fuel cell system powered by hydrogen fuel.

[0019] The direction controller 112 may include one or more actuators and / or sensors for controlling and receiving feedback from the direction or steering components to enable the vehicle 100 to follow a desired trajectory. For example, the powertrain controller 114 may be configured to control the output of the powertrain 102, such as controlling the output power of the prime mover 104, controlling the gear of the transmission in the transmission 108, etc., thereby controlling the speed and / or direction of the vehicle 100. The brake controller 116 may be configured to control one or more brakes that decelerate or stop the vehicle 100, such as disc or drum brakes coupled to the vehicle wheels.

[0020] Other vehicle types, including but not limited to all-terrain or tracked vehicles and construction equipment, may utilize different powertrains, drivetrains, energy sources, directional controllers, powertrain controllers, and brake controllers. Furthermore, in some embodiments, some of the components may be combined, for example, where directional control of the vehicle is primarily handled by varying the output of one or more prime movers. Thus, the embodiments disclosed herein are not limited to the specific application of the technology described herein to autonomous wheeled land vehicles.

[0021] In the illustrated embodiment, fully autonomous or semi-autonomous control of the vehicle 100 is implemented in a vehicle control system 120, which may include one or more processors 122 and one or more memories 124, wherein each processor 122 is configured to execute program code instructions 126 stored in the memory 124. For example, the processor may include a graphics processing unit ("GPU") and / or a central processing unit ("CPU").

[0022] The sensors 130 may include various sensors suitable for collecting information from the vehicle's surroundings for controlling the operation of the vehicle 100. For example, the sensors 130 may include one or more detection and ranging sensors (e.g., RADAR sensor 134, LIDAR sensor 136, or both), 3D positioning sensors 138, such as satellite navigation systems such as GPS (Global Positioning System), GLONASS (Globalnaya Navigazionnaya Sputnikovaya Sistema, or Global Navigation Satellite System), Beidou Navigation Satellite System (BDS), Galileo, Compass, etc. The 3D positioning sensor 138 can be used to determine the vehicle's position on the earth using satellite signals. The sensors 130 may optionally include a camera 140 and / or an IMU (Inertial Measurement Unit) 142. The camera 140 may be a thematic camera or a stereo camera, and may record still images and / or video images. The IMU 142 may include multiple gyroscopes and accelerometers capable of detecting linear and rotational motion of the vehicle 100 in three directions. One or more encoders 144 (eg, wheel encoders) may be used to monitor the rotation of one or more wheels of the vehicle 100. In some embodiments, the LIDAR sensor 136 may include structures for a silicon photonic device for a coherent LIDAR system, as described in detail below.

[0023] The output of the sensor 130 may be provided to a set of control subsystems 150, which include a positioning subsystem 152, a perception subsystem 154, a planning subsystem 156, and a control subsystem 158. The positioning subsystem 152 is primarily responsible for accurately determining the position and orientation (sometimes also referred to as "pose" or "pose estimation") of the vehicle 100 in its surroundings and generally in a certain reference frame. The perception subsystem 154 is primarily responsible for detecting, tracking, and / or identifying objects in the surroundings of the vehicle 100. Machine learning models according to some embodiments may be used to track objects. The planning subsystem 156 is primarily responsible for planning the trajectory or path of the vehicle 100 within a certain time frame given a desired destination and static and moving objects in the environment. Machine learning models according to some embodiments may be used to plan vehicle trajectories. The control subsystem 158 is primarily responsible for generating appropriate control signals for controlling various controllers in the vehicle control system 120 in order to achieve the planned trajectory of the vehicle 100. Similarly, a machine learning model may be used to generate one or more signals to control the autonomous vehicle 100 to achieve the planned trajectory.

[0024] It should be understood that Figure 1A The illustrated collection of components for the vehicle control system 120 is merely an example. In some embodiments, individual sensors may be omitted. Additionally or alternatively, in some embodiments, Figure 1A Multiple sensors of the same type shown can be used for redundancy and / or to cover different areas around the vehicle. In addition, in addition to the above sensors, there may be other types of additional sensors to provide actual sensor data related to the operation and environment of the wheeled land vehicle. Similarly, different types and / or combinations of control subsystems may be used in other embodiments. In addition, although the subsystems 152-158 are shown as being separated from the processor 122 and the memory 124, it should be understood that in some embodiments, some or all of the functions of the subsystems 152-158 may be implemented with program code instructions 126 residing in one or more memories 124 and executed by one or more processors 122, and in some cases, these subsystems 152-158 may be implemented using the same processor and / or memory. The subsystems may be implemented at least in part using various dedicated circuit logic, various processors, various field programmable gate arrays ("FPGA"), various application-specific integrated circuits ("ASIC"), various real-time control devices, etc. As described above, multiple subsystems may utilize circuits, processors, sensors, and / or other components. In addition, the various components in the vehicle control system 120 may be networked in various ways.

[0025] In some embodiments, the vehicle 100 may also include a secondary vehicle control system (not shown) that may serve as a redundant or backup control system for the vehicle 100. In some embodiments, the secondary vehicle control system may be able to fully operate the autonomous vehicle 100 in the event of an adverse event in the vehicle control system 120, while in other embodiments, the secondary vehicle control system may have only limited functionality, such as to perform a controlled stop of the vehicle 100 in response to an adverse event detected in the primary vehicle control system 120. In other embodiments, the secondary vehicle control system may be omitted.

[0026] In general, different architectures (including various combinations of software, hardware, circuit logic, sensors, networks, etc.) can be used to implement Figure 1A The various components shown. Each processor may be implemented as, for example, a microprocessor, and each memory may represent a random access memory ("RAM") device including primary storage, as well as any supplementary levels of memory (e.g., cache memory, non-volatile or backup memory (e.g., programmable or flash memory), read-only memory, etc.). In addition, each memory may be considered to include memory storage physically located elsewhere in the vehicle 100 (e.g., any cache memory in a processor), as well as any storage capacity used as virtual memory (e.g., stored on a mass storage device or another computer controller). Figure 1A One or more processors 122 shown in the figure or a completely independent processor can be used to implement additional functions in the vehicle 100 beyond the autonomous control purpose, such as controlling the entertainment system; operating doors, lights, convenience features, etc.

[0027] In addition, for additional storage devices, the vehicle 100 may include one or more mass storage devices, such as a removable disk drive, a hard disk drive, a direct access storage device ("DASD"), an optical drive (e.g., a CD drive, a DVD drive, etc.), a solid-state storage drive ("SSD"), a network attached storage device, a storage area network, and / or a tape drive, etc.

[0028] In addition, the vehicle 100 may include a user interface 118 to enable the vehicle 100 to receive a plurality of inputs from a user or operator and generate outputs for the user or operator, such as one or more displays, touch screens, voice and / or gesture interfaces, buttons and other tactile controls, etc. In other cases, the user input may be received via another computer or electronic device, such as via an application on a mobile device or via a network interface.

[0029] In addition, the vehicle 100 may include one or more network interfaces (e.g., network interface 162) adapted to communicate with one or more networks 176 to allow information communication with other computers and electronic devices, including, for example, a central server, such as a cloud server, from which the vehicle 100 receives information including trained machine learning models and other data for its autonomous control. For example, the one or more networks 176 may be a communication network and include a wide area network ("WAN") such as the Internet, one or more local area networks ("LAN") such as a Wi-Fi LAN, a mesh network, etc., and one or more bus subsystems. The one or more networks 176 may optionally utilize one or more standard communication technologies, protocols, and / or inter-process communication technologies. In some embodiments, data collected by the one or more sensors 130 may be uploaded to the computing system 172 via the network 176 for additional processing.

[0030] In the illustrated embodiment, the vehicle 100 may communicate with the computing system 172 via a network 176 and a signal line 178. In some embodiments, the computing system 172 is a cloud-based computing device. The machine learning engine 166 operable on the computing system 172 generates a machine learning model based on simulated scenarios and simulated sensor data for autonomous control of the vehicle 100. The machine learning model may be sent from the computing system 172 to the vehicle 100 for use in the appropriate control subsystems 152-158 for performing their respective functions.

[0031] Figure 1A Each processor shown in the vehicle 100, as well as the various additional controllers and subsystems disclosed herein, typically operates under the control of an operating system and executes or otherwise relies on various computer software applications, components, programs, objects, modules, data structures, etc., as described in more detail below. In addition, the various applications, components, programs, objects, modules, etc. may also be executed on one or more processors in another computer (e.g., computing system 172) coupled to the vehicle 100 via the network 176, such as in a distributed, cloud-based, or client-server computing environment, whereby the processing required to implement the functionality of the computer program may be distributed across the network to multiple computers and / or services.

[0032] In general, routines executed to implement the various embodiments described herein, whether implemented as part of an operating system or as a specific application, component, program, object, module, or sequence of instructions, or even a subset thereof, are referred to herein as "program code". The program code typically includes one or more instructions that reside at various times in various memories and storage devices, and when read and executed by one or more processors, perform the steps necessary to implement the steps or elements of various aspects of the present disclosure. In addition, although the embodiments have been and are described below in the context of fully functional computers and systems, it should be understood that the various embodiments described herein can be distributed as program products in various forms and can be implemented regardless of the particular type of computer-readable medium used to actually perform the distribution.

[0033] Examples of computer readable media include tangible, non-transitory media such as volatile and nonvolatile storage devices, floppy disks and other removable disks, solid-state drives, hard drives, magnetic tapes, and optical disks (eg, CD-ROMs, DVDs, etc.), and the like.

[0034] In addition, the various program codes described below may be identified based on the application in which they are implemented in a particular embodiment. However, it should be understood that any specific program terms below are used merely for convenience, and thus the present disclosure should not be limited to use only in any specific application identified and / or implied by these terms. In addition, given the generally unlimited number of ways in which a computer program can be organized into routines, processes, methods, modules, objects, etc., and the various ways in which program functions can be distributed between various software layers (e.g., operating systems, libraries, APIs, applications, applets, etc.) residing within a typical computer, it should be understood that the present disclosure is not limited to the specific organization and distribution of program functions described herein.

[0035] Figure 1A The exemplary environment shown is not intended to limit the embodiments disclosed herein. In fact, other alternative hardware and / or software environments may be used without departing from the scope of the embodiments disclosed herein.

[0036] Figure 1Bis an exemplary high-level schematic diagram of a silicon photonic device 105 for a coherent LIDAR system according to some embodiments. The silicon photonic device 105 includes a configuration of a photodiode (PD) 125, a grating coupler 145, an edge coupler 165, and a 2×2 mixer 180. In some embodiments, the PD 125 may be a germanium (Ge) PD. In other embodiments, the PD 125 may be a silicon PD, an indium gallium arsenide PD, a mercury cadmium telluride PD, a lead (II) sulfide PD, a molybdenum disulfide PD, a graphene PD, and / or combinations thereof. The grating coupler 145 may be used to couple light to and from the silicon photonic device 105. The operation of the grating coupler 145 is related to the refractive index changes caused by etching or deposition on a silicon-on-insulator (SOI) wafer during the manufacturing process. In some embodiments, the grating coupler 145 may be a one-dimensional grating coupler. For example, if the refractive index of the grating coupler 145 changes in only one direction, the grating coupler 145 is a one-dimensional grating coupler, and the light is coupled in the direction of the index change. In other embodiments, the grating coupler 145 may be a two-dimensional grating coupler. The grating couplers 145a, 145b, and 145c may be free space couplers. The grating couplers 145a and 145b are associated with the receiver antenna, and the grating coupler 145c is associated with the transmitter antenna. Each 2×2 mixer 180 is a mixer that receives as input one of the local oscillator (LO) signals (e.g., LOS and LOP) and a signal received via one of the grating couplers (e.g., 145a and 145b) associated with the receiver antenna. The output signal from the mixer 180 is then directed to the photodiode 125 for detection and sensing. The edge coupler 165 is coupled to the amplifier 170. The amplifier 170 is the light source of the silicon photonic device 105. For example, light generated by the amplifier 170 is coupled into the silicon photonics device 105 through the edge coupler 165. A transmit (TX) port connected to a grating coupler 145c associated with a transmitter antenna is coupled to the edge coupler 165 directly or indirectly.

[0037] Figure 2 A schematic cross-sectional diagram showing the structure of a silicon photonic device 200 for a coherent LIDAR system according to some embodiments is described. The structure of the silicon photonic device 200 is fabricated using a silicon-on-insulator (SOI) wafer. Figure 3As shown, the SOI wafer 300 may include an SOI layer 202, a buried oxide (BOX) layer 206, and a bulk silicon substrate member 204 that provides support for the SOI wafer. The BOX layer 206 is located between the SOI layer 202 and the bulk silicon substrate member 204. The SOI layer 202 may be etched and patterned into one or more silicon structures 402, 404, 406, and 408 coupled to the bulk silicon substrate member 204. For example, the SOI layer 202 may be a crystalline silicon (c-Si) layer. The portion of the c-Si layer disposed above the BOX layer 206 may be selectively and partially etched to pattern one or more silicon structures 402, 404, 406, and 408. The silicon structures 402, 404, 406, and 408 may include one or more of an island structure, a rib structure, a grid structure, and a plate structure. The silicon structure may include one or more non-uniform grating structures that form an optical waveguide for optical input and output. In addition to optical waveguides, other optical device structures, such as lasers, optical modulators, photodetectors, and optical switches, may also be fabricated in the SOI layer 202. The edge depth of the partially etched silicon structure in the SOI layer 202 may be in a range between about 50 nm and about 300 nm. For example, the thickness of the BOX layer 206 is about 3000 nm, but may have any range between about 1500 nm and about 3500 nm. As described in detail below, a dielectric material or insulator compound layer may be disposed above the silicon structure and etched to pattern one or more insulating or dielectric structures. For example, a first insulating structure 702 is patterned and etched in the insulator compound layer for coupling to the isolated silicon structure 404. In this embodiment, the first insulating structure 702 is coplanar with the second insulating structure 704. For example, in Figure 2 , the thickness or height of the insulating structures 702 and 704 is about 400 nm, but may have any range between about 300 nm and about 600 nm. In some embodiments, the insulator compound layer may be a dielectric material having an optical refractive index greater than the cladding material to which it may contact. For example, the insulator compound layer may be a silicon nitride (Si3N4) layer. One advantage of using a Si3N4 layer in a silicon photonic chip for a coherent LIDAR system is that it is able to handle higher optical powers. In another example, the insulator compound layer may be an amorphous silicon (a-Si) layer, a crystalline silicon (c-Si) layer, or the like. The distance between the bottom of the first insulating structure 702 and the top of the silicon structure is, for example, about 240 nm, but may have any range between about 100 nm and about 500 nm. The germanium (Ge) photodiode 125 may be fabricated on the silicon structure by doping.

[0038] The structure of the silicon photonic device 200 may include a plurality of metal wiring layers metal 1 (MT1) layer 1002, metal 2 (MT2) layer 1402, and metal 3 (MT3) layer 1404 for forming interconnections. The metal wiring layers 1002, 1402, and 1404 may be composed of one or more of aluminum, copper, gold, silver, and / or combinations thereof. After the MT1 layer 1002 is formed, the metal 0 (MT0) layer 1108 may be coupled to the first insulating structure 702. In some embodiments, the diffusion barrier and adhesion layer 1106 may be coupled to the metal layer 1104. For example, the diffusion barrier and adhesion layer 1106 may be disposed above or above the top of the metal layer 1104. The MT0 layer 1108 composed of the metal layer 1104 and the diffusion barrier and adhesion layer 1106 may form a reflector structure coupled to the first insulating structure 702. In other embodiments, a diffusion barrier and adhesion layer 1106 having good optical properties (e.g., reflectivity) may be disposed on the top and bottom of the metal layer 1104. The diffusion barrier and adhesion layer 1106 may be tantalum nitride, indium oxide, copper silicide, tungsten nitride, titanium nitride, and / or a combination thereof. There is an oxide layer or cladding 1408 that fills the space between the different structures formed on the silicon photonic device 200. The separation distance between the top of the first insulating structure 702 and the bottom of the MTO layer 1108 is, for example, about 900 nm, but may have any range between about 500 nm and about 1600 nm. The separation distance between the bottom of the MTO layer 1108 and the top of the silicon structure 404 is about 1140 nanometers, but may have any range between about 800 nanometers and about 1200 nanometers. In some embodiments, the thickness of the metal layer 1104 may be twice the thickness of the diffusion barrier and adhesion layer 1106. For example, the thickness of the metal layer 1104 may be about 100 nm, while the thickness of the diffusion barrier and adhesion layer 1106 may be about 50 nm. Therefore, the thickness of the MTO layer 1108 is about 150 nm. In addition, a thin insulating structure 1302 of the same insulating material as the first insulating structure 702 and the second insulating structure 704 may be coupled to the second insulating structure 704. For example, the thin insulating structure 1302 may be disposed above the second insulating structure 704. In some embodiments, the thickness of the thin insulating structure 1302 may be about 1 / 3.6 of the thickness of the second insulating structure 704. For example, if the thickness of the second insulating structure 704 is about 400 nm, the thickness of the thin insulating structure 1302 is about 110 nm. The distance between the bottom of the thin insulating structure 1302 and the top of the second insulating structure 704 may be about 450 nm.

[0039] exist Figure 2In the embodiment, the MTO layer 1108, the first insulating structure 702 and one or more of the partially etched silicon structures 402 and 404 form a grating coupler 145 for coupling into free space. For example, the MTO layer 1108 and the silicon structure 402 form a grating coupler 145 associated with a receiver antenna in the silicon photonic device 200 for a coherent LIDAR system. In another example, the MTO layer 1108, the first insulating structure 702 and the silicon structure 404 form a grating coupler 145 associated with a transmitter antenna in the silicon photonic device 200 for a coherent LIDAR system. The MTO layer 1108 is used as an interface from the silicon photonic chip to free space. The BOX layer 206 is used as a cladding material with a low optical refractive index. The oxide layer cladding 1408 is also used as a cladding material with a low optical refractive index. The cladding can be one or more layers of a material with a lower optical refractive index that is in contact with a core material (e.g., silicon structures 402, 404 and insulating structures 702, 704) having a higher optical refractive index. The thin insulating structure 1302 is disposed on top of and overlaps the second insulating structure 704, forming an edge coupler 165 for coupling to another semiconductor device or silicon photonic device (e.g., amplifier 170). The combination of the thin insulating structure 1302 and the second insulating structure 704 serves as an interface from the amplifier to the silicon photonic chip. Figure 2 The thin insulating structure 1302 and the second insulating structure 704 are described as overlapping from edge to edge, but it should be understood that there may be an offset in their overlap. In some embodiments, the edge coupler 165 can be made with a single insulating structure. The edge coupler 165 made with the construction of the dual insulating structures 704 and 1302 provides a higher coupling efficiency (CE) than the construction with a single insulating structure, and it also better matches the optical mode of the coherent LIDAR system. In other embodiments, the structure of the edge coupler 165 can be patterned in the crystalline silicon (c-Si) layer itself without the need to use an insulator compound, such as Si3N4.

[0040] In some embodiments, the structure of the grating coupler 145 may use another top insulating structure ( Figure 21108). The top insulating structure can be constructed by the same insulating material as the first insulating structure 702. The top insulating structure or the first insulating structure 702 thereunder can be etched and patterned to form a number of isolation strips of the insulating structure and combined with the MTO layer 1108 to form a grating coupler 145. For example, if the several isolation strips of the insulating structure are patterned into the top insulating structure, then those isolation strips together with the MTO layer 1108 can form a grating coupler associated with a receiver antenna. In another example, if the several isolation strips of the insulating structure are patterned into the first insulating structure 702, then those isolation strips together with the top insulating structure and the MTO layer 1108 can form a grating coupler associated with a transmitter antenna. In other embodiments, the silicon structures 402, 404 and the isolation strips of the insulating structure patterned on the top insulating structure or the first insulating structure 702 can be mixed and matched with the MTO layer 1108 to form a grating coupler 145.

[0041] Etch and pattern to Figure 2 An advantage of the structure of the grating coupler 145 in the silicon photonic device 200 is that it helps meet the link budget requirements for use in automotive-grade LIDAR systems. For example, the structure of the grating coupler 145 can reduce the insertion loss at the interface between the silicon photonic device 200 for coherent LIDAR and free space on both the transmit path and the receive path, resulting in an improvement of about 2 dB to 6 dB in the overall link budget. The light loss from the transmitter or output-type grating coupler is calculated twice in the link budget because the light leaves such a coupler, reflects from the target, and returns to the grating coupler. If there are no lithographic limitations, the structure of the grating coupler 145 can help achieve a coupling loss of approximately 0.25 dB. In the case of lithographic limitations, the structure of the grating coupler 145 can help achieve a coupling loss of approximately 0.5 dB to approximately 1.0 dB.

[0042] Figures 3 to 17 Schematic cross-sectional views of methods for fabricating silicon photonic devices according to some embodiments are described.

[0043] like Figure 3 As shown, an SOI wafer 300 is provided. In some embodiments, the SOI wafer 300 may be a three-layer wafer, including a bulk silicon substrate member 204 as a first layer or base layer, a buried oxide (BOX) layer 206 of an electrically insulating material (such as silicon dioxide (SiO2)) having a thickness of about 3000 nm as a second layer or middle layer, and an active crystalline silicon (c-Si) SOI layer 202 having a thickness of about 220 nm as a third layer or top layer.

[0044] like Figure 4 As shown, Figure 3The c-Si layer or SOI layer 202 shown may be precisely patterned and etched to form non-uniform silicon structures such as grids 402 , ribs 404 , islands 406 , and plates 408 disposed above the BOX layer 206 . Figure 3 The remaining portion of the SOI layer 202 shown may be etched down to the BOX layer 206. The silicon structure of the grid 402 is etched to a depth of about 70 nm, and the silicon structure of the plate 408 is etched to a depth of about 130 nm from the top. The rib 404 structure is patterned and etched into isolated full-thickness (e.g., 220 nm) silicon structure strips.

[0045] like Figure 5 As shown, an oxide layer or cladding layer 502 is then deposited on the silicon structures 402, 404, 406, and 408, with a deposition height of about 240 nm from the top of the silicon structures 402, 404, 406, and 408. After the oxide deposition, the top of the SOI wafer 300 is subjected to a chemical mechanical polishing (CMP) or planarization process. The oxide layer deposition and planarization process are performed to form a spacer between the silicon structures 402, 404, 406, and 408 and the insulator compound or material that will be deposited next on the top of the SOI wafer 300.

[0046] like Figure 6 As shown, a first layer 602 and a second layer 604 of an insulator compound or material (such as silicon nitride (Si3N4)) are then deposited on the top of the oxide layer 502 and the bottom of the substrate member 204. This deposition can be achieved using a chemical vapor deposition method. The thickness of the first layer 602 deposited on the top of the SOI wafer 300 is about 400 nm. In some embodiments, the chemical vapor deposition method used can be a low pressure chemical vapor deposition (LPCVD) method. In the LPCVD method, Si3N4 is deposited on both sides (top and bottom) of the SOI wafer 300. The LPCVD deposition method can apply strong tensile stress on the SOI wafer 300 and deform it. This double-sided deposition of Si3N4 is performed to eliminate the effects of tensile stress and avoid warping of the SOI wafer 300 structure. In some embodiments, plasma enhanced chemical vapor deposition (PECVD) can be used as a method for depositing an insulator compound layer on the top of the SOI wafer 300. In the PECVD method, double-sided deposition of the insulator compound may not be required. In some embodiments, amorphous silicon (a-Si) may be used as the insulator compound.

[0047] like Figure 7 As shown, Figure 6The deposited layer 602 on top of the oxide layer 502 is patterned and etched to form two coplanar insulating structures or dielectric elements 702 and 704 disposed above the oxide layer 502. The insulating structure 702 may overlap and be coupled to the silicon structure 404. The remaining portion of the deposited layer 602 on top of the oxide layer 502 is etched down to the oxide layer 502. The thickness of the two coplanar insulating structures 702 and 704 is, for example, about 400 nm. After the deposited layer 602 on top of the SOI wafer 300 is patterned and etched, the SOI wafer 300 may be cleaned to remove all photoresist.

[0048] like Figure 8 As shown, after forming two coplanar insulating structures 702 and 704, removing Figure 7 The deposited layer 604 on the bottom of the substrate member 204. Figure 6 The deposited layer 602 on top of the SOI wafer 300 is patterned and etched, which releases the tensile stress applied on the top of the SOI wafer 300. Figure 7 The deposited layer 604 on the bottom of the SOI wafer 300 is removed to balance the tensile stress applied to the bottom of the SOI wafer 300. After the deposited layer 604 on the bottom of the SOI wafer 300 is removed, the top of the SOI wafer 300 may be deep cleaned to remove contaminants that may have been transferred to the top of the SOI wafer 300.

[0049] like Fig. 9 As shown, the etched silicon structure 406 disposed above the BOX layer 206 is doped to form the photodiode 125. For example, germanium can be used to form Fig. 9 125. It should be understood that other materials (such as silicon, indium gallium arsenide, lead (II) sulfide, cadmium mercury telluride, or combinations thereof) may also be used to form their respective photodiodes. After forming the photodiode 125, another layer of oxide 902 is deposited on top of the SOI wafer 300.

[0050] like Fig.10As shown, a metal 1 (MT1) layer 1002 and three conductive vias are formed on the terminals of the photodiode 125. The MT1 layer 1002 and the conductive vias are formed as follows: by first depositing and patterning a first diffusion barrier and adhesion layer 1004a; then, depositing and patterning a metal 1001 in the middle; and finally, depositing and patterning a second diffusion barrier and adhesion layer 1004b. In other words, the metal 1001 is sandwiched between two thin diffusion barriers and adhesion layers 1004a and 1004b. In some embodiments, the metal 1001 can be deposited using one or more of aluminum, copper, gold, silver, or a combination thereof. In some embodiments, tantalum nitride (TaN) can be used to deposit the diffusion barriers and adhesion layers 1004a and 1004b. The thickness of the diffusion barriers and adhesion layers 1004a and 1004b is about 50 nm. The thickness of the metal 1001 deposited to form the MT1 layer 1002 is about 750 nm. The distance between the MT1 layer 1002 and the top of the silicon structure 402 is about 740 nm.

[0051] like Fig.11 As shown, a metal 0 (MT0) layer 1108 is formed. The purpose of this new MTO layer 1108 is to form a highly reflective mirror structure in the silicon photonic device 105. Fig.10 After the MT1 layer 1002 is formed, Fig.11 As shown, an oxide layer 1102 having a thickness of about 300 nm is deposited on top of the SOI wafer 300. A metal layer 1104 is deposited and patterned on the first insulating structure 702. The metal layer 1104 is deposited to a thickness of about 100 nm. A diffusion barrier and adhesion layer 1106 may then be deposited and patterned on top of the metal layer 1104 to improve adhesion. The thickness of the top diffusion barrier and adhesion layer 1106 is about 50 nm. The deposited metal layer 1104 and the diffusion barrier and adhesion layer 1106 thus form an MTO layer 1108, as shown in FIG. Fig.11As shown. The formation of the MTO layer 1108 is different in that the base diffusion barrier and adhesion layer are not deposited before the metal layer 1104 is deposited. That is, the metal layer 1104 is deposited first, and there is no diffusion barrier and adhesion layer below it. For example, the diffusion barrier and adhesion layer of tantalum nitride (TaN) material have poor reflectivity. If the TaN diffusion barrier and adhesion layer are deposited before the metal layer 1104, it may adversely affect the reflectivity of the MTO layer 1108 used to form a highly reflective mirror structure. In other embodiments, a material with good optical properties in terms of reflectivity can be used as a diffusion barrier and adhesion layer below the metal layer 1106. Between the subsequent formation of the MT1 layer 1002 and the MTO layer 1108, the chemical mechanical polishing (CMP) process for planarizing the SOI wafer 300 is intentionally omitted. The CMP process may bring uncertainty to the oxide spacing between two different layers. This intentional omission of the CMP process is to minimize the variation in the oxide spacing. In some embodiments, the SOI wafer 300 may be subjected to a CMP process between the subsequent formation of the MT1 layer 1002 and the MT0 layer 1108. An opening may be etched in the oxide spacing to a desired depth at which the MT0 layer 1108 may be patterned. As described herein, the construction of the MT0 layer 1108, the insulating structure 702, and the silicon structures 402, 404 forms one or more grating couplers 145. The distance between the bottom of the MT0 layer 1108 and the top of the silicon structure 404 is approximately 1140 nm. The distance between the bottom of the MT0 layer 1108 and the top of the insulating structure 702 is approximately 900 nm. The distance between the bottom of the first insulating structure 702 and the top of the silicon structure 404 is approximately 240 nm.

[0052] like Fig.12 As shown, another oxide layer 1202 is deposited on the MT1 layer 1002, the MTO layer 1108, the oxide layer 1102, and other structures on top. After the oxide deposition, the top of the SOI wafer 300 is subjected to a chemical mechanical polishing (CMP) or planarization process.

[0053] like Fig.13 As shown, an opening can be etched in the oxide layer 1202 over the second insulating structure 704. A thin layer of an insulator compound (such as Si3N4) is deposited in the opening and patterned to form a thin insulating structure 1302 on top of the second insulating structure 704. The thickness of the thin insulating structure 1302 is about 110 nm. The distance between the bottom of the thin insulating structure 1302 and the top of the second insulating structure 704 is about 450 nm. The construction of the thin insulating structure 1302 on top of the second insulating structure 704 forms an edge coupler 165 as described herein.

[0054] like Fig.14As described in , the back-end process manufacturing steps are performed. This includes the formation of metal 2 (MT2) layer 1402 and metal 3 (MT3) layer 1404, the addition of conductive vias connecting different metal layers, the deposition of more oxide layer 1408, the deposition of heater HTR 1406, and the performance of chemical mechanical polishing (CMP) process steps. The thickness of the deposited metal in MT3 layer 1404 is about twice the thickness of the MT2 layer 1402. For example, the thickness of the deposited metal in MT2 layer 1402 is about 1000 nm, while the thickness of the deposited metal in MT3 layer 1404 is about 2000 nm. A thin coating of diffusion barrier and adhesion layer is deposited on the top and bottom of the deposited metal in MT2 layer 1402 and MT3 layer 1404. A resistive metal alloy film is deposited as heater HTR 1406 on the silicon structure etched from the SOI layer. An example of a resistive metal alloy is titanium nitride (TiN). HTR 1406 can be used to heat the silicon photonic device chip. The heater HTR 1406 can also be used to change the refractive index of the waveguide structure, which in turn facilitates the operation of the phase shifter and optical switch. The distance between the bottom of the heater HTR 1406 and the top of the silicon structure 406 is about 3000 nm. The distance between the top of the MT1 layer 1002 and the bottom of the MT2 layer 1402 is about 1100 nm. The distance between the top of the MT2 layer 1402 and the bottom of the MT3 layer 1404 is about 800 nm. An opening can be etched in the oxide layer 1408 just above the MT3 layer 1404 to a depth of about 200 nm for forming contacts into the silicon photonic device chip.

[0055] like Fig.15 As shown, a shallow trench DT_OX 1502 is formed into the BOX layer 206, and a deep trench DT_SI 1504 is formed into the substrate member 204. The formation of the shallow trench DT_OX 1502 removes the oxide layer 1408 and the BOX layer 206 down to the substrate member 204. The depth of the DT_SI 1504 is about 150 μm.

[0056] like Fig.16 As shown, an undercut etch is performed to release the suspended structure.

[0057] like Fig.17 As shown, the back side of the SOI wafer 300 is polished to optical quality. After the back side of the SOI wafer 300 is polished, the thickness of the substrate member or handle 204 is about 600 μm.

[0058] The above schematic diagram is part of an integrated circuit chip design. The chip design is created in a graphical computer programming language and stored in a computer-readable storage medium (e.g., a disk, tape, physical hard drive, or virtual hard drive, such as a virtual hard drive in a storage access network). If the designer does not manufacture the chip or does not manufacture the photolithography masks used to manufacture the chip, the designer transmits the resulting design directly or indirectly to these entities by physical means (e.g., by providing a copy of the computer-readable storage medium storing the design) or electronic means (e.g., via the Internet). The stored design is then converted into an appropriate format (e.g., GDSII) for manufacturing photolithography masks, which typically include multiple copies of the chip design in question to be formed on a wafer. Photolithography masks are used to define areas of the wafer (and / or the layers thereon) to be etched or otherwise processed.

[0059] The foregoing detailed description of the present disclosure has been presented for the purpose of illustration and description. It is not intended to be exhaustive or to limit the present disclosure to the precise form disclosed. In accordance with the above teachings, many modifications and variations are possible. The described embodiments are selected to best explain the principles of the present disclosure and its practical application, so that other technical personnel in the field can best utilize the present disclosure in various embodiments, and make various modifications suitable for the intended specific use. It is intended that the scope of the present disclosure is defined by the appended claims. Although some embodiments of the present disclosure and their advantages have been described in detail, it should be understood that various changes, substitutions and modifications can be made herein without departing from the spirit and scope of the present disclosure defined by the appended claims. For example, it will be readily understood by those skilled in the art that many of the features, functions, processes and materials described herein can be varied while remaining within the scope of the present disclosure. In addition, the scope of the present disclosure is not intended to be limited to the specific embodiments of the processes, machines, manufactures, material compositions, means, methods and steps described in the specification. As will be readily understood by those skilled in the art from the description of the present disclosure, processes, machines, manufactures, compositions of matter, means, methods or steps currently existing or to be developed in the future that perform substantially the same functions as the corresponding embodiments described herein or achieve substantially the same results as the corresponding embodiments described herein may be utilized in accordance with the present disclosure. Therefore, the appended claims are intended to include such processes, machines, manufactures, compositions of matter, means, methods or steps within their scope.

Claims

1. A silicon photonic device, comprising: substrate member; An antenna is formed on the substrate member, and includes: a first configuration formed by a first grating structure on top of the substrate member; a second configuration formed by a first metal layer on top of the first grating structure; and a third configuration formed by a diffusion barrier and an adhesion layer on top of the first metal layer, the diffusion barrier and the adhesion layer and the first metal layer forming a reflector structure; and A photodiode is formed on the substrate member and coupled to the antenna.

2. The silicon photonic device according to claim 1, wherein: The antenna is a one-dimensional grating coupler.

3. The silicon photonic device according to claim 1, wherein: The antenna also includes: A first dielectric structure is coupled to the first grating structure.

4. The silicon photonics device according to claim 3, further comprising: A second dielectric structure is coupled to a third dielectric structure, the second dielectric structure and the third dielectric structure forming an edge coupler.

5. The silicon photonic device according to claim 4, wherein: The first dielectric structure and the third dielectric structure are coplanar.

6. The silicon photonic device according to claim 3, wherein: The antenna also includes an intermediate configuration of an oxide layer between the substrate member and the first configuration of the first grating structure and between the first configuration of the first grating structure and the second configuration of the first metal layer.

7. The silicon photonic device according to claim 3, wherein: The antenna also includes: a second grating structure coupled to the substrate member; and The first metal layer is coupled to the second grating structure.

8. The silicon photonic device according to claim 3, wherein: The first dielectric structure is one from the group of silicon nitride and silicon.

9. The silicon photonic device according to claim 3, wherein: The first metal layer is a metal 0 (MT0) layer.

10. The silicon photonic device according to claim 3, wherein: The first metal layer is one from the group of aluminum, gold, silver and copper.

11. The silicon photonics device according to claim 1, wherein: The diffusion barrier and the adhesion layer are one from the group consisting of tantalum nitride, indium oxide, copper silicide, tungsten nitride and titanium nitride.

12. The silicon photonics device according to claim 4, wherein: A first distance between the bottom of the first dielectric structure and the top of the first grating structure is in the range between 100 nanometers and 500 nanometers, a second distance between the bottom of the first metal layer and the top of the first grating structure is in the range between 800 nanometers and 1200 nanometers, and a third distance between the top of the first dielectric structure and the bottom of the first metal layer is in the range between 500 nanometers and 1600 nanometers.

13. The silicon photonic device according to claim 4, wherein: A fourth distance between a bottom of the second dielectric structure and a top of the third dielectric structure is approximately 450 nanometers.

14. The silicon photonics device according to claim 4, wherein: The first dielectric structure and the third dielectric structure have the same height.

15. The silicon photonics device according to claim 4, wherein: The height of the second dielectric structure is about 1 / 3 of the height of the third dielectric structure.

16. The silicon photonics device of claim 1, wherein: The height of the first metal layer is twice the height of the diffusion barrier and the adhesion layer.

17. A LIDAR sensor, comprising: A silicon photonic device, comprising: substrate member; An antenna is formed on the substrate member, and includes: a first configuration formed by a first grating structure on top of the substrate member; a second configuration formed by a first metal layer on top of the first grating structure; and a third configuration formed by a diffusion barrier and an adhesion layer on top of the first metal layer, the diffusion barrier and the adhesion layer and the first metal layer forming a reflector structure; and A photodiode is formed on the substrate member and coupled to the antenna.

18. The LIDAR sensor according to claim 17, wherein: The antenna in the silicon photonics device further includes: A first dielectric structure is coupled to the first grating structure.

19. The LIDAR sensor according to claim 18, wherein: The silicon photonics device further comprises: A second dielectric structure is coupled to a third dielectric structure, the second dielectric structure and the third dielectric structure forming an edge coupler.

20. A control system for an autonomous vehicle, comprising: A silicon photonic device, comprising: substrate member; An antenna is formed on the substrate member, and includes: a first configuration formed by a first grating structure on top of the substrate member; a second configuration formed by a first metal layer on top of the first grating structure; and a third configuration formed by a diffusion barrier and an adhesion layer on top of the first metal layer, the diffusion barrier and the adhesion layer and the first metal layer forming a reflector structure; and A photodiode is formed on the substrate member and coupled to the antenna.