Three-dimensional dynamic random access memory

By setting a through thermal conductivity structure on the substrate, connecting the 3D DRAM device with the heat dissipation component, the problem of poor heat dissipation effect of the 3D DRAM memory is solved, and a more efficient heat dissipation effect is achieved.

CN119920776APending Publication Date: 2025-05-02BEIJING SUPERSTRING ACAD OF MEMORY TECH +1
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Patent Information

Application Number
CN202411972378.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-30
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

The existing 3D DRAM memory has poor heat dissipation effect after the number of layers increases, resulting in increased heat dissipation burden of chips. The existing high thermal conductivity packaging materials are costly and difficult to meet the needs.

Method used

A thermal conductivity structure is provided on the substrate, connecting the 3D DRAM device to the heat dissipation component, and improving the heat dissipation efficiency through the heat conduction plate and the heat dissipation layer.

Benefits of technology

The heat is transferred to the heat dissipation components through the thermally conductive structure, which improves the heat dissipation efficiency of the chip and reduces the heat dissipation burden of the chip.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of laminated semiconductors, in particular to a three-dimensional dynamic random access memory. The three-dimensional dynamic random access memory comprises a substrate, a 3D DRAM (Dynamic Random Access Memory) device and a heat dissipation part, the 3D DRAM device is arranged on the substrate, and the heat dissipation part is arranged on the upper surface of the 3D DRAM device; a heat conduction structure penetrating through the upper surface and the lower surface of the substrate is arranged on the substrate, one end of the heat conduction structure is connected with the 3D DRAM device, and the other end of the heat conduction structure is connected with the heat dissipation component. In the 3D DRAM, due to the fact that multiple layers of chips are stacked and heat is accumulated in the vertical direction, the heat dissipation burden of the bottom chip is increased, the heat conduction structure is arranged on the substrate, the heat on the bottom chip can be transferred to the heat dissipation component for heat dissipation, and therefore the heat dissipation efficiency of the chips is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of stacked semiconductors, and in particular to a three-dimensional dynamic random access memory. Background Art

[0002] In 3D DRAM memory technology, as the number of memory layers increases, the stacking density of each unit increases, resulting in an increase in the heat generated per unit volume. Currently, the heat dissipation of 3D DRAM memory mainly depends on the chip packaging materials and external heat sinks, but as the number of layers increases, this heat dissipation method can no longer meet the growing heat dissipation needs. The closest existing technology is to use packaging materials with high thermal conductivity, but these methods are often costly and difficult to achieve ideal heat dissipation effects in practical applications. Summary of the invention

[0003] The object of the present invention is to provide a three-dimensional dynamic random access memory, the packaging structure of which can solve the problem of poor heat dissipation effect of chips in the prior art;

[0004] The present invention provides a three-dimensional dynamic random access memory, which includes a substrate, a 3D DRAM device and a heat dissipation component;

[0005] The 3D DRAM device is arranged on a substrate, and the heat dissipation component is arranged on an upper surface of the 3D DRAM device;

[0006] The substrate is provided with a heat-conducting structure penetrating the upper and lower surfaces of the substrate, one end of the heat-conducting structure is connected to the 3D DRAM device, and the other end is connected to the heat dissipation component.

[0007] Preferably, the heat dissipation component includes a heat dissipation plate, heat dissipation fins and a heat conduction plate;

[0008] The heat dissipation fins are arranged on the upper side of the heat dissipation plate;

[0009] The heat conducting plate comprises a vertical plate and a horizontal plate, wherein a first end of the vertical plate is connected to an end of the heat dissipation plate, and a second end of the vertical plate is connected to the horizontal plate;

[0010] The lower side of the heat dissipation plate is attached to the upper surface of the 3D DRAM device;

[0011] The horizontal plate is in contact with the lower surface of the substrate and is connected to the heat conducting structure.

[0012] Preferably, a heat dissipation layer is provided between the heat dissipation plate and the 3D DRAM device.

[0013] Preferably, a heat dissipation layer is provided between the horizontal plate and the substrate.

[0014] Preferably, the 3D DRAM device comprises a plurality of device layers stacked together;

[0015] The 3D DRAM device further includes a heat-conducting structure disposed through a portion of the plurality of stacked device layers, and an end of the heat-conducting structure is connected to a heat dissipation component.

[0016] Preferably, the heat-conducting structure runs through a plurality of stacked device layers.

[0017] Preferably, the thermally conductive structure is a heat dissipation through silicon via.

[0018] Preferably, each of the device layers is a dynamic random access memory chip.

[0019] Preferably, some of the multiple device layers are logic chips.

[0020] Preferably, a heat insulation layer is provided between adjacent device layers.

[0021] Beneficial effects:

[0022] In 3D DRAM, due to the stacking of multiple layers of chips, heat accumulates in the vertical direction, which increases the heat dissipation burden of the bottom chip. By setting a thermal conductive structure on the substrate, the heat on the bottom chip can be transferred to the heat dissipation component for heat dissipation, thereby improving the heat dissipation efficiency of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 A schematic diagram of the structure of a three-dimensional dynamic random access memory provided by a specific embodiment of the present invention;

[0025] Figure 2 A schematic diagram of the structure of another three-dimensional dynamic random access memory provided for a specific embodiment of the present invention;

[0026] Description of reference numerals:

[0027] 1: substrate, 2: 3D DRAM device, 3: heat dissipation component, 4: thermal conductive structure, 5: heat dissipation layer, 6: thermal insulation layer;

[0028] 31: heat sink, 32: heat sink fins, 33: vertical plate, 34: horizontal plate. DETAILED DESCRIPTION

[0029] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0031] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined. In addition, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal connection of two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0032] like Figure 1 , Figure 2 As shown, this embodiment provides a three-dimensional dynamic random access memory, which includes a substrate 1, a 3D DRAM device 2 and a heat dissipation component 3.

[0033] The 3D DRAM device 2 is disposed on the substrate 1 , and the heat dissipation component 3 is disposed on the upper surface of the 3D DRAM device 2 .

[0034] A heat-conducting structure 4 penetrating the upper and lower surfaces of the substrate 1 is disposed on the substrate 1 . One end of the heat-conducting structure 4 is connected to the 3D DRAM device 2 , and the other end is connected to the heat dissipation component 3 .

[0035] In 3D DRAM, due to the stacking of multiple layers of chips, heat accumulates in the vertical direction, which increases the heat dissipation burden of the bottom chip. The present application sets a heat-conducting structure 4 on the substrate 1 to transfer the heat on the bottom chip to the heat dissipation component 3 for heat dissipation, thereby improving the heat dissipation efficiency of the chip.

[0036] In this embodiment, a specific structure of the heat dissipation component 3 is provided, which is specifically shown as follows:

[0037] The heat dissipation component 3 includes a heat dissipation plate 31 , heat dissipation fins 32 and a heat conduction plate. The heat dissipation fins 32 are arranged on the upper side of the heat dissipation plate 31 .

[0038] The heat conducting plate includes a vertical plate 33 and a horizontal plate 34 . A first end of the vertical plate 33 is connected to an end of the heat dissipation plate 31 , and a second end of the vertical plate 33 is connected to the horizontal plate 34 .

[0039] The lower side of the heat dissipation plate 31 is in contact with the upper surface of the 3D DRAM device 2 , and the horizontal plate 34 is in contact with the lower surface of the substrate 1 and is connected to the heat conduction structure 4 .

[0040] By providing the heat-conducting plate, the heat-dissipating component 3 can be connected to the heat-conducting structure 4 , thereby transferring the heat at the bottom of the 3D DRAM to the heat-dissipating component 3 .

[0041] A heat dissipation layer 5 is disposed between the substrate 1, the heat dissipation plate 31 and the 3D DRAM device 2. A heat dissipation layer 5 is disposed between the horizontal plate 34 and the substrate 1.

[0042] The heat dissipation layer 5 includes a thermal interface material layer and a heat dissipation plate.

[0043] The thermal interface material layer is used to fill the air gap between the chip and the heat sink to improve the heat conduction efficiency of the contact surface. The thermal interface material layer can minimize the contact thermal resistance, thereby improving the heat dissipation efficiency.

[0044] Common thermal interface material layers (TIM) include thermal pads, thermal grease, thermal gel, phase change materials, graphite sheets and films. Each TIM has its own unique advantages and applicable scenarios. For example, thermal grease provides good thermal performance and a short manufacturing cycle, but may be affected by oil seepage or drying failure; thermal gel is easy to process and shape, but has weak bonding properties; thermal phase change materials have low cost and temperature control functions, but their thermal conductivity is relatively weak.

[0045] The vapor chamber is used to evenly distribute the heat generated by the chip across the heat sink, thus avoiding the generation of hot spots. The vapor chamber is usually made of highly thermally conductive materials, such as copper or aluminum, and may contain microchannels inside to enhance heat dissipation.

[0046] Reference Figure 2The 3D DRAM device 2 includes a plurality of stacked device layers, and the 3D DRAM device 2 also includes a heat-conducting structure 4 that penetrates a portion of the plurality of stacked device layers, and an end of the heat-conducting structure 4 is connected to the heat dissipation component 3 .

[0047] The thermal conductive structure 4 runs through multiple stacked device layers. The thermal conductive structure 4 is a heat dissipation silicon via. The heat dissipation silicon via is set by TSV (Through-Silicon Via) technology. TSV (Through-Silicon Via) technology is a method of drilling holes on the chip to achieve heat dissipation by establishing vertical connection channels between chips. This technology not only improves the heat dissipation performance of the device, but also improves signal transmission delay and bandwidth. In addition, studies have shown that inserting thermal conductive TSV between chip layers can effectively reduce the maximum temperature inside the chip, thereby improving heat dissipation performance. Therefore, 3D DRAM can indeed dissipate heat by drilling holes on the chip.

[0048] Each device layer is a dynamic random access memory chip. Some of the multiple device layers are logic chips.

[0049] An insulation layer 6 is provided between adjacent device layers. By providing the insulation layer 6, heat conduction in the vertical direction can be suppressed. The insulation layer 6 includes a material with low thermal conductivity. Specifically, the insulation layer 6 includes an oxide, a nitride or a nitride oxide, etc. Alternatively, the insulation layer 6 includes a polymer, such as a silicone resin or an epoxy resin.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A three-dimensional dynamic random access memory, characterized in that: Including substrate, 3D DRAM device and heat dissipation components; The 3D DRAM device is arranged on a substrate, and the heat dissipation component is arranged on an upper surface of the 3D DRAM device; The substrate is provided with a heat-conducting structure penetrating the upper and lower surfaces of the substrate, one end of the heat-conducting structure is connected to the 3D DRAM device, and the other end is connected to the heat dissipation component.

2. The three-dimensional dynamic random access memory according to claim 1, characterized in that: The heat dissipation component includes a heat dissipation plate, heat dissipation fins and a heat conducting plate; The heat dissipation fins are arranged on the upper side of the heat dissipation plate; The heat conducting plate comprises a vertical plate and a horizontal plate, wherein a first end of the vertical plate is connected to an end of the heat dissipation plate, and a second end of the vertical plate is connected to the horizontal plate; The lower side of the heat dissipation plate is attached to the upper surface of the 3D DRAM device; The horizontal plate is in contact with the lower surface of the substrate and is connected to the heat conducting structure.

3. The three-dimensional dynamic random access memory according to claim 2, characterized in that: A heat dissipation layer is arranged between the heat dissipation plate and the 3DDRAM device.

4. The three-dimensional dynamic random access memory according to claim 2, characterized in that: A heat dissipation layer is arranged between the horizontal plate and the substrate.

5. The three-dimensional dynamic random access memory according to claim 1, characterized in that: The 3D DRAM device includes a plurality of device layers stacked in layers; The 3D DRAM device further includes a heat-conducting structure disposed through a portion of the plurality of stacked device layers, and an end of the heat-conducting structure is connected to a heat dissipation component.

6. The three-dimensional dynamic random access memory according to claim 5, characterized in that: The heat-conducting structure runs through a plurality of stacked device layers.

7. The three-dimensional dynamic random access memory according to claim 5, characterized in that: The heat-conducting structure is a heat-dissipating through silicon via.

8. The three-dimensional dynamic random access memory according to claim 5, characterized in that: Each of the device layers is a dynamic random access memory chip.

9. The three-dimensional dynamic random access memory according to claim 5, characterized in that: Some of the plurality of device layers are logic chips.

10. The three-dimensional dynamic random access memory according to claim 5, characterized in that: A heat insulation layer is arranged between adjacent device layers.