High-power cascade topology applied to high-voltage input

Abstract

The invention discloses a high-power cascade topology applied to high-voltage input, which is characterized in that a front-stage first conversion circuit converts a wide-range input voltage into a stable voltage value, a rear-stage second conversion circuit can work in an open-loop state, the switching frequency is equal to the resonant frequency, and the high-power cascade topology works at the optimal efficiency point; and when the power tube works in a soft switch, the switching loss is very small, and the switching frequency can be improved, so that a magnetic core with a smaller size can be selected, the loss of the magnetic core is reduced, and the volume of the power supply can be further reduced to improve the power density.

Description

Technical Field

[0001] The present invention relates to the technical field of switching power supplies, and more particularly to a high-power cascade topology applied to high-voltage input. Background Art

[0002] Switching power supply is a DC regulated power supply controlled by switches. It is widely used in electronic equipment due to its small size and high efficiency, and is gradually becoming a mainstream power supply method in today's power supply technology. With the continuous development and innovation in the field of power electronics, switching power supply technology is developing towards standardization, miniaturization, high efficiency, energy saving and environmental protection.

[0003] There are still many technical problems to be solved in switching power supplies. For example, maintaining the existing high efficiency characteristics of switching power supplies while further improving their efficiency is one of the difficult problems that need to be overcome.

[0004] However, improving and maintaining the efficiency of the switching power supply is directly limited by the switching power supply itself. When the output power of the switching power supply gradually increases, the internal loss of the switching power supply also increases, including the switching loss of the switching device, the core loss and other losses in the circuit. The increase of these losses will cause the efficiency of the power supply to gradually decrease.

[0005] Switching loss refers to the energy loss caused by the capacitance between the on switches and the switch output capacitance when the switching device (such as MOSFET and diode) changes from the on state to the off state or from the off state to the on state. This part of the loss will increase with the increase of the switching frequency.

[0006] At present, the miniaturization of power supply equipment is mainly achieved through high frequency and high density. The semiconductor switches in the circuit have switching losses, and this loss is proportional to the switching frequency. Therefore, high frequency will increase the loss of semiconductor switches; high density will also cause the temperature to rise due to the reduction of heat dissipation area, thus affecting the efficiency of the switching power supply and its reliability. Summary of the invention

[0007] In order to overcome the shortcomings of the prior art, the present invention provides a high-power cascade topology applied to high-voltage input, which can not only reduce the switching loss of the MOS tube, improve the efficiency of the power supply, and achieve primary and secondary electrical isolation, but also effectively reduce the loss of the magnetic core, further reduce the volume of the switching power supply, thereby improving the power density.

[0008] The technical solution of the present invention is as follows: A high-power cascade topology applied to high-voltage input includes a first conversion circuit and a second conversion circuit;

[0009] The first conversion circuit is used to convert a wide range of input voltage into a fixed voltage value to provide to the input terminal of the second conversion circuit;

[0010] The second conversion circuit includes a primary circuit, the primary circuit includes a first half-bridge circuit, a second half-bridge circuit and a third half-bridge circuit, the first half-bridge circuit, the second half-bridge circuit and the third half-bridge circuit are connected in series in sequence, the first half-bridge circuit includes a power tube Q2, a power tube Q3, a transformer T1-A and a resonant capacitor C4; the second half-bridge circuit includes a power tube Q4, a power tube Q5, a transformer T1-B and a resonant capacitor C7; the third half-bridge circuit includes a power tube Q6, a power tube Q7, a transformer T1-C and a resonant capacitor C10;

[0011] The resonant capacitor C4, the resonant capacitor C7, the resonant capacitor C10, the transformer T1-A, the transformer T1-B and the transformer T1-C together constitute a resonant circuit, and the power tube Q2, the power tube Q3, the power tube Q4, the power tube Q5, the power tube Q6 and the power tube Q7 are alternately turned on and off under the drive of the control signal to form a switch of the resonant circuit.

[0012] Furthermore, the first half-bridge circuit also includes a voltage-dividing capacitor C3 and a voltage-dividing capacitor C5, the two ends of the voltage-dividing capacitor C5 are respectively a first node and a second node, one end of the capacitor C3 is connected to the input voltage +VIN, and the other end of the capacitor C3 is connected to the first node, one end of the resonant capacitor C4 is connected to the first node, and the other end of the resonant capacitor C4 is connected to the power tube Q2 and the power tube Q3 through the transformer T1-A.

[0013] Furthermore, the second half-bridge circuit includes a voltage-dividing capacitor C6 and a voltage-dividing capacitor C8, the two ends of the voltage-dividing capacitor C8 are respectively a third node and a fourth node, one end of the voltage-dividing capacitor C6 is connected to the second node, the other end of the voltage-dividing capacitor C6 is connected to the third node, one end of the resonant capacitor C7 is connected to the third node, and the other end of the resonant capacitor C7 is connected to the power tube Q4 and the power tube Q5 through the transformer T1-B.

[0014] Furthermore, the third half-bridge circuit includes a voltage-dividing capacitor C9 and a voltage-dividing capacitor C11, the two ends of the voltage-dividing capacitor C11 are respectively a fifth node and a sixth node, the sixth node of the voltage-dividing capacitor C11 is connected to the ground terminal BUCK-GND, one end of the voltage-dividing capacitor C9 is connected to the fourth node, and the other end of the voltage-dividing capacitor C9 is connected to the fifth node, and the resonant capacitor C10 is connected to the power tube Q6 and the power tube Q7 through the transformer T1-C.

[0015] Furthermore, the second conversion circuit also includes a secondary synchronization circuit, one end of the secondary synchronization circuit is connected to the output voltage high potential end VOOUT+, and the other end of the secondary synchronization circuit is connected to the output voltage low potential end VOUT-.

[0016] Further, the secondary synchronous circuit includes a secondary synchronous rectifier power tube Q8, a secondary synchronous rectifier power tube Q9, a secondary synchronous rectifier power tube Q10, a secondary synchronous rectifier power tube Q11, a transformer T1-D, a resonant inductor L2 and a filter capacitor C12, the source of the secondary synchronous rectifier power tube Q8 and the drain of the secondary synchronous rectifier power tube Q9 are connected to the seventh node, the drain of the secondary synchronous rectifier power tube Q8 is connected to the output voltage high potential end VOOUT+, the source of the secondary synchronous rectifier power tube Q9 is connected to the output voltage low potential end VOUT-, and the drain of the secondary synchronous rectifier power tube Q10 is connected to the output voltage low potential end VOUT-. The drain is connected to the output voltage high potential end VOOUT+, the source of the secondary synchronous rectifier power tube Q10 and the drain of the secondary synchronous rectifier power tube Q11 are connected to the eighth node, the source of the secondary synchronous rectifier power tube Q11 is connected to the output voltage low potential end VOUT-, one end of the transformer T1-D is connected to the seventh node, the other end of the transformer T1-D is connected to the eighth node through the resonant inductor L2, one end of the filter capacitor C12 is connected to the output voltage high potential end VOOUT+, and the other end of the filter capacitor C12 is connected to the output voltage low potential end VOUT-.

[0017] Further, the first conversion circuit includes an input filter capacitor C1, a power MOS tube Q1, a freewheeling tube D1, an inductor L1 and an output filter capacitor C2, one end of the input filter capacitor C1 is connected to the positive electrode +VIN of the power input, the other end of the input filter capacitor C1 is connected to the negative electrode -VIN of the power input, the source of the power MOS tube Q1 is connected to the negative electrode -VIN of the power input, the drain of the power MOS tube Q1 is connected to the ground terminal BUCK-GND through the inductor L1, the positive electrode of the freewheeling tube D1 is connected to the drain of the power MOS tube Q1, the negative electrode of the freewheeling tube D1 is connected to the positive electrode +VIN of the power input, one end of the output filter capacitor C2 is connected to the positive electrode +VIN of the power output, and the other end of the output filter capacitor C2 is connected to the ground terminal BUCK-GND.

[0018] Furthermore, the power MOS tube Q1 is an N-channel MOS tube.

[0019] Further, the secondary synchronous rectification power tube Q8, the secondary synchronous rectification power tube Q9, the secondary synchronous rectification power tube Q10 and the secondary synchronous rectification power tube Q11 are all NMOS power tubes.

[0020] Further, the power tube Q2, the power tube Q3, the power tube Q4, the power tube Q5, the power tube Q6 and the power tube Q7 are all NMOS power tubes.

[0021] The present invention according to the above scheme has the following beneficial effects:

[0022] (1) The present invention provides a high-power cascade topology for high-voltage input, wherein the first conversion circuit is used in the front stage and the second conversion circuit is used in the rear stage. The first conversion circuit converts a wide range of input voltage into a stable voltage value as the input of the second conversion circuit. The second conversion circuit performs resonant conversion through three series-connected half-bridge circuits. In each half-bridge circuit, the power tube is alternately turned on and off under the drive of a control signal to form a switch of a resonant circuit. The resonant capacitor and the transformer together constitute a resonant circuit, thereby converting the input voltage into a desired voltage value.

[0023] (2) The present invention provides a high-power cascade topology for high-voltage input, wherein the resonant capacitor C4, the resonant capacitor C7, the resonant capacitor C10, the transformer T1-A, the transformer T1-B, and the transformer T1-C together form a resonant circuit. Under the drive of the control signal, the power tubes Q2, Q3, Q4, Q5, Q6, and Q7 are alternately turned on and off, thereby changing the current and voltage distribution in the resonant circuit. When a certain power tube is ready to be turned on, since its parallel resonant capacitor has been discharged to zero voltage by turning off other power tubes, the power tube can be turned on under zero voltage conditions, thereby avoiding switching loss and noise. Similarly, when a certain power tube is ready to be turned off, since its series resonant inductor has stored energy by turning on other power tubes and generates a reverse current, the current of the power tube has dropped to zero before turning off, so that the power tube can achieve soft switching, reduce the switching loss of the power tube, improve the efficiency of the power supply, and achieve primary and secondary electrical isolation at the same time.

[0024] (3) The present invention provides a high-power cascade topology for high-voltage input. Since the first conversion circuit of the previous stage has converted the wide-range input voltage into a stable voltage value, the second conversion circuit of the subsequent stage can operate in an open-loop state, and the switching frequency is equal to the resonant frequency, operating at the optimum efficiency. Moreover, when the power tube operates in soft switching, the switching loss is very small, and the switching frequency can be increased, so that a smaller size of magnetic core can be selected, reducing the loss of the magnetic core, and the volume of the power supply can be further reduced to improve the power density. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 is an exemplary circuit diagram of a first conversion circuit in an embodiment of the present invention;

[0027] Figure 2 is an exemplary circuit diagram of a primary circuit in an embodiment of the present invention;

[0028] Figure 3 is an exemplary circuit diagram of a secondary circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The following detailed description of the embodiments of the present invention is provided in conjunction with the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present invention, but cannot be used to limit the scope of the present invention, that is, the present invention is not limited to the described embodiments.

[0030] In order to better understand the present invention, the present invention is further described below in conjunction with the accompanying drawings and embodiments:

[0031] See also Figure 1 to Figure 3 As shown, an embodiment of the present invention provides a high-power cascade topology for high-voltage input, including a first conversion circuit and a second conversion circuit;

[0032] Specifically, the first conversion circuit is used to convert a wide range of input voltage into a fixed voltage value to provide to the input terminal of the second conversion circuit;

[0033] The second conversion circuit includes a primary circuit, the primary circuit includes a first half-bridge circuit, a second half-bridge circuit and a third half-bridge circuit, the first half-bridge circuit, the second half-bridge circuit and the third half-bridge circuit are connected in series in sequence, the first half-bridge circuit includes a power tube Q2, a power tube Q3, a transformer T1-A and a resonant capacitor C4; the second half-bridge circuit includes a power tube Q4, a power tube Q5, a transformer T1-B and a resonant capacitor C7; the third half-bridge circuit includes a power tube Q6, a power tube Q7, a transformer T1-C and a resonant capacitor C10;

[0034] Resonant capacitor C4, resonant capacitor C7, resonant capacitor C10, transformer T1-A, transformer T1-B and transformer T1-C together constitute a resonant circuit, and power tubes Q2, power tube Q3, power tube Q4, power tube Q5, power tube Q6 and power tube Q7 are alternately turned on and off under the drive of the control signal to form a switch of the resonant circuit.

[0035] In this embodiment, the front stage uses the first conversion circuit and the rear stage uses the second conversion circuit. The first conversion circuit converts a wide range of input voltage into a stable voltage value as the input of the second conversion circuit. The second conversion circuit performs resonant conversion through three series-connected half-bridge circuits. In each half-bridge circuit, the power tube is alternately turned on and off under the drive of the control signal to form a switch of the resonant circuit. The resonant capacitor and the transformer together constitute a resonant circuit, thereby converting the input voltage into a desired voltage value.

[0036] Among them, the resonant capacitor C4, the resonant capacitor C7, the resonant capacitor C10 and the transformer T1-A, the transformer T1-B, and the transformer T1-C together form a resonant circuit. Under the drive of the control signal, the power tubes Q2, Q3, Q4, Q5, Q6, and Q7 are alternately turned on and off, thereby changing the current and voltage distribution in the resonant circuit. When a certain power tube is ready to be turned on, since its parallel resonant capacitor has been discharged to zero voltage through the turn-off of other power tubes, the power tube can be turned on under zero voltage conditions, thereby avoiding turn-on loss and noise. Similarly, when a certain power tube is ready to be turned off, since its series resonant inductor has stored energy through the turn-on of other power tubes and generated a reverse current, the current of the power tube has dropped to zero before the power tube is turned off, so that the power tube can achieve soft switching, reduce the switching loss of the power tube, improve the efficiency of the power supply, and achieve primary and secondary electrical isolation at the same time.

[0037] Secondly, because the first conversion circuit of the previous stage has converted the wide range of input voltage into a stable voltage value, the second conversion circuit of the subsequent stage can operate in an open-loop state, the switching frequency is equal to the resonant frequency, and it operates at the optimum efficiency. Moreover, when the power tube operates in soft switching, the switching loss is very small, and the switching frequency can be increased, so that a smaller size of magnetic core can be selected to reduce the loss of the magnetic core. The volume of the power supply can also be further reduced to improve the power density.

[0038] See also Figure 2 As shown, the first half-bridge circuit also includes a voltage-dividing capacitor C3 and a voltage-dividing capacitor C5, the two ends of the voltage-dividing capacitor C5 are respectively a first node and a second node, one end of the capacitor C3 is connected to the input voltage +VIN, the other end of the capacitor C3 is connected to the first node, one end of the resonant capacitor C4 is connected to the first node, and the other end of the resonant capacitor C4 is connected to the power tube Q2 and the power tube Q3 through the transformer T1-A.

[0039] See also Figure 2As shown, the second half-bridge circuit includes a voltage-dividing capacitor C6 and a voltage-dividing capacitor C8, the two ends of the voltage-dividing capacitor C8 are the third node and the fourth node respectively, one end of the voltage-dividing capacitor C6 is connected to the second node, the other end of the voltage-dividing capacitor C6 is connected to the third node, one end of the resonant capacitor C7 is connected to the third node, and the other end of the resonant capacitor C7 is connected to the power tube Q4 and the power tube Q5 through the transformer T1-B.

[0040] See also Figure 3 As shown, the third half-bridge circuit includes a voltage-dividing capacitor C9 and a voltage-dividing capacitor C11, the two ends of the voltage-dividing capacitor C11 are respectively a fifth node and a sixth node, the sixth node of the voltage-dividing capacitor C11 is connected to the ground terminal BUCK-GND, one end of the voltage-dividing capacitor C9 is connected to the fourth node, and the other end of the voltage-dividing capacitor C9 is connected to the fifth node, and the resonant capacitor C10 is connected to the power tube Q6 and the power tube Q7 through the transformer T1-C.

[0041] See also Figure 3 As shown, the second conversion circuit also includes a secondary synchronization circuit, one end of the secondary synchronization circuit is connected to the output voltage high potential end VOOUT+, and the other end of the secondary synchronization circuit is connected to the output voltage low potential end VOUT-.

[0042] Specifically, the secondary synchronous circuit includes a secondary synchronous rectifier power tube Q8, a secondary synchronous rectifier power tube Q9, a secondary synchronous rectifier power tube Q10, a secondary synchronous rectifier power tube Q11, a transformer T1-D, a resonant inductor L2 and a filter capacitor C12, the source of the secondary synchronous rectifier power tube Q8 and the drain of the secondary synchronous rectifier power tube Q9 are connected to the seventh node, the drain of the secondary synchronous rectifier power tube Q8 is connected to the output voltage high potential terminal VOOUT+, the source of the secondary synchronous rectifier power tube Q9 is connected to the output voltage low potential terminal VOUT-, and the secondary synchronous rectifier power The drain of the tube Q10 is connected to the output voltage high potential terminal VOOUT+, the source of the secondary synchronous rectifier power tube Q10 and the drain of the secondary synchronous rectifier power tube Q11 are connected to the eighth node, the source of the secondary synchronous rectifier power tube Q11 is connected to the output voltage low potential terminal VOUT-, one end of the transformer T1-D is connected to the seventh node, the other end of the transformer T1-D is connected to the eighth node through the resonant inductor L2, one end of the filter capacitor C12 is connected to the output voltage high potential terminal VOOUT+, and the other end of the filter capacitor C12 is connected to the output voltage low potential terminal VOUT-.

[0043] See also Figure 1As shown, the first conversion circuit includes an input filter capacitor C1, a power MOS tube Q1, a freewheeling tube D1, an inductor L1 and an output filter capacitor C2, one end of the input filter capacitor C1 is connected to the positive electrode +VIN of the power input, the other end of the input filter capacitor C1 is connected to the negative electrode -VIN of the power input, the source of the power MOS tube Q1 is connected to the negative electrode -VIN of the power input, the drain of the power MOS tube Q1 is connected to the ground terminal BUCK-GND through the inductor L1, the positive electrode of the freewheeling tube D1 is connected to the drain of the power MOS tube Q1, the negative electrode of the freewheeling tube D1 is connected to the positive electrode +VIN of the power input, one end of the output filter capacitor C2 is connected to the positive electrode +VIN of the power output, and the other end of the output filter capacitor C2 is connected to the ground terminal BUCK-GND.

[0044] In this embodiment, the power MOS transistor Q1 is an N-channel MOS transistor.

[0045] In this embodiment, the secondary synchronous rectifier power tube Q8 , the secondary synchronous rectifier power tube Q9 , the secondary synchronous rectifier power tube Q10 and the secondary synchronous rectifier power tube Q11 are all NMOS power tubes.

[0046] In this embodiment, the power tube Q2 , the power tube Q3 , the power tube Q4 , the power tube Q5 , the power tube Q6 and the power tube Q7 are all NMOS power tubes.

[0047] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the appended claims of the present invention.

[0048] The above is an exemplary description of the present invention in conjunction with the accompanying drawings. It is obvious that the implementation of the present invention is not limited to the above-mentioned method. As long as various improvements are made by adopting the method concept and technical solution of the present invention, or the concept and technical solution of the present invention are directly applied to other occasions without improvement, they are all within the protection scope of the present invention.

Claims

1. A high-power cascade topology for high-voltage input, characterized in that: including a first conversion circuit and a second conversion circuit; The first conversion circuit is used to convert a wide range of input voltage into a fixed voltage value to provide to the input terminal of the second conversion circuit; The second conversion circuit includes a primary circuit, the primary circuit includes a first half-bridge circuit, a second half-bridge circuit and a third half-bridge circuit, the first half-bridge circuit, the second half-bridge circuit and the third half-bridge circuit are connected in series in sequence, the first half-bridge circuit includes a power tube Q2, a power tube Q3, a transformer T1-A and a resonant capacitor C4; the second half-bridge circuit includes a power tube Q4, a power tube Q5, a transformer T1-B and a resonant capacitor C7; the third half-bridge circuit includes a power tube Q6, a power tube Q7, a transformer T1-C and a resonant capacitor C10; The resonant capacitor C4, the resonant capacitor C7, the resonant capacitor C10, the transformer T1-A, the transformer T1-B and the transformer T1-C together constitute a resonant circuit, and the power tube Q2, the power tube Q3, the power tube Q4, the power tube Q5, the power tube Q6 and the power tube Q7 are alternately turned on and off under the drive of the control signal to form a switch of the resonant circuit.

2. A high-power cascade topology for high-voltage input as claimed in claim 1, characterized in that: The first half-bridge circuit also includes a voltage-dividing capacitor C3 and a voltage-dividing capacitor C5, wherein the two ends of the voltage-dividing capacitor C5 are respectively a first node and a second node, one end of the capacitor C3 is connected to the input voltage +VIN, and the other end of the capacitor C3 is connected to the first node, one end of the resonant capacitor C4 is connected to the first node, and the other end of the resonant capacitor C4 is connected to the power tube Q2 and the power tube Q3 through the transformer T1-A.

3. A high-power cascade topology for high-voltage input as claimed in claim 2, characterized in that: The second half-bridge circuit includes a voltage-dividing capacitor C6 and a voltage-dividing capacitor C8, wherein the two ends of the voltage-dividing capacitor C8 are respectively a third node and a fourth node, one end of the voltage-dividing capacitor C6 is connected to the second node, and the other end of the voltage-dividing capacitor C6 is connected to the third node, one end of the resonant capacitor C7 is connected to the third node, and the other end of the resonant capacitor C7 is connected to the power tube Q4 and the power tube Q5 through the transformer T1-B.

4. A high-power cascade topology for high-voltage input as claimed in claim 3, characterized in that: The third half-bridge circuit includes a voltage-dividing capacitor C9 and a voltage-dividing capacitor C11, wherein the two ends of the voltage-dividing capacitor C11 are respectively a fifth node and a sixth node, the sixth node of the voltage-dividing capacitor C11 is connected to the ground terminal BUCK-GND, one end of the voltage-dividing capacitor C9 is connected to the fourth node, and the other end of the voltage-dividing capacitor C9 is connected to the fifth node, and the resonant capacitor C10 is connected to the power tube Q6 and the power tube Q7 through the transformer T1-C.

5. A high-power cascade topology for high-voltage input as claimed in claim 4, characterized in that: The second conversion circuit further includes a secondary synchronization circuit, one end of the secondary synchronization circuit is connected to the output voltage high potential end VOOUT+, and the other end of the secondary synchronization circuit is connected to the output voltage low potential end VOUT-.

6. A high-power cascade topology for high-voltage input as claimed in claim 5, characterized in that: The secondary synchronous circuit includes a secondary synchronous rectifier power tube Q8, a secondary synchronous rectifier power tube Q9, a secondary synchronous rectifier power tube Q10, a secondary synchronous rectifier power tube Q11, a transformer T1-D, a resonant inductor L2 and a filter capacitor C12. The source of the secondary synchronous rectifier power tube Q8 and the drain of the secondary synchronous rectifier power tube Q9 are connected to the seventh node. The drain of the secondary synchronous rectifier power tube Q8 is connected to the output voltage high potential end VOOUT+, the source of the secondary synchronous rectifier power tube Q9 is connected to the output voltage low potential end VOUT-, and the drain of the secondary synchronous rectifier power tube Q10 is connected to the output voltage low potential end VOUT-. The secondary synchronous rectifier power tube Q10 is connected to the output voltage high potential terminal VOOUT+, the source of the secondary synchronous rectifier power tube Q10 and the drain of the secondary synchronous rectifier power tube Q11 are connected to the eighth node, the source of the secondary synchronous rectifier power tube Q11 is connected to the output voltage low potential terminal VOUT-, one end of the transformer T1-D is connected to the seventh node, the other end of the transformer T1-D is connected to the eighth node through the resonant inductor L2, one end of the filter capacitor C12 is connected to the output voltage high potential terminal VOOUT+, and the other end of the filter capacitor C12 is connected to the output voltage low potential terminal VOUT-.

7. A high-power cascade topology for high-voltage input as claimed in claim 6, characterized in that: The first conversion circuit includes an input filter capacitor C1, a power MOS tube Q1, a freewheeling tube D1, an inductor L1 and an output filter capacitor C2, one end of the input filter capacitor C1 is connected to the positive electrode +VIN of the power input, the other end of the input filter capacitor C1 is connected to the negative electrode -VIN of the power input, the source of the power MOS tube Q1 is connected to the negative electrode -VIN of the power input, the drain of the power MOS tube Q1 is connected to the ground terminal BUCK-GND through the inductor L1, the positive electrode of the freewheeling tube D1 is connected to the drain of the power MOS tube Q1, the negative electrode of the freewheeling tube D1 is connected to the positive electrode +VIN of the power input, one end of the output filter capacitor C2 is connected to the positive electrode +VIN of the power output, and the other end of the output filter capacitor C2 is connected to the ground terminal BUCK-GND.

8. A high-power cascade topology for high-voltage input as claimed in claim 7, characterized in that: The power MOS tube Q1 is an N-channel MOS tube.

9. A high-power cascade topology for high-voltage input as claimed in claim 7, characterized in that: The secondary synchronous rectification power tube Q8, the secondary synchronous rectification power tube Q9, the secondary synchronous rectification power tube Q10 and the secondary synchronous rectification power tube Q11 are all NMOS power tubes.

10. A high-power cascade topology for high-voltage input as claimed in claim 7, characterized in that: The power tube Q2 , the power tube Q3 , the power tube Q4 , the power tube Q5 , the power tube Q6 and the power tube Q7 are all NMOS power tubes.

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