Voltage-controlled oscillator with inverse F-type and three-point dual-mode operation

Abstract

The invention provides an inverse F-type and three-point dual-mode operated voltage-controlled oscillator, which is a single-core oscillator and comprises an active negative resistance transistor pair, a passive inductor group, a frequency regulation module, a first switch group and a second switch group, the passive inductor group and the frequency adjusting module form a passive resonant cavity; when the first switch group is switched on and the second switch group is switched off, the active negative resistance transistor pair is connected with the passive inductor group in a differential form to form an inverse F-type oscillator; and when the first switch group is switched off and the second switch group is switched on, the active negative resistance transistor pair is connected with the passive inductor group in a common-mode parallel mode to form a three-point oscillator. According to the technical scheme provided by the invention, the problem that the impedance peak of the resonant cavity deviates from the preset value due to mismatching between cores in the existing multi-core oscillator is avoided, and the frequency adjustment range of the single-core oscillator is further widened on the basis of low phase noise.

Description

Technical Field

[0001] This document relates to the field of radio frequency integrated circuit technology, and more particularly to a voltage controlled oscillator with inverse class F and three-point dual-mode operation. Background Art

[0002] The communications industry needs to integrate multi-standard wireless transceivers into a single chip, so the voltage-controlled oscillator is required to have a wide frequency coverage to achieve seamless full-range frequency synthesis.

[0003] Currently, voltage-controlled oscillators (VCOs) with a wide frequency adjustment range are usually implemented in a multi-core multi-mode solution. The multi-core multi-mode operation mode greatly expands the FTR (frequency adjustment range) of the VCO. The main advantage of this solution is that it couples multiple identical VCO cores, which improves the frequency adjustment range and phase noise of the voltage-controlled oscillator, but there are some inevitable disadvantages in other aspects:

[0004] 1. The power consumption of the voltage-controlled oscillator circuit has increased exponentially. Although coupling multiple VCO cores can improve the phase noise performance of the circuit, the power consumption increase brought by multiple VCOs at the same time has not improved the FoM (Figure of Merit) of the voltage-controlled oscillator.

[0005] 2. Mismatch between different VCO cores. Mismatch between cores will cause the resonance cavity impedance peak to deviate from the preset value, making it impossible to achieve seamless full-range frequency synthesis.

[0006] 3. The Q value (quality factor) of the resonant cavity is reduced in high-frequency mode. In high-frequency mode, the magnetic flux generated between the coupled inductors cancels each other out, which reduces the effective inductance value, but the loss remains almost unchanged, thus reducing the equivalent quality factor of the resonant cavity.

[0007] Therefore, it is necessary to design a voltage-controlled oscillator that can simultaneously achieve a wide frequency adjustment range and low phase noise to meet the needs of today's multi-standard integrated transceiver systems. Summary of the invention

[0008] In view of the above analysis, the present application aims to propose an inverse class F and three-point dual-mode operating voltage-controlled oscillator, which realizes mode switching only in one oscillator core through switch switching and can achieve frequency tuning in two modes.

[0009] In a first aspect, one or more embodiments of this specification provide a voltage-controlled oscillator with inverse class-F and three-point dual-mode operation, the oscillator being a single-core oscillator, comprising: an active negative resistance transistor pair, a passive inductor group, a frequency adjustment module, a first switch group, and a second switch group;

[0010] The passive inductor group and the frequency adjustment module form a passive resonant cavity;

[0011] When the first switch group is closed and the second switch group is open, the active negative resistance transistor pair is connected to the passive resonant cavity in a differential form to form an inverse class F oscillator; and

[0012] When the first switch group is disconnected and the second switch group is closed, the active negative resistance transistor pair is connected to the passive resonant cavity in a common-mode parallel form to form a three-point oscillator.

[0013] Furthermore, the frequency adjustment module is used to adjust the capacitance value connected to the resonant cavity.

[0014] Further, the frequency adjustment module includes a group of variable capacitors and multiple groups of digitally controlled capacitor arrays;

[0015] The digitally controlled capacitor arrays are connected in parallel; and

[0016] The variable capacitors are connected in series and then in parallel with the digitally controlled capacitor array.

[0017] Further, the active negative resistance transistor pair includes two NMOS transistors;

[0018] The frequency adjustment module includes a first adjustment submodule and a second adjustment submodule;

[0019] Two ends of the first regulating submodule are respectively connected to two ends of the passive inductor group; and

[0020] Two ends of the second regulating submodule are respectively connected to the gates of the two NMOS tubes.

[0021] Further, when the working mode is three-point, the passive inductor group, the first regulating submodule and the second regulating submodule enable a capacitor or a capacitor to exist between any two poles of each of the two NMOS tubes.

[0022] Further, the active negative resistance transistor pair includes two NMOS transistors; and

[0023] The preparation process of the NMOS tube is a fully depleted silicon-on-insulator process.

[0024] Furthermore, the NMOS tube adjusts the substrate external bias voltage V FD , so as to adjust the threshold voltage of the NMOS tube, thereby adjusting the circuit operating frequency and power consumption.

[0025] Further, the passive inductor group includes two mutually coupled differential inductors and a common mode inductor; and

[0026] The center of the connection between the two differential inductors is connected to one end of the common mode inductor.

[0027] Further, the active negative resistance transistor pair includes two NMOS transistors;

[0028] The passive inductor group includes a differential inductor group and a common mode inductor;

[0029] The first switch group includes: switch SWA1, switch SWA2 and switch SWA3;

[0030] One end of the switch SWA1 is respectively connected to one end of the differential inductor group and the drain of one NMOS transistor in the active negative resistance transistor pair, and the other end is connected to the gate of one NMOS transistor in the active negative resistance transistor pair;

[0031] One end of the switch SWA2 is respectively connected to the other end of the differential inductor group and the drain of one NMOS transistor in the active negative resistance transistor pair, and the other end is connected to the gate of the other NMOS transistor in the active negative resistance transistor pair; and

[0032] One end of the switch SWA3 is connected to one end of the common mode inductor, and the other end is connected to a power supply.

[0033] Further, the active negative resistance transistor pair includes two NMOS transistors;

[0034] The passive inductor group includes two mutually coupled differential inductors and a common mode inductor;

[0035] The second switch group includes: switch SWB1, switch SWB2, switch SWB3 and switch SWB4;

[0036] Two ends of the switch SWB1 are respectively connected to the gates of two NMOS transistors in the active negative resistance transistor pair;

[0037] One end of the switch SWB2 is respectively connected to one end of the differential inductor group and the drain of one NMOS transistor in the active negative resistance transistor pair, and the other end is respectively connected to the other end of the differential inductor group and the drain of the other NMOS transistor in the active negative resistance transistor pair;

[0038] One end of the switch SWB3 is respectively connected to one end of the switch SWB2, one end of the differential inductor group and the drain of an NMOS transistor in the active negative resistance transistor pair, and the other end is connected to a power supply; and

[0039] One end of the switch SWB4 is respectively connected to one end of the switch SWB1 and the gate of the other NMOS transistor in the active negative resistance transistor pair, and the other end is connected to one end of the common mode inductor.

[0040] Compared with the prior art, this application can at least achieve the following technical effects:

[0041] The voltage-controlled oscillator of the present application is a single-core oscillator, that is, only one active negative resistance core is used, which realizes the tuning of two different working frequency bands, avoiding the problem of the resonant cavity impedance peak deviating from the preset value due to the mismatch between multiple cores. And the first switch group and the second switch group are used to realize two connection modes of the active negative resistance transistor pair and the passive resonant cavity. Among them, when the first switch group is closed and the second switch group is disconnected, the active negative resistance transistor pair is connected to the passive resonant cavity in a differential form, corresponding to the inverse F-class mode. When the first switch group is disconnected and the second switch group is closed, the active negative resistance transistor pair is connected to the passive resonant cavity in the form of common-mode parallel connection, corresponding to the three-point type. The above method realizes one core corresponding to dual modes. Compared with the existing multi-core multi-mode oscillators, it avoids the problem of mismatch between multiple cores, reduces the circuit power consumption, and improves the frequency adjustment range of the single-core oscillator. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate one or more embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0043] Figure 1 A circuit diagram of a voltage-controlled oscillator provided for one or more embodiments of this specification;

[0044] Figure 2 A schematic diagram of the input impedance of the resonant cavity in the inverse class F working mode provided by one or more embodiments of this specification;

[0045] Figure 3 A schematic diagram of the input impedance of the resonant cavity in a three-point type working mode provided by one or more embodiments of this specification;

[0046] Figure 4 An equivalent circuit diagram of a differential mode resonant cavity provided for one or more embodiments of this specification;

[0047] Figure 5 An equivalent circuit diagram of a common mode resonant cavity provided for one or more embodiments of this specification;

[0048] Figure 6 A circuit diagram of a frequency adjustment module provided for one or more embodiments of this specification;

[0049] Figure 7A frequency adjustment range provided for one or more embodiments of this specification;

[0050] Figure 8 A circuit diagram of an inverse class-F voltage-controlled oscillator provided for one or more embodiments of this specification;

[0051] Fig. 9 A schematic diagram of a DM (differential mode) path of a frequency adjustment module in an inverse class F mode provided by one or more embodiments of this specification;

[0052] Fig.10 A schematic diagram of a CM (common mode) path of a frequency adjustment module in an inverse class F mode provided by one or more embodiments of this specification;

[0053] Fig.11 A circuit diagram of a three-point voltage-controlled oscillator provided for one or more embodiments of this specification;

[0054] Fig.12 An equivalent circuit diagram of a frequency adjustment module in a three-point mode provided in one or more embodiments of this specification. DETAILED DESCRIPTION

[0055] In order to enable those skilled in the art to better understand the technical solutions in one or more embodiments of this specification, the following will be combined with the drawings in one or more embodiments of this specification to clearly and completely describe the technical solutions in one or more embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on one or more embodiments of this specification, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this document.

[0056] The embodiment of the present application provides a voltage-controlled oscillator of inverse class F and three-point dual-mode operation, the oscillator is in single-core mode, such as Figure 1 As shown, it includes: an active negative resistance transistor pair, a passive inductor group, a frequency adjustment module, a first switch group and a second switch group;

[0057] The passive inductor group and the frequency adjustment module form a passive resonant cavity;

[0058] When the first switch group is closed and the second switch group is open, the active negative resistance transistor pair is connected to the passive resonant cavity in a differential form to form an inverse class F oscillator; and

[0059] When the first switch group is disconnected and the second switch group is closed, the active negative resistance transistor pair is connected to the passive resonant cavity in a common-mode parallel form to form a three-point oscillator.

[0060] Among them, the active negative resistance transistor pair is two NMOS tubes N <0> and N <1> . The passive inductor group includes two mutually coupled differential inductors (La and Lb) and a common-mode inductor (LT). One end of the common-mode inductor is connected to the center of the connection of the two differential inductors. The first switch group includes: switch SWA1, switch SWA2 and switch SWA3. The second switch group includes: switch SWB1, switch SWB2, switch SWB3 and switch SWB4. It should be noted that the above embodiment is a preferred scheme, and those skilled in the art can select other combinations of switch groups according to actual conditions to achieve inverse F class and three-point switching.

[0061] Inverse F-type and three-point type are categories of voltage-controlled oscillators. Among them, the inverse F-type oscillator improves phase noise by introducing the second harmonic. Specifically, in the inverse F-type working mode, the resonant cavity provides both the fundamental impedance peak and the second harmonic impedance peak. The impedance peak provided by the second harmonic makes the voltage waveform at the drain of the transistor close to a half-sine wave, thereby reducing phase noise. A three-point oscillator refers to a capacitor or inductor (feedback part) whose three ends are connected to the three poles of the transistor respectively. Among them, the input impedance of the resonant cavity in the inverse F-type working mode is as follows Figure 2 As shown, the input impedance of the resonant cavity in the three-point working mode is as follows: Figure 3 shown.

[0062] In the embodiment of the present application, the differential inductors La and Lb have an inductance value of L. The inductance value of the common mode inductor LT is LH. There is a coupling coefficient k between the differential inductors, and the common mode inductor LT is connected at the center. When the circuit is working, in the differential mode path, Figure 4 As shown, the common-mode inductance LT is neglected, and the equivalent inductance of the resonant cavity is 2(1+k)L; in the common-mode path, Figure 5 As shown, the common-mode inductor LT is connected to the resonant cavity, but the magnetic fluxes generated by the differential inductors cancel each other out, reducing the effective inductance value. At this time, the equivalent inductance value of the resonant cavity is (1-k)L / 2+LH.

[0063] In the embodiments of the present application, Figure 6 As shown, the frequency adjustment module includes a group of variable capacitors and multiple groups of digitally controlled capacitor arrays; the digitally controlled capacitor arrays are connected in parallel; the variable capacitors are connected in series and then connected in parallel with the digitally controlled capacitor arrays.

[0064] Specifically, the selection signal SW is changed using <0> -SW <n>, the size and quantity of the digital controlled capacitors connected to the passive inductor group can be adjusted. By adjusting the control voltage V C , the variable capacitor Cvar can be adjusted <0> , Cvar <1> The effective capacitance size is adjusted to achieve continuous and precise control of the capacitance value of the resonant cavity. Through the coordinated adjustment between the variable capacitor and the digitally controlled capacitor array, the impedance peak size and its corresponding frequency of the passive topology module input impedance can be accurately changed, thereby achieving the adjustment of the output frequency of the voltage-controlled oscillator.

[0065] It should be noted that each group of digitally controlled capacitor arrays includes: 1 inverter INV <n>, 2 switching transistors (Nn <0> and Nn <1> )、2 capacitors (Cn <0> and Cn <1> ), 2 resistors (Rn <0> and Rn <1> ). b <0> -V b <n>, Vc is the DC bias point.

[0066] Preferably, the capacitance value of the passive inductor group is adjusted based on the above frequency adjustment module to achieve the following Figure 7 The frequency coverage shown is Figure 7 It can be seen that the operating frequencies of the inverse class-F oscillator and the three-point oscillator have an overlapping range, so when switching the oscillator operating mode, seamless full-range frequency adjustment can be achieved.

[0067] In the embodiments of the present application, Figure 8-Figure 11 A detailed description of the working mode of the voltage controlled oscillator:

[0068] like Figure 8 As shown, when SWA1-SWA3 are connected and SWB1-SWB4 are disconnected, the voltage-controlled oscillator is in an inverse F-class working state. At this time, one end of the switch SWA1 is respectively connected to one end of the differential inductor group (La and Lb) and the drain of an NMOS tube in the active negative resistance transistor pair, and the other end is connected to the gate of an NMOS tube in the active negative resistance transistor pair. One end of the switch SWA2 is respectively connected to the other end of the differential inductor group and the drain of an NMOS tube in the active negative resistance transistor pair, and the other end is connected to the gate of the other NMOS tube in the active negative resistance transistor pair. One end of the switch SWA3 is connected to one end of the common-mode inductor, and the other end is connected to the power supply. At this time, the baseband signal is transmitted in the DM (differential mode) path as shown in FIG. Fig. 9 As shown, the second harmonic signal is transmitted through the CM (common mode) path as shown in Fig.10 shown.

[0069] In the inverse F-class working state, the resonant cavity provides the fundamental impedance peak and the second harmonic impedance peak. Through the second harmonic frequency modulation, a stronger second harmonic impedance peak can be generated at the drain node of the negative resistance transistor, so that the second harmonic component of the transistor drain voltage is enhanced, and the generated oscillating voltage is closer to a half-sine signal, reducing the phase noise of the circuit.

[0070] like Fig.11 As shown, when SWA1-SWA3 are disconnected and SWB1-SWB4 are connected, the voltage-controlled oscillator is in a three-point working state, at which the two ends of the switch SWB1 are respectively connected to the gates of the two NMOS tubes in the active negative resistance transistor pair; one end of the switch SWB2 is respectively connected to one end of the differential inductor group and the drain of one NMOS tube in the active negative resistance transistor pair, and the other end is respectively connected to the other end of the differential inductor group and the drain of another NMOS tube in the active negative resistance transistor pair; one end of the switch SWB3 is respectively connected to one end of the switch SWB2, one end of the differential inductor group and the drain of one NMOS tube in the active negative resistance transistor pair, and the other end is connected to the power supply; one end of the switch SWB4 is respectively connected to one end of the switch SWB1 and the gate of another NMOS tube in the active negative resistance transistor pair, and the other end is connected to one end of the common-mode inductor. At the same time, the passive inductor group, the first regulating submodule and the second regulating submodule enable inductance or capacitance to exist between any two poles of each of the two NMOS tubes. The corresponding frequency adjustment module works in CM (common mode) mode. At this time, the baseband signal is transmitted through the CM (common mode) path. Fig.10 shown.

[0071] In the three-point working state, the resonant cavity only provides the fundamental impedance peak. At this time, the negative resistance transistor is in a common-mode parallel state, the effective transconductance is improved, and it can provide greater gain, simplify the oscillation start-up conditions and enhance the output swing. In addition, the working frequency bands of the two modes overlap with each other, and ultimately form a wider frequency band together, achieving a wider frequency adjustment range.

[0072] It should be noted that in order to highlight the three-point oscillation circuit structure, Fig.11 For NMOS tube (N <0> and N <1> ) are combined. In the three-point oscillator, the DC bias point (Vb <0> -Vb <n>, Vc) is regarded as grounding. At this time, the equivalent circuit diagram of the frequency regulation module is as follows Fig.12 As shown. Among them, the ground point is the DC bias point Vb <0> -Vb <n>, Vc, and the rest of the components remain unchanged.

[0073] Preferably, the NMOS tube circuit design is based on FDSOI technology. Based on the above technology, the substrate of the NMOS tube can be externally connected to a bias voltage V FD By changing the external bias voltage V FD , the threshold voltage of the active negative resistance transistor pair can be adjusted, thereby regulating the operating response speed and power consumption of the voltage-controlled oscillator circuit.

[0074] In summary, the present application realizes two different operating modes in the case of a single core by switching the connection method between the resonant cavity and the negative resistance transistor. When working in the inverse class F mode, the phase noise of the circuit is reduced by the second harmonic tuning technology. When working in the three-point mode, the parallel enhancement of the negative resistance transistor simplifies the oscillation startup and enhances the output swing. Compared with the multi-core multi-mode VCO, the circuit structure of the present application is simpler, and the single-core operation mode avoids the mismatch between different oscillation cores, which causes the impedance peak to deviate from the preset value. Compared with the four-mode four-core VCO implemented by mode splitting technology, the present application only needs to work one active negative resistance core at the same time, the circuit power consumption is lower, and fewer mode switching switches are required.

[0075] It should also be noted that the term "includes", "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the existence of other identical elements in the process, method, commodity or device including the element.

[0076] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0077] The above description is only an embodiment of this document and is not intended to limit this document. For those skilled in the art, this document may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this document should be included in the scope of the claims of this document.< / n> < / n> < / n> < / n> < / n>

Claims

1. A voltage controlled oscillator with inverse class F and three-point dual-mode operation, characterized in that: The oscillator is a single-core oscillator, comprising: an active negative resistance transistor pair, a passive inductor group, a frequency adjustment module, a first switch group and a second switch group; The passive inductor group and the frequency adjustment module form a passive resonant cavity; When the first switch group is closed and the second switch group is open, the active negative resistance transistor pair is connected to the passive resonant cavity in a differential form to form an inverse class F oscillator; and When the first switch group is disconnected and the second switch group is closed, the active negative resistance transistor pair is connected to the passive resonant cavity in a common-mode parallel form to form a three-point oscillator.

2. The voltage controlled oscillator according to claim 1, characterized in that: The frequency adjustment module is used to adjust the capacitance value connected to the passive resonant cavity.

3. The voltage controlled oscillator according to claim 2, characterized in that: The frequency adjustment module includes a group of variable capacitors and multiple groups of digitally controlled capacitor arrays; The digitally controlled capacitor arrays are connected in parallel; and The variable capacitors are connected in series and then in parallel with the digitally controlled capacitor array.

4. The voltage controlled oscillator according to claim 2, characterized in that: The active negative resistance transistor pair includes two NMOS transistors; The frequency adjustment module includes a first adjustment submodule and a second adjustment submodule; Two ends of the first regulating submodule are respectively connected to two ends of the passive inductor group; and Two ends of the second regulating submodule are respectively connected to the gates of the two NMOS tubes.

5. The voltage controlled oscillator according to claim 2, characterized in that: When the working mode is three-point, the passive inductor group, the first regulating submodule and the second regulating submodule enable an inductor or a capacitor to exist between any two poles of each of the two NMOS tubes.

6. The voltage controlled oscillator according to claim 1, characterized in that: The active negative resistance transistor pair includes two NMOS transistors; and The preparation process of the NMOS tube is a fully depleted silicon-on-insulator process.

7. The voltage controlled oscillator according to claim 6, characterized in that: The NMOS tube is biased by adjusting the substrate external bias voltage V FD , so as to adjust the threshold voltage of the NMOS tube.

8. The voltage controlled oscillator according to claim 1, characterized in that: The passive inductor group includes two mutually coupled differential inductors and a common mode inductor; and The center of the connection between the two differential inductors is connected to one end of the common mode inductor.

9. The voltage controlled oscillator according to claim 1, characterized in that: The active negative resistance transistor pair includes two NMOS transistors; The passive inductor group includes a differential inductor group and a common mode inductor; The first switch group includes: switch SWA1, switch SWA2 and switch SWA3; One end of the switch SWA1 is respectively connected to one end of the differential inductor group and the drain of one NMOS transistor in the active negative resistance transistor pair, and the other end is connected to the gate of one NMOS transistor in the active negative resistance transistor pair; One end of the switch SWA2 is respectively connected to the other end of the differential inductor group and the drain of one NMOS transistor in the active negative resistance transistor pair, and the other end is connected to the gate of the other NMOS transistor in the active negative resistance transistor pair; and One end of the switch SWA3 is connected to one end of the common mode inductor, and the other end is connected to a power supply.

10. The voltage controlled oscillator according to claim 1, characterized in that: The active negative resistance transistor pair includes two NMOS transistors; The passive inductor group includes a differential inductor group and a common mode inductor; The second switch group includes: switch SWB1, switch SWB2, switch SWB3 and switch SWB4; Two ends of the switch SWB1 are respectively connected to the gates of two NMOS transistors in the active negative resistance transistor pair; One end of the switch SWB2 is respectively connected to one end of the differential inductor group and the drain of one NMOS transistor in the active negative resistance transistor pair, and the other end is respectively connected to the other end of the differential inductor group and the drain of the other NMOS transistor in the active negative resistance transistor pair; One end of the switch SWB3 is respectively connected to one end of the switch SWB2, one end of the differential inductor group and the drain of an NMOS transistor in the active negative resistance transistor pair, and the other end is connected to a power supply; and One end of the switch SWB4 is respectively connected to one end of the switch SWB1 and the gate of the other NMOS transistor in the active negative resistance transistor pair, and the other end is connected to one end of the common mode inductor.

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