Printed circuit board and display module
By designing the overlap of the second binding area of the printed circuit board and the circuit main body area, especially the second main area and the panel wiring area, the problem of limited wiring space of the printed circuit board is solved, and more efficient space utilization and circuit layout are achieved.
Patent Information
- Application Number
- CN202510110024.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2025-05-02
AI Technical Summary
Due to the increase and optimization of display product functions, the requirements for the battery life of the whole machine are getting higher and higher, the battery design capacity and size are getting bigger, and the utilization of the internal space of the whole machine is becoming increasingly stringent, resulting in serious limitations in the wiring space of the printed circuit board connected to the display panel.
A printed circuit board is designed, including a second binding area and a circuit main body area. The circuit main body is divided into a first main body area and a second main body area. The second main body area partially overlaps the panel wiring area in the display panel to reduce the space occupied by the printed circuit board in a certain direction.
Effectively utilize space to meet the circuit layout space requirements of printed circuit boards, reduce the space occupied by printed circuit boards, and thus improve the space utilization of the entire machine.
Smart Images

Figure CN119922826A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a printed circuit board and a display module. Background Art
[0002] With the rapid iteration of display products, higher and higher requirements are being placed on their thinness and lightness. At the same time, due to the increase and optimization of display product functions, the requirements for the battery life of the whole machine are getting higher and higher, the battery design capacity and size are getting larger and larger, and the utilization of the internal space of the whole machine is becoming more and more stringent. Due to the limitation of the whole machine space, the wiring space of the printed circuit board (FPC) connected to the display panel is severely limited. Summary of the invention
[0003] In order to solve at least one technical problem in the above-mentioned prior art, an embodiment of the present disclosure provides a printed circuit board and a display module.
[0004] The technical solutions provided by the embodiments of the present disclosure are as follows:
[0005] In a first aspect, an embodiment of the present disclosure provides a printed circuit board for connecting to a display panel, wherein the display panel includes a display area, a first binding area located on one side of the display area, and a panel wiring area connected between the display area and the first binding area; the printed circuit board includes:
[0006] a second binding area for binding connection with the first binding area; and
[0007] A circuit main body area having a circuit arranged therein, the circuit main body area comprising a first main body area and a second main body area;
[0008] Wherein, in a first direction pointing from the first binding area to the display area, the second binding area has a first side and a second side relative to each other, the first side is located on a side of the second side away from the display area; the first main body area is located on the first side of the second binding area; and the second main body area is located on the second side of the second binding area, so as to at least partially overlap with the panel routing area.
[0009] Exemplarily, the second binding region includes:
[0010] A substrate layer, comprising a first surface and a second surface disposed opposite to each other;
[0011] A bonding pad layer, provided on the first surface of the substrate layer;
[0012] A conductive pattern layer is arranged on the second surface of the substrate layer, the conductive pattern layer is connected to the circuit in the second main body area, and at least a part of the pattern of the conductive pattern layer is configured to conduct the circuit of the second main body area with at least one of the pad layer and the first main body area;
[0013] The insulating layer covers a side of the conductive pattern away from the substrate layer.
[0014] Exemplarily, the pad layer includes a gold finger area, which includes multiple pads and gaps between the pads; the conductive pattern layer includes a first area, which is constructed so that the orthographic projection of the gold finger area on the substrate layer covers the orthographic projection of the gold finger area on the substrate layer, and the first area is a solid pattern or a grid pattern.
[0015] Exemplarily, the pad layer includes a gold finger area, the gold finger area includes multiple pads and gaps between the pads; the conductive pattern layer includes multiple routing patterns; wherein, for at least part of the pads, the orthographic projections of one pad and one routing pattern on the substrate layer overlap.
[0016] Exemplarily, in at least a portion of the routing patterns, the routing patterns completely overlap with the orthographic projection patterns of the corresponding pads on the substrate layer.
[0017] Exemplarily, the plurality of pads include: a plurality of non-virtual pads and a plurality of virtual pads; the plurality of routing patterns include a first routing and a second routing; each of the first routings is correspondingly provided with a non-virtual pad; wherein,
[0018] One of the second routing lines corresponds to one of the virtual pad settings; or,
[0019] An orthographic projection of one of the second routing lines on the substrate layer covers the orthographic projections of at least two of the virtual pads on the substrate layer.
[0020] Exemplarily, at least a portion of the routing pattern is configured as a non-signal line and grounded.
[0021] Exemplarily, in at least some of the routing patterns, two adjacent routing patterns are independent of each other so that one routing pattern serves as a separate signal line; and / or, in at least some of the routing patterns, at least two routing patterns are arranged in parallel to serve together as a signal line.
[0022] Exemplarily, the printed circuit board further includes:
[0023] A connector and a connection area, wherein the connection area and the connector are located on a side of the first main area away from the second binding area, and the connection area is located between the connection area and the first main area, and the connection area is constructed to have a width in a second direction that is smaller than a width of the first main area in the second direction, and the second direction is perpendicular to the first direction and parallel to the display panel.
[0024] Exemplarily, a driver chip is provided on the panel wiring area, and an avoidance groove for avoiding the driver chip is provided on the second main body area.
[0025] In a second aspect, the present disclosure also provides a display module, including:
[0026] The display panel comprises a display area, a first binding area located at one side of the display area, and a panel wiring area located between the display area and the first binding area;
[0027] As for the printed circuit board as described above, the second binding area is bound and connected to the first binding area, and the second main body area at least partially overlaps with the panel routing area.
[0028] The beneficial effects brought by the embodiments of the present disclosure are as follows:
[0029] In the above scheme, the printed circuit board includes a second binding area and a circuit main area, wherein the circuit main area is divided into at least two parts, namely a first main area and a second main area, and in the first direction from the first binding area of the display panel to the display area, the first main area and the second main area are respectively located on opposite sides of the second binding area, and when the second binding area of the printed circuit board is bound and connected with the first binding area of the display panel, the second main area can overlap with the panel wiring area between the first binding area and the bending area of the display panel. In this way, the second main area partially overlaps with the panel wiring area, and only the first main area is arranged on the side of the first binding area away from the bending area, which can reduce the occupied space of the printed circuit board in the first direction, and because both the first main area and the second main area can be used to arrange the circuit, the circuit layout space requirement of the printed circuit board can also be met, thereby effectively utilizing the space. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 A schematic diagram showing the structure of a display panel in some embodiments of the present disclosure;
[0031] Figure 2 A schematic diagram showing the structure of a printed circuit board in some embodiments of the present disclosure;
[0032] Figure 3 A schematic diagram showing the structure of a display module in some embodiments of the present disclosure;
[0033] Figure 4 One of the schematic cross-sectional structures of the second binding region of the printed circuit board in some embodiments of the present disclosure is shown;
[0034] Figure 5 A schematic diagram showing a layout of a binding soldering layer in a second binding region of a printed circuit board in some embodiments of the present disclosure;
[0035] Figure 6 A schematic diagram showing the layout of a conductive pattern layer in a second binding region of a printed circuit board in some embodiments of the present disclosure;
[0036] Figure 7 A second schematic diagram showing a cross-sectional structure of a second binding region of a printed circuit board in some embodiments of the present disclosure;
[0037] Figure 8 A third schematic diagram showing the cross-sectional structure of the second binding region of a printed circuit board in some embodiments of the present disclosure. DETAILED DESCRIPTION
[0038] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0039] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0040] The features such as "parallel", "perpendicular", and "same" used in the embodiments of the present disclosure include the features such as "parallel", "perpendicular", and "same" in a strict sense, as well as the cases where "approximately parallel", "approximately perpendicular", "approximately the same", etc. include certain tolerances, taking into account the tolerances associated with the measurement of specific quantities (e.g., the limitations of the measurement system), and represent the acceptable deviation range for a specific value determined by ordinary technicians in the field. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of the value.
[0041] In addition, in this document, unless otherwise defined, the terms "substantially", "substantially", "approximately" and "about" are used to describe and explain small changes. When used with an event or situation, these terms can cover situations where the event or situation occurs exactly, and can also cover situations where the event or situation occurs approximately. For example, when used with a numerical value, these terms can include a range of variation of less than or equal to 10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, less than or equal to ±0.05%. The term "substantially coplanar" can refer to two surfaces being arranged along the same plane in the micrometer range, for example, arranged along the same plane within 40μm, 30μm, 20μm, 10μm or 1μm.
[0042] like Figure 1 As shown, the display panel 100 includes a display area AA, a first binding area B1 located on one side of the display area AA, and a panel wiring area B2 connected between the display area AA and the first binding area B1. The panel wiring area B2 may include: a bending area B21, and an extension area B22 located between the bending area B21 and the first binding area B1. When the bending area B21 is in a bent state, the first binding area B1 and the extension area B22 may be attached to the back of the display panel 100.
[0043] like Figure 2 and Figure 3 As shown, the embodiment of the present disclosure provides a printed circuit board 200 for connecting with the display panel 100; the printed circuit board 200 includes:
[0044] A second binding area 210 for binding and connecting with the first binding area B1; and
[0045] A circuit main body area 220 in which a circuit is arranged, wherein the circuit main body area 220 includes a first main body area 221 and a second main body area 222;
[0046] In which, in the first direction Y pointing from the first binding area B1 to the display area AA, the second binding area 210 has a first side and a second side relative to each other, and the first side is located on the side of the second side away from the display area AA; the first main body area 221 is located on the first side of the second binding area 210; the second main body area 222 is located on the second side of the second binding area 210, so as to at least partially overlap with the panel routing area B2.
[0047] In the above scheme, the printed circuit board 200 includes a second binding area 210 and a circuit main area 220, and the circuit main area 220 is divided into at least two parts, namely the first main area 221 and the second main area 222. In the first direction from the first binding area B1 to the display area AA, the first main area 221 and the second main area 222 are respectively located on the opposite sides of the second binding area 210, and the second binding area 210 is bound and connected to the first binding area B1. The second main area 222 can overlap with the panel routing area B2 in the display panel 100.
[0048] In this way, the second main area 222 partially overlaps with the panel routing area B2, and only the first main area 221 is arranged on the side of the first binding area B1 away from the bending area B21, which can reduce the space occupied by the printed circuit board 200 in the first direction. Moreover, since both the first main area 221 and the second main area 222 can be used to arrange circuits, the circuit layout space requirements of the printed circuit board 200 can also be met, thereby effectively utilizing the space.
[0049] It should be noted that the second main area 222 at least partially overlaps with the panel wiring area B2, and specifically, the second main area 222 may overlap with the extension area B22. The second main area 222 may be fixedly connected with the extension area B22 by gluing or the like.
[0050] like Figure 2 and Figure 3 As shown, in some embodiments, a driver chip 110 is disposed on the panel wiring area B2 , and an avoidance groove 230 for avoiding the driver chip 110 is disposed on the second main body area 222 .
[0051] like Figure 2 and Figure 3As shown, in some embodiments, the printed circuit board 200 further includes: a connector 240 and a connection area 250, the connection area 250 and the connector 240 are located on a side of the first main body area 221 away from the second binding area 210, and the connection area 250 is located between the connection area 250 and the first main body area 221, and the connection area 250 is constructed to have a width in a second direction X that is smaller than a width of the first main body area 221 in the second direction X, and the second direction X is perpendicular to the first direction Y and parallel to the display panel 100.
[0052] The connector 240 is used to connect multiple key components to ensure that the display panel 100 can work properly. For example, the connector 240 can be connected to a controller, a power module, a signal source, a touch screen controller, an audio module, and other external devices such as a speaker or a video input device.
[0053] The controller can be connected to the main controller or driver chip 110 of the display panel 100, and is responsible for receiving image signals and controlling the display effect of the panel; the power module can provide the necessary voltage and current for the display panel 100; the signal source can be connected to an external signal source (such as a video processor, a graphics processing unit or other electronic devices) to receive input video signals; the touch screen controller is used to realize touch input processing; the audio module is used for transmitting audio signals.
[0054] The connection area 250 is a "neck area" on the printed circuit board 200, which is an elongated area whose width in the second direction X is smaller than the width of the circuit main area 220. The connection area 250 mainly connects the connector 240 and the circuit main area 220 to realize signal transmission between the connector 240 and the circuit main area 220, including power signals, data lines, control signals, etc.
[0055] The design of the neck region helps to effectively arrange circuits in a limited space, which can save space and optimize the overall layout. The neck region can use a flexible printed circuit (FPC) or other flexible materials to provide greater flexibility and adaptability. The neck region can also assume a certain heat dissipation function to help dissipate heat to maintain the normal operating temperature of the display panel 100.
[0056] It should be noted that in the printed circuit board 200 in the embodiment of the present disclosure, the circuit main area 220 is divided into the first main area 221 and the second main area 222, and the first main area 221 and the second main area 222 are respectively arranged with circuits, and the circuit structure arranged in each main area can be laid out according to factors such as key components to be connected by the connector 240. The present disclosure does not limit this.
[0057] like Figure 4 As shown, the second binding area 210 includes a gold finger area, which includes a plurality of pads 211 and gaps between the pads 211. The gold finger area is used to perform binding connection with the first binding area B1. The arrangement shape of the plurality of pads 211 in the gold finger area is similar to a finger, and can be made of metal to ensure good conductivity.
[0058] Since circuits are arranged on the first main body area 221 and the second main body area 222 respectively, the circuit on the first main body area 221 can be connected to at least part of the pad 211, the circuit on the second main body area 222 can be connected to at least part of the pad 211, and the circuit on the first main body area 221 and the circuit on the second main body area 222 can be connected or not connected.
[0059] Specifically, in some embodiments, Figure 4 As shown, the second binding area 210 includes:
[0060] The substrate layer 212 includes a first surface and a second surface disposed opposite to each other;
[0061] A bonding pad layer 213 is provided on the first surface of the substrate layer 212;
[0062] A conductive pattern layer 214 is arranged on the second surface of the substrate layer 212, the conductive pattern layer 214 is connected to the circuit in the second main body area 222, and at least a part of the pattern of the conductive pattern layer 214 is configured to conduct the circuit of the second main body area 222 with at least one of the pad 211 layer and the first main body area 221;
[0063] The insulating layer 215 covers a side of the conductive pattern away from the substrate layer 212 .
[0064] In the above solution, the second binding area 210 is made into a double-layer board, wherein the substrate layer 212 and the pad 211 layer can be regarded as the first layer of the circuit board, and the conductive pattern layer 214 and the insulating layer 215 can be regarded as the second layer of the circuit board. The circuit on the first main body area 221 can be directly made and connected with the pad 211 in the same layer, and the circuit on the second main body area 222 can be electrically connected with the pad 211 or the circuit on the first main body area 221 through the conductive pattern layer 214 and the via hole on the substrate layer 212.
[0065] In the related art, when the display panel 100 is bound to the printed circuit board 200, the binding pressure head applies a downward pressure force to the printed circuit board 200, the conductive particles contained in the anisotropic conductive glue (ACF) between the display panel 100 and the printed circuit board 200 are deformed, and the insulating layer 215 in the force direction is broken, thereby achieving conductivity.
[0066] In the related art, the binding area on the printed circuit board 200 is a single-layer board, one side of the binding area is a flat insulating surface, and the other side is a binding pad 211. When the binding pressure head applies a downward force to the flat insulating surface, the force is evenly applied and the anisotropic conductive adhesive has good conduction.
[0067] In the printed circuit board 200 provided in the embodiment of the present disclosure, when the second binding area 210 is a double-layer board, the pressing area of the binding head is the conductive pattern layer 214 and the insulating layer 215, and the yield of the binding needs to be ensured and defects such as cold solder joints do not occur.
[0068] In order to ensure the binding yield, in some exemplary embodiments, Figure 4 As shown, the pad 211 layer includes a gold finger area, and the gold finger area includes multiple pads 211 and gaps between the pads 211; the conductive pattern layer 214 includes a first area 2141, and the first area 2141 is constructed to cover the orthographic projection of the gold finger area on the substrate layer 212 on the substrate layer 212, wherein the first area 2141 is a solid pattern or a grid pattern.
[0069] In the above scheme, while the conductive pattern layer 214 is used to ensure that the circuit of the second main area 222 is connected to the pad 211 or the first main area 221, the first area 2141 of the conductive pattern layer 214 corresponding to the gold finger area is designed to be a solid pattern or a grid pattern that covers the entire gold finger area. In other words, the first area 2141 can cover the pad 211 and the gap between the pads 211 in its entirety. In this way, the conductive pattern layer 214 can remain flat at the position corresponding to the gold finger area, ensuring the flatness of the contact area of the binding head, thereby ensuring the binding performance.
[0070] Specifically, Figure 5 FIG. 2 is a schematic diagram showing a pattern of the bonding pad layer 213 of the second bonding area 210 in an embodiment. Figure 6 FIG. 1 is a schematic diagram of a pattern of the conductive pattern layer 214 of the second binding region 210 in an embodiment.
[0071] like Figure 5 and Figure 6As shown, in the gold finger area corresponding to the plurality of pads 211 on the second binding area 210 , the first area 2141 of the conductive pattern layer 214 is a solid pattern that entirely covers the gold finger area.
[0072] In the above embodiment, the electrical conduction between the first main area 221 and the second main area 222 can be achieved through the pad 211. However, since the first main area 221 is connected to the connector 240, the signal transmitted from the connector 240 needs to first pass through the anti-static (ESD) protection, filtering, voltage stabilization and other devices in the circuit of the first main area 221, and then connect to the pad 211 of the gold finger area. If the first area 2141 of the area corresponding to the gold finger area is a solid pattern or a grid pattern covering the entire gold finger area, the first area 2141 can only transmit a single signal. Therefore, only a single signal of the first main area 221 can be transmitted to the second main area 222 through the gold finger area. Therefore, the circuit that can be arranged on the second main area 222 is limited, resulting in a low utilization rate of the second main area 222.
[0073] Therefore, on the basis of ensuring good binding performance between the display panel 100 and the printed circuit board 200, in order to improve the space utilization of the printed circuit board 200, in other embodiments of the present disclosure, as shown in FIG. Figure 7 As shown, the pad 211 layer includes a gold finger area, the gold finger area includes multiple pads 211 and gaps between the pads 211; the conductive pattern layer 214 includes multiple routing patterns 2142; wherein, in at least part of the pads 211, the orthographic projections of one pad 211 and one routing pattern 2142 on the substrate layer 212 overlap.
[0074] In the above scheme, a plurality of routing patterns 2142 may be arranged in the conductive pattern layer 214 corresponding to the gold finger area. In at least part of the pads 211, each pad 211 is arranged corresponding to a routing pattern 2142. Different signal lines in the first main area 221 may be connected to different pads 211, and the routing patterns 2142 corresponding to the pads 211 may also transmit corresponding signals. In this way, different signals may be transmitted on at least part of the routing patterns 2142, so that the circuit layout on the second main area 222 is more flexible, thereby improving the utilization rate of the second main area 222 and improving the space utilization rate of the printed circuit board 200.
[0075] Moreover, in at least part of the solder pads 211, a solder pad 211 overlaps with a positive projection of a wiring pattern 2142 on the substrate layer 212. When the first binding area B1 is bound to the second binding area 210, the binding pressure head presses down the insulating layer 215. Since the wiring pattern 2142 and the solder pads 211 are arranged in correspondence, each solder pad 211 in the gold finger area is evenly stressed, thus avoiding problems such as cold soldering.
[0076] In some exemplary embodiments, each of the routing patterns 2142 completely overlaps with the orthographic projection pattern of the corresponding pad 211 on the substrate layer 212. For example, the pad 211 may be a parallelogram pad 211, and in order to ensure that the binding indenter can crush the conductive particles and achieve good conduction, the routing pattern 2142 is a routing pattern 2142 with the same shape and size as the corresponding pad 211.
[0077] For example, the width of the pad 211 can be designed to be 0.06 mm, the actual width can be 0.05 mm, the minimum line width of the routing pattern 2142 can be 0.05 mm, and the safety spacing between two adjacent routing patterns 2142 is 0.05 mm. The conductive pattern layer 214 can be made of conductive materials such as metal copper, and the pattern of the routing pattern 2142 can be obtained through a patterning process.
[0078] like Figure 8 As shown, in the design of the printed circuit board 200, some pads 211 may not be connected to any other part of the circuit and do not participate in the normal operation of the circuit, but may be connected in the case of testing, debugging or future expansion. These pads 211 may be referred to as dummy pads 211A. The pads 211 that participate in the normal operation of the circuit may be referred to as non-dummy pads 211B.
[0079] In some embodiments of the present disclosure, the plurality of pads 211 may all be non-virtual pads 211B. That is, each pad 211 may be used to transmit a corresponding circuit signal on the first main body area 221 and / or the second main body area 222, and a routing pattern 2142 is correspondingly provided on each pad 211 to ensure the binding performance of each non-virtual pad 211B.
[0080] In other embodiments, the plurality of pads 211 may include a plurality of virtual pads 211A and a plurality of non-virtual pads 211B. The plurality of routing patterns 2142 may include a first routing 21421 and a second routing 21422, each non-virtual pad 211B is provided with a corresponding first routing 21421, and one second routing 21422 is provided with a corresponding virtual pad 211A, so as to ensure the binding performance of each pad 211.
[0081] For the non-virtual pad 211B, since it may not be connected to a circuit, the binding performance requirement for the non-virtual pad 211B is relatively low. Therefore, in other embodiments, such as Figure 8 As shown, the orthographic projection of one of the second traces 21422 on the substrate layer 212 covers the orthographic projections of at least two of the virtual pads 211A on the substrate layer 212 .
[0082] In this way, for some signal routings with higher impedance requirements, since the binding requirements of the virtual pad 211A are lower, the second routing 21422 can be arranged in the area corresponding to the virtual pad 211A. Since the second routing 21422 covers several of the virtual pads 211A, the line width of the second routing 21422 is relatively large, and the impedance of the second routing 21422 can be reduced without affecting the binding performance.
[0083] Furthermore, in some exemplary embodiments, in at least some of the routing patterns 2142 , two adjacent routing patterns 2142 are independent of each other, so that one routing pattern 2142 serves as a separate signal line.
[0084] In addition, in some other exemplary embodiments, at least two of the routing patterns 2142 are connected in parallel in at least some of the routing patterns 2142 to serve as a signal line. In this way, for some signal routing lines with higher impedance requirements, at least two of the routing patterns 2142 can be connected in parallel to serve as a signal line, thereby achieving the purpose of reducing the signal line impedance without affecting the binding performance.
[0085] The total number of signal lines transmitting signals between the second main body area 222 and the second binding area 210 is closely related to the number of the pads 211. When the number of pads 211 is greater than the total number of signal lines transmitting signals between the second main body area 222 and the second binding area 210, in order to ensure the binding performance, the routing patterns 2142 are still set at the positions corresponding to the pads 211. At this time, at least part of the routing patterns 2142 is used as a non-signal line and does not participate in signal transmission. At this time, the part of the routing patterns 2142 can be grounded.
[0086] In addition, if Figure 2 and Figure 3As shown, the embodiment of the present disclosure further provides a display module, including: a display panel 100 and a printed circuit board 200 provided by the embodiment of the present disclosure, the display panel 100 includes a display area AA, a first binding area B1 located on one side of the display area AA, and a panel routing area B2 located between the display area AA and the first binding area B1; the second binding area 210 is bound and connected to the first binding area B1, and the second main body area 222 at least partially overlaps with the panel routing area B2.
[0087] The display module may include but is not limited to devices with display functions such as smart phones, monitors, laptops, tablet computers, electronic photo frames, driving recorders, smart wearable devices, etc. Other essential components of the display module should be understood by ordinary technicians in the field, and will not be repeated here, nor should they be used as limitations on the present disclosure.
[0088] In addition, since the principle of solving the problem by the display module is similar to the principle of solving the problem by the above-mentioned printed circuit board 200, the embodiment of the display module provided in the embodiment of the present disclosure can refer to the embodiment of the above-mentioned printed circuit board 200 provided in the embodiment of the present disclosure, and will not be repeated here.
[0089] There are a few points to note:
[0090] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.
[0091] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.
[0092] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.
[0093] The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present disclosure shall be based on the protection scope of the claims.
Claims
1. A printed circuit board, used for connecting to a display panel, wherein the display panel comprises a display area, a first binding area located on one side of the display area, and a panel wiring area connected between the display area and the first binding area; characterized in that: The printed circuit board comprises: a second binding area for binding connection with the first binding area; and A circuit main body area having a circuit arranged therein, the circuit main body area comprising a first main body area and a second main body area; Wherein, in a first direction pointing from the first binding area to the display area, the second binding area has a first side and a second side relative to each other, the first side is located on a side of the second side away from the display area; the first main body area is located on the first side of the second binding area; and the second main body area is located on the second side of the second binding area, so as to at least partially overlap with the panel routing area.
2. The printed circuit board according to claim 1, characterized in that: The second binding area includes: A substrate layer, comprising a first surface and a second surface disposed opposite to each other; A bonding pad layer, provided on the first surface of the substrate layer; A conductive pattern layer is arranged on the second surface of the substrate layer, the conductive pattern layer is connected to the circuit in the second main body area, and at least a part of the pattern of the conductive pattern layer is configured to conduct the circuit of the second main body area with at least one of the pad layer and the first main body area; The insulating layer covers a side of the conductive pattern away from the substrate layer.
3. The printed circuit board according to claim 2, characterized in that: The pad layer includes a gold finger area, which includes multiple pads and gaps between the pads; the conductive pattern layer includes a first area, which is constructed so that its orthographic projection on the substrate layer covers the orthographic projection of the gold finger area on the substrate layer, and the first area is a solid pattern or a grid pattern.
4. The printed circuit board according to claim 2, characterized in that: The pad layer includes a gold finger area, the gold finger area includes multiple pads and gaps between the pads; the conductive pattern layer includes multiple routing patterns; wherein, for at least part of the pads, the orthographic projections of one pad and one routing pattern on the substrate layer overlap.
5. The printed circuit board according to claim 4, characterized in that: In at least some of the routing patterns, the routing pattern and the orthographic projection pattern of the corresponding pad on the substrate layer completely overlap.
6. The printed circuit board according to claim 4, characterized in that: The plurality of pads include: a plurality of non-virtual pads and a plurality of virtual pads; the plurality of routing patterns include a first routing and a second routing; each of the first routings corresponds to a non-virtual pad; wherein, One of the second routing lines corresponds to one of the virtual pad settings; or, An orthographic projection of one of the second routing lines on the substrate layer covers the orthographic projections of at least two of the virtual pads on the substrate layer.
7. The printed circuit board according to claim 4, characterized in that: At least a portion of the wiring pattern is used as a non-signal line and is grounded.
8. The printed circuit board according to claim 4, characterized in that: In at least some of the routing patterns, two adjacent routing patterns are independent of each other so that one routing pattern serves as a separate signal line; and / or, in at least some of the routing patterns, at least two routing patterns are connected in parallel to serve together as a signal line.
9. The printed circuit board according to claim 1, characterized in that: The printed circuit board also includes: A connector and a connection area, wherein the connection area and the connector are located on a side of the first main area away from the second binding area, and the connection area is located between the connection area and the first main area, and the connection area is constructed to have a width in a second direction that is smaller than a width of the first main area in the second direction, and the second direction is perpendicular to the first direction and parallel to the display panel.
10. The printed circuit board according to claim 1, characterized in that: A driving chip is arranged on the panel wiring area, and an avoidance groove for avoiding the driving chip is arranged on the second main body area.
11. A display module, characterized in that: include: The display panel comprises a display area, a first binding area located at one side of the display area, and a panel wiring area located between the display area and the first binding area; According to the printed circuit board as described in any one of claims 1 to 10, the second binding area is bound and connected to the first binding area, and the second main body area at least partially overlaps with the panel routing area.
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