A lightweight temperature control method based on semiconductor test system

Abstract

The present invention relates to the field of temperature control testing technology, and in particular to a lightweight temperature control method based on a semiconductor test system. The method comprises the following steps: obtaining the location of a semiconductor chip test area; collecting chip temperature distribution data at the location of the semiconductor chip test area to obtain real-time temperature distribution data of the semiconductor chip; constructing a heat conduction model for the real-time temperature distribution data of the semiconductor chip to generate a high-dimensional heat conduction model; using the high-dimensional heat conduction model to divide the real-time temperature distribution data of the semiconductor chip into chip temperature scenarios to generate a first chip temperature scenario and a second chip temperature scenario; performing multi-point temperature control distribution optimization on the first chip temperature scenario and the second chip temperature scenario to generate optimized temperature control distribution data. The present invention improves the efficiency and comprehensiveness of lightweight temperature control of semiconductor test systems through high-precision data acquisition, multi-area optimization, adaptive thermal compensation, scenario-based testing, and intelligent management.

Description

Technical Field

[0001] The present invention relates to the field of temperature control testing technology, and in particular to a lightweight temperature control method based on a semiconductor testing system. Background Art

[0002] Traditional temperature control methods rely primarily on large, constant-temperature equipment, which achieves temperature control through heating or cooling. However, this approach often suffers from large equipment size, high energy consumption, and slow adjustment speed, making it difficult to meet the modern semiconductor industry's demand for lightweight, precise, and efficient equipment. With the continuous advancement of semiconductor technology, lightweight temperature control methods have gradually emerged. Beginning in the 1990s, miniaturized and modular temperature control devices entered the market, integrating micro-cooling elements and high-efficiency heat transfer materials to achieve faster temperature regulation. In the 21st century, the introduction of thermoelectric cooling technologies (such as the Peltier effect) and microfluidics has provided more flexible solutions for lightweight temperature control. These technologies enable temperature control systems to achieve precise local temperature control and adapt to complex testing environments. In recent years, with the widespread adoption of artificial intelligence and intelligent control algorithms, temperature control technology has become even more intelligent. Real-time data-based temperature prediction and adaptive control technologies enable semiconductor test systems to maintain high stability and efficiency under complex operating conditions. However, current traditional temperature control methods usually adopt a unified control strategy for the entire chip area, ignoring the differences in temperature requirements in different areas. At the same time, it is difficult to dynamically adjust according to real-time temperature changes, resulting in low efficiency and comprehensiveness of lightweight temperature control in semiconductor test systems. Summary of the Invention

[0003] Based on this, it is necessary to provide a lightweight temperature control method based on a semiconductor test system to solve at least one of the above technical problems.

[0004] To achieve the above objectives, a lightweight temperature control method based on a semiconductor test system is provided, the method comprising the following steps:

[0005] Step S1: obtaining the location of a semiconductor chip test area; collecting chip temperature distribution data at the location of the semiconductor chip test area to obtain real-time temperature distribution data of the semiconductor chip; constructing a heat conduction model based on the real-time temperature distribution data of the semiconductor chip to generate a high-dimensional heat conduction model;

[0006] Step S2: using a high-dimensional heat conduction model to divide the real-time temperature distribution data of the semiconductor chip into chip temperature scenarios to generate a first chip temperature scenario and a second chip temperature scenario; performing multi-point temperature control distribution optimization on the first chip temperature scenario and the second chip temperature scenario to generate optimized temperature control distribution data; performing chip adaptive thermal compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal compensation feedback data;

[0007] Step S3: performing scenario-based testing on the optimized temperature control distribution data based on the chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data; screening the semiconductor chip scenario temperature control test data for an optimal temperature control curve to obtain the semiconductor chip scenario temperature control optimal curve;

[0008] Step S4: Construct a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scene to generate a semiconductor chip scene temperature control strategy; perform temperature control management on the semiconductor chip scene temperature control strategy to generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations of the semiconductor test system.

[0009] By acquiring the location of chip test areas, this invention accurately locates key chip test points, avoiding ineffective temperature control operations. Real-time temperature distribution data collection provides chip-wide thermal status monitoring, avoiding temperature control errors caused by single-point data. High-dimensional modeling improves the ability to analyze heat conduction behavior, providing a scientific basis for subsequent temperature control optimization. By segmenting chip temperature scenarios, the temperature control requirements of different regions are differentiated, avoiding the inefficiencies associated with global, unified temperature control. Multi-point distribution optimization refines the spatial resolution of temperature control operations and improves temperature control effectiveness. A thermal compensation feedback mechanism responds to temperature changes in real time, enhancing system stability in environments with rapid thermal fluctuations. By testing and optimizing data in real-world scenarios, the feasibility and effectiveness of the temperature control strategy are ensured. The optimally adapted temperature control curve is selected, minimizing energy consumption and improving temperature control accuracy. Optimized policy decisions based on test data are more scientific and rational, enhancing the overall intelligence of the system. The policy developed based on the optimal temperature control curve is global and systematic, ensuring standardized and uniform temperature control execution. Intelligent temperature control management reduces the need for manual intervention and simplifies system operation. Optimization strategy execution significantly reduces equipment energy consumption and improves resource utilization in the test system. The resulting temperature control management data combines execution efficiency and data accuracy, laying a solid foundation for the implementation of lightweight temperature control. Therefore, through high-precision data acquisition, multi-zone optimization, adaptive thermal compensation, scenario-based testing, and intelligent management, this invention improves the efficiency and comprehensiveness of lightweight temperature control in semiconductor test systems.

[0010] Preferably, step S1 includes the following steps:

[0011] Step S11: obtaining a semiconductor chip test area location based on a semiconductor test system;

[0012] Step S12: deploying temperature sensors at the semiconductor chip test area, and collecting semiconductor chip temperature distribution data at the semiconductor chip test area based on the deployed temperature sensors to obtain real-time semiconductor chip temperature distribution data;

[0013] Step S13: determining key thermodynamic parameters based on the material properties and structural design of the semiconductor chip to obtain the semiconductor chip thermodynamic parameters; performing chip spatial temperature distribution analysis on the semiconductor chip thermodynamic parameters using the real-time temperature distribution data of the semiconductor chip to generate a semiconductor chip thermodynamic parameter field distribution map;

[0014] Step S14: construct a high-level heat conduction model based on the thermodynamic parameter field distribution map of the semiconductor chip to generate a preliminary high-dimensional heat conduction model; calibrate the preliminary high-dimensional heat conduction model to generate high-dimensional heat conduction model calibration data; optimize the preliminary high-dimensional heat conduction model using the high-dimensional heat conduction model calibration data to generate a high-dimensional heat conduction model.

[0015] By deploying temperature sensors in the semiconductor chip test area, the present invention can collect the temperature distribution data of the chip in real time and accurately reflect the temperature condition of the chip. This provides key temperature data support for subsequent thermodynamic analysis and ensures the accuracy of the analysis. According to the material properties and structural design of the semiconductor chip, the key thermodynamic parameters related to heat conduction can be accurately calculated. This analysis helps to deeply understand the thermal behavior of the chip and avoid performance degradation or damage due to overheating. The real-time temperature distribution data is used to perform spatial distribution analysis on the thermodynamic parameters of the chip, thereby generating an accurate thermodynamic parameter field distribution map. This process helps to reveal the temperature differences in different parts of the chip and assists in optimizing design and material selection. By constructing a high-level heat conduction model, the heat conduction process inside the chip can be simulated, and the model can be further calibrated and optimized. The optimized high-dimensional heat conduction model can more accurately predict the temperature distribution of the chip under different working conditions and improve the thermal management efficiency of the chip.

[0016] Preferably, constructing a high-dimensional heat conduction model based on the thermodynamic parameter field distribution map of the semiconductor chip includes:

[0017] Based on the heat conduction equation, a mathematical model is established for the thermodynamic parameter field distribution diagram of the semiconductor chip to generate a thermal conduction mathematical model of the semiconductor chip. The formula for establishing the mathematical model is as follows:

[0018]

[0019] Where, Expressed as the temperature at a point Over time The rate of change, Expressed as the divergence of the heat flux density, Expressed as a gradient operator, Expressed as thermal conductivity, Expressed as temperature, Expressed as heat capacity, Expressed as a heat source term;

[0020] Introducing dimensional boundary conditions into the semiconductor chip heat conduction mathematical model to generate the semiconductor chip heat conduction dimensional boundary conditions, wherein the dimensional boundary conditions introduced include: introducing the temperature value of the fixed chip boundary, introducing the heat flux density of the given boundary, and introducing the heat exchange between the environment and the chip boundary;

[0021] The semiconductor chip heat conduction dimensional boundary conditions are used to discretize the semiconductor chip heat conduction mathematical model to generate a preliminary high-dimensional heat conduction model.

[0022] The present invention uses the heat conduction equation Mathematical modeling of the temperature distribution of semiconductor chips can accurately describe the heat conduction process within the chip. This equation combines thermal conductivity ,temperature , heat source term and heat capacity , providing a theoretical framework for analyzing the thermal behavior of chips. Introducing dimensional boundary conditions (such as fixed temperature, given heat flux density, and ambient heat exchange) during the modeling process enables the model to more realistically reflect the heat exchange process between the chip and the external environment. This multi-dimensional analysis enhances the accuracy of the thermal conduction model and can better adapt to the complex boundary conditions in practical applications. By combining the heat conduction equation with dimensional boundary conditions, it is possible to predict the thermal behavior of semiconductor chips under different operating conditions. This helps optimize chip design, ensure its thermal management capabilities during operation, and avoid performance degradation or chip damage caused by overheating. Through discretization processing, a preliminary high-dimensional heat conduction model can be obtained, and the prediction accuracy can be further improved through model calibration and optimization. This high-dimensional model not only captures the complex heat conduction process within the chip, but also provides accurate temperature distribution predictions under various operating environments.

[0023] Preferably, step S2 includes the following steps:

[0024] Step S21: using a high-dimensional heat conduction model to dynamically predict chip thermal effects on the real-time temperature distribution data of the semiconductor chip to generate chip thermal effect dynamic prediction data; performing time-step chip temperature change analysis on the chip thermal effect dynamic prediction data to generate time-step chip temperature change data;

[0025] Step S22: dividing the chip temperature change data of the time step into chip temperature scenarios based on a preset temperature change threshold to generate a first chip temperature scenario and a second chip temperature scenario; performing chip temperature control demand analysis on the real-time temperature distribution data of the semiconductor chip based on the first chip temperature scenario and the second chip temperature scenario to generate chip temperature control demand data;

[0026] Step S23: Optimizing the multi-point temperature control distribution of the first chip temperature scenario and the second chip temperature scenario according to the chip temperature control requirement data to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the temperature control optimization data for the first chip scenario and the temperature control optimization data for the second chip scenario;

[0027] Step S24: Perform chip adaptive thermal compensation on the first chip scene temperature control optimization data and the second chip scene temperature control optimization data to generate chip thermal compensation data; perform compensation feedback on the first chip scene temperature control optimization data and the second chip scene temperature control optimization data through the chip thermal compensation data to generate chip thermal compensation feedback data.

[0028] The present invention uses a high-dimensional heat conduction model to dynamically predict thermal effects on real-time temperature distribution data of semiconductor chips, enabling real-time monitoring of chip temperature changes and predicting future thermal behavior. This process provides accurate temperature trends, providing data support for subsequent temperature control and thermal management. By analyzing chip temperature changes at different time points based on the dynamic prediction data for chip thermal effects, the chip's temperature changes at different time points can be precisely determined. This analysis helps identify patterns in temperature fluctuations, promptly detect potential overheating risks, and initiate early warning and adjustment measures for the chip. Threshold analysis of temperature change data allows chip temperature changes to be divided into different temperature scenarios (such as the first chip temperature scenario and the second chip temperature scenario). This scenario division facilitates a more detailed understanding of temperature control requirements under different operating conditions, thereby providing more targeted solutions for chip thermal management. Based on the chip temperature control requirement data, the temperature control distribution is optimized for different temperature scenarios. By optimizing the temperature control distribution data, temperature control adjustments can be made in different regions, ensuring temperature balance across the chip, preventing overheating or temperature unevenness, and improving the chip's heat dissipation performance and overall stability. By adaptively compensating the chip's temperature optimization data, dynamic adjustments can be made based on actual temperature changes, enabling more precise temperature management. The introduction of a compensation feedback mechanism further improves the system's adaptability and temperature control, enabling the chip to maintain a stable temperature under varying environments and workloads.

[0029] Preferably, step S23 includes the following steps:

[0030] Step S231: measuring the temperature distribution of the first chip temperature scenario and the second chip temperature scenario according to the chip temperature control requirement data to generate initial temperature field data for the first scenario and initial temperature field data for the second scenario; performing data fitting on the initial temperature field data for the first scenario and the initial temperature field data for the second scenario to generate initial temperature field distribution data;

[0031] Step S232: configuring the high-temperature scenario multi-point controller parameters for the initial temperature field data of the first scenario to generate the first scenario multi-point controller configuration parameters, wherein the high-temperature scenario multi-point controller parameter configuration includes a power adjustment range and a response time;

[0032] Step S233: configuring the low-temperature scenario multi-point controller parameters for the initial temperature field data of the second scenario to generate the second scenario multi-point controller configuration parameters, wherein the low-temperature scenario multi-point controller parameter configuration includes cooling efficiency and steady-state maintenance capability;

[0033] Step S234: Perform real-time temperature control signal distribution on the initial temperature field distribution data through the first scene multi-point controller configuration parameters and the second scene multi-point controller configuration parameters to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the first chip scene temperature control optimization data and the second chip scene temperature control optimization data.

[0034] The present invention generates accurate initial temperature field distribution data by measuring the temperature distribution of first and second chip temperature scenarios and fitting the initial temperature field data. This data provides a foundation for subsequent temperature control optimization, ensuring that the temperature control strategy is adjusted according to the actual chip temperature distribution. By configuring multi-point controller parameters separately for high and low temperature scenarios, the temperature control system operates within the optimal range for each scenario. Controller parameter configuration for the high temperature scenario (such as power adjustment range and response time) enables rapid response to temperature changes and prevents overheating; while controller parameter configuration for the low temperature scenario (such as cooling efficiency and steady-state retention capability) effectively maintains a low and stable temperature, preventing chip overcooling or temperature unevenness. By generating optimized temperature control distribution data, precise temperature control of all chip components is achieved. This optimized temperature control data effectively adjusts the temperature distribution for each temperature scenario, ensuring that different chip regions remain within an appropriate temperature range, improving heat dissipation performance and overall thermal management efficiency. Through precise multi-point controller parameter configuration, the response speed and stability of the temperature control system can be significantly improved. In high-temperature scenarios, fast response and power regulation capabilities can effectively prevent the chip from overheating. In low-temperature scenarios, the optimization of cooling efficiency and steady-state maintenance capabilities ensures that the chip can continue to operate at low temperatures, avoiding performance instability caused by excessive temperature fluctuations.

[0035] Preferably, distributing the real-time temperature control signal to the initial temperature field distribution data by using the first scenario multipoint controller configuration parameters and the second scenario multipoint controller configuration parameters includes the following:

[0036] Generate a control signal for the initial temperature field distribution data using the first scene multipoint controller configuration parameters and the second scene multipoint controller configuration parameters to obtain a first scene control signal and a second scene control signal;

[0037] Performing signal control area identification on the first scene control signal and the second scene control signal to obtain a first scene control signal area and a second scene control signal area; performing control signal area overlap on the first scene control signal area and the second scene control signal area to obtain a control boundary area signal;

[0038] Based on the boundary conditions of the semiconductor chip's thermal conduction dimension, the control boundary area signal is adjusted to generate a control boundary area adjustment signal; according to the control boundary area adjustment signal, the first scene control signal area and the second scene control signal area are distributed with signals to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the first chip scene temperature control optimization data and the second chip scene temperature control optimization data.

[0039] The present invention can generate control signals for different temperature scenarios by applying the configuration parameters of the multi-point controller for the first scenario and the second scenario. These control signals are generated in real time based on the actual temperature field distribution data, ensuring that the temperature control system can accurately respond to the thermal effects of the chip under different temperature conditions. By performing regional identification and overlap of the control signals, it can be ensured that the temperature control signals of the two scenarios will not conflict or interfere in the boundary area. The process of regional identification helps to determine which areas require specific temperature control adjustments, and the overlap optimization of the control signal area ensures the coordination of temperature control in various areas of the chip, avoiding thermal failure problems caused by inconsistent temperature control. By adjusting the signals in the boundary area based on the boundary conditions of the thermal conduction dimension of the semiconductor chip, refined management of the control signals can be achieved. In the boundary area, the temperature undergoes transitional changes due to the thermal conduction effect, so adjusting the signals in these areas helps to optimize the temperature control effect and avoid temperature instability due to excessive or insufficient temperature control. By adjusting and optimizing the distribution of the control signal area, accurate optimized temperature control distribution data can eventually be generated. This data ensures optimal temperature control for the chip under two different temperature scenarios, ensuring uniform and stable temperature distribution and effectively preventing thermal damage to the chip caused by excessively high or low temperatures. Precise temperature control signal adjustment and signal processing in the interface region improve the system's temperature control accuracy and stability in complex temperature scenarios. The optimized temperature control strategy for each scenario not only addresses extreme high or low temperatures but also effectively suppresses thermal effects on the chip during operation. Signal adjustment in the interface region effectively reduces temperature fluctuations and thermal stress between the two temperature control zones. This is crucial for the long-term stable operation of semiconductor chips, as excessive thermal stress can cause material fatigue or damage, impacting chip performance and lifespan. This process not only optimizes temperature control distribution under static conditions but also enables rapid response to dynamic temperature changes. Through real-time signal distribution and interface signal adjustment, the system can adapt to varying operating environments and workloads, ensuring the chip maintains optimal temperature control under varying conditions.

[0040] Preferably, step S24 includes the following steps:

[0041] Step S241: performing thermal behavior analysis on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal behavior data;

[0042] Step S242: performing closed-loop control on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data using the chip thermal behavior data to generate chip scenario temperature control closed-loop control data;

[0043] Step S243: Using an adaptive thermal compensation formula to perform real-time thermal compensation on the chip scene temperature control closed-loop control data to generate chip thermal compensation data;

[0044] Step S244: performing compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data using the chip thermal compensation data, thereby generating chip thermal compensation feedback data.

[0045] The present invention can obtain detailed data on the thermal response of the chip under different temperature scenarios by performing thermal behavior analysis on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data. This helps to fully understand the thermal characteristics of the chip under dynamic temperature control, such as thermal response time, thermal fluctuations, and thermal effects in different areas of the chip. This analysis provides basic data for subsequent thermal compensation and optimization control. Based on the chip thermal behavior data, temperature control closed-loop control is performed. This step ensures that the temperature is maintained within the preset ideal range by adjusting the temperature control strategy in real time. Closed-loop control enables the system to respond to changes in the thermal state of the chip in real time and maintain a stable temperature environment by automatically adjusting the temperature control strategy. Closed-loop control improves the robustness and response speed of the system, especially when facing external environment or load fluctuations, it can quickly correct temperature deviations to avoid chip damage caused by overheating or temperature instability. The chip scenario temperature control closed-loop control data is thermally compensated in real time using an adaptive thermal compensation formula. This means that the system can dynamically adjust the compensation parameters according to the specific circumstances of the temperature changes during actual operation. This adaptive capability ensures the chip's temperature control accuracy under different operating conditions. Regardless of load changes or external environmental fluctuations, the temperature is maintained within a safe range, preventing temperature fluctuations from negatively impacting chip performance. Compensation feedback is provided through chip thermal compensation data, further optimizing the temperature control optimization data for the first and second chip scenarios. This step ensures that the feedback mechanism during the thermal compensation process can continuously optimize the temperature control distribution, further enhancing the system's adaptive capabilities. This feedback mechanism enables the system to continuously learn and adjust the temperature control strategy, gradually improving the temperature control effect, thereby extending the chip's lifespan and improving the long-term stability of the system.

[0046] Preferably, the adaptive thermal compensation formula in step S243 is as follows:

[0047]

[0048] Where, Represented as at the current time and location The compensation temperature, Represented as at the current time and location The temperature error, Expressed as the compensation gain coefficient, Expressed as the temperature history integral coefficient, Represented as at the current time and location The actual measured temperature, Expressed as the feedback gain coefficient.

[0049] This paper analyzes and integrates an adaptive thermal compensation formula. This formula aims to dynamically compensate for the temperature error of the temperature control system, ensuring stable temperature control while maintaining high performance. It achieves adaptive regulation through three main components: current error, historical error integration, and real-time feedback. The current temperature error term in the formula is: It directly reflects the temperature error of the chip at the current moment. The greater the temperature deviation, the greater the compensation signal. Is the difference between the actual temperature and the target temperature, which determines the intensity of the compensation required. This term enables the system to respond to temperature errors in real time, ensuring that the chip temperature can quickly approach the target value. To adjust the response strength, ensure that the system can cope with sudden temperature fluctuations while preventing overcompensation. Historical temperature error integral term: Represents the accumulation of temperature errors over a period of time. It considers the impact of historical errors on current compensation through integration. The historical integral term can reduce the reaction delay of the temperature control system, avoid overreaction to instantaneous errors, and smooth the entire temperature control process. This avoids oscillation or instability caused by excessively fast response. Real-time temperature feedback term: Indicates that the compensation amount is adjusted based on the real-time temperature feedback signal. Feedback signal The actual temperature detected by the sensor reflects the actual condition of the chip at a certain moment. The real-time feedback term is used to modify the temperature control strategy, ensuring that the system dynamically adjusts the control signal according to the actual chip temperature to avoid discrepancies between theoretical predictions and actual conditions. Feedback enables the temperature control system to cope with external changes or internal uncertainties. The contribution of the feedback signal to the compensation can be flexibly adjusted to ensure more efficient and accurate compensation. When using the conventional adaptive thermal compensation formula in this field, the current time can be obtained. and location By applying the adaptive thermal compensation formula provided by the present invention, the compensation temperature at the current time can be calculated more accurately. and location The compensation temperature. This formula uses the real-time temperature error to drive a fast compensation response, while using historical errors and feedback to smooth the control process, ensuring that the temperature control process is both fast and accurate. The integral term of the historical temperature error avoids the system from overreacting to short-term fluctuations, thereby improving the stability of the system. Through the real-time feedback term and the adaptive gain coefficient ( ), which can self-adjust according to factors such as the real-time working status of the chip and changes in the external environment, ensuring that the system always maintains optimal performance under different working conditions.

[0050] Preferably, step S3 includes the following steps:

[0051] Step S31: performing scenario-based testing on the optimized temperature control distribution data based on chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data;

[0052] Step S32: performing temperature control curve conversion on the semiconductor chip scene temperature control test data to generate a semiconductor chip scene temperature control curve; performing temperature control curve calibration on the semiconductor chip scene temperature control curve to generate a semiconductor chip scene temperature control calibration curve;

[0053] Step S33: Screening the optimal temperature control curve for the semiconductor chip scene temperature control calibration curve to obtain the optimal temperature control curve for the semiconductor chip scene.

[0054] The present invention uses chip thermal compensation feedback data to perform scenario-based testing on optimized temperature control distribution data, thereby generating scenario-based temperature control test data for semiconductor chips. This step has the beneficial effect of applying the optimized temperature control data to actual test scenarios, ensuring its effectiveness under different environmental conditions and workloads. Through scenario-based testing, the accuracy and stability of the temperature control strategy can be verified in environments more closely resembling actual use, potential temperature control issues can be identified and targeted adjustments can be made, ensuring that the system maintains efficient thermal management performance in real-world applications. The semiconductor chip scenario-based temperature control test data is converted to a temperature control curve to generate a temperature control curve, which is then calibrated. This process has the beneficial effect of ensuring that the temperature control curve accurately reflects the thermal behavior of the chip under actual operating conditions through conversion and calibration. The calibrated temperature control curve provides a more accurate temperature control reference, avoiding temperature control failure or instability caused by inaccurate initial curves. This process helps improve temperature control accuracy, ensuring that the chip operates within the optimal temperature range, thereby reducing the impact of overheating or temperature fluctuations on chip performance and lifespan. By screening the optimal temperature control curve from the temperature control calibration curve, the optimal temperature control curve for the semiconductor chip scenario is obtained. This step effectively selects the optimal temperature control strategy from multiple options, ensuring the chip always remains within the optimal operating temperature range. This not only improves temperature control efficiency but also further optimizes energy efficiency, reduces energy consumption, and ensures the chip maintains high performance and stability under various environmental conditions.

[0055] Preferably, step S4 includes the following steps:

[0056] Step S41: constructing a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scenario to generate a temperature control strategy for the semiconductor chip scenario;

[0057] Step S42: Upload the semiconductor chip scene temperature control strategy to the cloud platform for automatic push, and generate automatic temperature control strategy deployment data; perform temperature control management on the automatic temperature control strategy deployment data, and generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations of the semiconductor test system.

[0058] The present invention constructs a temperature control strategy based on the optimal temperature control curve to generate a scenario-specific temperature control strategy. This process has the beneficial effect of accurately driving data to form temperature control strategies tailored to different operating states, ensuring that the temperature control strategy can respond to the chip's thermal behavior in real time and maintain the optimal temperature under various workloads. Based on actual needs, a customized temperature control solution can be designed for the chip, and the temperature control strategy can be adjusted based on factors such as load and ambient temperature, thereby further improving temperature control accuracy and reducing energy consumption. The temperature control strategy is constructed based on the actual environment and usage conditions, ensuring that each chip achieves optimal thermal management. The constructed semiconductor chip scenario temperature control strategy is uploaded to the cloud platform for automated deployment. This step also has the beneficial effect of leveraging the cloud platform's computing and distribution capabilities to push the latest temperature control strategy to each test system in real time, achieving rapid policy updates and full network coverage, ensuring that each chip or system always applies the latest temperature control strategy. Automated deployment and push of temperature control strategies can accelerate the update and iteration of the chip temperature control system, allowing the system to promptly adjust the strategy when the environment or usage load changes, ensuring that the chip temperature is always maintained within the optimal range. Manage automated temperature control strategy deployment data to generate semiconductor chip scenario temperature control management data. This process has the beneficial effect of continuously managing temperature control strategies, enabling monitoring of policy execution effectiveness and making necessary adjustments. The generated management data helps engineers monitor the performance and temperature status of the temperature control system, providing a basis for subsequent optimization efforts. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 A schematic flow chart of a lightweight temperature control method based on a semiconductor test system;

[0060] Figure 2 for Figure 1 Detailed implementation steps of step S2 in FIG.

[0061] Figure 3 for Figure 1 Detailed implementation steps of step S3 in FIG.

[0062] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0063] The following is a clear and complete description of the technical method of the present invention in conjunction with the accompanying drawings. It is obvious that the embodiments described are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts are within the scope of protection of the present invention.

[0064] In addition, the accompanying drawings are merely schematic illustrations of the present invention and are not necessarily drawn to scale. Identical reference numerals in the figures denote identical or similar parts, and thus repetitive descriptions thereof will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities that do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor and / or microcontroller approaches.

[0065] It should be understood that although the terms "first," "second," and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used solely to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the exemplary embodiments. The term "and / or" as used herein includes any and all combinations of one or more of the listed associated items.

[0066] To achieve this, please refer to Figures 1 to 3 , a lightweight temperature control method based on a semiconductor test system, the method comprising the following steps:

[0067] Step S1: obtaining the location of a semiconductor chip test area; collecting chip temperature distribution data at the location of the semiconductor chip test area to obtain real-time temperature distribution data of the semiconductor chip; constructing a heat conduction model based on the real-time temperature distribution data of the semiconductor chip to generate a high-dimensional heat conduction model;

[0068] Step S2: using a high-dimensional heat conduction model to divide the real-time temperature distribution data of the semiconductor chip into chip temperature scenarios to generate a first chip temperature scenario and a second chip temperature scenario; performing multi-point temperature control distribution optimization on the first chip temperature scenario and the second chip temperature scenario to generate optimized temperature control distribution data; performing chip adaptive thermal compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal compensation feedback data;

[0069] Step S3: performing scenario-based testing on the optimized temperature control distribution data based on the chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data; screening the semiconductor chip scenario temperature control test data for an optimal temperature control curve to obtain the semiconductor chip scenario temperature control optimal curve;

[0070] Step S4: Construct a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scene to generate a semiconductor chip scene temperature control strategy; perform temperature control management on the semiconductor chip scene temperature control strategy to generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations of the semiconductor test system.

[0071] By acquiring the location of chip test areas, this invention accurately locates key chip test points, avoiding ineffective temperature control operations. Real-time temperature distribution data collection provides chip-wide thermal status monitoring, avoiding temperature control errors caused by single-point data. High-dimensional modeling improves the ability to analyze heat conduction behavior, providing a scientific basis for subsequent temperature control optimization. By segmenting chip temperature scenarios, the temperature control requirements of different regions are differentiated, avoiding the inefficiencies associated with global, unified temperature control. Multi-point distribution optimization refines the spatial resolution of temperature control operations and improves temperature control effectiveness. A thermal compensation feedback mechanism responds to temperature changes in real time, enhancing system stability in environments with rapid thermal fluctuations. By testing and optimizing data in real-world scenarios, the feasibility and effectiveness of the temperature control strategy are ensured. The optimally adapted temperature control curve is selected, minimizing energy consumption and improving temperature control accuracy. Optimized policy decisions based on test data are more scientific and rational, enhancing the overall intelligence of the system. The policy developed based on the optimal temperature control curve is global and systematic, ensuring standardized and uniform temperature control execution. Intelligent temperature control management reduces the need for manual intervention and simplifies system operation. Optimization strategy execution significantly reduces equipment energy consumption and improves resource utilization in the test system. The resulting temperature control management data combines execution efficiency and data accuracy, laying a solid foundation for the implementation of lightweight temperature control. Therefore, through high-precision data acquisition, multi-zone optimization, adaptive thermal compensation, scenario-based testing, and intelligent management, this invention improves the efficiency and comprehensiveness of lightweight temperature control in semiconductor test systems.

[0072] In the embodiment of the present invention, reference Figure 1 FIG. 1 is a flow chart of a lightweight temperature control method based on a semiconductor test system according to the present invention. In this example, the lightweight temperature control method based on a semiconductor test system includes the following steps:

[0073] Step S1: obtaining the location of a semiconductor chip test area; collecting chip temperature distribution data at the location of the semiconductor chip test area to obtain real-time temperature distribution data of the semiconductor chip; constructing a heat conduction model based on the real-time temperature distribution data of the semiconductor chip to generate a high-dimensional heat conduction model;

[0074] In this embodiment of the present invention, the chip's test area is identified, including the core functional module, peripheral circuit area, and package interface area. These areas are key areas for thermal management. High-precision positioning tools, such as a micropositioner or thermal imager, are used to precisely calibrate the physical location of the chip's test area. The test area's location is recorded in the device database, providing a foundation for subsequent data collection and analysis. The data recording format includes the test area's two-dimensional coordinates and three-dimensional geometric position information. High-precision temperature sensors (such as thermocouples and infrared thermal imaging sensors) are deployed within the chip's test area. The sensor density should meet the monitoring requirements for the chip's high-heat generation areas; a recommended density of one sensor point per square millimeter is recommended. Ensure that the sensor's response time is within 1 millisecond to capture real-time temperature changes. A high-frequency data acquisition system is configured with a sampling frequency of 10 kHz to capture even small temperature fluctuations. The system must have data caching and real-time transmission capabilities to ensure that important information is not lost even with high data traffic. With the chip operating, the data acquisition system is activated to record real-time temperature distribution data for the chip's test area. Based on Fourier's law of heat conduction, establish the basic heat conduction equation for the chip. Parameterize the heat conduction model using the thermal properties of the chip material (such as silicon's thermal conductivity and specific heat capacity). Combined with actual temperature distribution data, calibrate the heat source intensity and boundary conditions (such as natural convection and radiation). Use the finite element method (FEM) to discretize the heat conduction equation and generate a spatially distributed mesh model. A mesh accuracy of 0.1 micron is recommended. The time dimension is subdivided, with a recommended time step of 1 millisecond to facilitate dynamic simulation. Use high-performance computing (HPC) to numerically solve the heat conduction model and calculate the dynamic temperature distribution of the chip. Compare the calculated results with real-time temperature data to verify model accuracy; the target error should be within ±2°C. Generate high-dimensional heat conduction model data, including spatial and temporal temperature distribution matrices.

[0075] Step S2: using a high-dimensional heat conduction model to divide the real-time temperature distribution data of the semiconductor chip into chip temperature scenarios to generate a first chip temperature scenario and a second chip temperature scenario; performing multi-point temperature control distribution optimization on the first chip temperature scenario and the second chip temperature scenario to generate optimized temperature control distribution data; performing chip adaptive thermal compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal compensation feedback data;

[0076] In this embodiment of the present invention, initial scenario boundary conditions are defined based on chip functional modules or physical area division criteria, such as core, edge, and interface regions. Using isothermal surface analysis, high-dimensional temperature data is hierarchically processed to identify temperature gradients and critical overheating areas: Si = {(x, y, z) | T(x, y, z, t) ∈ [Timin, Timax]}; where Si represents the i-th temperature scenario, and Timin and Timax represent the scenario's temperature range thresholds. The analyzed temperature scenarios are divided into a first chip temperature scenario and a second chip temperature scenario, representing high and low heat zones, or thermal behavior regions for different functional modules, respectively. Based on the spatial distribution of each temperature scenario, multi-point temperature control signals are generated: a stronger heat dissipation signal is applied to S1 (the high heat zone), with signal strength defined as PS1 = k1⋅∇T+k2; where k1 and k2 are signal gain parameters. A hold or fine-tuning signal is applied to S2 (the low heat zone). An overlap analysis is performed on the control signal regions of S1 and S2, the interface signal is calculated, and the temperature balance in the interface region is optimized: Topt = (TS1 + TS2) ÷ 2. The optimization result serves as the basis for distributing the control signal in the interface region. Optimized temperature control distribution data is output, including the temperature control optimization data for the first and second chips. The first and second chip temperature control optimization data are compensated using the following adaptive thermal compensation formula. Based on the compensation results, chip thermal compensation feedback data is generated. The feedback data includes the real-time compensation amount and the adjusted temperature control distribution data. The chip thermal compensation feedback data is re-input into the temperature control system, forming a closed-loop regulation to continuously optimize the chip's thermal management strategy.

[0077] Step S3: performing scenario-based testing on the optimized temperature control distribution data based on the chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data; screening the semiconductor chip scenario temperature control test data for an optimal temperature control curve to obtain the semiconductor chip scenario temperature control optimal curve;

[0078] In the embodiment of the present invention, the input data include chip thermal compensation feedback data and optimized temperature control distribution data.

[0079] Initialize the scenario-based test environment, including:

[0080] Simulate chip operating conditions (voltage, frequency, load).

[0081] Set up thermal load test equipment and a temperature sensor array. Perform temperature distribution testing on the chip under different operating conditions (such as high-performance mode and energy-saving mode): record the real-time temperature distribution of the chip under various conditions. Use the sensor array to collect chip temperature data in real time and generate scenario-based temperature control test data. Analyze the collected temperature control test data: evaluate the temperature uniformity and stability of each chip region, and identify temperature fluctuation areas and hot spots. Convert the scenario-based temperature control test data into a time-temperature curve (temperature control curve): Tcurve(t) = {T1(t), T2(t), …, Tn(t)}; where Ti(t) represents the temperature variation over time at the i-th key point on the chip. Smooth and offset-calibrate the generated temperature control curve to eliminate noise and outliers: Tcalibrated(t) = Tcurve(t) − ΔTnoise; where ΔTnoise is the noise correction value. Based on the calibration results, generate a scenario-based temperature control calibration curve for the semiconductor chip. Temperature control calibration curves are screened based on the following criteria: whether the curve's temperature fluctuation range is within a preset range (e.g., ±0.5°C), whether the curve's response time to reach stable temperature is the shortest, and whether the curve's corresponding energy consumption is the lowest. Each temperature control calibration curve is scored, and the curve with the highest overall score is selected as the optimal temperature control curve: Scurve = ω1⋅Sstability + ω2⋅Sresponse + ω3⋅Sefficiency; where ω1, ω2, and ω3 are weighting parameters.

[0082] Step S4: Construct a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scene to generate a semiconductor chip scene temperature control strategy; perform temperature control management on the semiconductor chip scene temperature control strategy to generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations of the semiconductor test system.

[0083] In an embodiment of the present invention, multi-dimensional temperature control data, including heating curves, cooling curves, and temperature stabilization curves, is extracted from semiconductor chip test scenarios to generate a semiconductor chip temperature control curve dataset. Using multivariate regression analysis and machine learning algorithms (such as neural network regression or support vector regression), the temperature control requirements under different test scenarios are fitted based on the temperature control curve dataset to generate an optimal temperature control curve model. Based on the optimal temperature control curve model, an initial temperature control strategy for the semiconductor chip is constructed, taking into account the power consumption, heat dissipation conditions, and environmental parameters of the target test scenario. A sensor network collects real-time chip temperature, power consumption, and ambient temperature data to generate real-time temperature control feedback data. Based on this real-time temperature control feedback data, a reinforcement learning algorithm is used to optimize the initial temperature control strategy, generating a semiconductor chip scenario temperature control strategy that dynamically adapts to different test phases. The scenario temperature control strategy is applied to implement phased temperature control management according to different test phases (e.g., heating, stabilization, and cooling), generating phased temperature control management data. Abnormal conditions (such as temperature drift or temperature exceeding the specified value) are monitored during the temperature control process, and the temperature control strategy is automatically adjusted using an anomaly detection model, generating temperature control abnormality adjustment data. Data statistics and analysis are performed on the execution results, including temperature fluctuation range, power consumption, and response speed, to generate scenario-based thermal control performance data for semiconductor chips. To meet lightweight requirements, complex calculations in scenario-based thermal control strategies are simplified, such as through local optimization or edge computing solutions, to generate lightweight thermal control strategies. These lightweight thermal control strategies are deployed to semiconductor test systems, executing lightweight thermal control operations and ultimately generating scenario-based thermal control management data for semiconductor chips.

[0084] Preferably, step S1 includes the following steps:

[0085] Step S11: obtaining a semiconductor chip test area location based on a semiconductor test system;

[0086] Step S12: deploying temperature sensors at the semiconductor chip test area, and collecting semiconductor chip temperature distribution data at the semiconductor chip test area based on the deployed temperature sensors to obtain real-time semiconductor chip temperature distribution data;

[0087] Step S13: determining key thermodynamic parameters based on the material properties and structural design of the semiconductor chip to obtain the semiconductor chip thermodynamic parameters; performing chip spatial temperature distribution analysis on the semiconductor chip thermodynamic parameters using the real-time temperature distribution data of the semiconductor chip to generate a semiconductor chip thermodynamic parameter field distribution map;

[0088] Step S14: construct a high-level heat conduction model based on the thermodynamic parameter field distribution map of the semiconductor chip to generate a preliminary high-dimensional heat conduction model; calibrate the preliminary high-dimensional heat conduction model to generate high-dimensional heat conduction model calibration data; optimize the preliminary high-dimensional heat conduction model using the high-dimensional heat conduction model calibration data to generate a high-dimensional heat conduction model.

[0089] In an embodiment of the present invention, a semiconductor test system utilizes laser scanning or 3D scanning technology to precisely determine the location of a semiconductor chip's test area. The test system's sensors capture chip position data in real time and process it through algorithms to obtain accurate test area coordinates. This position data is aligned with the chip's physical coordinate system, providing an accurate reference frame for subsequent temperature distribution measurements. Appropriate temperature sensors (such as thermocouples, infrared sensors, or integrated temperature sensors) are selected to ensure high accuracy and real-time data acquisition capabilities. The temperature sensors are evenly distributed throughout the semiconductor chip's test area, ensuring coverage of all critical heat source areas, particularly power-intensive areas. The sensors begin collecting temperature data in real time. The data is transmitted wirelessly or via a wired interface to the data acquisition system, where it undergoes preprocessing (such as noise filtering and data compensation). Based on the collected temperature data, a real-time temperature distribution map of the semiconductor chip is generated, showing temperature gradients and hotspots at different locations. A preliminary estimate of thermodynamic parameters is performed based on the thermal conductivity and specific heat capacity of the semiconductor chip's material (such as silicon or gallium nitride). A preliminary thermal model is constructed based on the chip's geometric structure (such as chip thickness and surface coatings). Based on known material properties and structural design, key thermodynamic parameters such as thermal conductivity, thermal diffusivity, and specific heat are calculated to form a preliminary thermodynamic parameter set. Based on real-time temperature data and thermodynamic parameters, heat conduction simulation methods (such as finite element analysis and computational fluid dynamics) are used to conduct a detailed analysis of the temperature distribution within the chip. The temperature distribution is combined with the thermodynamic parameters to generate a three-dimensional thermodynamic parameter field distribution map, demonstrating the thermal response characteristics of different regions within the chip. Professional software (such as Matlab and COMSOL) is used to generate a visualization of the thermodynamic parameter field to assist in analyzing the thermal behavior of the chip under operating conditions. Based on the thermodynamic parameter field distribution map, a high-dimensional heat conduction model is constructed, taking into account multiple influencing factors such as material nonlinearity and boundary conditions. A comprehensive heat conduction model is established by integrating multiple physical fields, including thermodynamics, electricity, and mechanics. A preliminary heat conduction simulation is performed using a simplified model to verify that the model conforms to the heat conduction laws of the actual chip operation. Based on actual chip temperature distribution data, the preliminary heat conduction model is calibrated and the model parameters are adjusted to better fit the actual situation. By comparing the model-predicted temperature distribution with the actual measured data, the sources of error are analyzed and adjustments are made. Generate model calibration data, including calibrated parameter values, error correction values, etc.

[0090] Preferably, constructing a high-dimensional heat conduction model based on the thermodynamic parameter field distribution map of the semiconductor chip includes:

[0091] Based on the heat conduction equation, a mathematical model is established for the thermodynamic parameter field distribution diagram of the semiconductor chip to generate a thermal conduction mathematical model of the semiconductor chip. The formula for establishing the mathematical model is as follows:

[0092]

[0093] Where, Expressed as the temperature at a point Over time The rate of change, Expressed as the divergence of the heat flux density, Expressed as a gradient operator, Expressed as thermal conductivity, Expressed as temperature, Expressed as heat capacity, Expressed as a heat source term;

[0094] Introducing dimensional boundary conditions into the semiconductor chip heat conduction mathematical model to generate the semiconductor chip heat conduction dimensional boundary conditions, wherein the dimensional boundary conditions introduced include: introducing the temperature value of the fixed chip boundary, introducing the heat flux density of the given boundary, and introducing the heat exchange between the environment and the chip boundary;

[0095] The semiconductor chip heat conduction dimensional boundary conditions are used to discretize the semiconductor chip heat conduction mathematical model to generate a preliminary high-dimensional heat conduction model.

[0096] In the embodiment of the present invention, the heat conduction model through the semiconductor chip is based on the classical heat conduction equation, in which the temperature field changes over time due to the influence of the heat source and thermal conductivity. The heat conduction equation is as follows: Where, Expressed as the temperature at a point Over time The rate of change, Expressed as the divergence of the heat flux density, Expressed as a gradient operator, Expressed as thermal conductivity, Expressed as temperature, Expressed as heat capacity, Represented as a heat source term; for certain fixed regions of the chip (such as cooling zones or external cooling surfaces), the temperature is known. These regions can be defined with constant temperature values ​​as boundary conditions. Mathematically expressed as: Tboundary = T0, where T0 is the known boundary temperature. At the chip's outer boundaries or contact surfaces, a known heat flux exists. This heat flux is caused by heat exchange between the chip and the cooling device, air, or other materials. Mathematically expressed as: q⋅n^=qboundary, where q is the heat flux vector, n^ is the normal vector of the boundary surface, and qboundary is the known heat flux. Heat exchange between the chip surface and the external environment is often an important boundary condition. This can be accounted for using the convective heat transfer coefficient h and the ambient temperature Tenv. Mathematically expressed as: h(T−Tenv), where h is the convective heat transfer coefficient, representing the intensity of heat exchange between the surface and the environment, and Tenv is the ambient temperature. When establishing a mathematical model for heat conduction, the above boundary conditions are substituted into the model and applied to the discrete grid using interpolation methods. The heat conduction equation is discretized using the finite difference method (FDM), finite element method (FEM), or other numerical methods. For each grid node, the discretized heat conduction equation is applied: at each time step Δt, the temperature change at the node is calculated. For each spatial grid cell, an appropriate difference scheme is applied to approximate the spatial derivative of the heat conduction equation. The discretized heat conduction equation can be written as: in, and Respectively The temperature of each grid node at the current and previous moments, is the discretization coefficient of thermal conductivity, which represents the Hedi The heat conduction coupling relationship between the nodes is is the heat source term at the node Discrete representation of . Represented as a heat source term at the node The heat capacity at each location. The heat transfer coefficient matrix and heat source term vector obtained through the discretization process constitute the core of the high-dimensional heat conduction model. Numerical solvers (such as the conjugate gradient method and LU decomposition) are used to solve the discretized heat conduction equation, obtaining the temperature change at each grid node at different time steps. Comparison with experimental data or other known heat conduction data is performed to ensure model accuracy.

[0097] As an example of the present invention, refer to Figure 2 As shown, in this example, step S2 includes:

[0098] Step S21: using a high-dimensional heat conduction model to dynamically predict chip thermal effects on the real-time temperature distribution data of the semiconductor chip to generate chip thermal effect dynamic prediction data; performing time-step chip temperature change analysis on the chip thermal effect dynamic prediction data to generate time-step chip temperature change data;

[0099] Step S22: dividing the chip temperature change data of the time step into chip temperature scenarios based on a preset temperature change threshold to generate a first chip temperature scenario and a second chip temperature scenario; performing chip temperature control demand analysis on the real-time temperature distribution data of the semiconductor chip based on the first chip temperature scenario and the second chip temperature scenario to generate chip temperature control demand data;

[0100] Step S23: Optimizing the multi-point temperature control distribution of the first chip temperature scenario and the second chip temperature scenario according to the chip temperature control requirement data to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the temperature control optimization data for the first chip scenario and the temperature control optimization data for the second chip scenario;

[0101] Step S24: Perform chip adaptive thermal compensation on the first chip scene temperature control optimization data and the second chip scene temperature control optimization data to generate chip thermal compensation data; perform compensation feedback on the first chip scene temperature control optimization data and the second chip scene temperature control optimization data through the chip thermal compensation data to generate chip thermal compensation feedback data.

[0102] In an embodiment of the present invention, a dynamic prediction is performed by utilizing the established high-dimensional heat conduction model and inputting the real-time temperature distribution data of the semiconductor chip. The process is based on the following mathematical model: the real-time temperature distribution data Treal(x, y, z, t of the semiconductor chip, including the temperature distribution of the chip at the current moment t and the temperature distribution of the chip in the spatial region (x, y, z). Numerical simulation is performed using the heat conduction equation to predict the temperature change in the next time step. The temperature change in the next few time steps is predicted by the heat conduction model, and the dynamic prediction data of the chip thermal effect is generated, that is, the temperature change of the chip in the future time step. By performing time step analysis on the dynamic prediction data of the chip thermal effect, the temperature change of the chip in each time step is calculated, and the time step chip temperature change data is generated, which records the temperature distribution of the chip at different time steps. In order to predict the temperature change of the chip For effective management, you first need to set a preset temperature change threshold, which is used to distinguish different temperature scenarios. According to the working characteristics and thermal management requirements of the semiconductor chip, select appropriate temperature thresholds, such as 50°C, 70°C, and 100°C. Based on the preset temperature change threshold, the time step chip temperature change data is divided: The first chip temperature scenario: When the chip temperature is below a certain threshold (such as 50°C) at a certain moment, it belongs to the first chip temperature scenario. In this scenario, the thermal effect of the chip is small and the temperature control demand is low. The second chip temperature scenario: When the chip temperature exceeds a certain threshold (such as 70°C or 100°C), it belongs to the second chip temperature scenario. At this time, the thermal effect of the chip is The response is large, and more stringent temperature control measures are required. Based on the first chip temperature scenario and the second chip temperature scenario, the temperature control demand analysis of the real-time temperature distribution data of the semiconductor chip is performed to obtain the chip temperature control demand data. The analysis includes the following steps: The temperature control demand of the first chip temperature scenario usually means that the temperature is low or close to the normal operating range, and the temperature needs to be controlled by appropriate heat dissipation, heating, etc. The temperature control demand of the second chip temperature scenario is that when the chip temperature is high, stronger cooling is required, involving a more complex thermal management system, such as using more efficient heat dissipation systems, fans, liquid cooling, etc. to maintain the chip temperature within a safe range. Through the analysis of the chip temperature control demand data, based on the first chip The goal of this step is to effectively distribute temperature control measures to different areas of the chip to ensure the overall thermal management effect of the chip: including the generation of temperature control optimization data for the first chip scenario and the second chip scenario, and determining the temperature control intensity and adjustment method for each area. Based on the temperature control optimization data for the first chip scenario and the second chip scenario, adaptive thermal compensation of the chip is performed. This process takes into account local temperature changes under temperature scenarios and makes dynamic adjustments based on the working characteristics of the chip: in high temperature environments, the chip's thermal compensation mechanism will automatically enhance cooling measures, while in low temperature environments, it will reduce power consumption or adjust temperature control measures.Based on chip thermal compensation data, compensation feedback is provided for the temperature control optimization data for the first and second chip scenarios. Through this feedback mechanism, temperature control measures are dynamically adjusted to ensure that the chip temperature remains within the ideal operating range. This data includes a real-time temperature control optimization strategy, which is adjusted based on feedback from actual temperature changes to gradually optimize the temperature control solution and ensure stable chip operation under different environmental conditions.

[0103] Preferably, step S23 includes the following steps:

[0104] Step S231: measuring the temperature distribution of the first chip temperature scenario and the second chip temperature scenario according to the chip temperature control requirement data to generate initial temperature field data for the first scenario and initial temperature field data for the second scenario; performing data fitting on the initial temperature field data for the first scenario and the initial temperature field data for the second scenario to generate initial temperature field distribution data;

[0105] Step S232: configuring the high-temperature scenario multi-point controller parameters for the initial temperature field data of the first scenario to generate the first scenario multi-point controller configuration parameters, wherein the high-temperature scenario multi-point controller parameter configuration includes a power adjustment range and a response time;

[0106] Step S233: configuring the low-temperature scenario multi-point controller parameters for the initial temperature field data of the second scenario to generate the second scenario multi-point controller configuration parameters, wherein the low-temperature scenario multi-point controller parameter configuration includes cooling efficiency and steady-state maintenance capability;

[0107] Step S234: Perform real-time temperature control signal distribution on the initial temperature field distribution data through the first scene multi-point controller configuration parameters and the second scene multi-point controller configuration parameters to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the first chip scene temperature control optimization data and the second chip scene temperature control optimization data.

[0108] In this embodiment of the present invention, data fitting is performed on the initial temperature field data for the first scenario and the initial temperature field data for the second scenario. The purpose of data fitting is to convert the temperature distribution data into a smooth temperature field model using numerical methods for subsequent optimization and analysis. Fitting techniques (such as least squares or interpolation) are used to convert the two sets of initial temperature field data into a continuous, smooth temperature field distribution data set, ensuring the accuracy and operability of the temperature distribution. The first chip temperature scenario typically indicates that the chip is in a higher temperature range, requiring enhanced cooling. In this case, the multi-point controller in the temperature control system needs to be configured according to the characteristics of this scenario. The controller's power output range is set to ensure that it can meet the requirements of different temperature zones. In high-temperature scenarios, the controller needs to provide a higher cooling power to reduce chip temperature. The controller's response time to temperature changes is set to ensure that control parameters can be adjusted quickly during temperature changes to avoid excessive temperature fluctuations that could lead to chip overheating. Converting this configuration into the multi-point controller configuration parameters for the first scenario provides the controller with clear adjustment indicators, enabling it to maintain chip temperature within a safe range in high-temperature environments. For the second chip temperature scenario, when the chip is in a lower temperature range, the multi-point controllers in the temperature control system need to be optimized for low-temperature conditions. In this low-temperature scenario, the controller's cooling system does not need to be overly powerful; instead, cooling efficiency must be optimized to maintain the chip temperature within the optimal operating range while avoiding overcooling. In this low-temperature scenario, the temperature control system must possess strong steady-state maintenance capabilities, effectively maintaining the chip within the preset temperature range over extended periods of operation and preventing significant temperature fluctuations. Based on the requirements of this low-temperature scenario, configuration parameters for the multi-point controllers in this second scenario are generated to ensure that the temperature control system can provide precise temperature regulation under low-temperature conditions. Based on the controller configuration parameters for each scenario, control signals are dynamically generated to meet current temperature requirements. These signals are transmitted to the multi-point controllers to guide their corresponding temperature control operations. The generated control signals are distributed to each control point, ensuring that different areas of the chip are appropriately regulated according to temperature requirements. Through the distribution of these temperature control signals, the chip's temperature control system adjusts the temperature of each area. Ultimately, through real-time adjustments, optimized temperature control distribution data is generated.

[0109] Preferably, distributing the real-time temperature control signal to the initial temperature field distribution data by using the first scenario multipoint controller configuration parameters and the second scenario multipoint controller configuration parameters includes the following:

[0110] Generate a control signal for the initial temperature field distribution data using the first scene multipoint controller configuration parameters and the second scene multipoint controller configuration parameters to obtain a first scene control signal and a second scene control signal;

[0111] Performing signal control area identification on the first scene control signal and the second scene control signal to obtain a first scene control signal area and a second scene control signal area; performing control signal area overlap on the first scene control signal area and the second scene control signal area to obtain a control boundary area signal;

[0112] Based on the boundary conditions of the semiconductor chip's thermal conduction dimension, the control boundary area signal is adjusted to generate a control boundary area adjustment signal; according to the control boundary area adjustment signal, the first scene control signal area and the second scene control signal area are distributed with signals to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the first chip scene temperature control optimization data and the second chip scene temperature control optimization data.

[0113] In embodiments of the present invention, in high-temperature scenarios, the temperature of a semiconductor chip is high, necessitating cooling. The control signal primarily regulates the power output of a heat sink (such as a fan or heat pipe) to enhance cooling. This signal dynamically adjusts the power output based on data from a temperature sensor to reduce the chip temperature to a preset safe range. In low-temperature scenarios, the chip's temperature is too low, impacting its operating efficiency or stability. In this case, the chip's temperature needs to be adjusted by heating or reducing the cooling effect. The control signal adjusts the output of a heating device (such as a heater or temperature-controlled power supply) to ensure the chip temperature remains within the normal operating range. The control signals for these two scenarios are dynamically adjusted based on the actual chip temperature data to meet the temperature control requirements of the two different scenarios. After the temperature scenarios are divided, the areas where the temperature control signal is applied need to be further identified and delineated. This process aims to precisely control different parts of the chip, enabling localized regulation in high or low-temperature scenarios. Areas with higher temperatures require stronger cooling signals. Using data from the on-chip temperature sensors, these areas can be identified, enabling efficient cooling. For areas with lower temperatures, the temperature is adjusted by heating or reducing the cooling signal. This area includes components on the chip that are sensitive to low temperatures, such as the power supply or certain high-performance computing units. In actual temperature control, there will be some overlap between the temperature control signals of the first and second scenarios. This is especially true at the edge of the chip, where the temperature approaches the boundary between the two scenarios. To avoid uneven temperatures at this interface, precise adjustments are required. The interface is where the temperature control signals from the first (high) and second (low) scenarios converge. This area requires special attention to prevent interference between the two signals or excessively rapid temperature fluctuations. The signals in this interface are adjusted using the chip's thermal conductivity boundary conditions to ensure a smooth transition without drastic temperature fluctuations. These conditions include factors such as chip geometry, material thermal conductivity, and the temperature distribution in the boundary layer. Based on these boundary conditions, the temperature transfer patterns in the interface are calculated to optimally distribute the strength of the temperature control signal across the interface. By adjusting the temperature control signal in this interface, a smooth temperature transition between the high and low temperature scenarios is achieved, avoiding sudden temperature changes caused by excessively strong or weak temperature control signals, and protecting the chip from damage caused by temperature fluctuations. After adjusting the signal at the interface, the temperature control signal for the entire chip is finally optimized and distributed to ensure that the temperature control signal for each area meets the requirements of different scenarios. For high-temperature scenarios, the power of the heat sink is adjusted in real time to ensure that the high-temperature area of ​​the chip is effectively cooled to prevent overheating. For low-temperature scenarios, the cooling signal is increased or reduced to ensure that the low-temperature area does not cause unstable chip operation.

[0114] Preferably, step S24 includes the following steps:

[0115] Step S241: performing thermal behavior analysis on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal behavior data;

[0116] Step S242: performing closed-loop control on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data using the chip thermal behavior data to generate chip scenario temperature control closed-loop control data;

[0117] Step S243: Using an adaptive thermal compensation formula to perform real-time thermal compensation on the chip scene temperature control closed-loop control data to generate chip thermal compensation data;

[0118] Step S244: performing compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data using the chip thermal compensation data, thereby generating chip thermal compensation feedback data.

[0119] In this embodiment of the present invention, temperature control optimization data for a first chip scenario and a second chip scenario are collected, primarily including parameters such as temperature, power regulation, and response time. The chip's thermal behavior is modeled using the heat conduction equation and the material's thermophysical properties (such as thermal conductivity and specific heat). The modeling method includes calculating the temperature field distribution using the finite element method based on the chip's geometry and thermal conductivity characteristics. Combined with the optimization data, numerical simulation software (such as ANSYS and COMSOL) is used to simulate the chip's thermal behavior under different loads and environmental conditions. By analyzing parameters such as the chip's temperature distribution, heat flux, and heat dissipation efficiency, chip thermal behavior data is generated, reflecting the chip's thermal response and stability under different operating conditions. Based on the chip's thermal behavior data, an appropriate closed-loop control algorithm (such as PID control or fuzzy control) is selected to achieve real-time adjustment of the temperature control optimization data. The chip's temperature control signal is adjusted using proportional, integral, and differential algorithms to maintain the chip temperature within a preset range. Fuzzy logic is used to adjust the temperature control signal when temperature changes are complex or uncertain. The thermal behavior data is used to adjust the temperature control optimization data for the first and second chip scenarios in real time to ensure the temperature control strategy remains optimal. Based on real-time temperature control adjustment results, closed-loop control data for the chip scenario is generated to further optimize the chip's temperature regulation. An adaptive thermal compensation formula is designed to account for the chip's thermal response characteristics and real-time temperature changes, compensating for temperature control errors caused by environmental fluctuations, heat dissipation variations, and other factors. Based on real-time chip temperature changes and control data, the temperature control data is adaptively adjusted to compensate for chip thermal deviations. Using the adaptive thermal compensation formula, chip thermal compensation data is generated to ensure the stability and accuracy of chip temperature control under various conditions. A feedback mechanism is established using the thermal compensation data, returning this data to the temperature control system to adjust subsequent temperature control strategies. The compensated data is fed back to the control system to pre-adjust and optimize the temperature for the next cycle. Based on the compensation feedback data, the chip scenario temperature control optimization data is dynamically adjusted to optimize the temperature control strategy. The compensation feedback mechanism generates chip thermal compensation feedback data, recording temperature control adjustments, stability assessments, and compensation results during the compensation process to provide a basis for further optimization.

[0120] Preferably, the adaptive thermal compensation formula in step S243 is as follows:

[0121]

[0122] Where, Represented as at the current time and location The compensation temperature, Represented as at the current time and location The temperature error, Expressed as the compensation gain coefficient, Expressed as the temperature history integral coefficient, Represented as at the current time and location The actual measured temperature, Expressed as the feedback gain coefficient.

[0123] This paper analyzes and integrates an adaptive thermal compensation formula. This formula aims to dynamically compensate for the temperature error of the temperature control system, ensuring stable temperature control while maintaining high performance. It achieves adaptive regulation through three main components: current error, historical error integration, and real-time feedback. The current temperature error term in the formula is: It directly reflects the temperature error of the chip at the current moment. The greater the temperature deviation, the greater the compensation signal. Is the difference between the actual temperature and the target temperature, which determines the intensity of the compensation required. This term enables the system to respond to temperature errors in real time, ensuring that the chip temperature can quickly approach the target value. To adjust the response strength, ensure that the system can cope with sudden temperature fluctuations while preventing overcompensation. Historical temperature error integral term: Represents the accumulation of temperature errors over a period of time. It considers the impact of historical errors on current compensation through integration. The historical integral term can reduce the reaction delay of the temperature control system, avoid overreaction to instantaneous errors, and smooth the entire temperature control process. This avoids oscillation or instability caused by excessively fast response. Real-time temperature feedback term: Indicates that the compensation amount is adjusted based on the real-time temperature feedback signal. Feedback signal The actual temperature detected by the sensor reflects the actual condition of the chip at a certain moment. The real-time feedback term is used to modify the temperature control strategy, ensuring that the system dynamically adjusts the control signal according to the actual chip temperature to avoid discrepancies between theoretical predictions and actual conditions. Feedback enables the temperature control system to cope with external changes or internal uncertainties. The contribution of the feedback signal to the compensation can be flexibly adjusted to ensure more efficient and accurate compensation. When using the conventional adaptive thermal compensation formula in this field, the current time can be obtained. and location By applying the adaptive thermal compensation formula provided by the present invention, the compensation temperature at the current time can be calculated more accurately. and location The compensation temperature. This formula uses the real-time temperature error to drive a fast compensation response, while using historical errors and feedback to smooth the control process, ensuring that the temperature control process is both fast and accurate. The integral term of the historical temperature error avoids the system from overreacting to short-term fluctuations, thereby improving the stability of the system. Through the real-time feedback term and the adaptive gain coefficient ( ), which can self-adjust according to factors such as the real-time working status of the chip and changes in the external environment, ensuring that the system always maintains optimal performance under different working conditions.

[0124] As an example of the present invention, refer to Figure 3 As shown, in this example, step S3 includes:

[0125] Step S31: performing scenario-based testing on the optimized temperature control distribution data based on chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data;

[0126] Step S32: performing temperature control curve conversion on the semiconductor chip scene temperature control test data to generate a semiconductor chip scene temperature control curve; performing temperature control curve calibration on the semiconductor chip scene temperature control curve to generate a semiconductor chip scene temperature control calibration curve;

[0127] Step S33: Screening the optimal temperature control curve for the semiconductor chip scene temperature control calibration curve to obtain the optimal temperature control curve for the semiconductor chip scene.

[0128] In this embodiment of the present invention, temperature adjustment information and compensated temperature control data are collected based on chip thermal compensation feedback data. This data includes feedback signals from the temperature control system, real-time temperature, power regulation, and other information. Different test scenarios are designed based on the chip's operating conditions and external environment (such as load, heat dissipation conditions, and ambient temperature). Examples include high-load scenarios, low-load scenarios, and constant-temperature scenarios. In each scenario, the temperature control profile is tested based on the thermal compensation feedback data. Chip indicators such as temperature response, power consumption, and heat dissipation effectiveness are monitored to ensure that the test process covers the chip's operating status. During the test process, real-time temperature control data is collected and recorded to form semiconductor chip scenario temperature control test data. Based on the test results, semiconductor chip scenario temperature control test data is generated. This data includes temperature change curves, power regulation data, and temperature control optimization results for each test scenario. Filtering algorithms (such as Kalman filtering and sliding average filtering) are used to eliminate noise from the test data and extract a smooth temperature curve. Curve fitting methods (such as polynomial fitting and spline fitting) are used to convert the temperature control data into a standard temperature control curve. The curve should be able to demonstrate the pattern of temperature variation over time or power. The converted curves reflect the chip's temperature control performance under different scenarios, including temperature trends over time. These curves can display information such as thermal rise and cooling processes, providing a basis for subsequent temperature control optimization. Calibration eliminates curve deviations caused by factors such as equipment errors and test environment variations. The goal of calibration is to ensure the temperature control accuracy of the chip temperature control system under different environments. The measured temperature control curves are corrected using linear transformation to ensure a linear relationship between the chip temperature and the control signal. For complex nonlinear temperature control systems, more sophisticated algorithms such as polynomial fitting and neural networks are used to precisely calibrate the temperature control curves. Based on the chip's design requirements, target parameters for the temperature control curves, such as temperature stability, response time, and energy efficiency, are set. The curve with the smoothest temperature change and the lowest error is selected. The curve with the lowest power consumption within the set temperature range is selected. The curve that maintains temperature stability under various load and environmental conditions is selected. Based on the stability and accuracy requirements of the temperature control system, the optimal one is selected from multiple calibrated temperature control curves to serve as the final temperature control standard curve. This calibrated and selected temperature control curve is then used as the optimal temperature control curve for the chip temperature control system. This curve can provide the most accurate and stable temperature control effect, ensuring the most efficient temperature management of the chip under various working conditions.

[0129] Preferably, step S4 includes the following steps:

[0130] Step S41: constructing a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scenario to generate a temperature control strategy for the semiconductor chip scenario;

[0131] Step S42: Upload the semiconductor chip scene temperature control strategy to the cloud platform for automatic push, and generate automatic temperature control strategy deployment data; perform temperature control management on the automatic temperature control strategy deployment data, and generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations of the semiconductor test system.

[0132] In this embodiment of the present invention, the chip's thermal behavior and thermal management objectives are analyzed based on its temperature control requirements under different operating conditions. Temperature control objectives such as temperature accuracy, stability, and power consumption limits are considered. The parameters of the temperature control strategy, including the temperature setting range, temperature control response time, and power adjustment range, are determined to ensure that it meets the chip's temperature management requirements under various load conditions. Based on the optimal temperature control curve for semiconductor chip scenarios, the temperature control strategy is designed using mathematical modeling methods (such as PID control, fuzzy control, and neural network control). This model should be able to adjust temperature control parameters in real time to address temperature fluctuations under different operating conditions. The core of the temperature control strategy is to adjust power output based on real-time temperature data and external environmental changes to ensure that the chip temperature remains within the optimal range. The algorithm and scheduling scheme for the temperature control strategy are determined to support dynamic adjustment and feedback, ensuring the efficiency and stability of the temperature control system. Based on the initial construction of the temperature control strategy, simulation tests are conducted to evaluate its effectiveness in regulating chip temperature and ensure that the strategy operates stably under high load, low load, and other typical operating conditions. Optimize the temperature control strategy and adjust control parameters and algorithms to improve temperature control response speed and stability, while reducing overshoot and overheating. Based on the model and optimization, a scenario-specific temperature control strategy for semiconductor chips is generated to ensure it adapts to the chip's operating environment and mission requirements. The optimized scenario-specific temperature control strategy for semiconductor chips is transmitted to the cloud platform via an API or file upload. The cloud platform must include temperature control policy management and deployment capabilities to ensure remote access and control of the strategy. The upload process ensures data security and integrity, and encrypted transmission can be used to prevent data tampering during transmission. Configure an automated push mechanism on the cloud platform to automatically deploy the temperature control strategy to various test equipment or related chip systems through cloud services. The pushed temperature control strategy includes real-time temperature control algorithms, parameter settings, and temperature feedback mechanisms, enabling automatic execution of temperature control tasks on the target equipment. During the automated push process, the cloud platform records information such as the policy version, deployment time, and device status for each deployment, generating automated temperature control strategy deployment data. This deployment data includes the temperature control policy configuration file, push records, and device feedback for subsequent management and analysis. A temperature control management system is established within the cloud platform to monitor the temperature status of each device in real time, ensuring that temperature control strategies are effective and making necessary adjustments. The temperature control management system receives temperature feedback data from each chip or device, compares it with the set optimal temperature control curve, and automatically adjusts the temperature control strategy. The management system also considers external environmental changes, such as temperature and humidity, to adjust and optimize the temperature control strategy as needed. The temperature control management system generates semiconductor chip scenario temperature control management data, including real-time temperature data, control signals, and adjustment parameters.

[0133] The present invention is therefore intended to be illustrative and non-restrictive in all respects, with the scope of the invention being defined by the appended claims rather than the foregoing description, and all changes that come within the meaning and range of equivalents of the application documents are intended to be embraced therein.

[0134] The foregoing description is intended only to provide specific embodiments of the present invention, which will enable those skilled in the art to understand and implement the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but is to be construed in the widest possible manner consistent with the principles and novel features disclosed herein.

Claims

1. A lightweight temperature control method based on a semiconductor test system, characterized in that: The following steps are involved: Step S1: obtaining the location of a semiconductor chip test area; collecting chip temperature distribution data at the location of the semiconductor chip test area to obtain real-time temperature distribution data of the semiconductor chip; constructing a heat conduction model based on the real-time temperature distribution data of the semiconductor chip to generate a high-dimensional heat conduction model; Step S2: using a high-dimensional heat conduction model to divide the real-time temperature distribution data of the semiconductor chip into chip temperature scenarios to generate a first chip temperature scenario and a second chip temperature scenario; performing multi-point temperature control distribution optimization on the first chip temperature scenario and the second chip temperature scenario to generate optimized temperature control distribution data; performing chip adaptive thermal compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal compensation feedback data; Step S3: performing scenario-based testing on the optimized temperature control distribution data based on chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data; Screen the optimal temperature control curve for semiconductor chip scenario temperature control test data to obtain the optimal temperature control curve for semiconductor chip scenario; Step S4: constructing a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scenario to generate a temperature control strategy for the semiconductor chip scenario; Perform temperature control management on semiconductor chip scene temperature control strategies and generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations on semiconductor test systems.

2. The lightweight temperature control method based on a semiconductor test system according to claim 1, characterized in that: Step S1 includes the following steps: Step S11: obtaining a semiconductor chip test area location based on a semiconductor test system; Step S12: deploying temperature sensors at the semiconductor chip test area, and collecting semiconductor chip temperature distribution data at the semiconductor chip test area based on the deployed temperature sensors to obtain real-time semiconductor chip temperature distribution data; Step S13: determining key thermodynamic parameters based on the material properties and structural design of the semiconductor chip to obtain the semiconductor chip thermodynamic parameters; performing chip spatial temperature distribution analysis on the semiconductor chip thermodynamic parameters using the real-time temperature distribution data of the semiconductor chip to generate a semiconductor chip thermodynamic parameter field distribution map; Step S14: construct a high-dimensional heat conduction model based on the thermodynamic parameter field distribution map of the semiconductor chip to generate a preliminary high-dimensional heat conduction model; calibrate the preliminary high-dimensional heat conduction model to generate high-dimensional heat conduction model calibration data; optimize the preliminary high-dimensional heat conduction model using the high-dimensional heat conduction model calibration data to generate a high-dimensional heat conduction model.

3. The lightweight temperature control method based on a semiconductor test system according to claim 2, characterized in that: The construction of a high-dimensional heat conduction model based on the thermodynamic parameter field distribution map of the semiconductor chip includes: Based on the heat conduction equation, a mathematical model is established for the thermodynamic parameter field distribution diagram of the semiconductor chip to generate a thermal conduction mathematical model of the semiconductor chip. The formula for establishing the mathematical model is as follows: Where, Expressed as the temperature at a point Over time The rate of change, Expressed as the divergence of the heat flux density, Expressed as a gradient operator, Expressed as thermal conductivity, Expressed as temperature, Expressed as heat capacity, Expressed as a heat source term; Introducing dimensional boundary conditions into the semiconductor chip heat conduction mathematical model to generate the semiconductor chip heat conduction dimensional boundary conditions, wherein the dimensional boundary conditions introduced include: introducing the temperature value of the fixed chip boundary, introducing the heat flux density of the given boundary, and introducing the heat exchange between the environment and the chip boundary; The semiconductor chip heat conduction dimensional boundary conditions are used to discretize the semiconductor chip heat conduction mathematical model to generate a preliminary high-dimensional heat conduction model.

4. The lightweight temperature control method based on a semiconductor test system according to claim 1, characterized in that: Step S2 includes the following steps: Step S21: using a high-dimensional heat conduction model to dynamically predict chip thermal effects on the real-time temperature distribution data of the semiconductor chip to generate chip thermal effect dynamic prediction data; performing time-step chip temperature change analysis on the chip thermal effect dynamic prediction data to generate time-step chip temperature change data; Step S22: dividing the chip temperature change data of the time step into chip temperature scenarios based on a preset temperature change threshold to generate a first chip temperature scenario and a second chip temperature scenario; performing chip temperature control demand analysis on the real-time temperature distribution data of the semiconductor chip based on the first chip temperature scenario and the second chip temperature scenario to generate chip temperature control demand data; Step S23: Optimizing the multi-point temperature control distribution of the first chip temperature scenario and the second chip temperature scenario according to the chip temperature control requirement data to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the temperature control optimization data for the first chip scenario and the temperature control optimization data for the second chip scenario; Step S24: Perform chip adaptive thermal compensation on the first chip scene temperature control optimization data and the second chip scene temperature control optimization data to generate chip thermal compensation data; perform compensation feedback on the first chip scene temperature control optimization data and the second chip scene temperature control optimization data through the chip thermal compensation data to generate chip thermal compensation feedback data.

5. The lightweight temperature control method based on a semiconductor test system according to claim 4, characterized in that: Step S23 includes the following steps: Step S231: measuring the temperature distribution of the first chip temperature scenario and the second chip temperature scenario according to the chip temperature control requirement data to generate initial temperature field data for the first scenario and initial temperature field data for the second scenario; performing data fitting on the initial temperature field data for the first scenario and the initial temperature field data for the second scenario to generate initial temperature field distribution data; Step S232: configuring the high-temperature scenario multi-point controller parameters for the initial temperature field data of the first scenario to generate the first scenario multi-point controller configuration parameters, wherein the high-temperature scenario multi-point controller parameter configuration includes a power adjustment range and a response time; Step S233: configuring the low-temperature scenario multi-point controller parameters for the initial temperature field data of the second scenario to generate the second scenario multi-point controller configuration parameters, wherein the low-temperature scenario multi-point controller parameter configuration includes cooling efficiency and steady-state maintenance capability; Step S234: Perform real-time temperature control signal distribution on the initial temperature field distribution data through the first scene multi-point controller configuration parameters and the second scene multi-point controller configuration parameters to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the first chip scene temperature control optimization data and the second chip scene temperature control optimization data.

6. The lightweight temperature control method based on a semiconductor test system according to claim 5, characterized in that: Distributing the real-time temperature control signal based on the initial temperature field distribution data using the first scenario multipoint controller configuration parameters and the second scenario multipoint controller configuration parameters includes the following: Generate a control signal for the initial temperature field distribution data using the first scene multipoint controller configuration parameters and the second scene multipoint controller configuration parameters to obtain a first scene control signal and a second scene control signal; Performing signal control area identification on the first scene control signal and the second scene control signal to obtain a first scene control signal area and a second scene control signal area; performing control signal area overlap on the first scene control signal area and the second scene control signal area to obtain a control boundary area signal; Based on the boundary conditions of the semiconductor chip's thermal conduction dimension, the control boundary area signal is adjusted to generate a control boundary area adjustment signal; according to the control boundary area adjustment signal, the first scene control signal area and the second scene control signal area are distributed with signals to generate optimized temperature control distribution data, wherein the optimized temperature control distribution data includes the first chip scene temperature control optimization data and the second chip scene temperature control optimization data.

7. The lightweight temperature control method based on a semiconductor test system according to claim 4, characterized in that: Step S24 includes the following steps: Step S241: performing thermal behavior analysis on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data to generate chip thermal behavior data; Step S242: performing closed-loop control on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data using the chip thermal behavior data to generate chip scenario temperature control closed-loop control data; Step S243: Using an adaptive thermal compensation formula to perform real-time thermal compensation on the chip scene temperature control closed-loop control data to generate chip thermal compensation data; Step S244: performing compensation feedback on the first chip scenario temperature control optimization data and the second chip scenario temperature control optimization data using the chip thermal compensation data, thereby generating chip thermal compensation feedback data.

8. The lightweight temperature control method based on a semiconductor test system according to claim 7, characterized in that: The adaptive thermal compensation formula in step S243 is as follows: Where, Represented as at the current time and location The compensation temperature, Represented as at the current time and location The temperature error, Expressed as the compensation gain coefficient, Expressed as the temperature history integral coefficient, Represented as at the current time and location The actual measured temperature, Expressed as the feedback gain coefficient.

9. The lightweight temperature control method based on a semiconductor test system according to claim 1, characterized in that: Step S3 includes the following steps: Step S31: performing scenario-based testing on the optimized temperature control distribution data based on chip thermal compensation feedback data to generate semiconductor chip scenario temperature control test data; Step S32: performing temperature control curve conversion on the semiconductor chip scene temperature control test data to generate a semiconductor chip scene temperature control curve; performing temperature control curve calibration on the semiconductor chip scene temperature control curve to generate a semiconductor chip scene temperature control calibration curve; Step S33: Screening the optimal temperature control curve for the semiconductor chip scene temperature control calibration curve to obtain the optimal temperature control curve for the semiconductor chip scene.

10. The lightweight temperature control method based on a semiconductor test system according to claim 1, characterized in that: Step S4 includes the following steps: Step S41: constructing a temperature control strategy based on the optimal temperature control curve of the semiconductor chip scenario to generate a temperature control strategy for the semiconductor chip scenario; Step S42: Upload the semiconductor chip scene temperature control strategy to the cloud platform for automatic push, and generate automatic temperature control strategy deployment data; perform temperature control management on the automatic temperature control strategy deployment data, and generate semiconductor chip scene temperature control management data to perform lightweight temperature control operations of the semiconductor test system.

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