Nanometer cold cathode electron source array and preparation method thereof

Abstract

The invention relates to the technical field of vacuum microelectronic devices, in particular to a nano cold cathode electron source array and a preparation method thereof, and the nano cold cathode electron source array comprises a substrate; the bottom cathode electrode strips are arranged in parallel; the bottom gate electrode strips are arranged in parallel; the insulating layer covers and separates the bottom cathode electrode strip and the bottom gate electrode strip, and the insulating layer is located at the top of the substrate; a top cathode electrode and a top gate electrode which are manufactured at the top of the insulating layer are respectively connected with the bottom cathode electrode strip and the bottom gate electrode strip through the first etching through hole and the second etching through hole; and the composite cold cathode comprises a nano cold cathode manufactured at the top of the top cathode electrode and a surface film coating the nano cold cathode. According to the invention, the conductivity, thermal conductivity, work function and other characteristics of the composite cold cathode can be regulated and controlled through the surface film, the field emission characteristic of the nano cold cathode in a cold cathode electron source is improved, large-area preparation can be realized, and the application of the cold cathode electron source in a large-area flat X-ray source device is expanded.

Description

Technical Field

[0001] The present invention relates to the technical field of vacuum microelectronic devices, and more specifically, to a nano cold cathode electron source array and a preparation method thereof. Background Art

[0002] Cold cathode electron sources are based on the principle of field electron emission and have the advantages of fast response speed, low power consumption, long life and large-area emission. Large-area addressable cold cathode electron source arrays have the function of large-area addressable emission and can be applied to flat-panel X-ray sources, flat-panel displays and other vacuum microelectronic devices, parallel electron beam lithography and detection equipment, and have important practical significance.

[0003] Industry insiders have produced a molybdenum cone-shaped addressable cold cathode array structure with a gate. By applying voltage to the control gate to increase the electric field strength at the tip, field-induced electron emission at a lower anode voltage can be achieved. However, the manufacturing process of the cone-shaped cathode is complex and costly, making it difficult to realize large-area field emission electron source devices.

[0004] Quasi-one-dimensional nanomaterials such as carbon nanotubes and semiconductor nanowires have the advantages of high aspect ratio and excellent field emission characteristics. Their preparation methods can be combined with microelectronic device processing technology to realize large-area cold cathode electron sources.

[0005] The prior art discloses an addressable nano cold cathode electron source array and a method for manufacturing the same, wherein vertically distributed bottom cathode electrode strips and bottom gate electrode strips are independently prepared in layers on a substrate, and are respectively connected to the top cathode electrode and the top gate electrode by etching through holes, thereby achieving high-reliability row-column addressed emission; however, the types of quasi-one-dimensional nanomaterials that can be grown in the gate structure cold cathode electron source are limited, and the growth process of the quasi-one-dimensional nanomaterials is also affected by the complex device structure, making it difficult to further improve the field emission of the cold cathode electron source. Summary of the invention

[0006] The purpose of the present invention is to overcome the deficiency of the prior art that the field emission performance of cold cathode electron sources is difficult to further improve, to provide a nano cold cathode electron source array and a preparation method thereof, to improve the field emission performance of cold cathode electron sources, and to expand the application of cold cathode electron sources in large-area flat-panel X-ray source devices.

[0007] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0008] A nano cold cathode electron source array is provided, comprising:

[0009] substrate;

[0010] Bottom cathode electrode strips arranged in parallel;

[0011] Bottom gate electrode strips arranged in parallel;

[0012] an insulating layer covering the bottom cathode electrode strip and the bottom gate electrode strip, the insulating layer being located on top of the substrate, the bottom cathode electrode strip and the bottom gate electrode strip being separated by the insulating layer;

[0013] A first etched through hole and a second etched through hole are formed in the insulating layer, wherein the first etched through hole extends from the top surface of the insulating layer to the top of the bottom cathode electrode strip, and the second etched through hole extends from the top surface of the insulating layer to the top of the bottom gate electrode strip;

[0014] A top cathode electrode and a top gate electrode are formed on the top of the insulating layer, wherein the top gate electrode is arranged around the top cathode electrode, the top cathode electrode is connected to the bottom cathode electrode strip through the first etched through hole, and the top gate electrode is connected to the bottom gate electrode strip through the second etched through hole;

[0015] It also includes a composite cold cathode, which includes a nano cold cathode made on the top of the top cathode electrode and a surface film covering the nano cold cathode.

[0016] The nano cold cathode electron source array of the present invention has a top cathode electrode connected to a bottom cathode electrode strip through a first etched through hole, and a top grid electrode connected to a bottom grid electrode strip through a second etched through hole. When working, an anode plate is placed parallel to a plane of the nano cold cathode electron source array at a certain distance, a high voltage is applied to the anode plate, and a driving voltage can be controlled by selectively applying voltage to different top grid electrodes and top cathode electrodes, thereby realizing the turning on, regulation and shutting off of electron emission, and realizing addressable electron emission. The conductivity, thermal conductivity, work function and other properties of the composite cold cathode can be regulated by a surface film, thereby improving the field emission properties of the nano cold cathode in the cold cathode electron source, and can be prepared on a large area, thereby expanding the application of cold cathode electron sources in large-area flat-panel X-ray source devices.

[0017] Furthermore, the surface film includes a metal film, a metal nitride film or a metal oxide film having high electrical conductivity, high thermal conductivity and low work function.

[0018] Furthermore, it also includes a focusing electrode formed on the top of the second insulating layer, and the focusing electrode is arranged around the top gate electrode.

[0019] Furthermore, the shape of the nano cold cathode is a symmetrical figure.

[0020] Furthermore, the bottom cathode electrode strips and the bottom gate electrode strips are arranged in parallel.

[0021] Furthermore, the bottom cathode electrode strip and the bottom gate electrode strip are arranged vertically, the insulating layer includes a first insulating layer and a second insulating layer, the bottom cathode electrode strip is located on the top of the substrate, the first insulating layer covers the bottom cathode electrode strip, the bottom gate electrode strip is located on the top of the first insulating layer, and the second insulating layer covers the bottom gate electrode strip.

[0022] The present invention also provides a method for preparing a nano cold cathode electron source array, comprising the following steps:

[0023] S1: cleaning substrate;

[0024] S2: making bottom cathode electrode strips arranged in parallel on the top of the substrate;

[0025] S3: Covering a first insulating layer on top of the bottom cathode electrode strip;

[0026] S4: making bottom gate electrode strips arranged in parallel on the top of the first insulating layer, so that the bottom gate electrode strips are vertically distributed with the bottom cathode electrode strips;

[0027] S5: Covering the top of the bottom gate electrode strip with a second insulating layer;

[0028] S6: etching a first etching through hole in the second insulating layer and the first insulating layer to expose the bottom cathode electrode strip; etching a second etching through hole in the second insulating layer to expose the bottom gate electrode strip;

[0029] S7: forming a top cathode electrode and a top gate electrode on the top of the second insulating layer, so that the top cathode electrode is connected to the bottom cathode electrode strip through the first etched through hole, and the top gate electrode is connected to the bottom gate electrode strip through the second etched through hole;

[0030] S8: locally forming a cold cathode pre-grown thin film on the top cathode electrode;

[0031] S9: Reactively growing a nano cold cathode on the cold cathode pre-grown thin film;

[0032] S10: preparing a surface film on the nano cold cathode to form a composite cold cathode.

[0033] The preparation method of the nano cold cathode electron source array of the present invention connects the top cathode electrode to the bottom cathode electrode strip through a first etched through hole, and connects the top grid electrode to the bottom grid electrode strip through a second etched through hole. When working, the anode plate is placed parallel to the plane of the nano cold cathode electron source array at a certain distance, and a high voltage is applied to the anode plate. By selectively applying voltage to different top grid electrodes and top cathode electrodes, the driving voltage can be controlled, thereby realizing the opening, regulation and shutoff of electron emission, realizing addressable electron emission, and regulating the electrical conductivity, thermal conductivity, work function and other properties of the composite cold cathode through the surface film, improving the field emission characteristics of the nano cold cathode in the cold cathode electron source, and expanding the application of the cold cathode electron source in large-area flat-panel X-ray source devices.

[0034] Preferably, in step S7, a focusing electrode is arranged on the top of the second insulating layer and surrounding the top gate electrode.

[0035] Preferably, in step S10, the process of preparing the composite cold cathode is:

[0036] S101: coating photoresist on the surface of the electron source array and baking;

[0037] S102: using a mask having a cathode pattern, aligning using alignment marks of an electron source array, and using an ultraviolet mask;

[0038] S103: developing the exposed electron source array;

[0039] S104: preparing a surface film on the electron source array by a magnetron sputtering method, wherein the surface film is a metal nitride film;

[0040] S105: remove the glue to obtain a composite cold cathode.

[0041] Preferably, in step S10, the process of preparing the composite cold cathode is:

[0042] S106: aligning the metal mask onto the surface of the electron source array;

[0043] S107: preparing a metal oxide film on the surface of the electron source array covered with the metal mask by an atomic layer deposition method;

[0044] S108: Remove the metal mask to obtain a composite cold cathode.

[0045] Compared with the prior art, the present invention has the following beneficial effects:

[0046] By forming a composite cold cathode on the surface thin film coated on the nano cold cathode, the start-up battery and large current emission capabilities of the nano cold cathode can be regulated, the field emission performance of the cold cathode electron source can be improved, and the application of the cold cathode electron source in large-area flat-panel X-ray source devices can be expanded. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 Schematic diagram of the structure of a nano cold cathode electron source array in a first viewing angle in an embodiment of the present invention;

[0048] Figure 2 is a schematic structural diagram of a nano cold cathode electron source array in a second viewing angle in an embodiment of the present invention;

[0049] Figure 3 Schematic diagram of the structure of the composite cold cathode in an embodiment of the present invention;

[0050] Figure 4 A diagram showing the preparation process of a nano cold cathode electron source array according to an embodiment of the present invention;

[0051] Figure 5 This is a diagram of the preparation process of the composite cold cathode in the third embodiment of the present invention;

[0052] Figure 6 This is a diagram of the preparation process of the composite cold cathode in Example 4 of the present invention.

[0053] In the accompanying drawings: 1-substrate; 2-bottom cathode electrode strip; 3-first insulating layer; 4-bottom gate electrode strip; 5-second insulating layer; 6-first etched through hole; 7-second etched through hole; 8-top cathode electrode; 9-top gate electrode; 10-focusing electrode; 11-cold cathode pre-grown film; 12-composite cold cathode; 121-nanometer cold cathode; 122-surface film; 13-photoresist; 14-mask; 15-metal mask. DETAILED DESCRIPTION

[0054] The present invention is further described below in conjunction with specific implementation methods. The accompanying drawings are only used for exemplary descriptions and are only schematic diagrams, not actual drawings, and cannot be understood as limiting this patent; in order to better illustrate the embodiments of the present invention, some parts of the accompanying drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the accompanying drawings may be omitted.

[0055] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right" and the like indicate directions or positional relationships based on the directions or positional relationships shown in the drawings, it is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes and cannot be understood as limitations on this patent. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0056] Embodiment 1

[0057] This embodiment is the first embodiment of the nano cold cathode electron source array. Figures 1 to 3 As shown, it includes: a substrate 1; bottom cathode electrode strips 2 arranged in parallel; bottom gate electrode strips 4 arranged in parallel; an insulating layer covering the bottom cathode electrode strips 2 and the bottom gate electrode strips 4, the insulating layer is located on the top of the substrate 1, and the bottom cathode electrode strips 2 and the bottom gate electrode strips 4 are separated by the insulating layer; a first etched through hole 6 and a second etched through hole 7 are opened in the insulating layer, the first etched through hole 6 extends from the top surface of the insulating layer to the top of the bottom cathode electrode strip 2, and the second etched through hole 7 extends from the top surface of the insulating layer to the top of the bottom gate electrode strip 4; a top cathode electrode 8 and a top gate electrode 9 are made on the top of the insulating layer, the top gate electrode 9 is arranged around the top cathode electrode 8, the top cathode electrode 8 is connected to the bottom cathode electrode strip 2 through the first etched through hole 6, and the top gate electrode 9 is connected to the bottom gate electrode strip 4 through the second etched through hole 7; and also includes a composite cold cathode 12, the composite cold cathode 12 includes a nano cold cathode 121 made on the top of the top cathode electrode 8 and a surface film 122 covering the nano cold cathode 121.

[0058] In the above-mentioned nano cold cathode electron source array, the top cathode electrode 8 is connected to the bottom cathode electrode strip 2 through the first etched through hole 6, and the top gate electrode 9 is connected to the bottom gate electrode strip 4 through the second etched through hole 7. When working, the anode plate is placed parallel to the plane of the nano cold cathode 121 electron source array at a certain distance, and a high voltage is applied to the anode plate. By selectively applying voltage to different top gate electrodes 9 and top cathode electrodes 8, the driving voltage can be controlled to realize the opening, regulation and shutdown of electron emission, and realize addressable electron emission. The conductivity, thermal conductivity, work function and other properties of the composite cold cathode 12 can be adjusted through the surface film 122, thereby improving the field emission characteristics of the nano cold cathode 121 in the cold cathode electron source. It can be prepared on a large area, expanding the application of cold cathode electron sources in large-area flat-panel X-ray source devices.

[0059] The surface film 122 includes a metal film, a metal nitride film or a metal oxide film with high electrical conductivity, high thermal conductivity and low work function, including Au, Pt, Ag, Cu, Fe, TiN, CoN, In2O3, Ga2O3, etc. The thickness of the surface film 122 is 1nm-15nm.

[0060] like Figure 1 , Figure 2 As shown, it also includes a focusing electrode 10 formed on the top of the second insulating layer 5, and the focusing electrode 10 is arranged around the top grid electrode 9. During operation, by applying a negative voltage to the focusing electrode 10, the divergence of the electron beam can be improved, the focal spot size can be reduced, and the display resolution can be improved.

[0061] The shape of the nano cold cathode 121 is a symmetrical pattern. Specifically, the shape of the nano cold cathode 121 can be circular, annular or polygonal. The symmetrical pattern of the nano cold cathode 121 is conducive to the uniformity of the electron emission of the nano cold cathode 121.

[0062] The top gate electrode 9 may be in the shape of a circular ring, a polygonal ring or other annular shapes with a symmetrical structure.

[0063] The bottom cathode electrode strip 2, the bottom gate electrode strip 4, the top cathode electrode 8, the top gate electrode 9 and the focusing electrode 10 can be made of metal materials such as Cr, Al, Ti, Pt, Cu, metal oxide materials such as ITO, IZO, AZO, and metal nitride materials such as TiN, or other materials with excellent conductivity and capable of being applied with micro-machining technology.

[0064] The insulating layer can be made of SiO2, Si x N y Materials with good insulation properties and small dielectric constant, and the thickness of the insulation layer is 1μm-5μm.

[0065] The material of the nano cold cathode 121 can be ZnO nanowire, CuO nanowire, W x O y One-dimensional nanomaterials such as nanowires, or two-dimensional nanomaterials such as diamond films.

[0066] In this embodiment, the bottom cathode electrode strip 2 and the bottom gate electrode strip 4 are arranged in parallel, the bottom cathode electrode strip 2 is located at the top of the substrate 1, and the bottom gate electrode strip 4 is located at the top of the substrate 1 or the middle of the insulating layer, ensuring that the connection between the top cathode electrode 8 and the bottom cathode electrode strip 2 and the connection between the top gate electrode 9 and the bottom gate electrode strip 4 do not interfere with each other.

[0067] Embodiment 2

[0068] This embodiment is the first embodiment of the nano cold cathode 121 electron source array. This embodiment is similar to the first embodiment, except that the bottom cathode electrode strip 2 and the bottom gate electrode strip 4 are arranged vertically, the insulating layer includes a first insulating layer 3 and a second insulating layer 5, the bottom cathode electrode strip 2 is located on the top of the substrate 1, the first insulating layer 3 covers the bottom cathode electrode strip 2, the bottom gate electrode strip 4 is located on the top of the first insulating layer 3, and the second insulating layer 5 covers the bottom gate electrode strip 4.

[0069] In this embodiment, the first insulating layer 3 is used to separate the bottom cathode electrode strip 2 and the bottom gate electrode strip 4 to achieve single-layer independent wiring. The top cathode electrode 8 is connected to the bottom cathode electrode strip 2 through the first etched through hole 6, and the top gate electrode 9 is connected to the bottom gate electrode strip 4 through the second etched through hole 7. The electrode strips and the bottom gate electrode strip 4 are arranged vertically. A high voltage is applied to the anode plate, and voltage is selectively applied to the top gate electrodes 9 and the top cathode electrodes 8 in different rows and columns to control the driving voltage, turn on, regulate and shut down the electron emission, and realize the row and column addressing function of the device.

[0070] In this embodiment, the upper and lower positions of the bottom gate electrode strips 4 and the bottom cathode electrode strips 2 can be interchanged.

[0071] Embodiment 3

[0072] This embodiment is the first embodiment of the method for preparing a nano cold cathode electron source array. Figure 4 As shown, the following steps are included:

[0073] S1: cleaning substrate 1;

[0074] Specifically, the material of the substrate 1 is glass, and the substrate 1 is ultrasonically cleaned for 20 minutes using acetone, ethanol, and deionized water, respectively, and the substrate 1 is dried using nitrogen gas for 20 minutes;

[0075] S2: making bottom cathode electrode strips 2 arranged in parallel on the top of the substrate 1;

[0076] Specifically, the bottom cathode electrode strip 2 is manufactured by ultraviolet lithography, magnetron sputtering, and debonding and stripping processes, and the material of the bottom cathode electrode strip 2 is Pt, with a thickness of 120 nm;

[0077] S3: Covering the top of the bottom cathode electrode strip 2 with a first insulating layer 3;

[0078] Specifically, the first insulating layer 3 is deposited by a PECVD process, the material of the first insulating layer 3 is SiO2, and the thickness is 2 μm;

[0079] S4: making bottom gate electrode strips 4 arranged in parallel on the top of the first insulating layer 3, so that the bottom gate electrode strips 4 are vertically distributed with the bottom cathode electrode strips 2;

[0080] Specifically, the bottom gate electrode strip 4 is manufactured by ultraviolet lithography, magnetron sputtering, and debonding and stripping processes, and the material of the bottom gate electrode strip 4 is Cr;

[0081] S5: Covering the top of the bottom gate electrode strip 4 with a second insulating layer 5;

[0082] Specifically, the second insulating layer 5 is deposited by a PECVD process, the material of the second insulating layer 5 is SiO2, and the thickness is 2 μm;

[0083] S6: etching a first etching through hole 6 in the second insulating layer 5 and the first insulating layer 3 to expose the bottom cathode electrode strip 2; etching a second etching through hole 7 in the second insulating layer 5 to expose the bottom gate electrode strip 4;

[0084] Specifically, the first etched through hole 6 and the second etched through hole 7 are prepared by reactive ion etching, wet etching or lift-off stripping;

[0085] S7: forming a top cathode electrode 8 and a top gate electrode 9 on the top of the second insulating layer 5, so that the top cathode electrode 8 is connected to the bottom cathode electrode strip 2 through the first etched through hole 6, and the top gate electrode 9 is connected to the bottom gate electrode strip 4 through the second etched through hole 7;

[0086] Specifically, the top cathode electrode 8 and the top gate electrode 9 are prepared by photolithography, magnetron sputtering and stripping through a single mask 14;

[0087] S8: Locally forming a cold cathode pre-grown film 11 on the top cathode electrode 8;

[0088] Specifically, the cold cathode pre-grown film 11 is made by photolithography, electron beam evaporation and debonding, and the material of the cold cathode pre-grown film 11 is Zn, and the thickness is 1.5 μm;

[0089] S9: Reaction growth of nano cold cathode 121 on cold cathode pre-grown film 11;

[0090] S10: preparing a surface film 122 on the nano cold cathode 121 to form a composite cold cathode 12;

[0091] Specifically, a single mask 14 combined with a photolithography process or a metal mask 15 direct coating process may be used to locally prepare the surface thin film 122 .

[0092] The cold cathode pre-grown film 11 can be an oxidizable metal film such as Cu, Zn, Fe, W, etc., and the nano cold cathode 121 is obtained by thermal oxidation; it can also be a catalyst film, and a carbon-based nano cold cathode 121 such as carbon nanotubes and graphene is obtained by catalytic reaction. Thermal oxidation includes a heating and insulation process, and the heating rate is 1°C / min-30°C / min; the insulation temperature of the insulation process is 300°C-600°C, the insulation time is 1min-600min, and it is naturally cooled to room temperature after the insulation is completed.

[0093] In this embodiment, the cold cathode pre-grown film 11 is made by photolithography, electron beam evaporation and debonding. The material of the cold cathode pre-grown film 11 is Zn and the thickness is 1.5 μm. The ZnO nanowires are grown by air atmosphere thermal oxidation in a tube furnace. The thermal oxidation process first heats up from room temperature to 470° C., and is kept at 470° C. for 3 hours. After natural cooling, the nano cold cathode 121 is obtained.

[0094] In step S7, a focusing electrode 10 is disposed on the top of the second insulating layer 5 around the top gate electrode 9, such as Figure 4 As shown. The focusing electrode 10 surrounds the top gate electrode and is not connected to the top gate electrode, thereby realizing a coplanar focusing structure, which can improve the divergence of the electron beam, reduce the focal spot size, and improve the display resolution. Specifically, the focusing electrode 10 is prepared by photolithography, magnetron sputtering, and debonding through a single mask 14. The focusing electrode 10 is an ITO film with a thickness of 500nm.

[0095] In step S10, Figure 5 As shown, the process of preparing the composite cold cathode 12 is:

[0096] S101: coating a photoresist 13 on the surface of the electron source array and baking the photoresist 13; wherein the baking is performed at 120° C. for 2 minutes;

[0097] S102: using a mask 14 having a cathode pattern, using alignment marks of an electron source array for alignment, and using an ultraviolet mask 14; wherein the ultraviolet mask 1410s;

[0098] S103: developing the exposed electron source array;

[0099] S104: preparing a surface film 122 on the electron source array by magnetron sputtering, wherein the surface film 122 is a metal nitride film; specifically, the metal nitride film is a TiN film with a thickness of 5 nm;

[0100] S105: removing the glue to obtain the composite cold cathode 12.

[0101] Embodiment 4

[0102] This embodiment is a second embodiment of a method for preparing a nano cold cathode electron source array. This embodiment is similar to the third embodiment, except that in step S10, Figure 6 As shown, the process of preparing the composite cold cathode 12 is:

[0103] S106: Align the metal mask 15 on the surface of the electron source array;

[0104] S107: using an atomic layer deposition method to prepare a metal oxide film on the surface of the electron source array covered with the metal mask 15; specifically, the metal oxide film is In2O3 with a thickness of 3nm;

[0105] S108: remove the metal mask 15 to obtain the composite cold cathode 12.

[0106] In the specific contents of the above-mentioned specific implementation methods, the various technical features can be combined in any non-contradictory manner. In order to make the description concise, not all possible combinations of the above-mentioned technical features are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0107] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A nano cold cathode (121) electron source array, comprising: Substrate (1); Bottom cathode electrode strips (2) arranged in parallel; Bottom gate electrode strips (4) arranged in parallel; an insulating layer covering the bottom cathode electrode strip (2) and the bottom gate electrode strip (4), the insulating layer being located on the top of the substrate (1), the bottom cathode electrode strip (2) and the bottom gate electrode strip (4) being separated by the insulating layer; A first etched through hole (6) and a second etched through hole (7) are formed in the insulating layer, wherein the first etched through hole (6) extends from the top surface of the insulating layer to the top of the bottom cathode electrode strip (2), and the second etched through hole (7) extends from the top surface of the insulating layer to the top of the bottom gate electrode strip (4); A top cathode electrode (8) and a top gate electrode (9) are formed on the top of the insulating layer, wherein the top gate electrode (9) is arranged around the top cathode electrode (8), the top cathode electrode (8) is connected to the bottom cathode electrode strip (2) through the first etched through hole (6), and the top gate electrode (9) is connected to the bottom gate electrode strip (4) through the second etched through hole (7); The invention is characterized in that it also comprises a composite cold cathode (12), wherein the composite cold cathode (12) comprises a nano cold cathode (121) manufactured on the top of the top cathode electrode (8) and a surface film (122) covering the nano cold cathode (121).

2. The nano cold cathode (121) electron source array according to claim 1, characterized in that: The surface film (122) includes a metal film, a metal nitride film or a metal oxide film.

3. The nano cold cathode (121) electron source array according to claim 1, characterized in that: It also includes a focusing electrode (10) formed on the top of the second insulating layer (5), and the focusing electrode (10) is arranged around the top grid electrode (9).

4. The nano cold cathode (121) electron source array according to claim 1, characterized in that: The shape of the nano cold cathode (121) is a symmetrical pattern.

5. The nano cold cathode (121) electron source array according to claim 1, characterized in that: The bottom cathode electrode strip (2) and the bottom gate electrode strip (4) are arranged in parallel.

6. The nano cold cathode (121) electron source array according to claim 1, characterized in that: The bottom cathode electrode strip (2) and the bottom gate electrode strip (4) are arranged vertically, the insulating layer comprises a first insulating layer (3) and a second insulating layer (5), the bottom cathode electrode strip (2) is located on the top of the substrate (1), the first insulating layer (3) covers the bottom cathode electrode strip (2), the bottom gate electrode strip (4) is located on the top of the first insulating layer (3), and the second insulating layer (5) covers the bottom gate electrode strip (4).

7. A method for preparing a nano cold cathode (121) electron source array, characterized in that: The following steps are involved: S1: cleaning the substrate (1); S2: making bottom cathode electrode strips (2) arranged in parallel on the top of the substrate (1); S3: Covering the top of the bottom cathode electrode strip (2) with a first insulating layer (3); S4: manufacturing bottom gate electrode strips (4) arranged in parallel on the top of the first insulating layer (3), so that the bottom gate electrode strips (4) are vertically distributed with respect to the bottom cathode electrode strips (2); S5: Covering the top of the bottom gate electrode strip (4) with a second insulating layer (5); S6: etching a first etching through hole (6) in the second insulating layer (5) and the first insulating layer (3) to expose the bottom cathode electrode strip (2); Etching a second etched through hole (7) in the second insulating layer (5) to expose the bottom gate electrode strip (4); S7: forming a top cathode electrode (8) and a top gate electrode (9) on the top of the second insulating layer (5), so that the top cathode electrode (8) is connected to the bottom cathode electrode strip (2) through the first etched through hole (6), and the top gate electrode (9) is connected to the bottom gate electrode strip (4) through the second etched through hole (7); S8: locally forming a cold cathode pre-grown film (11) on the top cathode electrode (8); S9: growing a nano cold cathode (121) by reaction on the cold cathode pre-grown film (11); S10: preparing a surface film (122) on the nano cold cathode (121) to form a composite cold cathode (12).

8. The method for preparing the nano cold cathode (121) electron source array according to claim 7, characterized in that: In step S7, a focusing electrode (10) is arranged on the top of the second insulating layer (5) around the top gate electrode (9).

9. The method for preparing a nano cold cathode (121) electron source array according to claim 7, characterized in that: In step S10, the process of preparing the composite cold cathode (12) is as follows: S101: coating a photoresist (13) on the surface of the electron source array and baking it; S102: using a mask (14) having a cathode pattern, using alignment marks of an electron source array for alignment, and using an ultraviolet mask (14); S103: developing the exposed electron source array; S104: preparing a surface film (122) on the electron source array by magnetron sputtering, wherein the surface film (122) is a metal nitride film; S105: removing the glue to obtain a composite cold cathode (12).

10. The method for preparing a nano cold cathode (121) electron source array according to claim 7, characterized in that: In step S10, the process of preparing the composite cold cathode (12) is as follows: S106: Align the metal mask (15) on the surface of the electron source array; S107: using an atomic layer deposition method to prepare a metal oxide thin film on the surface of the electron source array covered with the metal mask (15); S108: Remove the metal mask (15) to obtain the composite cold cathode (12).

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