Layer deposition apparatus and layer deposition method

Abstract

A layer deposition apparatus includes: a process chamber configured to provide a space for processing a substrate, the process chamber including an upper chamber and a lower chamber defining an interior space; a substrate support disposed within the process chamber and configured to support the substrate; a lamp heating part disposed above the upper chamber outside the processing chamber, and including a plurality of light sources configured to irradiate light onto the substrate through the upper chamber; and an interference thin layer pattern disposed on an upper surface of the upper chamber and configured to reflect at least a portion of light from the plurality of light sources.

Description

Technical Field

[0001] The present disclosure relates to a layer deposition apparatus and a layer deposition method. Background Art

[0002] In order to manufacture semiconductor devices, a layer deposition process can be performed to form a thin layer on a semiconductor substrate. The thin layer can be formed to have a single crystal structure by an epitaxial process in the layer deposition process. During the epitaxial process, the substrate can be placed on a susceptor in a processing chamber, and a heating source such as a plurality of heating lamps can be arranged above or below the substrate to heat the substrate. However, the light emitted by the heating lamps may overlap densely in some areas on the substrate, resulting in differences in the distribution of the amount of irradiated light in each area of ​​the substrate. Therefore, there is a problem that an uneven temperature distribution occurs over the entire substrate, resulting in a thickness deviation of the thin layer. Summary of the invention

[0003] In general, in some aspects, the present disclosure relates to a layer deposition apparatus capable of forming a thin layer having a uniform thickness, and a plasma processing system including a plasma control apparatus.

[0004] According to some embodiments, the present disclosure relates to a layer deposition device, including: a processing chamber, the processing chamber configuration providing a space for processing a substrate, the processing chamber including an upper chamber and a lower chamber defining an internal space; a substrate support, the substrate support being disposed in the processing chamber and configured to support the substrate; a lamp heating portion, the lamp heating portion being disposed above the upper chamber outside the processing chamber and including a plurality of light sources configured to irradiate light onto the substrate through the upper chamber; and an interference thin layer pattern, the interference thin layer pattern being disposed on an upper surface of the upper chamber and configured to reflect at least a portion of light from the plurality of light sources.

[0005] According to some embodiments, the present disclosure relates to a layer deposition device, including: a first transparent chamber, which is in a dome shape; a second transparent chamber, which is in a dome shape; a substrate support, which is arranged between the first transparent chamber and the second transparent chamber, and the substrate support is configured to support a substrate; a lamp heating part, which is arranged above the first transparent chamber and includes a plurality of light sources configured to irradiate light onto the substrate through the first transparent chamber; and an interference thin layer pattern, which is arranged on the upper surface of the transparent first chamber, and the interference thin layer pattern includes alternately stacked first thin layers and second thin layers with different refractive indices to reflect at least a portion of the light from the plurality of light sources.

[0006] According to some embodiments, the present disclosure relates to a layer deposition method, wherein a processing chamber including an upper chamber and a lower chamber defining a space for processing a substrate is provided. An interference thin layer pattern is formed on an upper surface of the upper chamber. The substrate is loaded onto a substrate support in the processing chamber. Light from a plurality of light sources disposed above the upper chamber is irradiated onto the substrate through the interference thin layer pattern and the upper chamber. A thin layer is deposited on the substrate.

[0007] According to some embodiments, the present disclosure relates to a thin layer deposition device, which includes a processing chamber including an upper chamber and a lower chamber, a substrate support, a first reflective shell, a first lamp heating portion, and an interference thin layer pattern. The interference thin layer pattern may have an annular shape and may cover an annular area at a specific radius of the upper surface of the upper chamber. The interference thin layer pattern may be used as a filter having a reflectivity of at least 50% in a wavelength bandwidth of 800nm ​​to 2000nm. The interference thin layer pattern may prevent a light overlap phenomenon in which light from a first light source of the first lamp heating portion densely overlaps in some areas on the substrate on the substrate support. Therefore, a uniform thin film may be formed. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0009] Figure 1 is a cross-sectional view illustrating an example of a layer deposition apparatus according to some embodiments.

[0010] Figure 2 is a perspective view showing an example of a lamp heating unit according to some embodiments, the lamp heating unit including a lamp arranged at Figure 1 A plurality of light sources are provided in an upper portion of a first chamber of the layer deposition apparatus.

[0011] Figure 3 is a diagram showing that according to some embodiments Figure 2 An example graph of a spectrum of wavelengths of light emitted by a light source.

[0012] Figure 4 is a diagram showing the first chamber relative to the Figure 2 An example graph of the transmittance of light emitted by a light source.

[0013] Figure 5 is a top view illustrating an example of an interference thin layer pattern disposed on an upper surface of a first chamber according to some embodiments.

[0014] Figure 6 is a diagram showing a method of performing a Figure 5 A cross-sectional view taken along line AA'.

[0015] Figure 7 is a diagram showing that according to some embodiments Figure 5 A cross-sectional view of an interference thin layer pattern that blocks some light from a first light source.

[0016] Figure 8 is a cross-sectional view illustrating an example of an interference thin layer pattern according to some embodiments, in which a first thin layer and a second thin layer are alternately stacked on a transparent substrate.

[0017] Fig. 9 is a cross-sectional view illustrating an example of an interference thin layer pattern formed on an upper surface of a first chamber according to some embodiments.

[0018] Fig.10 is a graph showing an example of reflectivity of an interference thin layer pattern according to some embodiments.

[0019] Fig.11 is a graph showing an example of reflectivity of an interference thin layer pattern according to some embodiments.

[0020] Fig.12 It is shown that according to some embodiments, Fig.11 An example graph of the reflectivity of multiple filters is shown.

[0021] Fig.13 is a graph illustrating an example of a thickness distribution of a thin layer formed by a layer deposition apparatus according to a comparative example according to some embodiments.

[0022] Fig.14A is a top view illustrating an example of an interference thin layer pattern disposed on an upper surface of a first chamber according to some embodiments.

[0023] Fig. 14B is a top view illustrating an example of an interference thin layer pattern disposed on an upper surface of a first chamber according to some embodiments.

[0024] Fig.15 is a cross-sectional view illustrating an example of a layer deposition apparatus according to some embodiments.

[0025] Fig.16 is a diagram showing a configuration according to some embodiments Fig.15 A perspective view of an example of a second interference thin layer pattern on a lower surface of a second chamber of a layer deposition apparatus.

[0026] Fig.17 is a flow chart illustrating an example of a layer deposition method according to some embodiments. DETAILED DESCRIPTION

[0027] Hereinafter, example embodiments will be explained in detail with reference to the accompanying drawings.

[0028] Figure 1 is a cross-sectional view illustrating an example of a layer deposition apparatus according to some embodiments. Figure 2 is a perspective view showing an example of a lamp heating unit according to some embodiments, the lamp heating unit including a lamp arranged at Figure 1 A plurality of light sources are provided in an upper portion of a first chamber of the layer deposition apparatus. Figure 3 is a diagram showing that according to some embodiments Figure 2 An example graph of a spectrum of wavelengths of light emitted by a light source. Figure 4 is a diagram showing the first chamber relative to the Figure 2 An example graph of the transmittance of light emitted by a light source.

[0029] exist Figures 1 to 4 In the embodiment, the layer deposition apparatus 10 includes a process chamber 20, a substrate support 30, a first reflective housing 40, a first lamp heating part 50 and an interference thin layer pattern 100. In addition, the layer deposition apparatus 10 may further include a second reflective housing 60, a second lamp heating part 70 and a temperature measuring part 80.

[0030] In some embodiments, the layer deposition apparatus 10 may be an apparatus configured to perform a layer deposition process to form a thin layer on the substrate W. For example, the layer deposition apparatus 10 may include a process chamber 20 for performing a thermal process such as an epitaxial process. However, it is not limited thereto, and for example, the process chamber may provide a controlled thermal cycle to heat the substrate to perform processes such as thermal annealing, thermal cleaning, thermal chemical vapor deposition, thermal oxidation, thermal nitridation, and the like.

[0031] For example, the substrate may include silicon, silicon oxide, doped silicon, silicon germanium, germanium, gallium arsenide, glass, sapphire, and any other material, such as metals, metal nitrides, metal alloys, and other conductive or semi-conductive materials. The substrate may not be limited to any particular size or shape. For example, the substrate may have a diameter of 200 mm or 300 mm, is generally circular, but is not limited thereto, and may have other shapes, such as polygonal, square, rectangular, curved, etc.

[0032] The process chamber 20 may provide an inner space 21 for performing a process such as a layer deposition process on the substrate W. The process chamber 20 may include a first chamber 22 as an upper chamber and a second chamber 24 as a lower chamber. A susceptor ring 26 may be interposed between the first chamber 22 and the second chamber 24. The susceptor ring 26 may surround the edges of the first chamber 22 and the second chamber 24, and may couple the first chamber 22 and the second chamber 24. The first chamber 22 and the second chamber 24 may be coupled to the susceptor ring 26 to define the inner space 21. An outer end portion 23 of the first chamber 22 and an outer end portion 25 of the second chamber 24 may be respectively attached to and supported inside the susceptor ring 26. For example, the first chamber 22 and the susceptor ring 26 may be mechanically coupled to each other by an upper clamping ring.

[0033] When the substrate W is loaded / unloaded into the inner space 21, at least one of the first chamber 22 and the second chamber 24 may be separated from the susceptor ring 26. For example, the substrate W may be loaded / unloaded through a slit door provided in the susceptor ring 26. In some embodiments, the susceptor ring 26 may include an upper ring and a lower ring detachably fastened to each other.

[0034] The susceptor ring 26 may have a gas inlet 28a and a gas outlet 28b. For example, the susceptor ring 26 may have holes that connect the internal space 21 to the outside of the processing chamber 20, and these holes may be provided to serve as the gas inlet 28a and the gas outlet 28b, respectively. The gas inlet 28a may be formed on a first side of the susceptor ring 26, and the gas outlet 28b may be formed on a second side of the susceptor ring 26. The gas inlet 28a and the gas outlet 28b may be arranged at positions opposite to each other. Process gas may be provided into the processing chamber 20 through the gas inlet 28a. The gas in the processing chamber 20 may be discharged to the outside through the gas outlet 28b. The gas outlet 28b may be connected to a vacuum pump so that the space inside the processing chamber 20 may be adjusted to a desired vacuum pressure. The process gas may include silane (SiH 4 ), disilane (Si 2 H 6 ), dichlorosilane (SiH 2 Cl 2 ), trichlorosilane (SiHCl 3 )wait.

[0035] The first chamber 22 and the second chamber 24 may be dome-shaped. The second chamber 24 may have a funnel shape. The first chamber 22 and the second chamber 24 may include an optically transparent material such as quartz. The first chamber 22 and the second chamber 24 may transmit infrared radiation. For example, the first chamber 22 and the second chamber 24 may include a transparent material capable of transmitting at least 90% of infrared radiation. The first chamber 22 and the second chamber 24 may have a transmittance of at least 80% for light having a wavelength range of 200 nm to 2000 nm.

[0036] The substrate support 30 may be disposed in the inner space 21, and may include a susceptor 32 as a substrate stage to support the substrate W, and a susceptor support 36 for supporting and rotating the susceptor 32. The susceptor 32 may include a graphite material or a ceramic material coated with a silicon-based material such as silicon carbide, or other processing-resistant materials.

[0037] In addition, the substrate support 30 may further include a preheating ring 34 disposed around the susceptor 32. The preheating ring 34 may preheat the process gas to a predetermined temperature. Thus, the process gas may be thermally decomposed into a gas form that can be used for epitaxial growth.

[0038] The susceptor support 36 may support the susceptor 32. The susceptor support 36 may lift the susceptor 32, and may rotate the susceptor 32 around the central axis of the substrate W. For example, the susceptor 32 may rotate the substrate W at a speed of about 10 rpm to about 100 rpm. Because the susceptor 32 is rotated, the entire area of ​​the substrate W may be uniformly processed.

[0039] The first reflective housing 40 may be disposed above the processing chamber 20 outside the processing chamber. The first reflective housing 40 may be disposed on the first chamber 22. The first reflective housing 40 may include a first upper reflector 42 and a second upper reflector 44. The first upper reflector 42 and the second upper reflector 44 may be coupled to each other to provide as a reflector assembly. The first reflective housing 40 may reflect light so that the light irradiated from the first lamp heating portion 50 may be irradiated to a desired position, such as a substrate W, a pedestal 32, or a preheating ring 34. The first reflective housing 40 may gather the light emitted from the first lamp heating portion 50 onto the substrate W. The inner surface of the first reflective housing 40 may be coated with a material having a high reflectivity.

[0040] The first lamp heating part 50 may be disposed in the first reflective housing 40. The first lamp heating part 50 may include a plurality of first light sources 52 as first heating lamps for irradiating light onto the substrate W through the first chamber 22. The plurality of first light sources 52 may be arranged along the circumference of the first reflective housing 40. The light emitted from the first light source 52 may pass through the first chamber 22 and may provide infrared radiation heat to the substrate W. The light emitted from the first light source 52 may include infrared light. For example, each light source 52 may include a halogen lamp.

[0041] A portion of the light from the first light source 52 can pass through the first chamber 22 to directly irradiate the substrate W, while another portion of the light from the first light source 52 can be reflected in the reflective housing 40 and can pass through the upper chamber 22 to reach the internal space 21. Therefore, the heat loss of light can be minimized. In addition, a plurality of first light sources 52 can be arranged along the circumference of the first reflective housing 40 to improve thermal efficiency.

[0042] exist Figure 3 In the embodiment, when the first light source 52 includes a halogen lamp, the light emitted from the first light source 52 may have a near infrared (NIR) band. For example, the light emitted from the first light source 52 may have a bandwidth of 400 nm to 2300 nm.

[0043] exist Figure 4 In the embodiment, the transmission characteristic curve of the first chamber 22 may have a transparent window in the range of 200 nm to 2000 nm. Therefore, the effective wavelength range of the light irradiated onto the substrate W through the first chamber 22 may be in the range of 800 nm to 2000 nm. The first chamber 22 may have a transmittance of at least 80% for the light in the wavelength range of 200 nm to 2000 nm.

[0044] exist Figure 1 , the second reflective housing 60 may be disposed below the processing chamber 20. The second reflective housing 60 may be disposed below the second chamber 24. Similar to the first reflective housing 40, the second reflective housing 60 may include a plurality of lower reflectors coupled to each other to be provided as a reflector assembly. The second reflective housing 60 may reflect and focus the light emitted by the second lamp heating portion 70 onto the substrate W. The inner surface of the second reflective housing 60 may be coated with a material having a high reflectivity.

[0045] The second lamp heating part 70 may be disposed in the second reflective shell 60. The second lamp heating part 70 may include a plurality of second light sources 72 as second heating lamps for irradiating light onto the substrate W through the second chamber 24. The plurality of second light sources 72 may be arranged along the circumference of the second reflective shell 60. The light emitted from the second light source 72 may pass through the second chamber 24, and may provide infrared radiation heat to the substrate W. The light emitted from the second light source 72 may be reflected within the second reflective shell 60, and may pass through the second chamber 24 to reach the internal space 21. For example, each second light source 72 may include a halogen lamp.

[0046] In some embodiments, the temperature measuring portion 80 may be disposed to face the top surface of the substrate W. The temperature measuring portion 80 may be arranged to correspond to the central axis of the substrate W. The temperature measuring portion 80 may measure the temperature of the heating region of the substrate W. For example, the temperature measuring portion 80 may include a pyrometer and a radiation temperature sensor. The temperature measuring portion 80 may include a plurality of radiation temperature sensors.

[0047] In some embodiments, the interference thin layer pattern 100 may be disposed on the upper surface of the first chamber 22. The interference thin layer pattern 100 may have a ring shape and may cover a ring area at a specific radius of the upper surface of the first chamber 22 to prevent light overlap phenomenon in which some areas of light on the substrate W overlap densely.

[0048] Hereinafter, the interference thin layer pattern will be described in detail.

[0049] Figure 5 is a top view illustrating an example of an interference thin layer pattern disposed on an upper surface of a first chamber according to some embodiments. Figure 6 is a diagram showing a method of performing a Figure 5 A cross-sectional view taken along line AA'. Figure 7 is a diagram showing that according to some embodiments Figure 5 A cross-sectional view of an interference thin layer pattern that blocks some light from a first light source. Figure 8 is a cross-sectional view illustrating an example of an interference thin layer pattern according to some embodiments, in which a first thin layer and a second thin layer are alternately stacked on a transparent substrate. Fig. 9 is a cross-sectional view illustrating an example of an interference thin layer pattern formed on an upper surface of a first chamber according to some embodiments.

[0050] exist Figures 5 to 9In the embodiment of the present invention, the interference thin layer pattern 100 may have an annular shape and may cover an annular area at a specific radius of the upper surface 22a of the first chamber 22. The inner diameter Ri of the interference thin layer pattern 100 from the center O of the first chamber 22 may be in the range of 60 mm to 130 mm, and the outer diameter Ro of the interference thin layer pattern 100 may be in the range of 90 mm to 150 mm. The width D of the interference thin layer pattern 100 may be in the range of 5 mm to 80 mm. The thickness of the interference thin layer pattern 100 may be in the range of 0.4 μm to 10 μm.

[0051] exist Figure 8 In the embodiment, the interference thin layer pattern 100 has a multilayer structure, in which a first thin layer with a low refractive index L and a second thin layer with a high refractive index H are alternately stacked on a transparent substrate SUB. In order to maximize or minimize interference, the optical thickness of each thin layer can be 1 / 4 of the reference wavelength λ (QWOT, quarter wavelength optical thickness) or 1 / 2 of the reference wavelength λ (HWOT, half wavelength optical thickness). When the optical thickness of the thin layer is λ / 4, the reflectivity of the interference thin layer pattern 100 can be expressed by the following formula (1):

[0052]

[0053] Here, R is the reflectivity, n H is a high refractive index, n L is a low refractive index, and S represents the number of layers including the stacked first thin layer and the second thin layer.

[0054] exist Fig. 9 In the embodiment, the interference thin layer pattern 100 may include a plurality of unit stacked layers 110 sequentially stacked on the upper surface of the upper chamber 22. Each unit stacked layer 110 may include a first thin layer 112, a second thin layer 114 stacked on the first thin layer 112, and a first thin layer 112 stacked on the second thin layer 114. The first thin layer 112 may have a first refractive index n L , and the second thin layer 114 may have a second refractive index n greater than the first refractive index H .

[0055] The optical thickness of the first thin layer 112 may be 1 / 4 of the reference wavelength λ, and the optical thickness of the second thin layer 114 may be 1 / 2 of the reference wavelength λ. The interference thin layer pattern 100 may include several to several dozen unit stacked layers 110. The number of stacked unit stacked layers, the total thickness of the interference thin layer pattern, the width and area ratio of the interference thin layer pattern may be determined in consideration of the desired interference effect (such as reflectivity, effective bandwidth, etc.), and the optical and geometric thin layer thicknesses of the first thin layer and the second thin layer.

[0056] For example, the first thin layer 112 may include silicon oxide (SiO2 ), aluminum oxide (Al 2 O 3 ), silicon nitride (SiN), etc. The second thin layer 114 may include zinc oxide (ZnO), titanium oxide (TiO2), tantalum pentoxide (Ta 2 O 5 ), fluorine-doped tin oxide (FTO), antimony tin oxide (ATO), indium tin oxide (ITO), indium antimony tin oxide (IATO), aluminum-doped zinc oxide (AZO), etc.

[0057] In some embodiments, the interference thin layer pattern 100 can be used as an optical filter having a reflection bandwidth relative to a reference wavelength. The optical thickness, geometric thin layer thickness, and refractive index of the alternately stacked first and second thin layers may be important factors affecting the filter characteristics.

[0058] Hereinafter, optical characteristics of the interference thin layer pattern will be described.

[0059] Fig.10 is a graph illustrating an example of reflectivity of an interference thin layer pattern according to some embodiments, wherein the interference thin layer pattern has a filter characteristic according to a first coefficient constant of a first reference wavelength. Fig.11 is a graph showing an example of reflectivity of an interference thin layer pattern according to some embodiments. Fig.12 It is shown that according to some embodiments, Fig.11 An example graph of the reflectivity of multiple filters is shown.

[0060] exist Figures 10 to 12 In the embodiment, the reflection bandwidth and reflectivity of the interference thin layer pattern 100 can be determined by the optical thickness, geometric thin layer thickness, etc. of the first thin layer 112 and the second thin layer 114. The interference thin layer pattern 100 can be used as an optical filter, which has a specific coefficient constant for a specific reference wavelength. The interference thin layer pattern 100 can be used as an optical filter, wherein the optical characteristics of multiple coefficient constants determined for multiple reference wavelengths are overlapped.

[0061] exist Fig.10 In the embodiment, when the unit stacking layer 110 of the interference thin layer pattern 100 has a unit stacking layer 110 with a [low refractive index (L / 2) / high refractive index (H) / low refractive index (L / 2)] structure and is stacked into an eight-layer structure, the interference thin layer pattern 100 can have a filter characteristic of a first coefficient constant A of a first reference wavelength.

[0062] exist Fig.11 and Fig.12, the interference thin layer pattern 100 including the eight unit stacked layers 110 may have first to fourth filter characteristics, which have first to fourth coefficient constants A, B, C and D for first to fourth reference wavelengths. The first to fourth filter characteristics may overlap to provide a filter having a reflectivity of at least 90% in a wavelength bandwidth of 800nm ​​to 2000nm. The reflectivity of the interference thin layer pattern 100 in a wavelength bandwidth of 800nm ​​to 2000nm may be expressed by the following equation (2):

[0063] (A(0.5LH 0.5L)) s (B(0.5LH 0.5L)) s (C(0.5LH 0.5L)) s (D(0.5LH 0.5L)) s

[0064] Here A=0.899, B=1.151, C=1.435, D=1.761, and S is 8.

[0065] Fig.13 is a graph showing an example of thickness distribution of thin layers formed by layer deposition apparatuses according to a comparative example and according to some embodiments. Fig.13 In the figure, graph G1 represents the thickness of a thin layer formed by a layer deposition device having an interference thin layer pattern according to some embodiments, and graph G2 represents the thickness of a thin layer formed by a layer deposition device without an interference thin layer pattern according to a comparative example of some embodiments. It can be seen that due to the presence of the interference thin layer pattern, the thickness of the thin layer in the middle area of ​​the wafer with a radius of about 100 mm is relatively reduced, and the thickness of the thin layer in other areas is relatively increased.

[0066] During the epitaxial process, the substrate W may be heated to a preset temperature of about 750° C. or lower. Although the heating of the substrate W is precisely controlled, the light from the first light source 52 may be reflected within the first reflective housing 40 and may overlap densely in one or more regions on the substrate W (e.g., a middle region with a wafer radius of about 100 nm), resulting in uneven temperature. The interference thin layer pattern 100 may cover an annular region at a specific radius of the upper surface of the first chamber 22 to prevent the light from overlapping densely in some regions on the substrate W. Therefore, a uniform thin layer may be formed on the wafer.

[0067] Fig.14A is a top view showing an example of an interference thin layer pattern disposed on an upper surface of a first chamber according to some embodiments. Fig.14A, the interference thin layer pattern 100 may include a first thin layer pattern 102 and a second thin layer pattern 104. The first thin layer pattern 102 and the second thin layer pattern 104 may be spaced apart from each other along concentric circles having different radii. The first thin layer pattern 102 may have an annular shape extending along a concentric circle having a first radius, and the second thin layer pattern 104 may have an annular shape extending along a concentric circle having a second radius greater than the first radius.

[0068] Each of the first thin layer pattern 102 and the second thin layer pattern 104 may include a plurality of layers in which first thin layers and second thin layers having different refractive indices are alternately stacked. Each of the first thin layer pattern 102 and the second thin layer pattern 104 may include a plurality of unit stacked layers sequentially stacked on the upper surface of the upper chamber 22, and each unit stacked layer may include a first thin layer having a first refractive index, a second thin layer stacked on the first thin layer and having a second refractive index greater than the first refractive index, and a first thin layer stacked on the second thin layer.

[0069] The first thin layer pattern 102 may have a first width D1, and the second thin layer pattern 104 may have a second width D2 different from the first width. The optical thickness and geometric thin layer thickness of the first thin layer and the second thin layer of the first thin layer pattern 102 may be the same as or different from the optical thickness and geometric thin layer thickness of the first thin layer and the second thin layer of the second thin layer pattern 104. The first thin layer pattern 102 may have a first reflectivity in a first wavelength band, and the second thin layer pattern 104 may have a second reflectivity different from the first reflectivity in the first wavelength band.

[0070] Fig. 14B is a top view showing an example of an interference thin layer pattern disposed on an upper surface of a first chamber according to some embodiments. Fig. 14B , the interference thin layer pattern 100 may include a plurality of thin layer patterns 101 extending along concentric circles having a first radius. The plurality of thin layer patterns 101 may be arranged at equal or different intervals from each other along a circumferential direction.

[0071] Each of the plurality of thin layer patterns 101 may include a plurality of layers in which first thin layers and second thin layers having different refractive indices are alternately stacked. The thin layer pattern 101 may include a plurality of unit stacked layers sequentially stacked on the upper surface of the upper chamber 22, and each unit stacked layer may include a first thin layer having a first refractive index, a second thin layer having a second refractive index greater than the first refractive index, and a first thin layer stacked on the second thin layer.

[0072] The first thin layer and the second thin layer of the plurality of thin layer patterns 101 may have the same or different optical thickness and geometric thin layer thickness. The plurality of thin layer patterns 101 may have the same or different reflectivities.

[0073] Fig.15 is a cross-sectional view illustrating an example of a layer deposition apparatus according to some embodiments. Fig.16 is a diagram showing a configuration according to some embodiments Fig.15 A perspective view of an example of a second interference thin layer pattern on the lower surface of the second chamber of the layer deposition device of FIG. In addition to the additional second interference thin layer pattern, the layer deposition device can be used with reference to FIG. Figure 1 The described layer deposition apparatuses are substantially the same or similar. Therefore, the same reference numerals will be used to refer to the same or similar elements, and any further repeated explanations regarding the above elements will be omitted.

[0074] exist Fig.15 and Fig.16 , the layer deposition apparatus 11 may include a process chamber 20 , a substrate support 30 , a first reflective housing 40 , a first lamp heating portion 50 , a second reflective housing 60 , a second lamp heating portion 70 , a first interference thin layer pattern 100 , and a second interference thin layer pattern 200 .

[0075] In some embodiments, the first interference thin layer pattern 100 may be disposed on the upper surface of the first chamber 22. The first interference thin layer pattern 100 may have an annular shape and may cover an annular area at a specific radius of the upper surface 22a of the first chamber 22. The first interference thin layer pattern 100 may have a first reflectivity within a wavelength bandwidth of 800nm ​​to 2000nm. The first interference thin layer pattern 100 may be used as a filter having a reflectivity of at least 30% in a wavelength bandwidth of 800nm ​​to 2000nm. The first interference thin layer pattern 100 may prevent a light overlap phenomenon in which light from the first light source 52 overlaps densely in some areas on the substrate W.

[0076] The second interference thin layer pattern 200 may be disposed on the lower surface of the second chamber 24. The second interference thin layer pattern 200 may have an annular shape and may cover an annular area at a specific radius of the lower surface of the second chamber 24. The second interference thin layer pattern 200 may have a second reflectivity within a wavelength bandwidth of 800nm ​​to 2000nm. The second interference thin layer pattern 200 may be used as an optical filter having a reflectivity of at least 30% in a wavelength bandwidth of 800nm ​​to 2000nm. The second interference thin layer pattern 200 may prevent a light overlap phenomenon in which light from the second light source 72 overlaps densely in some areas on the substrate W.

[0077] For example, the first reflectivity may be the same as or different from the second reflectivity. When the first reflectivity of the first interference thin layer pattern 100 is 70%, the second reflectivity of the second interference thin layer pattern 200 may be 30%. When the first reflectivity of the first interference thin layer pattern 100 is 50%, the second reflectivity of the second interference thin layer pattern 200 may be 50%. When the first reflectivity of the first interference thin layer pattern 100 is 30%, the second reflectivity of the second interference thin layer pattern 200 may be 70%. In order to obtain a uniform temperature distribution on the wafer, the first reflectivity of the first interference thin layer pattern 100 and the second reflectivity of the second interference thin layer pattern 200 may be selected to be the same as or different from each other.

[0078] In some embodiments, the second interference thin layer pattern 200 may have an annular pattern extending along one concentric circle, but may not be limited thereto. For example, the second interference thin layer pattern 200 may include a plurality of thin layer patterns spaced apart from each other along concentric circles having different radii. The plurality of thin layer patterns may have an annular shape extending along concentric circles having a specific radius. In some embodiments, the second interference thin layer pattern 200 may include a plurality of thin layer patterns arranged at equal or different intervals from each other along the circumferential direction.

[0079] In the following, the use of Figure 1 and Fig.15 A method of forming a thin layer on a wafer using a layer deposition apparatus.

[0080] Fig.17 is a flow chart illustrating an example of a layer deposition method according to some embodiments. Figures 1 to 17 In the process, first, the process chamber 20 including the upper chamber 22 and the lower chamber 24 may be provided (S10), and the interference thin layer pattern 100 may be formed on the upper surface 22a of the upper chamber 22 (S20).

[0081] In some embodiments, the process chamber 20 may provide an inner space 21 for performing a process such as a layer deposition process on the substrate W. The process chamber 20 may include a first chamber 22 as an upper chamber and a second chamber 24 as a lower chamber. A susceptor ring 26 may be interposed between the first chamber 22 and the second chamber 24. The susceptor ring 26 may surround the edges of the first chamber 22 and the second chamber 24 and may couple the first chamber 22 and the second chamber 24. The first chamber 22 and the second chamber 24 may be coupled to the susceptor ring 26 to define the inner space 21.

[0082] The first interference thin layer pattern 100 may be disposed on the upper surface of the first chamber 22. The interference thin layer pattern 100 may have a ring shape and may cover a ring area at a specific radius of the upper surface 22a of the first chamber 22. The interference thin layer pattern 100 may have a multi-layer structure in which a first thin layer having a low refractive index (L) and a second thin layer having a high refractive index (H) are alternately stacked.

[0083] exist Fig. 9 In the embodiment, the interference thin layer pattern 100 may include a plurality of unit stacked layers 110 sequentially stacked on the upper surface of the upper chamber 22. Each unit stacked layer 110 may include a first thin layer 112, a second thin layer 114 stacked on the first thin layer 112, and a first thin layer 112 stacked on the second thin layer 114. The first thin layer 112 may have a first refractive index (n L ), and the second thin layer 114 may have a second refractive index (n H ). The optical thickness of the first thin layer 112 may be λ / 4 of the reference wavelength λ, and the optical thickness of the second thin layer 114 may be λ / 2 of the reference wavelength λ. The interference thin layer pattern 100 may include several to several tens of unit stacked layers 110 .

[0084] Then, the substrate W may be loaded on the substrate support 30 within the process chamber 20 (S30). For example, when the substrate W is loaded into the inner space 21 of the process chamber 20, at least one of the first chamber 22 and the second chamber 24 may be separated from the susceptor ring 26. For example, the substrate W may be loaded / unloaded through a slit door provided in the susceptor ring 26.

[0085] Then, light from the first lamp heating part 50 disposed above the upper chamber 22 may be irradiated onto the substrate W ( S40 ), and a thin layer may be deposited on the substrate W ( S50 ).

[0086] In some embodiments, the first lamp heating part 50 may include a plurality of first light sources 52 as first heating lamps for irradiating light onto the substrate W through the upper chamber 22. The plurality of first light sources 52 may be arranged along the circumference of the first reflective housing 40 disposed above the upper chamber 22. Light irradiated from the first light sources 52 may pass through the first chamber 22 and may provide infrared radiation heat to the substrate W. For example, each first light source 52 may include a halogen lamp.

[0087] A portion of the light from the first light source 52 can pass through the upper chamber 22 to directly irradiate the substrate W, and another portion of the light from the first light source 52 can be reflected at the first reflective shell 40 and can pass through the upper chamber 22 to reach the internal space 21. Therefore, the heat loss of light can be minimized. In addition, a plurality of first light sources 52 can be arranged along the circumference of the first reflective shell 40 to improve thermal efficiency.

[0088] The second lamp heating part 70 may include a plurality of second light sources 72 as second heating lamps for irradiating light onto the substrate W through the lower chamber 24. The plurality of second light sources 72 may be arranged along the circumference of the second reflective housing 60 disposed below the lower chamber 24. Light irradiated from the second light sources 72 may pass through the lower chamber 24 and may provide infrared radiation heat to the substrate W. For example, each second light source 72 may include a halogen lamp.

[0089] A portion of light from the second light source 72 may pass through the lower chamber 24 to directly irradiate the substrate W, and another portion of light from the second light source 72 may be reflected in the second reflective housing 60 and may pass through the lower chamber 24 to reach the internal space 21 .

[0090] After light is irradiated onto the substrate W loaded on the substrate support 30, a process gas may be supplied into the process chamber 20 through the gas inlet 28a. The gas in the process chamber 20 may be discharged to the outside through the gas outlet 28b. The gas outlet 28b may be connected to a vacuum pump so that the internal space in the process chamber 20 may be adjusted to a desired vacuum pressure. The process gas may include silane (SiH 4 ), disilane (Si 2 H 6 ), dichlorosilane (SiH 2 Cl 2 ), trichlorosilane TCS (SiHCl 3 )wait.

[0091] During the epitaxial process, the substrate W may be heated to a preset temperature of about 750° C. or less. Although the heating of the substrate W is precisely controlled, the light from the first light source 52 may be reflected within the first reflective housing 40 and may overlap densely in one or more regions on the substrate W (e.g., a middle region with a wafer radius of about 100 nm), resulting in uneven temperature.

[0092] The first interference thin layer pattern 100 may cover an annular region at a specific radius of the upper surface of the upper chamber 22 to prevent a light overlap phenomenon in which light is densely stacked in some regions on the substrate W. Therefore, a uniform thin layer may be formed on the wafer.

[0093] In addition, the second interference thin layer pattern 200 may be disposed on the lower surface of the second chamber 24. The second interference thin layer pattern 200 may have a ring shape and may cover a ring area at a specific radius of the lower surface of the second chamber 24. The second interference thin layer pattern 200 may have a multi-layer structure in which a first thin layer having a low refractive index (L) and a second thin layer having a high refractive index (H) are alternately stacked.

[0094] The second interference thin layer pattern 200 may cover an annular region at a specific radius of the lower surface of the lower chamber 24 to prevent a light overlap phenomenon in which light densely overlaps in some regions on the substrate W.

[0095] The semiconductor device formed using the above-mentioned layer deposition apparatus and layer deposition method can be used in various types of systems, such as computing systems. In some embodiments, the semiconductor device can include fin FET, DRAM, VNAND, etc. The system can be applied to computers, portable computers, laptop computers, personal digital assistants, tablet computers, mobile phones, digital music players, etc.

[0096] Although the present disclosure includes many specific implementation details, these details should not be understood as limiting the scope of the claims. The specific functions described in the present disclosure in different embodiments may also be implemented in combination in a single embodiment. On the contrary, the various features described in a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. In addition, although features may be described above as working in certain combinations, in some cases, one or more features from a combination may be deleted from the combination, and the combination may point to a sub-combination or a variant of a sub-combination.

Claims

1. A layer deposition device, comprising: a processing chamber configured to have a space for processing a substrate, the processing chamber comprising an upper chamber and a lower chamber defining an inner space; a substrate support disposed within the processing chamber and configured to support the substrate; a first lamp heating unit, the first lamp heating unit being disposed outside the processing chamber and above the upper chamber, the first lamp heating unit comprising a plurality of first light sources configured to irradiate light onto the substrate through the upper chamber; as well as A first interference thin layer pattern is disposed on an upper surface of the upper chamber and is configured to reflect at least a portion of light from the plurality of first light sources.

2. The layer deposition apparatus according to claim 1, wherein: Light emitted from the plurality of first light sources has a bandwidth of 400 nm to 2300 nm.

3. The layer deposition apparatus according to claim 2, wherein: The upper chamber has a transmittance of at least 80% for light having a wavelength ranging from 200 nm to 2000 nm.

4. The layer deposition apparatus according to claim 1, wherein: The first interference thin layer pattern includes a plurality of layers in which first layers and second layers having different refractive indices are alternately stacked.

5. The layer deposition apparatus according to claim 4, wherein: Each of the first layers has a first refractive index, and each of the second layers has a second refractive index greater than the first refractive index.

6. The layer deposition apparatus according to claim 5, wherein: The first layer includes at least one of silicon oxide SiO2, aluminum oxide Al2O3 and silicon nitride SiN, and the second layer includes at least one of zinc oxide ZnO, titanium oxide TiO2, tantalum pentoxide Ta2O5, fluorine tin oxide FTO, antimony tin oxide ATO, indium tin oxide ITO, indium antimony tin oxide IATO and aluminum-doped zinc oxide AZO.

7. The layer deposition apparatus according to claim 1, in, The first interference thin layer pattern includes a plurality of unit stacking layers sequentially stacked on the upper surface of the upper chamber, and Each unit stacked layer includes: a first layer having a first refractive index; a second layer stacked on the first layer and having a second refractive index greater than the first refractive index; and another first layer stacked on the second layer.

8. The layer deposition apparatus according to claim 7, wherein: The optical thickness of the first layer is 1 / 4 of the reference wavelength λ, and the optical thickness of the second layer is 1 / 2 of the reference wavelength λ.

9. The layer deposition apparatus according to claim 1, wherein: The first interference thin layer pattern has a reflectivity of at least 50% within a wavelength bandwidth of 800 nm to 2000 nm.

10. The layer deposition apparatus according to claim 1, further comprising: a second lamp heating unit, the second lamp heating unit being disposed outside the processing chamber and below the lower chamber, the second lamp heating unit comprising a plurality of second light sources configured to irradiate light onto the substrate through the lower chamber; as well as A second interference thin layer pattern is disposed on a lower surface of the lower chamber and is configured to reflect at least a portion of light from the plurality of second light sources.

11. A deposition device, the layer deposition device comprising: a first transparent chamber, wherein the first transparent chamber is in a dome shape; a second transparent chamber, wherein the second transparent chamber is in a dome shape; a substrate support, the substrate support being disposed between the first transparent chamber and the second transparent chamber, the substrate support being configured to support a substrate; a first lamp heating unit, the first lamp heating unit being disposed above the first transparent chamber and comprising a plurality of first light sources configured to irradiate light onto the substrate through the first transparent chamber; as well as A first interference thin layer pattern is provided on the upper surface of the first transparent chamber, wherein the first interference thin layer pattern comprises first layers and second layers with different refractive indices stacked alternately to reflect at least a portion of the light from the plurality of first light sources.

12. The layer deposition apparatus according to claim 11, wherein: Light emitted from the plurality of first light sources has a bandwidth of 400 nm to 2300 nm.

13. The layer deposition apparatus according to claim 12, wherein: The first transparent chamber has a transmittance of at least 80% for light having a wavelength ranging from 200 nm to 2000 nm.

14. The layer deposition apparatus according to claim 11, wherein: Each of the first layers has a first refractive index, and each of the second layers has a second refractive index greater than the first refractive index.

15. The layer deposition apparatus according to claim 14, wherein: The first layer includes at least one of silicon oxide SiO2, aluminum oxide Al2O3 and silicon nitride SiN, and the second layer includes at least one of zinc oxide ZnO, titanium oxide TiO2, tantalum pentoxide Ta2O5, fluorine tin oxide FTO, antimony tin oxide ATO, indium tin oxide ITO, indium antimony tin oxide IATO and aluminum-doped zinc oxide AZO.

16. The layer deposition apparatus according to claim 11, in, The first interference thin layer pattern includes a plurality of unit stacking layers sequentially stacked on the upper surface of the first transparent chamber, and Each unit stacked layer includes: the first layer and the second layer stacked in an alternating pattern, wherein the first layer has a first refractive index, and the second layer has a second refractive index greater than the first refractive index.

17. The layer deposition apparatus according to claim 16, wherein: The optical thickness of each of the first layers is 1 / 4 of a reference wavelength λ, and the optical thickness of each of the second layers is 1 / 2 of the reference wavelength λ.

18. The layer deposition apparatus according to claim 11, wherein: The first interference thin layer pattern has a thickness in the range of 0.4 μm to 10 μm.

19. The layer deposition apparatus according to claim 11, wherein: The first interference thin layer pattern has a reflectivity of at least 50% within a wavelength bandwidth of 800 nm to 2000 nm.

20. The layer deposition apparatus according to claim 11, further comprising: a second lamp heating unit, the second lamp heating unit being disposed outside the second transparent chamber and below the second transparent chamber, the second lamp heating unit comprising a plurality of second light sources configured to irradiate light onto the substrate through the second transparent chamber; as well as A second interference thin layer pattern is disposed on a lower surface of the second transparent chamber and is configured to reflect at least a portion of light from the plurality of second light sources.

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