Frequency calibration method, retimer chip and computer program product

Abstract

The invention discloses a frequency calibration method, a retimer chip and a computer program product. The method comprises the following steps: reading a fixed frequency of a frequency calibration phase-locked loop of a retimer chip; according to the standard frequency of the host equipment, the actual frequency of a local clock source of the frequency calibration phase-locked loop at the target temperature is determined, and signals sent by the host equipment are subjected to signal compensation through a retimer chip; calculating a ratio of the fixed frequency to the actual frequency, and determining a frequency compensation coefficient of the local clock source at the target temperature according to the ratio; and compensating the actual frequency according to the frequency compensation coefficient. Through application of the method and the device, the problem that the required cost is relatively high in order to improve the frequency accuracy of the sending signal of the frequency calibration phase-locked loop of the retimer chip in the related technology is solved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a frequency calibration method, a retimer chip, and a computer program product. Background Art

[0002] With the increase in the speed of interfaces such as USB (Universal Serial Bus) and DP (DisplayPort), high-speed interface re-timer chips are becoming more and more widely used. For protocols such as USB 3.2, USB4, and DP 2.1, the BLR (bit-level-re-timer) architecture is a common re-timer architecture.

[0003] For the BLR architecture, during the protocol link training, the local clock needs to send out the corresponding high-speed signal through the frequency calibration phase-locked loop. In the physical layer electrical test, the above protocols all require the local clock accuracy to reach ±300ppm. Common local clock architectures include external crystals and internal LC oscillators. External crystals increase system costs, and internal LC oscillators have certain temperature characteristics that cause frequency accuracy problems.

[0004] With regard to the problem in the related art of high cost required to improve the frequency accuracy of the transmitted signal of the frequency calibration phase-locked loop of the retimer chip, no effective solution has been proposed so far. Summary of the invention

[0005] The present application provides a frequency calibration method, a retimer chip and a computer program product to solve the problem in the related art that the cost is high in order to improve the frequency accuracy of the transmitted signal of the frequency calibration phase-locked loop of the retimer chip.

[0006] According to one aspect of the present application, a frequency calibration method is provided. The method includes: reading a fixed frequency of a frequency calibration phase-locked loop of a retimer chip; determining an actual frequency of a local clock source of the frequency calibration phase-locked loop at a target temperature according to a standard frequency of a host device, wherein a signal sent by the host device is compensated by the retimer chip; calculating a ratio of the fixed frequency to the actual frequency, determining a frequency compensation coefficient of the local clock source at the target temperature according to the ratio; and compensating the actual frequency according to the frequency compensation coefficient.

[0007] Optionally, determining the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature based on the standard frequency of the host device includes: determining the frequency of the external clock source of the host device to obtain the standard frequency; in the same time window, determining the actual frequency of the local clock source at the target temperature based on the number of cycles of the local clock flipping at the target temperature, and the number of cycles of the standard frequency clock signal of the receiving end data and clock recovery of the retimer chip flipping.

[0008] Optionally, in the same time window, based on the number of cycles of the local clock flipping at the target temperature, and the number of cycles of the standard frequency clock signal flipping of the receiving end data and clock recovery of the retimer chip, determining the actual frequency of the local clock source at the target temperature includes: counting the number of cycles of the local clock source flipping at the target temperature by a first timer; synchronously counting the number of cycles of the standard frequency clock signal flipping of the receiving end data and clock recovery by a second counter; determining the count value of the second counter when the first counter counts to a preset number of cycles to obtain the actual number of cycles; and determining the actual frequency based on the actual number of cycles.

[0009] Optionally, determining the actual frequency according to the actual number of cycles includes: calculating the duration of the target time window according to the actual number of cycles and the standard frequency; and calculating the actual frequency according to the duration of the target time window and the preset number of cycles.

[0010] Optionally, calculating the duration of the target time window based on the actual number of cycles and the standard frequency includes: calculating the inverse of the standard frequency to obtain the standard period, calculating the product of the standard period and the actual number of cycles to obtain the duration of the target time window; calculating the actual frequency based on the duration of the target time window and the preset number of cycles includes: calculating the ratio of the duration of the target time window to the preset number of cycles to obtain the actual period, calculating the inverse of the actual period to obtain the actual frequency.

[0011] Optionally, determining the frequency of the external clock source of the host device to obtain the standard frequency includes: reading the initial standard frequency of the external clock source of the host device; determining the target spread spectrum depth of the external clock source, and performing spread spectrum processing on the initial standard frequency according to the target spread spectrum depth to obtain the standard frequency.

[0012] Optionally, determining the target spread spectrum depth of the external clock source includes: reading a standard spread spectrum depth range from a storage area of ​​the retimer chip, and determining a preset value in the standard spread spectrum depth range as the target spread spectrum depth; or measuring the spread spectrum depth of the external clock source according to an external device to obtain the target spread spectrum depth.

[0013] According to another aspect of the present application, a retimer chip is provided, wherein a processor of the retimer chip executes a frequency calibration method to calibrate the frequency of a frequency calibration phase-locked loop.

[0014] According to another aspect of the present application, a computer program product is provided, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, a frequency calibration method is implemented.

[0015] According to another aspect of the present application, an electronic device is provided, comprising a processor and a memory; the memory stores computer-readable instructions, and the processor is used to execute the computer-readable instructions, wherein a frequency calibration method is executed when the computer-readable instructions are executed.

[0016] Through this application, the following steps are adopted: reading the fixed frequency of the frequency calibration phase-locked loop of the retimer chip; determining the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device, wherein the signal sent by the host device is compensated by the retimer chip; calculating the ratio of the fixed frequency and the actual frequency, and determining the frequency compensation coefficient of the local clock source at the target temperature according to the ratio; compensating the actual frequency according to the frequency compensation coefficient, thereby solving the problem of high cost required to improve the frequency accuracy of the transmitted signal of the frequency calibration phase-locked loop of the retimer chip in the related art. By using the standard frequency information of the host device to determine the frequency compensation coefficient of the local clock source of the frequency calibration phase-locked loop at the target temperature, and compensating the actual frequency according to the frequency compensation coefficient, the effect of improving the accuracy of the frequency of the transmitted signal of the frequency calibration phase-locked loop at a low cost is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0018] Figure 1 is a schematic diagram of a retimer chip according to an embodiment of the present application;

[0019] Figure 2 is a flow chart of a frequency calibration method according to an embodiment of the present application;

[0020] Figure 3 is a schematic diagram of a frequency calibration device according to an embodiment of the present application;

[0021] Figure 4 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0022] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0023] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0025] It should be noted that the relevant information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for display, data for analysis, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties.

[0026] According to an embodiment of the present application, a retimer chip is provided. Figure 1 is a schematic diagram of a retimer chip according to an embodiment of the present application, such as Figure 1 As shown, the re-timer chip may be a BLR re-timer, including:

[0027] LC OSC (LC Oscillator) is used to generate a clock signal with a frequency of F1 as an input clock source of the FN-PLL.

[0028] FN-PLL (Frequency Calibration Phase-Locked Loop) generates multiplied reference clocks based on Clock F1, namely Rx Ref Clock and Tx Ref Clock, which are sent to Rx CDR (Receiver Clock and Data Recovery) and Tx PLL (Transmitter Phase-Locked Loop) as reference clocks.

[0029] The Tx PLL is used to generate a standard frequency for data transmission when the BLR re-timer performs initial link training. The Rx CDR is used to lock the frequency of the data sent by the upstream host device Tx. The Tx PLL switches from the local standard frequency to the clock recovered by the Rx CDR (i.e., Recovery Clock) for frequency locking and data transmission.

[0030] processor( Figure 1 ), which is not shown in the figure, is used to perform a frequency calibration method. The frequency calibration method utilizes the standard frequency information of the re-timer upstream host device (Host Device), and calibrates the local clock frequency of the frequency calibration phase-locked loop through the receiving end data of the re-timer and the clock recovery circuit, so as to meet the index requirements of the electrical layer test protocol standard, and utilizes the internal LC oscillator and FN-PLL as the reference clock source, which can save the crystal outside the chip in the system design, thereby achieving the purpose of reducing the system design cost.

[0031] According to an embodiment of the present application, a frequency calibration method is provided.

[0032] Figure 2 FIG. 1 is a flow chart of a frequency calibration method according to an embodiment of the present application. Figure 2 As shown, the method comprises the following steps:

[0033] Step S202, reading the fixed frequency of the frequency calibration phase-locked loop of the retimer chip.

[0034] Among them, the re-timer chip is an intermediate device between the upstream sender and the downstream receiver of the high-speed serial data link, which is used to compensate for the attenuation and delay of the signal during transmission. The upstream sender is the host device, which can be a personal computer, mobile device, server, etc., and the downstream receiver can be a USB device, such as a mobile hard disk.

[0035] Among them, the frequency calibration phase-locked loop is also called FN-PLL. The local clock source of the frequency calibration phase-locked loop is the internal LC oscillator (LC OSC) of the re-timer chip. The FN-PLL generates a clock signal of a fixed frequency F_PLL that needs to be locked based on the initial frequency F1 of the LC OSC to meet the data transmission rate requirements of specific high-speed interface protocols (such as USB 3.2, USB 4, and DP 2.1). F_PLL is the product of the initial frequency F1 and the initial Divider 1. The re-timer chip includes an integrated core processor, and the value of F_PLL is stored in the core processor.

[0036] Step S204, determining the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device, wherein the signal sent by the host device is compensated by the retimer chip.

[0037] Temperature changes will affect the frequency stability of the local clock source of the frequency calibration phase-locked loop. The actual frequency F_T is the actual frequency of the local clock source at the target temperature T. The target temperature refers to the temperature under specific temperature conditions (such as any ambient temperature). Due to the influence of temperature changes, the actual frequency changes dynamically. In order to ensure that the frequency calibration phase-locked loop locks the frequency at a fixed frequency, it is necessary to first determine the actual frequency and compensate for the actual frequency.

[0038] It should be noted that since it is difficult to achieve ultra-high precision at low cost for the local clock source of the frequency calibration phase-locked loop, and considering that the clock signal of the host device is generated by an external clock source (external crystal, such as a quartz crystal oscillator), the frequency of the clock source is a standard frequency, stable and accurate, and meets the protocol requirements, the standard frequency of the external clock source is used to determine the actual frequency of the local clock, and the actual frequency is calibrated so that the Tx PLL locks the frequency at F_PLL, and then performs clock switching to pass the physical protocol test, thereby avoiding setting the external clock source of the re-timer itself and reducing the cost of the re-timer peripheral circuit.

[0039] Step S206, calculating the ratio of the fixed frequency to the actual frequency, and determining the frequency compensation coefficient of the local clock source at the target temperature according to the ratio.

[0040] It should be noted that, since the local clock source has a negative temperature coefficient and the FN-PLL needs to be locked at a fixed frequency F_PLL, the FN-PLL needs to achieve frequency compensation at different temperatures through a frequency compensation coefficient.

[0041] Calculate the ratio of the fixed frequency F_PLL and the actual frequency F_T of the internal clock at the target temperature T, and determine the ratio as the frequency compensation coefficient Div_T of the local clock source at the target temperature, expressed as: Div_T = F_PLL / F_T. Div_T is the PLL division ratio at the target temperature, which is the frequency compensation coefficient used to adjust the LC oscillator frequency to match the fixed frequency F_PLL, to ensure that the FN-PLL can generate a clock signal that meets the protocol requirements at any temperature.

[0042] Step S208: Compensate the actual frequency according to the frequency compensation coefficient.

[0043] Specifically, after determining Div_T, the retimer chip will adjust the division ratio of the Tx PLL to Div_T, thereby calibrating the frequency F_T of the LC oscillator at the target temperature to the fixed frequency F_PLL. Since the target temperature can be any temperature, the frequency deviation caused by temperature changes can be compensated in real time by adjusting Div_T, maintaining the stability and accuracy of the transmitter clock, and ensuring that the transmitter clock signal can accurately meet the requirements of the high-speed data transmission protocol at any temperature.

[0044] The frequency calibration method provided in the embodiment of the present application reads the fixed frequency of the frequency calibration phase-locked loop of the retimer chip; determines the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device, wherein the signal sent by the host device is compensated by the retimer chip; calculates the ratio of the fixed frequency and the actual frequency, and determines the frequency compensation coefficient of the local clock source at the target temperature according to the ratio; compensates the actual frequency according to the frequency compensation coefficient, thereby solving the problem of high cost required to improve the frequency accuracy of the transmitted signal of the frequency calibration phase-locked loop of the retimer chip in the related art. By using the standard frequency information of the host device to determine the frequency compensation coefficient of the local clock source of the frequency calibration phase-locked loop at the target temperature, and compensating the actual frequency according to the frequency compensation coefficient, the effect of improving the accuracy of the frequency of the transmitted signal of the frequency calibration phase-locked loop at a low cost is achieved.

[0045] In order to accurately obtain the actual frequency of the local clock source in the retimer chip at the target temperature, thereby achieving precise frequency calibration, optionally, in the frequency calibration method provided in the embodiment of the present application, determining the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device includes: determining the frequency of the external clock source of the host device to obtain the standard frequency; in the same time window, determining the actual frequency of the local clock source at the target temperature according to the number of cycles of the local clock flipping at the target temperature, and the number of cycles of the standard frequency clock signal flipping of the receiving end data and clock recovery of the retimer chip.

[0046] Among them, the standard frequency is the frequency generated by the external clock source of the host device, and its accuracy and stability meet or exceed the protocol standard requirements, such as the local clock accuracy of ±300ppm specified in USB 3.2, USB 4 or DisplayPort 2.1, which can be used as a reference for frequency calibration.

[0047] The local clock source refers to the LC oscillator inside the retimer chip, which generates a clock signal as the reference input of the frequency calibration phase-locked loop (FN-PLL). In practical applications, changes in ambient temperature will affect the frequency of the LC oscillator, so it is necessary to determine the actual frequency at a specific target temperature for frequency calibration.

[0048] The time window is a preset measurement period used to simultaneously observe the number of cycles of the local clock and the standard frequency to ensure the synchronization and accuracy of the measurement. The number of flipped cycles refers to the number of times the clock signal flips from high level to low level or from low level to high level within the specified time window, which is used to quantify the frequency of the clock signal.

[0049] The receiving end data and clock recovery circuit (Rx CDR) of the re-timer chip is used to recover the standard frequency from the data signal sent by the host device. The counter counts the number of cycles of the clock source at the standard frequency and the number of cycles of the internal clock source at the actual frequency, and the actual frequency F_T at any temperature is calculated.

[0050] This embodiment utilizes the standard frequency information of the external host device, and accurately determines the actual frequency of the local clock at the target temperature through the internal receiving end data and the number of cycles of the clock recovery circuit and the local clock source in the same time window, and then determines the division ratio of the frequency calibration phase-locked loop through the actual frequency, and calibrates the actual frequency through the division ratio, ensuring that the frequency accuracy of the protocol standard can be achieved at any temperature, thereby improving the performance of the high-speed data link.

[0051] Optionally, in the frequency calibration method provided in the embodiment of the present application, in the same time window, based on the number of cycles of the local clock flipping at the target temperature, and the number of cycles of the standard frequency clock signal of the receiving end data and clock recovery of the retimer chip flipping, determining the actual frequency of the local clock source at the target temperature includes: counting the number of cycles of the local clock source flipping at the target temperature by a first timer; synchronously counting the number of cycles of the standard frequency clock signal of the receiving end data and clock recovery flipping by a second counter; determining the count value of the second counter when the first counter counts to a preset number of cycles to obtain the actual number of cycles; and determining the actual frequency based on the actual number of cycles.

[0052] In the retimer chip, a designated first timer is used to measure the number of cycle flips of the local clock source at the target temperature, so as to quantify the specific operating frequency of the local clock source at the target temperature. The local clock source is an internal LC oscillator, and its frequency varies with temperature.

[0053] A second counter is used to measure the number of cycles of the standard frequency clock signal (the clock signal generated by the Rx CDR circuit) of the receiver data and clock recovery. The standard frequency is provided by the host device through its high-precision external clock source, which is used by the Rx CDR to recover and pass to the Tx PLL for frequency calibration. The second counter works synchronously with the first timer, that is, counting in the same time window, ensuring that the comparison of the measured data is performed on the same time basis.

[0054] The preset number of cycles is the number of cycles pre-set during design and used as a reference for counting. The first timer is set to stop counting when it reaches the preset number of cycles CNT_S, and the count value CNT_T of the second counter in the same time window is recorded. Since the standard frequency of the external clock can be known, the actual frequency of the local clock source at the target temperature can be calculated through the two counted cycle numbers.

[0055] This embodiment combines the cycle counts of the first timer and the second counter to determine the actual frequency of the local clock source at any target temperature without using an external crystal oscillator, and then calibrate the actual frequency. This not only reduces the system cost, but also improves the adaptability and performance stability of the retimer chip in high-speed data transmission links, ensuring that under different temperature conditions, the local clock frequency can meet the high-precision requirements specified by the protocol.

[0056] Optionally, in the frequency calibration method provided in the embodiment of the present application, determining the actual frequency according to the actual number of cycles includes: calculating the length of the target time window according to the actual number of cycles and the standard frequency; and calculating the actual frequency according to the length of the target time window and the preset number of cycles.

[0057] Among them, the actual number of cycles is the number of cycles that the local clock source flips at the target temperature, which has been obtained by the synchronous counting of the first timer and the second counter in the previous embodiment. The standard frequency is a frequency provided by the external clock source of the host device, which has high precision and is recovered by the receiving end data and clock recovery circuit of the retimer chip. The preset number of cycles is set in advance during the design and is used as a cycle number benchmark for counting. The duration of the target time window is calculated based on the actual number of cycles and the standard frequency, and then the actual frequency is calculated based on the duration of the target time window and the preset number of cycles.

[0058] Optionally, in the frequency calibration method provided in the embodiment of the present application, calculating the duration of the target time window based on the actual number of cycles and the standard frequency includes: calculating the inverse of the standard frequency to obtain the standard period, calculating the product of the standard period and the actual number of cycles to obtain the duration of the target time window; calculating the actual frequency based on the duration of the target time window and the preset number of cycles includes: calculating the ratio of the duration of the target time window to the preset number of cycles to obtain the actual period, calculating the inverse of the actual period to obtain the actual frequency.

[0059] Specifically, first, calculate the inverse of the standard frequency Fs_SSC to get the standard cycle, 1 / Fs_SSC, which is the duration of each cycle under the standard frequency. Then, the product of the standard cycle number CNT_T and the actual cycle 1 / Fs_SSC is used as the duration of the target time window, that is, (1 / Fs_SSC)*CNT_T. Ensure that there is a common time base based on the actual cycle number and the standard frequency to facilitate the subsequent frequency calculation.

[0060] Then, the actual period is calculated based on the ratio of the duration of the target time window and the preset number of cycles CNT_S, that is, the duration of the target time window divided by the preset number of cycles CNT_S, that is, (1 / Fs_SSC)*CNT_T / CNT_S. The actual frequency is obtained by calculating the reciprocal of the actual period, that is, 1 divided by the actual period, and converted from the number of cycles to the frequency value, that is, 1 / [(1 / Fs_SSC)*CNT_T / CNT_S], thereby accurately determining the actual frequency of the local clock source at the target temperature.

[0061] Exemplarily, a counting cycle CNT_S is preset, for example, 100,000 cycles, and the number of cycles CNT_T of the clock signal generated by the local clock source flipping at the target temperature and the number of cycles of the clock signal generated by the Rx CDR flipping at the standard frequency are measured. Through the formula (1 / FT)*CNT_S=(1 / Fs_SSC)*CNT_T, the actual frequency FT=1 / [(1 / Fs_SSC)*CNT_T / CNT_S] of the local clock source at the target temperature can be calculated, where Fs_SSC is the standard frequency recovered by the Rx CDR, taking into account the influence of the spread spectrum modulation depth SSC_depth.

[0062] This embodiment sets the number of cycles of the local clock and measures the actual number of cycles of the standard frequency in the same time window to derive the actual frequency of the local clock. Compared with the traditional frequency calibration method, it avoids the dependence on the external crystal oscillator of the retiming chip itself, reduces the system cost, and improves the accuracy and dynamic response capability of the frequency calibration.

[0063] In order to ensure the accuracy of the standard frequency and provide a stable reference for the local clock source frequency calibration of the retimer chip, optionally, in the frequency calibration method provided in the embodiment of the present application, the frequency of the external clock source of the host device is determined to obtain the standard frequency, including: reading the initial standard frequency of the external clock source of the host device; determining the target spread spectrum depth of the external clock source, and performing spread spectrum processing on the initial standard frequency according to the target spread spectrum depth to obtain the standard frequency.

[0064] Among them, the initial standard frequency Fs is the frequency generated by the external clock source of the host device without spread spectrum clocking (SSC). The external clock source can be a quartz crystal oscillator. The frequency of the quartz crystal oscillator is less affected by temperature and voltage, and can provide a stable and reliable clock signal for high-speed data transmission.

[0065] Different high-speed data interface protocols (such as USB 3.2, USB 4, DisplayPort 2.1) will specify different spread spectrum depth requirements. The target spread spectrum depth is used to describe the degree of change of the external clock source frequency within a specific range. The target spread spectrum depth is determined and the initial standard frequency Fs is spread spectrum processed by the target spread spectrum depth to reduce electromagnetic interference and radio frequency interference and optimize the signal transmission quality.

[0066] The specific implementation steps for determining the standard frequency of the external clock source of the host device can be as follows: Read the initial frequency of the external clock source of the host device, recorded as Fs. Determine the target spread spectrum depth (SSC_depth) according to the protocol requirements, and the spread spectrum depth can be selected between -4000ppm and -5000ppm. Adjust the initial frequency Fs to the center frequency within its spread spectrum range to obtain the frequency Fs_SSC, and the formula is: Fs_SSC = Fs*(1-SSC_depth). The processed frequency Fs_SSC is the standard frequency used for frequency calibration, which is used for subsequent cycle counting and determination of the actual frequency of the local clock.

[0067] This embodiment obtains the initial frequency of the external clock source of the host device accurately and spreads the initial frequency to obtain a standard frequency as a reference for frequency calibration, thereby providing a stable and reliable benchmark for frequency calibration of the local clock source inside the retimer chip.

[0068] The spread spectrum depth of the external clock source can be determined flexibly. Optionally, in the frequency calibration method provided in the embodiment of the present application, determining the target spread spectrum depth of the external clock source includes: reading a standard spread spectrum depth range from a storage area of ​​the retimer chip, and determining a preset value in the standard spread spectrum depth range as the target spread spectrum depth; or measuring the spread spectrum depth of the external clock source according to an external device to obtain the target spread spectrum depth.

[0069] In an optional implementation, a standard spread spectrum depth range can be read from a storage area of ​​a retimer chip, and a preset value in the standard spread spectrum depth range is determined as a target spread spectrum depth, thereby realizing quick and flexible determination of the target spread spectrum depth, which is applicable to most common scenarios.

[0070] The standard spread spectrum depth range is the spread spectrum depth range specified by the protocol or preset during design, and is stored in the storage area of ​​the retimer chip. The storage area is used to save the parameter settings of the chip in different operating modes, including the standard spread spectrum depth range. At the beginning of the frequency calibration process, the standard spread spectrum depth range is first read from the storage area of ​​the chip to provide a basis for subsequent frequency processing, for example, it can be -4000ppm to -5000ppm. The preset value is a parameter defined by the designer or system according to actual needs to adapt to different application scenarios or to achieve specific frequency stability requirements. For example, the preset value can be the middle value of the standard spread spectrum depth range, -4500ppm.

[0071] In an optional implementation, the target spread spectrum depth can also be obtained by measuring the spread spectrum depth of the external clock source according to the external device. This method provides higher frequency calibration accuracy with the help of direct measurement of the external device, and is suitable for applications with extremely high requirements on frequency stability or on-site debugging under complex environmental conditions.

[0072] The external device is an auxiliary device used to measure the spread depth of the external clock source. It can be a high-precision frequency meter or a special spread depth test device. During the production test or on-site debugging stage, the actual spread depth of the external clock source is accurately measured by the external device to ensure the accuracy of the frequency calibration. The external clock source is connected to the external device, and the actual spread depth is calculated by measuring the frequency variation range and center frequency over a period of time. The measured spread depth of the external clock source is determined as the target spread depth. The target spread depth is directly derived from the measurement results of the external device, ensuring that the value of the target spread depth can reflect the actual frequency variation characteristics of the external clock source in the actual working environment, thereby providing a more accurate basis for frequency calibration.

[0073] This embodiment determines the target spread spectrum depth in different ways, taking into account the differences in actual working environment and system configuration. Whether it is based on parameter adjustment stored inside the chip or direct measurement with the help of external equipment, a stable standard frequency that meets the protocol requirements can be obtained, laying the foundation for frequency calibration of the local clock source.

[0074] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0075] The embodiment of the present application also provides a frequency calibration device. It should be noted that the frequency calibration device of the embodiment of the present application can be used to execute the frequency calibration method provided in the embodiment of the present application. The frequency calibration device provided in the embodiment of the present application is introduced below.

[0076] Figure 3 is a schematic diagram of a frequency calibration device according to an embodiment of the present application. Figure 3 As shown, the device includes: a reading unit 302 , a first determining unit 304 , a second determining unit 306 and a compensation unit 308 .

[0077] The reading unit 302 is used to read the fixed frequency of the frequency calibration phase-locked loop of the retimer chip.

[0078] The first determination unit 304 is used to determine the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device, wherein the signal sent by the host device is compensated by the retimer chip.

[0079] The second determining unit 306 is configured to calculate a ratio between the fixed frequency and the actual frequency, and determine a frequency compensation coefficient of the local clock source at a target temperature according to the ratio.

[0080] The compensation unit 308 is used to compensate the actual frequency according to the frequency compensation coefficient.

[0081] The frequency calibration device provided in the embodiment of the present application reads the fixed frequency of the frequency calibration phase-locked loop of the retimer chip through the reading unit 302; the first determination unit 304 determines the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device, wherein the signal sent by the host device is compensated by the retimer chip; the second determination unit 306 calculates the ratio of the fixed frequency and the actual frequency, and determines the frequency compensation coefficient of the local clock source at the target temperature according to the ratio; the compensation unit 308 compensates the actual frequency according to the frequency compensation coefficient, thereby solving the problem of high cost in order to improve the frequency accuracy of the transmitted signal of the frequency calibration phase-locked loop of the retimer chip in the related art, and determines the frequency compensation coefficient of the local clock source of the frequency calibration phase-locked loop at the target temperature by utilizing the standard frequency information of the host device, and compensates the actual frequency according to the frequency compensation coefficient, thereby achieving the effect of improving the accuracy of the frequency of the transmitted signal of the frequency calibration phase-locked loop at a low cost.

[0082] Optionally, in the frequency calibration device provided in the embodiment of the present application, the first determination unit 304 includes: a first determination module, used to determine the frequency of the external clock source of the host device to obtain a standard frequency; a second determination module, used to determine the actual frequency of the local clock source at the target temperature in the same time window based on the number of cycles of the local clock flipping at the target temperature, and the number of cycles of the standard frequency clock signal flipping of the receiving end data and clock recovery of the retimer chip.

[0083] Optionally, in the frequency calibration device provided in the embodiment of the present application, the second determination module includes: a first counting submodule, used to count the number of cycles of the local clock source flipping at the target temperature through a first timer; a second counting submodule, used to count the number of cycles of the standard frequency clock signal of the receiving end data and clock recovery flipping through a second counter synchronously; the first determination submodule, used to determine the count value of the second counter when the first counter counts to a preset number of cycles, and obtain the actual number of cycles; the second determination submodule, used to determine the actual frequency based on the actual number of cycles.

[0084] Optionally, in the frequency calibration device provided in an embodiment of the present application, the second determination submodule includes: a first calculation submodule, used to calculate the duration of the target time window based on the actual number of cycles and the standard frequency; and a second calculation submodule, used to calculate the actual frequency based on the duration of the target time window and the preset number of cycles.

[0085] Optionally, in the frequency calibration device provided in the embodiment of the present application, the first calculation submodule is used to: calculate the inverse of the standard frequency to obtain the standard period, calculate the product of the standard period and the actual number of periods, and obtain the length of the target time window; the second calculation submodule is used to: calculate the ratio of the length of the target time window to the preset number of periods to obtain the actual period, calculate the inverse of the actual period, and obtain the actual frequency.

[0086] Optionally, in the frequency calibration device provided in an embodiment of the present application, the first determination module includes: a reading sub-module, used to read the initial standard frequency of the external clock source of the host device; a third determination sub-module, used to determine the target spread spectrum depth of the external clock source, and perform spread spectrum processing on the initial standard frequency according to the target spread spectrum depth to obtain the standard frequency.

[0087] Optionally, in the frequency calibration device provided in an embodiment of the present application, the third determination submodule is used to: read the standard spread spectrum depth range from the storage area of ​​the retimer chip, and determine a preset value in the standard spread spectrum depth range as the target spread spectrum depth; or measure the spread spectrum depth of an external clock source according to an external device to obtain the target spread spectrum depth.

[0088] The frequency calibration device includes a processor and a memory. The reading unit 302, the first determination unit 304, the second determination unit 306 and the compensation unit 308 are all stored in the memory as program units. The processor executes the program units stored in the memory to implement corresponding functions.

[0089] The processor includes a core, and the core retrieves the corresponding program unit from the memory. One or more cores can be set, and the problem of high cost in the related art for improving the frequency accuracy of the sending signal of the frequency calibration phase-locked loop of the retimer chip is solved by adjusting the core parameters.

[0090] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.

[0091] An embodiment of the present application further provides a computer storage medium, which is used to store a program, wherein when the program is run, the device where the non-volatile storage medium is located is controlled to execute a frequency calibration method.

[0092] The present application also provides an electronic device, Figure 4 It is a schematic diagram of an electronic device according to an embodiment of the present application, wherein the electronic device 40 comprises a processor and a memory; the memory stores computer-readable instructions, and the processor is used to run the computer-readable instructions, wherein when the computer-readable instructions are run, a frequency calibration method is executed: reading the fixed frequency of the frequency calibration phase-locked loop of the retimer chip; determining the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device, wherein the signal sent by the host device is compensated by the retimer chip; calculating the ratio of the fixed frequency and the actual frequency, and determining the frequency compensation coefficient of the local clock source at the target temperature according to the ratio; and compensating the actual frequency according to the frequency compensation coefficient. The electronic device in this article can be a server, a PC, a PAD, a mobile phone, etc.

[0093] An embodiment of the present application also provides a computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, a frequency calibration method is implemented.

[0094] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0095] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0096] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0097] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0098] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0099] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0100] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0101] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0102] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A frequency calibration method, characterized in that: include: Read the fixed frequency of the frequency calibration phase-locked loop of the retimer chip; determining an actual frequency of a local clock source of the frequency calibration phase-locked loop at a target temperature according to a standard frequency of a host device, wherein a signal sent by the host device is subjected to signal compensation by the retimer chip; Calculating a ratio of the fixed frequency to the actual frequency, and determining a frequency compensation coefficient of the local clock source at the target temperature according to the ratio; The actual frequency is compensated according to the frequency compensation coefficient.

2. The method according to claim 1, characterized in that Determining the actual frequency of the local clock source of the frequency calibration phase-locked loop at the target temperature according to the standard frequency of the host device includes: Determine the frequency of the external clock source of the host device to obtain the standard frequency; In the same time window, the actual frequency of the local clock source at the target temperature is determined based on the number of cycles of the local clock flipping at the target temperature and the number of cycles of the standard frequency clock signal of the receiving end data and clock recovery of the retimer chip flipping.

3. The method according to claim 1, characterized in that In the same time window, according to the number of cycles of the local clock flipping at the target temperature and the number of cycles of the standard frequency clock signal flipping of the receiving end data and clock recovery of the retimer chip, determining the actual frequency of the local clock source at the target temperature includes: Counting the number of cycles of the local clock source flipping at the target temperature by a first timer; The number of cycles of the standard frequency clock signal of the receiving end data and clock recovery being flipped is counted synchronously by a second counter; Determine the count value of the second counter when the first counter counts to a preset number of cycles to obtain an actual number of cycles; The actual frequency is determined according to the actual number of cycles.

4. The method according to claim 3, characterized in that Determining the actual frequency according to the actual number of cycles includes: Calculating the duration of the target time window according to the actual number of cycles and the standard frequency; The actual frequency is calculated according to the duration of the target time window and the preset number of cycles.

5. The method according to claim 4, characterized in that The duration of the target time window calculated according to the actual number of cycles and the standard frequency includes: Calculate the reciprocal of the standard frequency to obtain a standard period, calculate the product of the standard period and the actual period number to obtain the duration of the target time window; Calculating the actual frequency according to the duration of the target time window and the preset number of cycles includes: The ratio of the duration of the target time window to the preset number of cycles is calculated to obtain an actual cycle, and the inverse of the actual cycle is calculated to obtain the actual frequency.

6. The method according to claim 2, characterized in that Determining the frequency of the external clock source of the host device to obtain the standard frequency includes: Reading an initial standard frequency of the external clock source of the host device; A target spread spectrum depth of the external clock source is determined, and a spread spectrum process is performed on the initial standard frequency according to the target spread spectrum depth to obtain the standard frequency.

7. The method according to claim 6, characterized in that Determining a target spread spectrum depth of the external clock source includes: Reading a standard spread spectrum depth range from a storage area of ​​the retimer chip, and determining a preset value in the standard spread spectrum depth range as the target spread spectrum depth; or The target spread spectrum depth is obtained by measuring the spread spectrum depth of the external clock source according to an external device.

8. A retimer chip, characterized in that: The processor of the retimer chip executes the frequency calibration method according to any one of claims 1 to 7 to calibrate the frequency of a frequency calibration phase-locked loop.

9. A computer program product, characterized in that The present invention comprises a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the frequency calibration method according to any one of claims 1 to 7 is implemented.

10. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to execute the frequency calibration method according to any one of claims 1 to 7 through the computer program.

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