Transceiver Delay Calibration System and Method

Abstract

The present invention provides a transceiver delay calibration system and method, including: the transmitting end of the transceiver receives a first characteristic data signal and transmits it to the receiving end of the transceiver; the receiving end generates a second characteristic data signal; a data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal; a high-frequency sampling module obtains phase information by using the third characteristic data signal; a delay calibration module obtains a delay calibration value according to the characteristic data signal, the phase information and the shift information. By transmitting the first characteristic data signal to the delay calibration module through two different paths and obtaining the phase information and the shift information, the delay calibration module can obtain an accurate delay calibration value according to the obtained data information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a transceiver delay calibration system and method. Background Art

[0002] A transceiver is a device for data communication, which has both receiving and transmitting functions and can simultaneously complete signal transmission and reception in one device. Transceivers play a crucial role in modern communication systems and are key components for realizing data transmission and exchange between different devices.

[0003] With the development of network technologies, passive positioning, and power transmission fields, the requirements for the time synchronization performance index between devices are getting higher and higher. For example, in the field of Ethernet (such as 1G Ethernet), the accuracy requirements for IEEE 1588 are getting higher and higher. However, due to the uncertainty of the power-on delay of the transceiver each time, it greatly affects the accuracy of time synchronization between devices. Therefore, it is necessary to calibrate the delay of the transceiver.

[0004] Currently, delay calibration is usually implemented based on TDC (Time to Digital Convert). Among them, there are mainly two schemes: implementing delay calibration using a carry chain and implementing delay calibration using the IDELAY module inside the FPGA. For the scheme of implementing delay calibration using a carry chain, since the delays of the carry chain are not of equal length and the carry chain is relatively sensitive to temperature, not only are the requirements for the layout and wiring of the FPGA relatively high, but also a large amount of carry chain resources are required, and the obtained delay calibration accuracy is not satisfactory. For the scheme of implementing delay calibration using the IDELAY module inside the FPGA, although the calibration accuracy is high, the required IDELAY resources are relatively large, and it is difficult to meet the resource requirements in actual complex projects, so its use is limited. Summary of the Invention

[0005] The purpose of the present invention is to provide a transceiver delay calibration system and method to solve the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

[0006] To solve the above technical problems, the present invention provides a transceiver delay calibration system, including:

[0007] A data generation module, configured to generate a first characteristic data signal;

[0008] A transceiver, including a sending end and a receiving end; the sending end is configured to receive the first characteristic data signal and loop back and transmit the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is configured to generate a second characteristic data signal according to the first characteristic data signal;

[0009] A data extraction module, configured to receive the second feature data signal and generate a third feature data signal and shift information according to the second feature data signal;

[0010] A high-frequency sampling module, configured to perform asynchronous clock high-frequency sampling on the third feature data signal to obtain phase information;

[0011] A delay calibration module, configured to receive the first feature data signal and obtain a delay calibration value according to the first feature data signal, the third feature data signal, the phase information, and the shift information.

[0012] Optionally, in the transceiver delay calibration system, the first feature data signal is inserted with feature data with a direction identifier.

[0013] Optionally, in the transceiver delay calibration system, the first feature data signal is inserted with the feature data at a preset period; the first feature data signal is inserted with one or more groups of the feature data.

[0014] Optionally, in the transceiver delay calibration system, the feature data includes several consecutive identical data and a group of different data randomly located in the identical data; or, the feature data is data with a header in each period.

[0015] Optionally, in the transceiver delay calibration system, the data extraction module is configured to perform a shift process on the second feature data signal to extract the feature data and the shift information, and generate a third feature data signal according to the second feature data signal and the feature data.

[0016] Optionally, in the transceiver delay calibration system, the delay calibration module is configured to receive the first feature data signal and record the time elapsed from when the data generation module generates the first feature data signal to when the delay calibration module receives the first feature data signal to obtain a first time; the delay calibration module is further configured to receive the third feature data signal and the phase information and record the time elapsed from when the data generation module generates the first feature data signal to when the delay calibration module receives the phase information to obtain a second time; the delay calibration module is further configured to calculate a delay calibration value according to the first time, the second time, the phase information, and the shift information.

[0017] Optionally, in the transceiver delay calibration system, the transceiver delay calibration system is implemented based on an FPGA, a hardware programmable SoC, or an ASIC chip.

[0018] To solve the above technical problems, the present invention further provides a transceiver delay calibration method, which is applied to the transceiver delay calibration system described in any one of the above. The transceiver delay calibration method includes:

[0019] Confirm that the transceiver is working properly;

[0020] The data generation module generates a first characteristic data signal;

[0021] The transmitting end of the transceiver and the delay calibration module respectively receive the first characteristic data signal;

[0022] The receiving end of the transceiver receives the first characteristic data signal from the transmitting end and generates a second characteristic data signal;

[0023] The data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal;

[0024] The high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information;

[0025] The delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0026] Optionally, in the transceiver delay calibration method, the data generation module generates characteristic data with a direction identifier and inserts the characteristic data into the first characteristic data signal at a preset period, so that the output first characteristic data signal is inserted with characteristic data with a direction identifier.

[0027] Optionally, in the transceiver delay calibration method, the method for the data extraction module to generate a third characteristic data signal and shift information according to the second characteristic data signal includes:

[0028] The data extraction module performs a shift process on the second characteristic data signal to extract characteristic data and shift information;

[0029] The data extraction module generates a third characteristic data signal according to the second characteristic data signal and the characteristic data.

[0030] Optionally, in the transceiver delay calibration method, the method for the delay calibration module to obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information includes:

[0031] When the data generation module generates the first characteristic data signal, the delay calibration module starts timing;

[0032] When the delay calibration module receives the first characteristic data signal, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a first time;

[0033] When the delay calibration module receives the phase information, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a second time;

[0034] The delay calibration module calculates a delay calibration value according to the first time, the second time, the phase information, and the shift information.

[0035] Optionally, in the transceiver delay calibration method, the transceiver delay calibration method further includes:

[0036] The delay calibration module reports the delay calibration value to the upper layer protocol to perform delay calibration on the transceiver by using the delay calibration value.

[0037] The transceiver delay calibration system and method provided by the present invention include: a data generation module for generating a first characteristic data signal; a transceiver including a sending end and a receiving end; the sending end is configured to receive the first characteristic data signal and loop back and transmit the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is configured to generate a second characteristic data signal according to the first characteristic data signal; a data extraction module for receiving the second characteristic data signal and generating a third characteristic data signal and shift information according to the second characteristic data signal; a high-frequency sampling module for performing asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; a delay calibration module for receiving the first characteristic data signal and obtaining a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information. By utilizing the loop-back transmission characteristic of the transceiver, the first characteristic data signal is transmitted to the delay calibration module through the sending end and the receiving end of the transceiver, the data extraction module, and the high-frequency sampling module, and the phase information is obtained through asynchronous clock high-frequency sampling. At the same time, the first characteristic data signal is directly sent to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources. Description of the Drawings

[0038] Figure 1 It is a structural block diagram of the transceiver delay calibration system provided by this embodiment;

[0039] Figure 2 Flow chart of the transceiver delay calibration method provided in this embodiment. Detailed implementation manners

[0040] The transceiver delay calibration system and method proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in very simplified forms and use non-precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention. In addition, the structures shown in the accompanying drawings are often part of the actual structures. In particular, the accompanying drawings need to show different emphases and sometimes use different scales.

[0041] It should be noted that the "first", "second", etc. in the description, claims and drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, rather than to describe a specific order or sequence. It should be understood that such structures can be interchanged under appropriate circumstances. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units does not necessarily limit to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0042] To clearly illustrate the implementation solutions of the transceiver delay calibration system and method provided in this embodiment, the technical terms involved in this embodiment are explained as follows:

[0043] FPGA: Field Programmable Gate Array, field programmable gate array;

[0044] CPRI: Common Public Radio Interface, common public radio interface;

[0045] IEEE 1588: IEEE1588 protocol, a precise clock synchronization protocol standard for network measurement and control systems, also known as PTP (Precise Time Protocol, precise time protocol);

[0046] TDC: Time to Digital Convert, time-to-digital converter;

[0047] SoC: System on Chip, system-on-chip, also known as system on a chip;

[0048] ASIC: Application Specific Integrated Circuit, application-specific integrated circuit.

[0049] In view of the fact that the existing transceiver delay calibration systems and methods cannot meet the requirements of scenarios that are very sensitive to link delay, such as IEEE 1588 and CPRI, for the delay calibration accuracy of transceivers, this embodiment provides a transceiver delay calibration system, as Figure 1 shown, including:

[0050] A data generation module, configured to generate a first characteristic data signal;

[0051] A transceiver, including a transmitting end and a receiving end; the transmitting end is configured to receive the first characteristic data signal and loop back and transmit the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is configured to generate a second characteristic data signal according to the first characteristic data signal;

[0052] A data extraction module, configured to receive the second characteristic data signal and generate a third characteristic data signal and shift information according to the second characteristic data signal;

[0053] A high-frequency sampling module, configured to perform asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information;

[0054] A delay calibration module, configured to receive the first characteristic data signal and obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information.

[0055] The transceiver delay calibration system provided in this embodiment transmits the first characteristic data signal to the delay calibration module through the transmitting end and the receiving end of the transceiver, the data extraction module, and the high-frequency sampling module by utilizing the loop-back transmission characteristic of the transceiver, and obtains phase information through asynchronous clock high-frequency sampling. At the same time, the first characteristic data signal is directly sent to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming too many resources.

[0056] Specifically, in this embodiment, the first characteristic data signal generated by the data generation module is inserted with characteristic data with a direction identifier, so as to facilitate the subsequent delay calibration unit to distinguish the direction of the received signal. In a specific embodiment, the characteristic data in the first characteristic data signal identifies the "transmission" direction.

[0057] In practical applications, the feature data is generated periodically to facilitate the confirmation of the signal direction in each period. Moreover, the feature data generated in each period includes one or more groups of feature data to improve the accuracy of signal direction judgment.

[0058] Correspondingly, the first feature data signal is inserted with the feature data according to a preset period. For example, the feature data is inserted according to a single period.

[0059] In order to effectively identify the feature data in the first feature data signal, the feature data should have a certain regularity. For example, in this embodiment, the feature data includes several consecutive identical data and a group of different data randomly located in the identical data; or, the feature data is data with a header in each period.

[0060] In practical applications, according to actual needs, the generation rule of the feature data can be reasonably set, and the position, length, etc. of the feature data in the first feature data signal can be reasonably adjusted. The present application does not limit this.

[0061] Further, in this embodiment, the transmitting end of the transceiver needs to loop back and transmit the first feature data signal to the receiving end before the delay calibration is completed; and switch to external data after the delay calibration is completed, that is, it can normally send a data stream to the outside after the delay calibration is completed. The receiving end of the transceiver needs to receive the first feature data signal looped back and transmitted by the transmitting end before the delay calibration is completed and correspondingly generate a second feature data signal; and switch to external data after the delay calibration is completed, that is, it can normally receive the data stream sent from the outside after the delay calibration is completed.

[0062] Further, in this embodiment, the data extraction module is used to perform a shift process on the second feature data signal to extract the feature data and the shift information, and generate a third feature data signal according to the second feature data signal and the feature data.

[0063] In practical applications, since the feature data in the second feature data signal identifies the "transmission" direction, the data extraction module can modify the feature data extracted from the second feature data signal to the feature data identifying the "reception" direction, thereby obtaining the third feature data signal.

[0064] In this embodiment, by extracting the shift information from the second feature data signal through the data extraction module and transmitting the shift information to the delay calibration module, the delay calibration module can obtain more accurate delay information, thereby improving the delay calibration accuracy of the transceiver.

[0065] It should be noted that the implementation method of shift processing adopted in this embodiment to extract feature data is well-known to those skilled in the art. In addition, the generation method of the feature data for identifying the "reception" direction can refer to the generation method of the feature data for identifying the "transmission" direction, as long as it is ensured that the feature data contents in the two different directions are different and distinguishable.

[0066] Further, in this embodiment, the high-frequency sampling module is used to perform asynchronous clock high-frequency sampling on the third feature data signal to obtain phase information, which reflects the phase difference between the first feature data signal and the third feature data signal, that is, the delay between the two signals. Among them, the method of obtaining phase information by asynchronous clock high-frequency sampling is well-known to those skilled in the art, and will not be elaborated in this application.

[0067] Still further, in this embodiment, the delay calibration module is used to receive the first feature data signal and record the time elapsed from when the data generation module generates the first feature data signal to when the delay calibration module receives the first feature data signal, so as to obtain the first time T1.

[0068] The delay calibration module is further used to receive the third feature data signal and the phase information, and record the time elapsed from when the data generation module generates the first feature data signal to when the delay calibration module receives the phase information, so as to obtain the second time T2.

[0069] The delay calibration module is further used to calculate a delay calibration value according to the first time T1, the second time T2, the phase information, and the shift information. Specifically, the first time T1 reflects the signal transmission duration in the "transmission" direction of the system, and the second time T2 reflects the signal transmission duration in the "reception" direction of the system; the phase information includes the phase difference , which reflects the signal delay in the "reception" direction; the shift information includes the shift amount , then the delay calibration value Tr of the transceiver can be expressed as: .

[0070] The transceiver delay calibration system provided in this embodiment can be implemented based on an FPGA, a hardware programmable SoC, or an ASIC chip. The specific implementation method can be known to those skilled in the art according to the above content, and will not be elaborated in this application.

[0071] The transceiver delay calibration system provided in this embodiment has no strict requirements for the generation method of characteristic data, such as data type, extraction method, etc. Therefore, the generation method of characteristic data can be reasonably set according to actual needs, effectively reducing the complexity of data generation and extraction and improving the delay calibration efficiency. The transceiver delay calibration system provided in this embodiment uses asynchronous clock high-frequency sampling to obtain the phase relationship, which can effectively reduce the layout and wiring pressure and save hardware resources. The transceiver delay calibration system provided in this embodiment can not only effectively improve the delay calibration accuracy in scenarios that are very sensitive to link delay, such as IEEE 1588, but also be applicable to Ethernet with different line rates, thus having a wide range of application scenarios. The transceiver delay calibration system provided in this embodiment does not require external instrument testing. After the system is powered on, it will automatically obtain the delay calibration value of the transceiver, which can not only eliminate external instruments and reduce the operation difficulty, but also perform automatic delay calibration for the delay uncertainty of the transceiver, improving the transceiver delay calibration efficiency and accuracy.

[0072] This embodiment also provides a transceiver delay calibration method, which is applied to the transceiver delay calibration system as described above, as Figure 2 shown, the transceiver delay calibration method includes:

[0073] S1, confirm that the transceiver is working properly;

[0074] S2, the data generation module generates a first characteristic data signal;

[0075] S3, the sending end of the transceiver and the delay calibration module respectively receive the first characteristic data signal;

[0076] S4, the receiving end of the transceiver receives the first characteristic data signal from the sending end and generates a second characteristic data signal;

[0077] S5, the data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal;

[0078] S6, the high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information;

[0079] S7, the delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0080] The transceiver delay calibration method provided in this embodiment utilizes the loopback transmission characteristic of the transceiver to transmit the first characteristic data signal to the delay calibration module through the transmitter and receiver of the transceiver, the data extraction module, and the high-frequency sampling module, and obtains the phase information through asynchronous clock high-frequency sampling. At the same time, the first characteristic data signal is directly sent to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information. In this way, it can effectively reduce the layout and wiring pressure, save resources, and improve the accuracy of transceiver delay calibration, solving the problem of how to accurately calibrate the delay of the transceiver without consuming too many resources.

[0081] Specifically, in this embodiment, in step S1, it is confirmed that the transceiver is working properly.

[0082] In practical applications, when the system is powered on or reset, the entire system is reset, thereby initializing the system. Since the initialization delay of the transceiver is different each time, it is necessary to wait until the transceiver is working properly and the state is stable before confirming the delay.

[0083] Further, in this embodiment, in step S2, the data generation module generates the first characteristic data signal.

[0084] In practical applications, the data generation module generates characteristic data with a direction identifier and inserts the characteristic data into the first characteristic data signal at a preset period, so that the output first characteristic data signal has the characteristic data with a direction identifier inserted.

[0085] In this embodiment, the inserted characteristic data should identify the "transmission" direction. And, in a specific embodiment, the characteristic data is generated periodically to facilitate confirming the direction of the signal in each period.

[0086] Further, in this embodiment, in step S3, the transmitter of the transceiver and the delay calibration module respectively receive the first characteristic data signal.

[0087] That is to say, the data generation module simultaneously sends the generated same first characteristic data signal to the transmitter of the transceiver and the delay calibration module.

[0088] To facilitate the delay calibration module to perform delay calibration, when the data generation module generates the first characteristic data signal, that is, when the data generation module sends out the generated first characteristic data signal, the delay calibration module starts timing.

[0089] Further, in this embodiment, in step S4, the receiver of the transceiver receives the first characteristic data signal from the transmitter and generates a second characteristic data signal.

[0090] Specifically, before the delay calibration is completed, the sending end loopback-transmits the first feature data signal to the receiving end. When the receiving end sends out the first feature data signal, the first feature data signal is denoted as the second feature data signal.

[0091] Further, in this embodiment, in step S5, the data extraction module generates a third feature data signal and shift information according to the second feature data signal.

[0092] Specifically, in this embodiment, step S5 includes: the data extraction module performs a shift process on the second feature data signal to extract feature data and shift information; the data extraction module generates a third feature data signal according to the second feature data signal and the feature data.

[0093] In a specific embodiment, since the feature data in the second feature data signal identifies the "transmission" direction, therefore, the data extraction module can modify the feature data extracted from the second feature data signal to the feature data identifying the "reception" direction, so as to obtain the third feature data signal.

[0094] In this embodiment, by extracting the shift information from the second feature data signal through the data extraction module and transmitting the shift information to the delay calibration module, the delay calibration module can obtain more accurate delay information, thereby improving the transceiver delay calibration accuracy.

[0095] Further, in this embodiment, in step S6, the high-frequency sampling module performs asynchronous clock high-frequency sampling on the third feature data signal to obtain phase information, and this phase information reflects the phase difference between the first feature data signal and the third feature data signal, that is, the delay between the two signals.

[0096] And, in this embodiment, in step S7, the delay calibration module obtains a delay calibration value according to the first feature data signal, the third feature data signal, the phase information, and the shift information.

[0097] Specifically, in this embodiment, step S7 includes: when the data generation module generates the first feature data signal, the delay calibration module starts timing; when the delay calibration module receives the first feature data signal, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain the first time T1; when the delay calibration module receives the phase information, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain the second time T2; the delay calibration module calculates the delay calibration value according to the first time T1, the second time T2, the phase information, and the shift information.

[0098] In practical applications, the phase information includes a phase difference φ, and the shift information includes a shift amount. The calculation method for obtaining the delay calibration value based on the first time T1, the second time T2, the phase information, and the shift information can be expressed as: .

[0099] Furthermore, in this embodiment, the transceiver delay calibration method further includes:

[0100] S8. The delay calibration module reports the delay calibration value to the upper layer protocol to perform delay calibration on the transceiver by using the delay calibration value.

[0101] In this way, the upper layer protocol can improve the delay accuracy of Ethernet through the delay calibration value, thereby realizing the sending and receiving of data packets.

[0102] It should be noted that the various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. In addition, the different parts among the various embodiments can also be combined and used, and the present invention does not limit this.

[0103] The transceiver delay calibration system and method provided in this embodiment include: a data generation module for generating a first characteristic data signal; a transceiver including a sending end and a receiving end; the sending end is used to receive the first characteristic data signal and loop back and transmit the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal according to the first characteristic data signal; a data extraction module for receiving the second characteristic data signal and generating a third characteristic data signal and shift information according to the second characteristic data signal; a high-frequency sampling module for performing asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; a delay calibration module for receiving the first characteristic data signal and obtaining a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information. By utilizing the loop-back transmission characteristic of the transceiver, the first characteristic data signal is transmitted to the delay calibration module through the sending end and the receiving end of the transceiver, the data extraction module, and the high-frequency sampling module, and the phase information is obtained through asynchronous clock high-frequency sampling. At the same time, the first characteristic data signal is directly sent to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information, and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

[0104] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A transceiver delay calibration system, characterized in that: include: A data generating module, used for generating a first characteristic data signal; A transceiver, comprising a transmitting end and a receiving end; the transmitting end is used to receive the first characteristic data signal, and transmit the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal according to the first characteristic data signal; A data extraction module, configured to receive the second characteristic data signal, and generate a third characteristic data signal and shift information according to the second characteristic data signal; A high-frequency sampling module, used for performing asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module is used to receive the first characteristic data signal and obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

2. The transceiver delay calibration system according to claim 1, characterized in that: The first characteristic data signal is inserted with characteristic data having a direction identifier.

3. The transceiver delay calibration system according to claim 2, characterized in that: The first characteristic data signal is inserted with the characteristic data at a preset period.

4. The transceiver delay calibration system according to claim 2, characterized in that: The characteristic data includes a number of consecutive identical data and a group of different data randomly located in the identical data; or, the characteristic data is data with a header in each cycle.

5. The transceiver delay calibration system according to claim 1, characterized in that: The data extraction module is used to perform shift processing on the second characteristic data signal to extract characteristic data and shift information, and generate a third characteristic data signal according to the second characteristic data signal and the characteristic data.

6. The transceiver delay calibration system according to claim 1, characterized in that: The delay calibration module is used to receive the first characteristic data signal, and record the time from the data generation module generating the first characteristic data signal to the delay calibration module receiving the first characteristic data signal, so as to obtain a first time; the delay calibration module is also used to receive the third characteristic data signal and phase information, and record the time from the data generation module generating the first characteristic data signal to the delay calibration module receiving the phase information, so as to obtain a second time; The delay calibration module is further used to calculate a delay calibration value according to the first time, the second time, the phase information and the shift information.

7. The transceiver delay calibration system according to claim 1, characterized in that: The transceiver delay calibration system is implemented based on FPGA, hardware programmable SoC or ASIC chip.

8. A transceiver delay calibration method, applied to the transceiver delay calibration system according to any one of claims 1 to 7, characterized in that: The transceiver delay calibration method comprises: Confirm that the transceiver is working properly; The data generating module generates a first characteristic data signal; The transmitting end and the delay calibration module of the transceiver respectively receive the first characteristic data signal; The receiving end of the transceiver receives the first characteristic data signal from the transmitting end and generates a second characteristic data signal; The data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal; The high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

9. The transceiver delay calibration method according to claim 8, characterized in that: The data generation module generates characteristic data with a direction identifier, and inserts the characteristic data into the first characteristic data signal at a preset period, so that the output first characteristic data signal is inserted with the characteristic data with a direction identifier.

10. The transceiver delay calibration method according to claim 8, characterized in that: The method in which the data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal includes: The data extraction module performs shift processing on the second characteristic data signal to extract characteristic data and shift information; The data extraction module generates a third characteristic data signal according to the second characteristic data signal and the characteristic data.

11. The transceiver delay calibration method according to claim 8, characterized in that: The method in which the delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information includes: When the data generation module generates the first characteristic data signal, the delay calibration module starts timing; When the delay calibration module receives the first characteristic data signal, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a first time; When the delay calibration module receives the phase information, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a second time; The delay calibration module calculates a delay calibration value according to the first time, the second time, the phase information and the shift information.

12. The transceiver delay calibration method according to claim 8, characterized in that: The transceiver delay calibration method further includes: The delay calibration module reports the delay calibration value to an upper layer protocol so as to perform delay calibration on the transceiver using the delay calibration value.

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