P-type dual-injection fast recovery diode device structure and manufacturing method thereof

Abstract

The invention relates to a P-type double-injection fast recovery diode device structure and a manufacturing method thereof in the technical field of semiconductor discrete power devices, the fast recovery diode device structure comprises an N-type substrate, the N-type substrate comprises an N + substrate layer and an N-epitaxial layer formed on the N + substrate layer, the N-epitaxial layer is provided with an active region and a terminal region, and the terminal region is provided with a first electrode and a second electrode. The field limiting ring in the terminal region is subjected to P-type injection and P + type injection twice, the depth of the second P-type ion injection is smaller than the depth of the first P-type ion injection, the concentration of the second P-type ion injection is larger than the concentration of the first P-type ion injection, and the area of the second P-type ion injection is smaller than the area of the first P-type ion injection, so that the pressure resistance of the device is improved; p-of the main junction anode region in the active region and P-of the terminal region are injected at the same time, so that junction depths between the active region and the terminal region are kept flush, the voltage withstanding uniformity of the device is improved, and the reliability and the avalanche capability of the device are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of discrete semiconductor power devices, and in particular to a P-type double-injected fast recovery diode device structure and a manufacturing method thereof. Background Art

[0002] Fast Recovery Diode (FRD) is a new type of power device that has come out in recent years. It is one of the most widely used power semiconductor devices in power electronic equipment. Due to its advantages such as good switching performance, short reverse recovery time, reduced forward conduction voltage, large current, high reverse withstand voltage and small leakage, it is often used in parallel with three-terminal power switching devices (such as IGBT, etc.) in power electronic circuits as a high-frequency, high-current freewheeling diode or rectifier, and has great development prospects and market demand.

[0003] Power devices generally consist of two parts: a cell structure located in the center and a terminal structure located at the edge; the terminal structure located at the edge mainly expands the electric field distribution in the terminal area, reduces the terminal electric field concentration effect, and improves the withstand voltage of the terminal area. For fast recovery diodes, reverse breakdown voltage is one of the most important parameters. It determines the rated power of power electronic devices together with the maximum current capacity. Among them, silicon-based power FRDs usually pass through a large-area PN junction to ensure high current operation. However, for FRDs working at high voltage, the main factors affecting the breakdown voltage of the device are the junction electric field in the PN junction diffusion window area and the surface electric field caused by the interface charge. Therefore, in order to ensure that the silicon-based FRD can work normally under high voltage, the junction terminal structure protection technology is adopted at the edge of the main junction of the device. Therefore, in practical applications, it is necessary not only to improve the breakdown voltage of the main P / N-junction, but also to adjust the injection P+ / N-junction, field limiting ring spacing, field limiting ring width and metal field plate size of the field limiting ring in the terminal structure, so that the withstand voltage of the entire FRD device reaches about 80% of the main junction.

[0004] The main junction P / N- and P+ / N- junctions formed by field limiting ring injection in common FRDs are all injected once on the N-type substrate or epitaxy, with a lower concentration of P injection in the main junction area and a slightly higher concentration of P+ injection in the field limiting ring area. The specific device structure is as follows: Fig.12As shown, the basic structure of the universal fast recovery diode device is from bottom to top: substrate / epitaxial / main junction+terminal region / oxide layer / metal layer, and the main junction and field limiting ring (P-Ring) are single-injection. Its main junction P / N- and terminal field limiting ring P+ / N-, although the doping concentration on the N- side is sensitive to the breakdown voltage of the P or P+ junction, if the P or P+ concentration is high and the depletion region on the P+ side is too narrow, it will also affect the breakdown voltage to a certain extent, thereby reducing the reverse breakdown voltage of the entire device. If the width of the depletion region in the reverse direction can be improved, and the reverse withstand voltage of the main junction and the field limiting ring junction can be improved, the breakdown voltage of the terminal part will be closer to the breakdown voltage of the main junction part, thereby improving the breakdown voltage of the entire device and improving the reverse characteristics (breakdown voltage and reverse leakage current) of the fast recovery diode. Based on this, the present invention proposes a P-type double-injected fast recovery diode device structure and a manufacturing method. Summary of the invention

[0005] The present invention provides a P-type double-injected fast recovery diode device structure and a manufacturing method, by designing a P+ / P- double injection structure in a terminal region without a double injection structure in an active region including a main junction, while keeping the P- at the main junction and the P- in the terminal region injected simultaneously to keep the same depth, the withstand voltage performance of the fast recovery diode is improved, thereby improving the reliability and avalanche capability of the device.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] A P-type double-injected fast recovery diode device structure comprises an N+ substrate layer and an N-epitaxial layer formed on the N+ substrate layer, wherein a source region and a terminal region are arranged on the N-epitaxial layer.

[0008] The field limiting ring in the terminal area undergoes two P- and P+ P-type implantations. The depth of the second P-type ion implantation is less than that of the first P-type ion implantation, the concentration of the second P-type ion implantation is greater than that of the first P-type ion implantation, and the area of ​​the second P-type ion implantation is smaller than that of the first P-type ion implantation, in order to improve the device's voltage resistance performance.

[0009] The P- in the main junction anode region in the active region and the P- in the terminal region are injected simultaneously to keep the junction depth between the active region and the terminal region flush, so as to improve the device reliability and avalanche capability.

[0010] Furthermore, the first P-type ion implantation is a P-implantation, and the second P-type ion implantation is a P+ implantation, and the P+ implantation is wrapped by the P- implantation in both the planar and vertical directions.

[0011] Further, the back N+ substrate layer forms the cathode of the main junction.

[0012] Furthermore, a termination ring is provided on the N-epitaxial layer, and deep N-well implantation is performed on the termination ring. The main junction anode region and the field limiting ring, the field limiting rings and the field limiting rings, and the field limiting rings and the termination ring are all isolated by a field region oxide layer.

[0013] Furthermore, a top structure is provided on the top of the field region oxide layer, and the top structure is a metal layer.

[0014] A method for manufacturing the above-mentioned P-type double-injection fast recovery diode device structure comprises the following steps:

[0015] Step 1: growing a field oxide layer on the surface of a selected N-type substrate wafer, and defining an active area through photolithography and etching, and etching the field oxide layer of the active area;

[0016] Step 2: Perform the first low-concentration P-type ion implantation to form a P-implantation region in the main junction anode region and the field limiting ring region. This is the first P-type ion implantation of the active region double-implanted P / N junction.

[0017] Step 3: depositing a field oxide layer and etching back to form a sidewall at the edge of the active area to facilitate subsequent field limiting ring P-type implantation;

[0018] Step 4: define the field limiting ring terminal by P-type injection. This is the second P-type ion injection of the double-injected P / N junction. The depth of the second P-type ion injection is shallower than that of the first P-type ion injection. The concentration of the second P-type ion injection is higher than that of the first P-type ion injection. The area of ​​the second P-type ion injection is smaller than that of the first P-type ion injection.

[0019] Step 5: define a deep N-well on the N-epitaxial layer. The deep N-well is used for the device terminal electric field termination ring to prevent the electric field from diffusing to the chip dicing path;

[0020] Step 6: High temperature advancement after injection;

[0021] Step 7: sputtering the top metal layer, and photolithography etching the top metal layer to complete the production of the top structure;

[0022] Step 8: Thin the back of the silicon wafer to a specific thickness, inject N-type impurities into the back, form a field stop layer by low-temperature annealing or laser annealing, and ensure that the surface impurity concentration is high enough to form an ohmic contact. When a substrate with a deep back diffusion layer is selected, do not perform back impurity injection and annealing processes;

[0023] Step nine: deposit the back metal by sputtering or evaporation, and finally perform minority carrier lifetime control process to improve the reverse recovery characteristics of the diode.

[0024] Another method for manufacturing the above-mentioned P-type double-injection fast recovery diode device structure comprises the following steps:

[0025] Step 1: Define the first low-concentration P-type ion implantation on the selected N-type substrate wafer by photolithography process, and form a P-implantation area in the main junction anode area and the field limiting ring area. This is the first P-type ion implantation of the active area double-implanted P / N junction;

[0026] Step 2: define a deep N-well on the N-epitaxial layer. The deep N-well is used for the device terminal electric field termination ring to prevent the electric field from diffusing to the chip dicing path;

[0027] Step 3: growing a field oxide layer on the surface of the wafer, and defining the active area through photolithography and etching, and the field oxide layer of the active area is etched;

[0028] Step 4: define the field limiting ring terminal by P-type injection. This is the second P-type ion injection of the double-injected P / N junction. The depth of the second P-type ion injection is shallower than that of the first P-type ion injection. The concentration of the second P-type ion injection is higher than that of the first P-type ion injection. The area of ​​the second P-type ion injection is smaller than that of the first P-type ion injection.

[0029] Step 5: High temperature advancement after injection;

[0030] Step 6: sputtering the top metal layer, and photolithography etching the top metal layer to complete the production of the top structure;

[0031] Step 7: Thin the back of the silicon wafer to a specific thickness, inject N-type impurities into the back, form a field stop layer by low-temperature annealing or laser annealing, and ensure that the surface impurity concentration is high enough to form an ohmic contact. When a substrate with a deep back diffusion layer is selected, do not perform back impurity injection and annealing processes;

[0032] Step 8: Deposit the back metal by sputtering or evaporation, and finally perform minority carrier lifetime control process to improve the reverse recovery characteristics of the diode.

[0033] Compared with the prior art, the present invention has the following beneficial effects:

[0034] 1. The present invention provides a P+ / P- dual injection structure in the terminal region, and does not have a dual injection structure in the active region including the main junction, while keeping the P- at the main junction and the P- in the terminal region injected simultaneously to keep the same depth, which has the following advantages:

[0035] The main junction is doped with low concentration, the depletion region can be expanded, the electric field is reduced, and the terminal region is also covered by low concentration doping, the depletion region is also expanded, and the electric field is also reduced, thereby improving the withstand voltage performance of the fast recovery diode;

[0036] The P- at the main junction and the P- in the terminal region are selectively injected at the same time, which can make the junction depth between the main junction and the terminal flush, thereby improving the uniformity of the device's withstand voltage and thus improving the device's reliability and avalanche capability.

[0037] 2. The device structure of the present invention is simple. Through the innovation of the terminal field limiting ring PN, the reverse withstand voltage characteristics of the fast recovery diode are improved and the reverse leakage current is optimized through the double P-type injection structure in the field limiting ring area without increasing the chip area and process complexity, thereby improving reliability and making the device suitable for more application scenarios.

[0038] 3. The manufacturing process of the present invention is fully compatible with the existing general power device FRD process, and does not require the addition of a mask layer and special processes, so the solution is relatively easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 This is a schematic diagram of the structure of a P-type double-injected fast recovery diode device in Embodiment 1 of the present invention;

[0040] Figure 2 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the first embodiment of the present invention Figure 1 ;

[0041] Figure 3 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the first embodiment of the present invention Figure 2 ;

[0042] Figure 4 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the first embodiment of the present invention Figure 3 ;

[0043] Figure 5 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the first embodiment of the present invention Figure 4 ;

[0044] Figure 6 This is a schematic diagram of the structure of a P-type double-injected fast recovery diode device in the second embodiment of the present invention;

[0045] Figure 7 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the second embodiment of the present invention Figure 1 ;

[0046] Figure 8 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the second embodiment of the present invention Figure 2 ;

[0047] Fig. 9Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the second embodiment of the present invention Figure 3 ;

[0048] Fig.10 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the second embodiment of the present invention Figure 4 ;

[0049] Fig.11 Schematic diagram of the structure of the P-type double-injected fast recovery diode device in the second embodiment of the present invention Figure 5 ;

[0050] Fig.12 This is a device structure diagram of a commonly used fast recovery diode.

[0051] In the accompanying drawings, the names of the components represented by the reference numerals are listed as follows:

[0052] 1. N+ substrate layer; 2. N- epitaxial layer; 3. termination ring; 4. field limiting ring; 5. main junction anode region; 6. field region oxide layer; 7. metal layer. DETAILED DESCRIPTION

[0053] The preferred specific embodiments for implementing the present invention are described in detail below, and a clear and complete description is made in conjunction with the accompanying drawings.

[0054] Embodiment 1

[0055] See also Figure 1 The first embodiment provides a P-type double-implanted fast recovery diode device structure, including an N-type substrate, the N-type substrate including an N+ substrate layer 1 and an N-epitaxial layer 2 formed on the N+ substrate layer 1, an active region and a terminal region are arranged on the N-epitaxial layer 2, a main junction anode region 5 is arranged in the active region, and a field limiting ring 4 is arranged in the terminal region;

[0056] A termination ring 3 is also provided on the N-epitaxial layer 2, and the termination ring 3 is deep N-well implanted. The main junction anode region 5 and the field limiting ring 4, the field limiting rings 4 and the field limiting rings 4, and the field limiting rings 4 and the termination ring 3 are isolated by a field region oxide layer 6, and a top structure is provided on the top of the field region oxide layer 6, and the top structure is a metal layer 7, and the back N+ substrate layer 1 forms the cathode of the main junction;

[0057] The field limiting ring 4 in the terminal area performs two P- and P+ P-type injections. The first P-type ion injection is P-injection, and the second P-type ion injection is P+ injection. The depth of the second P-type ion injection is less than the depth of the first P-type ion injection, the concentration of the second P-type ion injection is greater than the concentration of the first P-type ion injection, and the area of ​​the second P-type ion injection is less than the area of ​​the first P-type ion injection, so that the P+ injection is wrapped by the P- injection in both the plane and the vertical direction to improve the voltage resistance performance of the device.

[0058] The method for manufacturing the P-type double-injected fast recovery diode device structure in the first embodiment includes the following steps:

[0059] Step 1: grow a field oxide layer 6 on the surface of the selected N-type substrate wafer with a thickness of about 1 μm, and define the active area through photolithography and etching. The field oxide layer 6 in the active area is etched, such as Figure 2 As shown;

[0060] Step 2: Perform the first low-concentration P-type ion implantation to form a P-implantation region in the main junction anode region 5 and the field limiting ring 4 region, such as Figure 3 As shown, this is the first P-type ion implantation of the double implantation P / N junction in the active area, the P- implantation is boron, the implantation energy is 100-120Kev, and the dose is 8E12-2E13;

[0061] Step 3: by depositing a field oxide layer 6 and etching back, a sidewall of about 1 μm is formed at the edge of the active area to facilitate subsequent field limiting ring 4P-type implantation;

[0062] Step 4: Define the terminal of the field limiting ring 4 by P-type injection. This is the second P-type ion injection of the double-injected P / N junction. The depth of the second P-type ion injection is shallower than the depth of the first P-type ion injection. The concentration of the second P-type ion injection is higher than the concentration of the first P-type ion injection. The area of ​​the second P-type ion injection is smaller than the area of ​​the first P-type ion injection. Figure 4 As shown;

[0063] Step 5: define a deep N-well on the N-epitaxial layer 2. The deep N-well is used for the device terminal electric field termination ring 3 to prevent the electric field from diffusing to the chip dicing path, such as Figure 5 As shown;

[0064] Step 6: High temperature advancement after injection;

[0065] Step 7: sputter the top metal layer 7, and photoetch the top metal layer to complete the production of the top structure;

[0066] Step 8: Thin the back of the silicon wafer to a specific thickness, inject N-type impurities into the back, form a field stop layer by low-temperature annealing or laser annealing, and ensure that the surface impurity concentration is high enough to form an ohmic contact. When a substrate with a deep back diffusion layer is selected, back impurity injection and annealing processes may not be performed;

[0067] Step 9: Deposit the back metal by sputtering or evaporation, and finally perform minority carrier lifetime control process to improve the reverse recovery characteristics of the diode, and finally make it into Figure 1 The P-type double-implanted fast recovery diode device structure is shown.

[0068] Embodiment 2

[0069] See also Figure 2 , the second embodiment provides a P-type double-injected fast recovery diode device structure, including an N-type substrate, the N-type substrate includes an N+ substrate layer 1 and an N-epitaxial layer 2 formed on the N+ substrate layer 1, an active region and a terminal region are arranged on the N-epitaxial layer 2, a main junction anode region 5 is arranged in the active region, and a field limiting ring 4 is arranged in the terminal region;

[0070] A termination ring 3 is also provided on the N-epitaxial layer 2, and the termination ring 3 is deep N-well implanted. The main junction anode region 5 and the field limiting ring 4, the field limiting rings 4 and the field limiting rings 4, and the field limiting rings 4 and the termination ring 3 are isolated by a field region oxide layer 6, and a top structure is provided on the top of the field region oxide layer 6, and the top structure is a metal layer 7, and the back N+ substrate layer 1 forms the cathode of the main junction;

[0071] The field limiting ring 4 in the terminal area performs two P- and P+ P-type injections. The first P-type ion injection is P-injection, and the second P-type ion injection is P+ injection. The depth of the second P-type ion injection is less than the depth of the first P-type ion injection, the concentration of the second P-type ion injection is greater than the concentration of the first P-type ion injection, and the area of ​​the second P-type ion injection is less than the area of ​​the first P-type ion injection, so that the P+ injection is wrapped by the P- injection in both the plane and the vertical direction to improve the voltage resistance performance of the device.

[0072] The manufacturing method of the P-type double-injection fast recovery diode device structure of the second embodiment includes the following steps:

[0073] Step 1: Define the first low-concentration P-type ion implantation on the selected N-type substrate wafer by photolithography process, and form a P- implantation area in the main junction anode area 5 and the field limiting ring 4 area. This is the first P-type ion implantation of the active area double implantation P / N junction. The P- is implanted with boron, the implantation energy is 100-120Kev, and the dose is 8E12-2E13;

[0074] Step 2: define a deep N-well on the N-epitaxial layer 2. The deep N-well is used for the device terminal electric field termination ring 3 to prevent the electric field from diffusing to the chip dicing path, such as Figure 8 As shown;

[0075] Step 3: grow a field oxide layer 6 on the surface of the wafer with a thickness of about 1 μm, and define the active area through photolithography and etching. The field oxide layer 6 in the active area is etched, such as Fig. 9 and Fig.10 As shown;

[0076] Step 4: Define the terminal of the field limiting ring 4 by P-type injection. This is the second P-type ion injection of the double-injected P / N junction. The depth of the second P-type ion injection is shallower than the depth of the first P-type ion injection. The concentration of the second P-type ion injection is higher than the concentration of the first P-type ion injection. The area of ​​the second P-type ion injection is smaller than the area of ​​the first P-type ion injection. Fig.11 As shown;

[0077] Step 5: High temperature advancement after injection;

[0078] Step 6: sputter the top metal layer 7, and photoetch the top metal layer to complete the production of the top structure;

[0079] Step 7: Thin the back of the silicon wafer to a specific thickness, inject N-type impurities into the back, form a field stop layer through low-temperature annealing or laser annealing, and ensure that the surface impurity concentration is high enough to form an ohmic contact. When a substrate with a deep back diffusion layer is selected, back impurity injection and annealing processes may not be performed;

[0080] Step 8: Deposit the back metal by sputtering or evaporation, and finally perform minority carrier lifetime control process to improve the reverse recovery characteristics of the diode, and finally make it into Figure 6 The P-type double-implanted fast recovery diode device structure is shown.

[0081] The manufacturing method of the second embodiment is mainly different from the manufacturing method of the first embodiment in that the process flow of forming the double-injection P / N first injection P-region is different: in the first embodiment, the active area is first defined by the field area oxide layer 6, and then the first injection P-region is defined by using the field area oxide layer 6 as a barrier layer, and then the subsequent P-type injection of the field limiting ring 4 is defined by the field area oxide layer 6 and by adding a side wall at the edge of the field area oxide layer 6; in the second embodiment, the P-region is first defined by photolithography and the injection is performed, and then the active area is defined by photolithography / etching of the field area oxide layer 6, and then the P-type injection region of the subsequent field limiting ring 4 is defined by the field area oxide layer 6 or photolithography.

[0082] Based on the above content and the accompanying drawings, those skilled in the art can understand and implement the present invention. In addition, any non-creative modifications made to the present invention by those skilled in the art without creative work still fall within the protection scope of the present invention.

Claims

1. A P-type double-injected fast recovery diode device structure, comprising an N-type substrate, characterized in that: The N-type substrate comprises an N+ substrate layer (1) and an N-epitaxial layer (2) formed on the N+ substrate layer (1), wherein a source region and a terminal region are arranged on the N-epitaxial layer (2); The field limiting ring (4) in the terminal region is subjected to two P- and P+ P-type implantations, wherein the depth of the second P-type ion implantation is less than the depth of the first P-type ion implantation, the concentration of the second P-type ion implantation is greater than the concentration of the first P-type ion implantation, and the area of ​​the second P-type ion implantation is less than the area of ​​the first P-type ion implantation, so as to improve the withstand voltage performance of the device; The P- in the main junction anode region (5) in the active region is injected simultaneously with the P- in the terminal region to keep the junction depth between the active region and the terminal region flush, thereby improving the reliability and avalanche capability of the device.

2. A P-type double-implanted fast recovery diode device structure according to claim 1, characterized in that: The first P-type ion implantation is a P-injection, and the second P-type ion implantation is a P+ implantation. The P+ implantation is wrapped by the P- implantation in both the planar and vertical directions.

3. The P-type double-implanted fast recovery diode device structure according to claim 1, characterized in that: The back N+ substrate layer (1) forms the cathode of the main junction.

4. The P-type double-implanted fast recovery diode device structure according to claim 1, characterized in that: A termination ring (3) is provided on the N-epitaxial layer (2), and the termination ring (3) is subjected to deep N-well implantation. The main junction anode region (5) and the field limiting ring (4), the field limiting rings (4) and the field limiting rings (4), and the field limiting rings (4) and the termination ring (3) are all isolated by a field region oxide layer (6).

5. The P-type double-implanted fast recovery diode device structure according to claim 3, characterized in that: A top structure is provided on the top of the field region oxide layer (6), and the top structure is a metal layer (7).

6. The P-type double-implanted fast recovery diode device structure according to any one of claims 1 to 5, characterized in that: A method for manufacturing a P-type double-injected fast recovery diode device structure comprises the following steps: Step 1: growing a field region oxide layer (6) on the surface of a selected N-type substrate wafer, and defining an active region through photolithography and etching, and the field region oxide layer (6) of the active region is etched; Step 2: Perform the first low-concentration P-type ion implantation to form a P-implantation region in the main junction anode region (5) and the field limiting ring (4) region. This is the first P-type ion implantation of the active region double-implanted P / N junction. Step 3: depositing a field oxide layer (6) and etching back to form a sidewall at the edge of the active area to facilitate subsequent P-type implantation of the field limiting ring (4); Step 4, defining the terminal of the field limiting ring (4) by P-type implantation, which is the second P-type ion implantation of the double implanted P / N junction, the depth of the second P-type ion implantation is shallower than the depth of the first P-type ion implantation, the concentration of the second P-type ion implantation is higher than the concentration of the first P-type ion implantation, and the area of ​​the second P-type ion implantation is smaller than the area of ​​the first P-type ion implantation; Step 5: defining a deep N-well on the N-epitaxial layer (2), the deep N-well being used for the device terminal electric field termination ring (3) to prevent the electric field from diffusing to the chip dicing path; Step 6: High temperature advancement after injection; Step 7: sputtering the top metal layer (7), and photolithography etching the top metal layer to complete the production of the top structure; Step 8: Thin the back of the silicon wafer, inject N-type impurities into the back, form a field stop layer by low-temperature annealing or laser annealing, and ensure that the surface impurity concentration is high enough to form an ohmic contact. When a substrate with a deep back diffusion layer is selected, do not perform back impurity injection and annealing processes; Step nine: deposit the back metal by sputtering or evaporation, and finally perform minority carrier lifetime control process to improve the reverse recovery characteristics of the diode.

7. The P-type double-implanted fast recovery diode device structure according to any one of claims 1 to 5, characterized in that: Another method for manufacturing a P-type double-injected fast recovery diode device structure comprises the following steps: Step 1: define the first low-concentration P-type ion implantation on the selected N-type substrate wafer by photolithography, and form a P-implantation region in the main junction anode region (5) and the field limiting ring (4) region. This is the first P-type ion implantation of the active region double-implanted P / N junction; Step 2: defining a deep N-well on the N-epitaxial layer (2), the deep N-well being used for the device terminal electric field termination ring (3) to prevent the electric field from diffusing to the chip dicing path; Step 3: growing a field region oxide layer (6) on the surface of the wafer, and defining the active region through photolithography and etching, and the field region oxide layer (6) of the active region is etched; Step 4, defining the terminal of the field limiting ring (4) by P-type implantation, which is the second P-type ion implantation of the double implanted P / N junction, the depth of the second P-type ion implantation is shallower than the depth of the first P-type ion implantation, the concentration of the second P-type ion implantation is higher than the concentration of the first P-type ion implantation, and the area of ​​the second P-type ion implantation is smaller than the area of ​​the first P-type ion implantation; Step 5: High temperature advancement after injection; Step 6: sputtering the top metal layer (7), and photolithography etching the top metal layer to complete the production of the top structure; Step 7: Thin the back of the silicon wafer, inject N-type impurities into the back, form a field stop layer by low-temperature annealing or laser annealing, and ensure that the surface impurity concentration is high enough to form an ohmic contact. When a substrate with a deep back diffusion layer is selected, do not perform back impurity injection and annealing processes; Step 8: Deposit the back metal by sputtering or evaporation, and finally perform minority carrier lifetime control process to improve the reverse recovery characteristics of the diode.

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