Method for applying local erasing voltage to liquid crystal writing device, writing film and device

Abstract

The invention belongs to the technical field of liquid crystal writing, and particularly discloses a liquid crystal writing device local erasing voltage applying method, a writing film and a liquid crystal writing device device.The liquid crystal writing device comprises a first conducting layer, a cholesteric liquid crystal layer and a second conducting layer which are sequentially arranged from top to bottom; the first conductive layer and the second conductive layer are respectively divided into a plurality of conductive areas which are mutually insulated. The method comprises the following steps of: setting three voltages and meeting the following conditions: first voltage V1 > second voltage V2 > third voltage V3; applying a first voltage V1 to a conductive region covering the target erasing region on the first conductive layer, and applying a third voltage V3 to other conductive regions of the first conductive layer; applying a third voltage V3 to a conductive region covering the target erasing region on the second conductive layer, and applying a second voltage V2 to other conductive regions on the second conductive layer; therefore, the writing content at the corresponding position of the target erasing area is erased, and the writing content in other areas is not changed. According to the invention, the complexity of a voltage circuit is greatly simplified, and the production cost and the maintenance cost are reduced.

Description

Technical Field

[0001] The present invention relates to the field of liquid crystal writing technology, and in particular to a method for applying a local erasing voltage to a liquid crystal writing device, a writing film and a device. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] The working principle of the liquid crystal writing film currently on the market is to use the bistable characteristics of liquid crystal to display and / or erase the written content on the liquid crystal writing board. For example: using cholesteric liquid crystal as a writing film, the pressure track of the writing pen is recorded by the pressure acting on the liquid crystal writing board, and then the corresponding writing content is displayed; by applying an electric field to change the structure of the cholesteric liquid crystal, the writing pressure track on the liquid crystal writing board disappears to achieve erasure.

[0004] The prior art discloses a technical solution for achieving local erasure by applying an auxiliary voltage, wherein two conductive layers are divided into a plurality of conductive regions, and a set voltage is applied to each conductive region to achieve the purpose of local erasure; for example, the prior art discloses the following two voltage application solutions: The first scheme is: applying voltage A to the conductive layer area on the first conductive layer covering the local erase area, applying voltage B to the conductive layer area on the first conductive layer covering the local erase area, and applying a compensation voltage C to other conductive areas on the first conductive layer and the second conductive layer, thereby realizing local erase; The second solution is: apply voltage A to the conductive layer area on the first conductive layer covering the local erase area, apply voltage B to the conductive layer area on the first conductive layer covering the local erase area, apply a compensation voltage C to other conductive areas on the first conductive layer, and apply a compensation voltage D to other conductive areas on the second conductive layer, thereby achieving local erase.

[0005] Compared with the first solution, the second solution requires driving and generating four different voltages to achieve local erasure, which increases the design cost and maintenance difficulty of the product to a certain extent.

[0006] In addition, both of the above two solutions require the use of a voltage driving device to achieve the output of different voltages; for example: the prior art discloses a system that uses a VFD driver chip to achieve local erase voltage control, and on each conductive layer, the voltage required for local erase is output through the VFD driver chip; however, the VFD driver chip is a two-choice chip, which can only output zero voltage and another non-zero voltage; and in both of the above two solutions, there is a situation where both voltages applied to at least one conductive layer are not zero. Therefore, it is impossible to use the VFD driver chip to directly output the required voltage, but it is necessary to use components such as optocouplers and isolation transformers to output the required voltage, which will lead to a more complex circuit structure, increased production costs, and a corresponding increase in product failure rate. Summary of the invention

[0007] In order to solve the above problems, the present invention proposes a method and system for applying local erasing voltage to a liquid crystal writing device. Through a reasonable voltage application method, a relatively ideal local erasing effect can be achieved using as little erasing voltage as possible; and the structure of the driving circuit can be simplified to reduce production costs.

[0008] In some embodiments, the following technical solutions are adopted: A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, and the method comprises: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a third voltage V3 to other conductive areas of the first conductive layer; Applying a third voltage V3 to the conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V3-V2| <Vst; |V1-V2| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

[0009] As an optional solution, first, a second voltage V2 is applied to the conductive area on the first conductive layer covering the target erasing area, and a third voltage V3 is applied to other conductive areas on the first conductive layer; Applying a third voltage V3 to the conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; Then, the voltage of the conductive region on the first conductive layer covering the target erasing region is adjusted to a first voltage V1.

[0010] In other embodiments, the following technical solutions are adopted: A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, and the method comprises: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a first voltage V1 to the conductive area of ​​the second conductive layer covering the target erasing area, and applying a third voltage V3 to other conductive areas of the second conductive layer; Applying a third voltage V3 to the conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V3-V2| <Vst; |V1-V2| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

[0011] As an optional solution, first, a second voltage V2 is applied to the conductive area on the second conductive layer covering the target erasing area, and a third voltage V3 is applied to other conductive areas on the second conductive layer; Applying a third voltage V3 to the conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; Then, the voltage of the conductive region on the second conductive layer covering the target erasing region is adjusted to the first voltage V1.

[0012] As an optional solution, the first voltage V1, the second voltage V2 and the third voltage V3 further satisfy: 0.3*|V1-V3|≤|V2-V3|≤ 0.7*|V1-V3|.

[0013] Furthermore, the third voltage V3 is used as a reference zero potential, and a VFD driving chip is used to output the voltage required by each conductive area on the first conductive layer and / or the second conductive layer.

[0014] As an optional solution, the voltages applied to the first conductive layer and the second conductive layer are interchanged according to a set time rule to prevent the liquid crystal from being passivated.

[0015] As an optional solution, the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually parallel strip-shaped conductive regions, and the strip-shaped conductive regions on the first conductive layer and the strip-shaped conductive regions on the second conductive layer are spatially perpendicular to each other.

[0016] In other embodiments, the following technical solutions are adopted: A device for implementing the above-mentioned method for applying a local erasing voltage to a liquid crystal writing device comprises: A voltage generating circuit, wherein the voltage generating circuit generates at least two voltages required for erasing; an X-direction voltage selection circuit connected to the voltage generation circuit, the X-direction voltage selection circuit selecting at least one voltage output from the voltage generated by the voltage generation circuit; An X-direction VFD driver chip connected to the X-direction voltage selection circuit, the output voltage of the X-direction voltage selection circuit is input to the X-direction VFD driver chip, and the X-direction VFD driver chip applies the required voltage to each conductive area in the X direction; A Y-direction voltage selection circuit connected to the voltage generation circuit, wherein the Y-direction voltage selection circuit selects at least one voltage output from the voltage generated by the voltage generation circuit; A Y-direction VFD driver chip connected to the Y-direction voltage selection circuit, the output voltage of the Y-direction voltage selection circuit is input to the Y-direction VFD driver chip, and the Y-direction VFD driver chip applies the required voltage to each conductive area in the Y direction; The main controller is respectively connected with the voltage generating circuit, the X-direction voltage selecting circuit, the X-direction VFD driving chip, the Y-direction voltage selecting circuit and the Y-direction VFD driving chip.

[0017] In other embodiments, the following technical solutions are adopted: A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, and the method comprises: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a third voltage V3 to the conductive area of ​​the first conductive layer covering the target erasing area, and applying the first voltage V1 to other conductive areas of the first conductive layer; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V2-V3| <Vst; |V2-V1| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

[0018] As an optional solution, first, a second voltage V2 is applied to the conductive area on the first conductive layer covering the target erasing area, and a first voltage V1 is applied to other conductive areas on the first conductive layer; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; Then, the voltage of the conductive region on the first conductive layer covering the target erasing region is adjusted to a third voltage V3.

[0019] In other embodiments, the following technical solutions are adopted: A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, and the method comprises: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a third voltage V3 to the conductive area of ​​the second conductive layer covering the target erasing area, and applying the first voltage V1 to other conductive areas of the second conductive layer; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V2-V3| <Vst; |V2-V1| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

[0020] As an optional solution, first, a second voltage V2 is applied to the conductive area on the second conductive layer covering the target erasing area, and a first voltage V1 is applied to other conductive areas on the second conductive layer; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; Then, the voltage of the conductive region on the second conductive layer covering the target erasing region is adjusted to a third voltage V3.

[0021] As an optional solution, the first voltage V1, the second voltage V2 and the third voltage V3 further satisfy: 0.3*|V3-V1| ≤|V2-V1|≤0.7*|V3-V1|.

[0022] Further, when the first voltage V1, the second voltage V2 and the third voltage V3 simultaneously meet the following requirements: V1>0;V2<0;V3<0; The STN liquid crystal driving chip is used to output the voltage required by each conductive area on the first conductive layer and / or the second conductive layer.

[0023] As an optional solution, the voltages applied to the first conductive layer and the second conductive layer are interchanged according to a set time rule to prevent the liquid crystal from being passivated.

[0024] As an optional solution, the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually parallel strip-shaped conductive regions, and the strip-shaped conductive regions on the first conductive layer and the strip-shaped conductive regions on the second conductive layer are spatially perpendicular to each other.

[0025] In other embodiments, the following technical solutions are adopted: A device for implementing the above-mentioned method for applying a local erasing voltage to a liquid crystal writing device comprises: A negative voltage generating circuit, wherein the negative voltage generating circuit generates at least one required negative voltage; A voltage generating circuit connected to the negative voltage generating circuit, wherein the voltage generating circuit generates at least two voltages according to the negative voltage and inputs the two voltages to the X-direction STN liquid crystal driving chip and the Y-direction STN liquid crystal driving chip respectively; The X-direction STN liquid crystal driver chip applies the required voltage to each conductive area in the X direction; The Y-direction STN liquid crystal driver chip applies the required voltage to each conductive area in the Y direction; The main controller is respectively connected with the negative pressure generating circuit, the voltage generating circuit, the X-direction STN liquid crystal driving chip and the Y-direction STN liquid crystal driving chip.

[0026] In other embodiments, the following technical solutions are adopted: A liquid crystal writing film comprises a first conductive layer, a cholesteric liquid crystal layer and a second conductive layer which are arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive areas; and further comprises: adopting the above-mentioned liquid crystal writing device local erasing voltage application method to realize local erasing.

[0027] In other embodiments, the following technical solutions are adopted: A liquid crystal writing device comprises the liquid crystal writing film mentioned above.

[0028] Compared with the prior art, the present invention has the following beneficial effects: (1) When performing local erasure, the present invention can ensure that in the row (or column) where the target erasure area is located, the voltage difference between the upper and lower conductive layers corresponding to the non-erased area is zero by reasonably setting the voltages required to be applied to the target erasure area and the non-erased area on the upper and lower conductive layers. Therefore, these areas will not be affected by the magnitude of the erasure voltage. Even if the erasure voltage is not set appropriately, the written content in these areas will not become lighter or disappear due to the influence of the erasure voltage.

[0029] (2) When performing local erasure, the present invention applies two different voltages to the first conductive layer and the second conductive layer respectively, and one of the voltages applied to the upper and lower conductive layers is the same; therefore, the present invention only requires three voltages to achieve local erasure, which simplifies the design cost and maintenance difficulty of the product.

[0030] (3) The present invention can be implemented such that there is a zero voltage in the voltages applied to the first conductive layer and the second conductive layer; under the premise that the applied voltages are all positive values, the two conductive layers can directly output the zero voltage and another voltage through the VFD driver chip. In this case, the VFD driver chip can be directly used to output the required voltage without the need to connect additional auxiliary components such as photocouplers and isolation transformers; the complexity of the voltage circuit is greatly simplified, and the production cost and maintenance cost are reduced.

[0031] Other features and advantages of additional aspects of the present invention will be given in part in the following description, and in part will become obvious from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of a method for applying a local erasing voltage to a liquid crystal writing device in Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of a steady voltage increase process in Embodiment 1 of the present invention; Figure 3 Schematic diagram of the voltage driving circuit structure using a VFD driving chip in Embodiment 1 of the present invention; Figure 4 This is a schematic diagram of the structure of the X-direction voltage selection circuit in the first embodiment of the present invention; Figure 5 Another schematic diagram of a method for applying a local erasing voltage to a liquid crystal writing device in Embodiment 1 of the present invention; Figure 6 A schematic diagram of a specific voltage application method in Embodiment 1 of the present invention; Figure 7 A schematic diagram of a method for applying a local erasing voltage to a liquid crystal writing device in Embodiment 2 of the present invention; Figure 8 This is a schematic diagram of the voltage driving circuit structure using an STN liquid crystal driving chip in the second embodiment of the present invention; Fig. 9 for Figure 8 Schematic diagram of the voltage application method corresponding to the circuit in the figure; Fig.10 It is a schematic diagram of a specific voltage application method in the second embodiment of the present invention. DETAILED DESCRIPTION

[0033] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used in the present invention have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0034] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0035] Embodiment 1 In one or more embodiments, a method for applying a local erase voltage to a liquid crystal writing device is disclosed. The liquid crystal writing device includes a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom. The first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions.

[0036] As a specific example, this embodiment is described by taking the first conductive layer being divided into a plurality of mutually insulated and parallel longitudinal strip-shaped conductive regions (Y-direction conductive regions), and the second conductive layer being divided into a plurality of mutually insulated and parallel transverse strip-shaped conductive regions (X-direction conductive regions). Of course, the specific shape of the conductive region can be set according to actual needs, for example, the second conductive layer can be divided into longitudinal conductive regions, and the first conductive layer can be divided into transverse conductive regions; or, the conductive region can be set to be strip-shaped or U-shaped, etc.

[0037] The local erase voltage application method of this embodiment is specifically as follows: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a third voltage V3 to other conductive areas of the first conductive layer; Applying a third voltage V3 to the conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 all satisfy the following conditions: |V1-V3|>Vst; |V3-V2| <Vst; |V1-V2| <Vst; Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; This allows the written content in the target erasing area to be erased, while the written content in other areas remains unchanged.

[0038] As a preferred solution, the first voltage V1, the second voltage V2 and the third voltage V3 further satisfy: 0.3*|V1-V3|≤|V2-V3|≤ 0.7*|V1-V3|.

[0039] It should be noted that due to measurement errors or the influence of the electrical properties of the measured object itself (such as resistance, parasitic capacitance, etc.), the above range may have an error within ±10%. The voltage value within the above error range still falls within the protection scope of this patent, and the same applies to the following.

[0040] In this way, the voltage difference between the upper and lower conductive layers of the target erasing area and the voltage difference between the upper and lower conductive layers of the non-erasing area are greatly different, and the erasing voltage has a larger selection range, which facilitates the selection of the optimal erasing voltage to increase the erasing speed.

[0041] In this embodiment, it is assumed that the first voltage V1 is 2Va, the second voltage V2 is Va, and the third voltage V3 is 0; Va>0; at this time, the following conditions are satisfied: |2Va|>Vst; and |Va|<Vst.

[0042] At this time, combined with Figure 1 , the specific voltage application method is: A voltage of 2Va is applied to the conductive area on the first conductive layer covering the target erasing area, and zero voltage is applied to other conductive areas of the first conductive layer; zero voltage is applied to the conductive area on the second conductive layer covering the target erasing area, and voltage Va is applied to other conductive areas on the second conductive layer.

[0043] In this way, the voltage difference between the upper and lower conductive layers of the entire liquid crystal writing film satisfies: the voltage difference between the upper and lower conductive layers corresponding to the target erasing area is 2Va, and in the row where the target erasing area is located, the voltage difference of other areas except the target erasing area is 0; the voltage difference of the remaining areas is Va or -Va. At this time, only the writing content corresponding to the target erasing area with a voltage difference of 2Va is erased, and the voltage difference of other areas in the row where the target erasing area is located is 0, and the corresponding writing content will not be affected by the erasing voltage at all.

[0044] In some embodiments, since the output current energy of the driving circuit is limited and is affected by the capacitance effect of the liquid crystal writing film, the voltage loaded during the boost or step-down process is difficult to reach the set target voltage value in a short time. Therefore, during the boost or step-down process, the entire strip-shaped conductive area covering the target erasure area may become lighter or disappear due to the erasure voltage.

[0045] In order to avoid the above problems, as an optional solution, this embodiment adopts a steady voltage increase or steady voltage reduction method during the voltage increase or voltage reduction process to reduce the influence of the capacitance effect of the liquid crystal writing film; and in the process of steady voltage increase, the written content will not become lighter or disappear due to the influence of the erase voltage; combined with Figure 2 , the specific process is as follows: The description is still given with the first voltage V1 being 2Va, the second voltage V2 being Va, and the third voltage V3 being 0.

[0046] First, Va is applied to the conductive area on the first conductive layer covering the target erasing area, and zero voltage is applied to other conductive areas on the first conductive layer; zero voltage is applied to the conductive area on the second conductive layer covering the target erasing area, and Va is applied to other conductive areas on the second conductive layer; at this time, all areas are not erased.

[0047] Then, the voltage of the conductive area on the first conductive layer covering the target erasing area is adjusted to a first voltage 2Va, and the written content in the target erasing area is erased.

[0048] Through the above two processes, the erasing voltage corresponding to the target erasing area is increased to the target voltage value, which reduces the influence of the capacitance effect of the liquid crystal writing film and avoids affecting the writing content corresponding to the area outside the target erasing area during the voltage application process.

[0049] As a preferred example, considering that the VFD driver chip can only directly output two voltages, one of which is zero voltage; and the present embodiment can meet the following requirements by properly selecting voltages: the voltages applied to the two conductive layers both contain a zero voltage, that is, one of the two voltages applied to the first conductive layer is zero voltage; and one of the two voltages applied to the second conductive layer is zero voltage. Therefore, the voltage for partial erasing in the present embodiment can be directly output by the VFD driver chip.

[0050] The following is an example of applying voltage to each X-direction conductive area on the second conductive layer: Figure 3 A schematic diagram of the structure of a voltage driving circuit using a VFD driving chip corresponding to the second conductive layer is given, specifically including: A voltage generating circuit, used for generating at least two voltages required for erasing; an X-direction voltage selection circuit connected to the voltage generation circuit, the X-direction voltage selection circuit selecting at least one voltage output from the voltage generated by the voltage generation circuit; An X-direction VFD driver chip connected to the X-direction voltage selection circuit, the output voltage of the X-direction voltage selection circuit is input to the X-direction VFD driver chip, and the X-direction VFD driver chip applies the required voltage to each conductive area in the X direction; A Y-direction voltage selection circuit connected to the voltage generation circuit, the Y-direction voltage selection circuit selecting at least one voltage output from the voltage generated by the voltage generation circuit; A Y-direction VFD driver chip connected to the Y-direction voltage selection circuit, the output voltage of the Y-direction voltage selection circuit is input to the Y-direction VFD driver chip, and the Y-direction VFD driver chip applies the required voltage to each conductive area in the Y direction; The main controller is respectively connected with the voltage generating circuit, the X-direction voltage selecting circuit, the X-direction VFD driving chip, the Y-direction voltage selecting circuit and the Y-direction VFD driving chip.

[0051] Combination Figure 3 The specific working principle is as follows: MCU outputs two PWM signals to the voltage generating circuit, and the voltage generating circuit generates two voltages Va and 2Va respectively through the two PWM signals. The MCU outputs an enable signal to the X-direction voltage selection circuit. If the enable signal is 1, the X-direction voltage selection circuit outputs 2Va; if the enable signal is 0, the voltage selection circuit outputs Va. As a specific example, the structure of the X-direction voltage selection circuit is as follows: Figure 4 As shown, the output of the Xs enable signal is controlled by the MCU. When Xs=1, transistors Q1 and Q2 are turned on, and the output of the voltage selection circuit is X VH =2Va; when Xs=0, diode D1 is turned on, and the output of the voltage selection circuit is X VH =Va. Output of voltage selection circuit X VH The voltage is transmitted to the X-direction VFD driver chip, which outputs voltage X for different X-direction conductive areas on the second conductive layer under the control of the MCU. VH or 0.

[0052] In this embodiment, the voltage generating circuit, the voltage selecting circuit and the VFD driving chip are all implemented using existing structures. For example, the specific model of the VFD driving chip can be PT6392. Of course, in addition to the VFD driving chip, other chips with similar functions that can output zero voltage and positive voltage and meet actual driving requirements can also be used.

[0053] The voltage driving circuit structure and principle corresponding to the first conductive layer are the same as those described above and will not be described in detail.

[0054] In this embodiment, the voltage required for partial erasing can be directly output through the VFD driving chip without the need for other additional electronic components, which greatly simplifies the circuit structure, reduces the difficulty of maintenance, and saves production costs.

[0055] As an optional example, in the various examples above, the voltages applied to the first conductive layer and the second conductive layer are interchanged according to a set time rule, so that the electric field formed on the entire liquid crystal writing film is the same in magnitude but opposite in direction, so as to avoid the polarization of the liquid crystal caused by applying an electric field in the same direction to the liquid crystal writing film for a long time.

[0056] Figure 5A schematic diagram of a local erase voltage application method for another voltage loading example is given. In this example, assuming that the first voltage V1 is 0, the second voltage V2 is -Va, the third voltage V3 is -2 Va, and Va>0, the corresponding voltage application method is: Zero voltage is applied to the conductive area on the first conductive layer covering the target erasing area, and -2Va is applied to other conductive areas on the first conductive layer; -2 Va is applied to the conductive area on the second conductive layer covering the target erasing area, and -Va is applied to other conductive areas on the second conductive layer.

[0057] This example can also use the above-mentioned steady voltage increase and voltage swap process, which will not be described in detail.

[0058] As a more specific example, Figure 6 A specific voltage application strategy is given, namely: the first voltage = 5V, the second voltage = 0V, and the third voltage = -5V.

[0059] Applying a first voltage of 5V to the conductive area of ​​the first conductive layer covering the target erasing area, and applying a third voltage of -5V to other conductive areas of the first conductive layer; A third voltage of -5V is applied to the conductive area on the second conductive layer covering the target erasing area, and a second voltage of 0 is applied to other conductive areas on the second conductive layer.

[0060] At this time, only the written content in the target erasing area is completely erased, and the written content in other areas remains unchanged.

[0061] This voltage application method reduces the amount of voltage required for local erasure, and can achieve a voltage difference of 0 in other areas of the row where the target erasure area is located, so that the corresponding written content will not be affected by the erasure voltage at all.

[0062] Embodiment 2 In one or more embodiments, a method for applying a local erasing voltage to a liquid crystal writing device is disclosed. The implementation process and principle of this embodiment are exactly the same as those of the method in Embodiment 1, and will not be described in detail. The only difference is that the voltage applied to the first conductive layer and the voltage applied to the second conductive layer are swapped, that is: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a first voltage V1 to the conductive area of ​​the second conductive layer covering the target erasing area, and applying a third voltage V3 to other conductive areas of the second conductive layer; Applying a third voltage V3 to the conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V3-V2| <Vst; |V1-V2| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thereby, erasing of the written content at the corresponding position of the target erasing area is achieved.

[0063] As a preferred embodiment, first, a second voltage V2 is applied to the conductive area on the second conductive layer covering the target erasing area, and a third voltage V3 is applied to other conductive areas on the second conductive layer; a third voltage V3 is applied to the conductive area on the first conductive layer covering the target erasing area, and a second voltage V2 is applied to other conductive areas on the first conductive layer.

[0064] Then, the voltage of the conductive region on the second conductive layer covering the target erasing region is adjusted to the first voltage V1.

[0065] The specific implementation effect is exactly the same as that in Example 1 and will not be described in detail.

[0066] Embodiment 3 In one or more embodiments, a method for applying a local erasing voltage to a liquid crystal writing device is disclosed. The structure of the liquid crystal writing device is exactly the same as that in the first embodiment and will not be described in detail.

[0067] The local erase voltage application method of this embodiment is specifically as follows: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a third voltage V3 to the conductive area of ​​the first conductive layer covering the target erasing area, and applying the first voltage V1 to other conductive areas of the first conductive layer; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 all satisfy the following conditions: |V1-V3|>Vst; |V2-V3| <Vst; |V2-V1| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

[0068] As a preferred solution, the first voltage V1, the second voltage V2 and the third voltage V3 further satisfy: 0.3*|V3-V1| ≤|V2-V1| ≤0.7*|V3-V1|.

[0069] In this embodiment, it is assumed that the first voltage V1 is 0, the second voltage V2 is -Va, and the third voltage V3 is -2Va; Va>0; at this time, the following conditions are satisfied: |-2Va|>Vst; and |-Va|<Vst.

[0070] At this time, combined with Figure 7 , the specific voltage application method is: -2Va is applied to the conductive area on the first conductive layer covering the target erasing area, and zero voltage is applied to other conductive areas of the first conductive layer; zero voltage is applied to the conductive area on the second conductive layer covering the target erasing area, and -Va is applied to other conductive areas on the second conductive layer.

[0071] In this way, the voltage difference between the upper and lower conductive layers of the entire liquid crystal writing film satisfies: the voltage difference between the upper and lower conductive layers corresponding to the target erasing area is -2Va, and in the row where the target erasing area is located, the voltage difference of other areas except the target erasing area is 0; the voltage difference of the remaining areas is Va or -Va. At this time, only the writing content corresponding to the target erasing area with a voltage difference of 2Va is erased, and the voltage difference of other areas in the row where the target erasing area is located is 0, and the corresponding writing content will not be affected by the erasing voltage at all.

[0072] Similarly, in order to avoid being affected by the capacitance effect of the liquid crystal writing film, this embodiment also adopts a method of steadily increasing or steadily decreasing the voltage to reduce the influence of the capacitance effect of the liquid crystal writing film; the specific process is as follows: First, a second voltage V2 is applied to the conductive area on the first conductive layer covering the target erasing area, and a first voltage V1 is applied to other conductive areas on the first conductive layer; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; Then, the voltage of the conductive region on the first conductive layer covering the target erasing region is adjusted to a third voltage V3.

[0073] The specific effects are the same as those in the first embodiment and will not be described in detail.

[0074] As a preferred example, considering that the STN liquid crystal driver chip can directly output negative voltage, when the first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: V1>0; V2<0; V3<0, the STN liquid crystal driver chip can be used to directly output the voltage required by each conductive area on the first conductive layer and the second conductive layer.

[0075] The voltage drive circuit structure using STN liquid crystal driver chip is as follows Figure 8 As shown, specifically including: A negative voltage generating circuit, the negative voltage generating circuit generates at least one required negative voltage; A voltage generating circuit connected to the negative voltage generating circuit, the voltage generating circuit generates at least two voltages according to the generated negative voltage, and inputs the two voltages to the X-direction STN liquid crystal driving chip and the Y-direction STN liquid crystal driving chip respectively; The X-direction STN liquid crystal driver chip applies the required voltage to each conductive area in the X direction; The Y-direction STN liquid crystal driver chip applies the required voltage to each conductive area in the Y direction; The main controller is respectively connected with the negative pressure generating circuit, the voltage generating circuit, the X-direction STN liquid crystal driving chip and the Y-direction STN liquid crystal driving chip.

[0076] Combination Figure 8 The specific working process of the voltage driving circuit using the STN liquid crystal driver chip is as follows: The negative voltage generating circuit is controlled by the MCU to output a negative voltage V EE , negative voltage V EE Input to the voltage generating circuit, input the enable signal to the voltage generating circuit through the MCU, when the enable signal is 1, the voltage generating circuit can output a negative voltage V E1 and negative voltage V E2 ; Then according to actual needs, the negative voltage V E1 Input to the V pin of the STN LCD driver chip in the X direction 12 and V 34 Pin, the V0 pin of the X-direction STN liquid crystal driver chip is connected to the power supply Vcc. At this time, the MCU can control the X-direction STN liquid crystal driver chip to output Vcc and V E1 two voltages to different X-direction conductive areas on the second conductive layer; the negative voltage V E2 Input to the Y direction STN LCD driver chip V 12 and V 34 Pin, the V0 pin of the Y direction STN liquid crystal driver chip is connected to the power supply Vcc. At this time, the MCU can control the Y direction STN liquid crystal driver chip to output Vcc and V E2 Two voltages are applied to different Y-direction conductive areas on the first conductive layer.

[0077] In this embodiment, the negative voltage generating circuit, the voltage generating circuit and the STN liquid crystal driver chip are all implemented using existing structures, for example, the model of the STN liquid crystal driver chip can be SDN8008. Of course, in addition to the STN liquid crystal driver chip, a chip with a negative voltage output function having similar performance can also be used.

[0078] Assume that Vcc and V E1 and V E2 The order is as follows: Vcc>V E1 >V E2 , and Vcc>0, V E1 <0, V E2 <0; if it satisfies: |V e2 -Vcc|>Vst; and|V e2 -V e1 |<Vst;|Vcc-V e1 |<Vst.

[0079] Then partial erasure can be achieved.

[0080] Combination Fig. 9 , the specific voltage application method is as follows: Apply V to the conductive area of ​​the first conductive layer covering the target erase area. e2 , apply Vcc to other conductive areas of the first conductive layer; apply Vcc to the conductive area of ​​the second conductive layer covering the target erase area, and apply V e1 .

[0081] As a preferred solution, the above voltage can further satisfy: 0.3*|V e2 - Vcc|≤|Vcc -V e1 |≤ 0.7*|V e2 - Vcc|.

[0082] This embodiment preferably adopts: 0.5*|V e2 - Vcc|=|Vcc -V e1 |, that is, Vcc - V e1= V e1- V e2 .

[0083] In this embodiment, the voltage required for partial erasing can be directly output through the STN liquid crystal driver chip without any additional electronic components, which greatly simplifies the circuit structure, reduces the difficulty of maintenance, and saves production costs.

[0084] As a more specific example, Fig.10A specific voltage application strategy is given, namely: the first voltage = 5V, the second voltage = 0V, and the third voltage = -5V.

[0085] Applying a third voltage of -5V to the conductive area of ​​the first conductive layer covering the target erasing area, and applying a first voltage of 5V to other conductive areas of the first conductive layer; A first voltage of 5V is applied to the conductive area on the second conductive layer covering the target erasing area, and a second voltage of 0 is applied to other conductive areas on the second conductive layer.

[0086] At this time, only the written content in the target erasing area is completely erased, and the written content in other areas remains unchanged.

[0087] As a preferred example, the voltages applied to the first conductive layer and the second conductive layer are interchanged according to a set time rule, so that the electric field formed on the entire liquid crystal writing film has the same magnitude but opposite directions, so as to avoid the polarization of the liquid crystal caused by applying an electric field in the same direction to the liquid crystal writing film for a long time.

[0088] Embodiment 4 In one or more embodiments, a method for applying a local erasing voltage to a liquid crystal writing device is disclosed. The implementation process and principle of this embodiment are exactly the same as those of the method in Embodiment 3, and will not be described in detail. The only difference is that the voltage applied to the first conductive layer and the voltage applied to the second conductive layer are swapped, that is: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a third voltage V3 to the conductive area of ​​the second conductive layer covering the target erasing area, and applying the first voltage V1 to other conductive areas of the second conductive layer; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V2-V3| <Vst; |V2-V1| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thereby, erasing of the written content at the corresponding position of the target erasing area is achieved.

[0089] As a preferred implementation, first, a second voltage V2 is applied to the conductive area on the second conductive layer covering the target erasing area, and a first voltage V1 is applied to other conductive areas on the second conductive layer; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; Then, the voltage of the conductive region on the second conductive layer covering the target erasing region is adjusted to a third voltage V3.

[0090] The specific effect is the same as that in the third embodiment.

[0091] Embodiment 5 In one or more embodiments, a liquid crystal writing film is disclosed, comprising a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions.

[0092] The writing film of this embodiment adopts any one of the liquid crystal writing device local erasing voltage application methods in Embodiments 1 to 4 to achieve local erasure.

[0093] The liquid crystal writing film of this embodiment can be applied to liquid crystal products such as blackboards, drawing boards and writing boards to simplify the circuit structure and reduce production costs.

[0094] Embodiment 6 In one or more embodiments, a liquid crystal writing device is disclosed, comprising the liquid crystal writing film described in Example 5.

[0095] Although the above describes the specific implementation mode of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer, and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, wherein the method include: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a third voltage V3 to other conductive areas of the first conductive layer; Applying a third voltage V3 to the conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V3-V2| <Vst; |V1-V2| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

2. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in claim 1, characterized in that: First, a second voltage V2 is applied to the conductive area on the first conductive layer covering the target erasing area, and a third voltage V3 is applied to other conductive areas on the first conductive layer; Applying a third voltage V3 to the conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; Then, the voltage of the conductive region on the first conductive layer covering the target erasing region is adjusted to the first voltage V1.

3. A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, wherein the method include: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a third voltage V3 to other conductive areas of the second conductive layer; Applying a third voltage V3 to the conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V3-V2| <Vst; |V1-V2| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

4. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in claim 3, characterized in that: First, a second voltage V2 is applied to the conductive area on the second conductive layer covering the target erasing area, and a third voltage V3 is applied to other conductive areas on the second conductive layer; Applying a third voltage V3 to the conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; Then, the voltage of the conductive region on the second conductive layer covering the target erasing region is adjusted to the first voltage V1.

5. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in any one of claims 1 to 4, characterized in that: The first voltage V1, the second voltage V2 and the third voltage V3 further satisfy: 0.3*|V1-V3|≤|V2-V3|≤ 0.7*|V1-V3|.

6. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in claim 5, characterized in that: The third voltage V3 is used as a reference zero potential, and a VFD driving chip is used to output the voltage required by each conductive area on the first conductive layer and / or the second conductive layer.

7. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in any one of claims 1 to 4, characterized in that: The voltages applied to the first conductive layer and the second conductive layer are interchanged according to a set time rule to prevent the liquid crystal from being passivated.

8. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in any one of claims 1 to 4, characterized in that: The first conductive layer and the second conductive layer are respectively divided into a plurality of mutually parallel strip-shaped conductive regions, and the strip-shaped conductive regions on the first conductive layer and the strip-shaped conductive regions on the second conductive layer are spatially perpendicular to each other.

9. A device for implementing the method for applying a local erasing voltage to a liquid crystal writing device according to any one of claims 1 to 4, characterized in that: include: A voltage generating circuit, wherein the voltage generating circuit generates at least two voltages required for erasing; an X-direction voltage selection circuit connected to the voltage generation circuit, the X-direction voltage selection circuit selecting at least one voltage output from the voltage generated by the voltage generation circuit; An X-direction VFD driver chip connected to the X-direction voltage selection circuit, the output voltage of the X-direction voltage selection circuit is input to the X-direction VFD driver chip, and the X-direction VFD driver chip applies the required voltage to each conductive area in the X direction; A Y-direction voltage selection circuit connected to the voltage generation circuit, wherein the Y-direction voltage selection circuit selects at least one voltage output from the voltage generated by the voltage generation circuit; A Y-direction VFD driver chip connected to the Y-direction voltage selection circuit, the output voltage of the Y-direction voltage selection circuit is input to the Y-direction VFD driver chip, and the Y-direction VFD driver chip applies the required voltage to each conductive area in the Y direction; The main controller is respectively connected with the voltage generating circuit, the X-direction voltage selecting circuit, the X-direction VFD driving chip, the Y-direction voltage selecting circuit and the Y-direction VFD driving chip.

10. A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, wherein the method include: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a third voltage V3 to the conductive area of ​​the first conductive layer covering the target erasing area, and applying the first voltage V1 to other conductive areas of the first conductive layer; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V2-V3| <Vst; |V2-V1| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

11. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in claim 10, characterized in that: First, a second voltage V2 is applied to the conductive area on the first conductive layer covering the target erasing area, and a first voltage V1 is applied to other conductive areas on the first conductive layer; Applying a first voltage V1 to a conductive area on the second conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the second conductive layer; Then, the voltage of the conductive region on the first conductive layer covering the target erasing region is adjusted to a third voltage V3.

12. A method for applying a local erasing voltage to a liquid crystal writing device, wherein the liquid crystal writing device comprises a first conductive layer, a cholesteric liquid crystal layer and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions, wherein the method include: Three voltages are set to satisfy: first voltage V1> second voltage V2> third voltage V3; Applying a third voltage V3 to the conductive area of ​​the second conductive layer covering the target erasing area, and applying the first voltage V1 to other conductive areas of the second conductive layer; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; The first voltage V1, the second voltage V2 and the third voltage V3 simultaneously satisfy: |V1-V3|>Vst; |V2-V3| <Vst; |V2-V1| <Vst; Wherein, Vst is the erasure start voltage of the cholesteric liquid crystal, and the erasure start voltage is a voltage that can cause some liquid crystal molecules to start changing from a planar state to a focal conic state; Thus, the written content at the position corresponding to the target erasure area is erased, and the written content in other areas remains unchanged.

13. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in claim 12, characterized in that: First, a second voltage V2 is applied to the conductive area on the second conductive layer covering the target erasing area, and a first voltage V1 is applied to other conductive areas on the second conductive layer; Applying a first voltage V1 to a conductive area on the first conductive layer covering the target erasing area, and applying a second voltage V2 to other conductive areas on the first conductive layer; Then, the voltage of the conductive region on the second conductive layer covering the target erasing region is adjusted to a third voltage V3.

14. A method for applying a local erasing voltage to a liquid crystal writing device according to any one of claims 10 to 13, characterized in that: The first voltage V1, the second voltage V2 and the third voltage V3 further satisfy: 0.3*|V3-V1| ≤|V2-V1|≤0.7*|V3-V1|.

15. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in claim 14, characterized in that: When the first voltage V1, the second voltage V2 and the third voltage V3 simultaneously meet the following requirements: V1>0;V2<0;V3<0; The STN liquid crystal driving chip is used to output the voltage required by each conductive area on the first conductive layer and / or the second conductive layer.

16. A method for applying a local erasing voltage to a liquid crystal writing device according to any one of claims 10 to 13, characterized in that: The voltages applied to the first conductive layer and the second conductive layer are interchanged according to a set time rule to prevent the liquid crystal from being passivated.

17. A method for applying a local erasing voltage to a liquid crystal writing device as claimed in any one of claims 10 to 13, characterized in that: The first conductive layer and the second conductive layer are respectively divided into a plurality of mutually parallel strip-shaped conductive regions, and the strip-shaped conductive regions on the first conductive layer and the strip-shaped conductive regions on the second conductive layer are spatially perpendicular to each other.

18. A device for implementing the method for applying a local erasing voltage to a liquid crystal writing device according to any one of claims 10 to 13, characterized in that: include: A negative voltage generating circuit, wherein the negative voltage generating circuit generates at least one required negative voltage; A voltage generating circuit connected to the negative voltage generating circuit, wherein the voltage generating circuit generates at least two voltages according to the negative voltage and inputs the two voltages to the X-direction STN liquid crystal driving chip and the Y-direction STN liquid crystal driving chip respectively; The X-direction STN liquid crystal driver chip applies the required voltage to each conductive area in the X direction; The Y-direction STN liquid crystal driver chip applies the required voltage to each conductive area in the Y direction; The main controller is respectively connected with the negative pressure generating circuit, the voltage generating circuit, the X-direction STN liquid crystal driving chip and the Y-direction STN liquid crystal driving chip.

19. A liquid crystal writing film, comprising a first conductive layer, a cholesteric liquid crystal layer and a second conductive layer arranged in sequence from top to bottom, wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually insulated conductive regions; characterized in that: It also includes: using the local erasing voltage application method of the liquid crystal writing device described in any one of claims 1-8 or 10-17 to achieve local erasing.

20. A liquid crystal writing device, characterized in that: Including the liquid crystal writing film as described in claim 19.

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