A process method for growing sputtered copper films using a high-frequency pulsed power supply

Abstract

The present invention discloses a process method for growing a sputtered copper film using a high-frequency pulsed power supply, comprising the following steps: providing a PVD chamber and a wafer, wherein a target and a heater are arranged in the PVD chamber, the target is provided with a HIPIMS power supply and a DC power supply, and an AC power supply is arranged below the heater; the wafer is located on the heater; when the target is under the HIPIMS power supply, controlling the sputtering parameters of the PVD chamber; switching the power supply of the target to the DC power supply and controlling the sputtering parameters of the PVD chamber: setting the power to 15-25 kw and the AC power supply bias power to 100-300 w until the chemical and mechanical polishing of the copper plating layer is satisfied. The present invention solves the problem that most current magnetron sputtering chambers are mostly used for planar coating, and their via filling ability is poor, especially in the application scenarios with high aspect ratios, and they cannot well meet the requirements of the manufacturing process.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and particularly to a process method for growing sputtered copper films using a high-frequency pulsed power supply. Background Art

[0002] However, as the transistor size continues to shrink and approaches the physical limit, the traditional planar integrated circuit manufacturing process faces many challenges, such as short-channel effects, increased leakage current, rising power consumption density, etc. Continuing to improve chip performance by shrinking the transistor size has become increasingly difficult and costly. This has prompted the semiconductor industry to seek new technical approaches to continue improving chip performance. As an effective solution, three-dimensional integration technology has emerged, and the through-silicon via (TSV) technology, as a key technology for realizing vertical interconnection between chips in three-dimensional integration, has received extensive attention. Among them, the TSV technology generally uses ECP electroplated copper as the interconnect metal to fill the holes, and electroplated copper generally requires a barrier layer / seed layer as the coating substrate, and the substrate needs to have good continuity and a certain thickness for smooth electroplating.

[0003] The existing technologies have the following problems: The PVD (Physical Vapor Deposition) technology mainly relies on physical processes (such as sputtering) to deposit materials onto the substrate. Due to the limitations of its deposition mechanism, PVD often has difficulty obtaining good filling effects when filling high-aspect-ratio trenches and holes. In the manufacturing process of advanced TSV technologies, the aspect ratio can usually reach 5:1 or even higher, and the depth of the holes can reach dozens or even hundreds of micrometers. As the aspect ratio increases, the technical challenges in the manufacturing process will also increase accordingly. The metal seed layer formed by the conventional PVD method has a low step coverage in the TSV, especially in the TSV technology with a high aspect ratio, this problem is particularly prominent. Due to the structural characteristics of the TSV technology, it is often difficult to obtain uniform and continuous seed layer coverage on its sidewalls and bottom. Summary of the Invention

[0004] Aiming at the deficiencies of the existing technologies, the present invention provides a process method for growing sputtered copper films using a high-frequency pulsed power supply. The present invention solves the problem that most existing magnetron sputtering chambers are mostly used for planar coating, and their hole filling ability is poor, especially in the application scenarios with a high aspect ratio, which cannot well meet the requirements of the manufacturing process. The present invention combines a HIPIMS (High Power Impulse Magnetron Sputtering) power supply with a DC power supply and an AC power supply, which greatly improves the ionization rate of the sputtered atoms. Under the attraction of the negative bias voltage on the wafer surface, its collimation is greatly enhanced; at the same time, the sufficient film-forming atoms at the bottom of the through-hole further improve the step coverage of the sidewalls through the backsputtering effect.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A process method for growing a sputtered copper film using a high-frequency pulsed power supply, comprising the following steps:

[0007] Step S1: Provide a PVD chamber and a wafer. A target and a heater are provided in the PVD chamber. The target is provided with a HIPIMS power supply and a DC power supply, and an AC power supply is provided below the heater; the wafer is located on the heater; that is, prepare the PVD chamber and the wafer. There is a target (copper metal) and a heater in the chamber. The target is connected to the HIPIMS and DC power supplies, and the two power supplies will provide different modes of energy input to the target to meet the sputtering requirements of different stages; an AC power supply (13.56 MHz AC power supply) is provided below the heater, which can provide a specific bias voltage for the wafer, thereby affecting the movement trajectory and energy of ions, helping to improve the deposition quality of the copper film, and the wafer is placed on the heater.

[0008] Step S2: Under the condition of the HIPIMS power supply for the target, control the sputtering parameters of the PVD chamber: Fill argon gas Ar under vacuum conditions, set the power to 8 - 18 kw, the pulse current to 200 - 600 A, the pulse time to 50 - 150 us, the process pressure to 5 - 12 mT, and the bias power of the AC power supply to 50 - 400 w, until the copper film thickness in the trenches / holes of the seed layer reaches the requirements for copper growth in the DC power supply mode, which is generally above 50 nm in general cases;

[0009] Setting the power within the range of 8 - 18 kW can provide sufficient energy to drive the sputtering process, but not too high to cause excessive sputtering of the target or generate unstable plasma. Controlling the pulse current between 200 - 600 A can ensure that an appropriate amount of copper atoms are sputtered out during each pulse. Setting the pulse time to 50 - 150 μs can ensure that high-energy plasma is generated within a short time during the sputtering process, which is beneficial to forming a high-quality seed layer. Maintaining the process pressure at 5 - 12 mT, a stable pressure environment helps to maintain the stability and uniformity of the plasma. At the same time, setting the bias power of the AC power supply between 50 - 400 W, by adjusting the bias power, the energy and angle of ion bombardment on the wafer can be controlled, thereby optimizing the deposition effect of the copper film in the trenches / holes of the wafer.

[0010] Continue the sputtering process until the copper film thickness in the trenches / holes of the seed layer reaches the requirements for copper growth in the DC power supply mode. Generally, the thickness needs to reach above 50 nm to ensure the smooth growth of copper in the subsequent DC power supply mode.

[0011] Step S3: Switch the power supply of the target to the DC power supply, and control the sputtering parameters of the PVD chamber: Set the power to 15 - 20 kw, and the bias power of the AC power supply to 100 - 300 w, until the requirements for chemical mechanical polishing after electroplated copper filling of the copper plating layer are met.

[0012] Set the power of the DC power supply between 15 - 20 kW. The relatively high power can provide stable and continuous energy, enabling the target to continuously and stably sputter copper atoms, accelerating the growth rate of the copper plating layer. At the same time, adjust the bias power of the AC power supply to between 100 - 300 W to further optimize the energy and angle of ion bombardment on the wafer, improving the uniformity and quality of the copper plating layer. Continuously carry out the sputtering process until the various indicators of the copper plating layer meet the requirements of chemical mechanical polishing after electroplated copper filling.

[0013] As a further solution of the present invention, the target is made of metallic copper.

[0014] As a further solution of the present invention, in step S2, control the sputtering parameters of the PVD chamber: fill Ar under vacuum conditions, set the power to 12 kw, the average pulse current to 250 A, the pulse time to 100 us, the process pressure to 6.5 mT, and the AC power supply bias power to 150 w.

[0015] As a further solution of the present invention, in step S2, control the sputtering parameters of the PVD chamber: fill Ar under vacuum conditions, set the power to 12 kw, the average pulse current to 500 A, the pulse time to 50 us, the process pressure to 10 mT, and the AC power supply bias power to 150 w.

[0016] As a further solution of the present invention, in step S3, switch the power supply to the DC power supply and control the sputtering parameters of the PVD chamber: set the average power to 18 kw and the AC power supply bias power to 200 w.

[0017] As a further solution of the present invention, the AC power supply uses a 13.56 MHz AC power supply and is applied to the heater.

[0018] As a further solution of the present invention, in steps S2 and S3, the wafer is cooled in real time by applying back pressure to the heater.

[0019] As a further solution of the present invention, in step S2, control the deposition rate of the copper film to be 50 - 100 nm / min.

[0020] As a further solution of the present invention, in step S3, control the deposition rate of the copper film to be >400 nm / min.

[0021] As a further solution of the present invention, the AC power supply is used to provide a negative bias voltage to achieve the attraction of the ionized sputtered particles.

[0022] The present invention has the following beneficial effects:

[0023] The present invention adopts the switching mode of HIPIMS power supply and DC power supply, which solves the problems of most current magnetron sputtering chambers. Most of their usage scenarios are for planar coating, and their hole filling ability is poor. Especially in the application scenarios with high aspect ratios, they cannot well meet the requirements of the manufacturing process. The HIPIMS power supply greatly improves the ionization rate of sputtered atoms. Under the attraction of the negative bias voltage on the wafer surface, its collimation is greatly enhanced. At the same time, the sufficient film-forming atoms at the bottom of the through-hole further improve the step coverage of the sidewalls through the back-sputtering effect.

[0024] In the process of the present invention, since HiPMIS has excellent hole filling performance, while DC copper film growth has better thickness uniformity across the whole wafer, and at the same time the deposition rate is much higher than that of HiPIMS. The two can complement each other. The hole can be filled first in HiPMIS mode, and then the thickness can be supplemented in DC mode. By switching the mode, the purpose of uniform growth of the whole wafer can be achieved. In order to ensure the thickness uniformity of the whole wafer for subsequent electroplated copper and prevent phenomena such as residual copper film on the surface during chemical mechanical polishing.

[0025] To more clearly elaborate on the structural features and effects of the present invention, the following will combine the drawings and specific embodiments to detail the present invention. Description of the Drawings

[0026] Figure 1 It is a schematic structural diagram of the seed layer at the upper end of the hole after copper film plating according to the embodiment of the present invention;

[0027] Figure 2 It is a schematic structural diagram of the seed layer at the 75% depth position inside the hole after copper film plating according to the embodiment of the present invention;

[0028] Figure 3 It is a schematic structural diagram of the seed layer at the lower end of the hole after copper film plating according to the embodiment of the present invention;

[0029] Figure 4 It is a schematic structural diagram of the seed layer at the bottom of the hole after copper film plating according to the embodiment of the present invention;

[0030] Figure 5 It is a schematic structural diagram of the seed layer at the upper end of the hole after copper film plating in the traditional DC power supply mode according to the embodiment of the present invention;

[0031] Figure 6 It is a schematic structural diagram of the seed layer at the 75% depth position inside the hole after copper film plating in the traditional DC power supply mode according to the embodiment of the present invention;

[0032] Figure 7 It is a schematic structural diagram of the seed layer at the lower end of the hole after copper film plating in the traditional DC power supply mode according to the embodiment of the present invention;

[0033] Figure 8Schematic diagram of the structure of the seed layer at the bottom of the hole after copper film plating using the traditional DC power supply mode mentioned in the embodiments of the present invention;

[0034] Figure 9 is Figures 1-8 Schematic diagram of the thickness at different positions respectively;

[0035] Figure 10 Schematic diagram of the distribution of the sheet resistance value of the copper film plated on the whole wafer under the condition of the HIPIMS power supply for the target mentioned in the embodiments of the present invention;

[0036] Figure 11 Schematic diagram of the distribution of the sheet resistance value of the copper film plated on the whole wafer after switching the power supply of the target to the DC power supply mentioned in the embodiments of the present invention;

[0037] Figure 12 Schematic diagram of the thickness at different positions in Example 3;

[0038] Figure 13 and Figure 14 Schematic diagrams of the copper film structures at the center position and the edge position of the wafer in Example 3 respectively;

[0039] Figure 15 and Figure 16 Schematic diagrams of the copper film structures at the center position and the edge position of the wafer in the DC power supply mode in Example 3 respectively;

[0040] Figure 17 Schematic diagram of the copper film structure when the wafer in the present invention is not cooled in real time. Detailed implementation manners

[0041] The following will further illustrate the present invention in conjunction with the drawings and relevant knowledge, and describe it clearly and completely. Obviously, the described applications are only a part of the embodiments of the present invention, rather than all of the embodiments.

[0042] Magnetron sputtering belongs to a kind of physical vapor deposition (PVD). The basic principle is that argon gas Ar is filled under vacuum conditions, and argon gas glow discharge occurs under a high-voltage electric field. Ar atoms are ionized into Ar+ ions and electrons e - , and Ar+ accelerates and bombards the cathode target under the action of the electric field, and the target atoms are deposited on the wafer surface to form a thin film.

[0043] In existing Physical Vapor Deposition (PVD) techniques, the deposition of materials onto substrates mainly relies on physical processes such as sputtering. Due to the limitations of its deposition mechanism, PVD often has difficulty achieving good filling effects when filling high aspect ratio trenches and holes. In the manufacturing process of advanced Through-Silicon Via (TSV) or Via-Silicon Via (VSV) technologies, the aspect ratio can typically reach 5:1 or even higher, and the depth of the holes can reach dozens or even hundreds of micrometers. As the aspect ratio increases, the technical challenges in the manufacturing process also increase accordingly. The metal seed layer generated by conventional PVD methods has a low step coverage rate inside the TSVs. Especially in high aspect ratio TSV or VSV technologies, this problem is particularly prominent. Due to the structural characteristics of TSV or VSV technologies, it is often difficult to obtain uniform and continuous seed layer coverage on their sidewalls and bottoms.

[0044] Based on the above problems, the present invention is thus proposed, and the specific embodiments are as follows;

[0045] Embodiment 1, see Figures 1-17 As shown, a process method for growing a sputtered copper film using a high-frequency pulsed power supply, step S1: Provide a PVD chamber and a wafer. A target and a heater are arranged inside the PVD chamber. The target is provided with a High-Power Impulse Magnetron Sputtering (HIPIMS) power supply and a DC power supply. An AC power supply is arranged below the heater; the wafer is located on the heater; by adding an AC power supply below the heater of the wafer, since the mass of electrons is much smaller than that of positive ions, within the oscillation period of the AC power supply, more electrons are accelerated and attracted to the surface of the wafer, thereby applying a negative bias voltage on the surface of the wafer to achieve the attraction of the ionized sputtered particles. The negative bias voltage can optimize the bombardment energy and angle of the ions, make the coating more uniform and dense, and increase the step coverage rate.

[0046] In the present invention, the HIPIMS power supply and the DC power supply are integrated into one power supply, and can be switched to the HiPIMS mode or the ordinary DC mode when needed.

[0047] Step S2: Under the condition of HIPIMS power supply for the target, control the sputtering parameters of the PVD chamber: Fill Ar under vacuum conditions, set the power to 8 - 18 kw, the pulsed current to 200 - 600 A, the pulse time to 50 - 150 us, the process pressure to 5 - 12 mT, and the AC power supply bias power to 50 - 400 w until the copper film thickness in the trenches / holes of the seed layer reaches more than 50 nm or meets the copper growth in the next DC power supply mode; In traditional magnetron sputtering technology, the sputtering current usually cannot be too large, and the sputtering power density is generally about 20 W / cm². Due to the limitation of sputtering power, the ionization rate of target atoms is relatively low, generally less than 10%. This means that in traditional magnetron sputtering, most sputtered particles exist in the atomic state rather than the highly ionized ion state. When the aspect ratio is too high, the low-ionization sputtered particles cannot be well attracted by the bias voltage, and the step coverage of the sputtered film is not good; Through the HiPIMS technology, a peak power more than a hundred times the average power can be generated in an extremely short time, resulting in a high plasma density. This high-power pulse greatly enhances the ionization degree of the sputtering gas, and the ionization rate of sputtered particles in HiPIMS technology can be as high as about 70%, and even reach 90% in some cases.

[0048] Step S3: Switch the power supply of the target to the DC power supply and control the sputtering parameters of the PVD chamber: Set the power to 15 - 20 kw and the AC power supply bias power to 100 - 300 w until the chemical mechanical polishing of the copper plating layer is satisfied. Since HiPMIS has excellent hole filling performance, while DC growth of the copper film has better thickness uniformity across the whole piece, and the deposition rate is much higher than that of HiPIMS. The two can complement each other. The holes can be filled first in the HiPMIS mode, and then the thickness can be supplemented with the DC power supply. By switching the power supply mode, the purpose of uniform growth of the whole wafer can be achieved. After switching to the DC power supply, the coating speed is fast, the uniformity is good, the surface thickness consistency between the center and the edge is good, and the thickness of the overall film surface is consistent. In order to ensure the thickness uniformity of the whole piece for subsequent electroplating of copper and prevent phenomena such as residual copper film on the surface during chemical mechanical polishing. Further preferably, there is only one variable, the DC power, in the DC mode. In a standard copper sputtering process, no gas is flowed after successful ignition, and the sputtered copper ions are attracted back to the target for secondary sputtering. The DC power supply is preferably set to 18 kw, and the AC power supply is set to 200 w.

[0049] Among them, in the present invention, the target material is metallic copper. In the manufacturing process of advanced through-silicon via (TSV) or through-silicon via (TSV) technology, the aspect ratio can usually reach 5:1 or even higher, and the depth of the hole can reach dozens or even hundreds of micrometers. As the aspect ratio increases, the technical challenges in the manufacturing process will also increase accordingly. The metal seed layer formed by the conventional physical vapor deposition (PVD) method has a low step coverage rate inside the through-silicon via, especially in the through-silicon via or through-silicon via technology with a high aspect ratio, this problem is particularly prominent. Due to the structural characteristics of the through-silicon via or through-silicon via technology, it is often difficult to obtain a uniform and continuous seed layer coverage on its sidewalls and bottom; according to the method of the present invention, a uniform and continuous seed layer coverage can be achieved on the sidewalls and bottom; especially when filling trenches and holes with a high aspect ratio, a good filling effect can be obtained.

[0050] Refer to Figures 1-4 As shown, it is a schematic diagram of the comparison structure of the seed layer under different conditions after copper film plating. First, with the target material under the condition of a high-power impulse magnetron sputtering (HIPIMS) power supply, the sputtering parameters of the PVD chamber are controlled; then the power supply of the target material is switched to a DC power supply, and the sputtering parameters of the PVD chamber are controlled. Refer to Figures 5-8 As shown, compared with the traditional DC power supply mode (SEM picture - DC), HiPIMS can increase the sidewall coverage rate at the thinnest part by 60%, and at the same time, the hole bottom coverage rate can increase by up to 900%, which can effectively increase the thickness and continuity of the copper film grown inside the hole and prevent the occurrence of voids and other situations during subsequent chemical copper plating.

[0051] Refer to Figures 10-12 As shown, it is a schematic diagram of the structure of the seed layer obtained by controlling the sputtering parameters of the PVD chamber when the target material in the present invention is under the condition of a HIPIMS power supply and the minimum sidewall coverage rate of the seed layer copper film needs to be >1%: Ar is filled under vacuum conditions, the power is set to 12 kw, the average pulse current is 250 A, the pulse time is 100 us, the process pressure is 6.5 mT, and the AC power supply bias power is 150 w. When the film thickness at the center position of the wafer is 1190 nm, the film thickness at the edge position of the wafer is 950 nm, and the RSU% can reach 9.81%; then switch to the DC power supply and control the sputtering parameters of the PVD chamber: set the average power of the DC power supply to 18 kw and the AC power supply bias power to 200 w. When the film thickness at the edge position of the wafer is 2090 nm, the film thickness at the center position of the wafer is 2090 nm, and the RSU% can reach 1.22%. Specifically refer to Figure 10 and Figure 11As shown, where Avg is the average sheet resistance, 1sig is 1σ, which in the industry refers to the ratio of one standard deviation to the average value, and is the uniformity "U%" (the actual meaning is the non-uniformity NU%, but it is called the U value), rng refers to the ratio of the maximum value minus the minimum value to the average value, which is usually used to exclude single-point anomalies or to judge non-uniformity together with 1σ; through the above control process, since HiPMIS via filling shows excellent performance, and the DC-grown copper film shows better thickness uniformity across the whole piece, and at the same time the deposition rate is greatly increased compared with HiPIMS, the two can complement each other. The via can be filled first in the HiPMIS mode and then the thickness can be supplemented by DC to achieve the purpose of uniform growth of the whole wafer. This is to ensure the thickness uniformity of the whole wafer for subsequent copper electroplating and prevent phenomena such as the residue of the surface copper film during chemical mechanical polishing; it should be noted that this embodiment is particularly suitable for deep holes with a CD (Critical Dimension, here referring to the via opening diameter) of 18um, a depth of 180um, and an aspect ratio of 10:1, and the minimum sidewall coverage rate > 1%. In the present invention, HiPIMS (High Power Pulsed Magnetron Sputtering) grows slowly and has poor uniformity across the whole wafer, while the DC mode can well compensate for this; during subsequent chemical mechanical polishing, if the thickness of the copper film on the surface of the whole wafer is uneven (such as 3um at the center position and 2.5um at the edge position), it will lead to defects at the edge position, and there is still Cu film on the surface at the center position that is not polished clean, or even fragments.

[0052] In a preferred embodiment of the present invention, when the minimum sidewall coverage rate of the seed layer copper film needs to be 1.2%, and at the same time the bottom coverage rate can be greater than 30%, control the sputtering parameters of the PVD chamber: fill Ar under vacuum conditions, set the power to 12kw, the average pulse current to 500A, the pulse time to 50us, the process pressure to 10mT, and the AC power supply bias power to 150w.

[0053] In the present invention, the AC power supply uses a 13.56MHz AC power supply, which is applied to the heater. The AC power supply is used to provide a negative bias voltage to attract the ionized sputtered particles. By applying a negative bias voltage, the way to attract metal ions is increased, so that the perpendicularity of particle sputtering is better; that is to say, due to the negative bias voltage on the wafer surface, the ionized metal ions can be attracted, and their energy in the vertical direction is increased.

[0054] In the present invention, in steps S2 and S3, the wafer is cooled in real time by applying back pressure to the heater, as shown in Figure 17 During the coating process, overheating causes copper aggregation, which will lead to discontinuous copper film, and it is necessary to cool the wafer in real time by applying back pressure.

[0055] In the present invention, in step S2, the deposition rate of the copper film is controlled to be 50 - 100 nm / min; in step S3, the deposition rate of the copper film is controlled to be greater than 400 nm / min. In the present invention, it is further explained that the HiPIMS power supply greatly improves the ionization rate of the target metal, making the negative bias voltage generated by the AC power supply more effective, so as to greatly improve the bottom coverage rate and the step coverage rate under the attraction of a suitable negative bias voltage.

[0056] Example 2, a process method for growing a sputtered copper film using a high-frequency pulsed power supply, characterized by comprising the following steps:

[0057] Step S1: Provide a PVD chamber and a wafer. A target and a heater are arranged in the PVD chamber. The target is provided with a HIPIMS power supply and a DC power supply, and an AC power supply is arranged below the heater; the wafer is located on the heater.

[0058] Step S2: Under the condition of the HIPIMS power supply for the target, control the sputtering parameters of the PVD chamber: fill Ar under vacuum conditions, set the power to 12 kw, the average pulse current to 250 A, the pulse time to 100 us, the process pressure to 6.5 mT, and the bias power of the AC power supply to 150 w. Cool the wafer in real time by applying back pressure to the heater, and control the deposition rate of the copper film to be 95 nm / min.

[0059] Step S3: Switch the power supply of the target to the DC power supply, control the sputtering parameters of the PVD chamber: set the power of the DC power supply to 18 kw and the bias power of the AC power supply to 200 w until the chemical mechanical polishing of the copper plating layer is satisfied. Among them, the AC power supply uses a 13.56 MHz AC power supply and is applied to the heater. Cool the wafer in real time by applying back pressure to the heater, and control the deposition rate of the copper film to be greater than 400 nm / min.

[0060] In the present invention, a standard through-silicon via (TSV) technology process flow can be summarized as CVD (etching hard mask) - Litho (yellow light) - Etch (deep silicon etching) - CVD (insulating layer) - PVD (barrier adhesion layer + copper seed layer) - ECP (electroplating copper on the copper seed layer) - CMP (chemical mechanical polishing, grinding the surface copper flat to the CVD insulating layer to expose the via surface). The process of the present invention is carried out in PVD (barrier adhesion layer + copper seed layer); the purpose of using HIPIMS to fill the holes is to improve the bottom coverage and step coverage (the holes in TSV technology are usually very deep, and ordinary PVD is difficult to meet the requirements), forming a continuous copper seed layer with sufficient thickness, enabling the copper film during ECP to grow quickly and uniformly, and avoiding the generation of empty spaces in the vias; solving the problem that most current magnetron sputtering chambers are mostly used for planar coating, and their hole filling ability is poor, especially in the application scenarios with high aspect ratios, which cannot well meet the process requirements. The HIPIMS power supply greatly improves the ionization rate of sputtered atoms. Under the attraction of the negative bias voltage on the wafer surface, its collimation is greatly enhanced; at the same time, sufficient film-forming atoms at the bottom of the via further improve the step coverage of the sidewalls through the backsputtering effect.

[0061] For example, under the parameter conditions of this embodiment, referring to Figures 1-9 in the scanning electron microscope images, when the total coating thickness is similar, in the HiPIMS power supply mode, the thinnest in the middle can reach 40 nm, while in the traditional DC power supply mode, the thinnest thickness in the middle < 15 nm and the thickness is uneven.

[0062] Embodiment 3, a process method for growing a sputtered copper film using a high-frequency pulsed power supply, includes the following steps:

[0063] Step S1: Provide a PVD chamber and a wafer. A target and a heater are arranged in the PVD chamber. The target is provided with a HIPIMS power supply and a DC power supply, and an AC power supply is arranged below the heater; the wafer is located on the heater, and the target is metallic copper;

[0064] Step S2: When the target is under the HIPIMS power supply, control the sputtering parameters of the PVD chamber as follows: Fill Ar under vacuum conditions, set the power to 12 kw, the average pulse current to 500 A, the pulse time to 50 us, the process pressure to 10 mT, and the AC power supply bias power to 150 w, until the copper film thickness of the trenches / holes of the seed layer reaches the requirements for copper growth in the DC power supply mode, control the deposition copper film rate to be 50 - 100 nm / min. Under this condition, the thickness at the edge of the wafer can reach 950 nm, and the thickness at the center position of the wafer can reach 1190 nm;

[0065] Specifically: In terms of power setting, through a large number of experiments and optimizations, it is accurately set to 12 kW. This can not only endow the plasma with sufficient energy, enabling argon ions to have a powerful bombardment ability and ensuring that copper atoms are sputtered from the target at an appropriate rate, but also effectively avoid problems such as excessive target loss caused by too high power or instability of the plasma state.

[0066] The average pulse current is set to 500 A. During high-power pulsed magnetron sputtering, the magnitude of the pulse current has a direct and crucial impact on the number of copper atoms sputtered from the target during each pulse. It can ensure that an appropriate and stable number of copper atoms are excited within each pulse time, providing a strong guarantee for the uniform growth of the seed layer.

[0067] The pulse time is set to 50 μs. The high-energy pulse acts on the target, triggering an instantaneous and intense sputtering reaction, enabling copper atoms to be efficiently sputtered and deposited on the wafer surface under specific conditions. This pulse time works in synergy with other parameters to jointly shape the microstructure and performance characteristics of the seed layer.

[0068] The process pressure is maintained at 10 mT. A stable and appropriate pressure environment plays a decisive role in the stability and uniformity of the plasma. Under this pressure condition, the motion state of argon ions remains relatively stable, and their interaction with the target is more balanced, enabling the sputtered copper atoms to diffuse uniformly in the cavity and finally be accurately and uniformly deposited in the trenches / holes of the wafer, significantly improving the uniformity of the seed layer.

[0069] The AC power supply bias power is set to 150 W. The bias voltage provided by the AC power supply for the wafer can effectively adjust the electric field distribution on the wafer surface. An appropriate bias power can guide ions to bombard the wafer precisely at a specific angle and energy, greatly optimizing the deposition effect of the copper film in the trenches / holes of the wafer, prompting copper atoms to fill into each fine position of the trenches / holes more orderly and precisely, ensuring that the thickness of the seed layer is uniform and smoothly reaches the conditions required for copper growth in the DC power supply mode, generally requiring a thickness of more than 50 nm. Moreover, under this condition, through precise process control, the thickness at the edge of the wafer can reach 950 nm, and the thickness at the center position of the wafer can even reach 1190 nm, building a high-quality basic platform for subsequent copper growth in the DC power supply mode.

[0070] In addition, a stable deposition rate is of great significance for ensuring the consistency and stability of the seed layer quality, and can effectively avoid problems such as uneven thickness of the seed layer and structural defects caused by fluctuations in the deposition rate.

[0071] Step S3: Switch the power supply of the target to a DC power supply and control the sputtering parameters of the PVD chamber: Set the DC power supply power to 18 kW, and the AC power supply bias power to 200 W until the chemical mechanical polishing of the copper plating layer is satisfied. The AC power supply uses a 13.56 MHz AC power supply, which is applied to the heater, and the wafer is cooled in real time by applying back pressure to the heater. Control the deposition rate of the copper film to be greater than 400 nm / min. After this step, the thickness of the wafer edge can reach 2090 nm, and the thickness at the center position of the wafer can reach 2090 nm.

[0072] Set the DC power supply power to 18 kW. The relatively high power can provide continuous and stable energy output for the target, prompting the target to sputter copper atoms continuously, stably and efficiently, greatly accelerating the growth rate of the copper plating layer, and meeting the efficiency requirements of large-scale production. At the same time, finely adjust the AC power supply bias power to 200 W to further optimize the bombardment energy and angle of ions on the wafer, and comprehensively improve the uniformity and overall quality of the copper plating layer.

[0073] Refer to Figures 12-16 As shown, at this stage, through the coordinated operation of optimized process control and advanced equipment, the deposition rate of the copper film is significantly increased and stably maintained at greater than 400 nm / min. The high-speed and stable deposition rate not only greatly shortens the growth cycle of the copper plating layer, but also enables efficient production while ensuring quality. After the process treatment at this stage, the thickness of the wafer edge has been successfully increased by 2090 nm, and the thickness at the center position of the wafer has also increased by 2090 nm. It should be noted that the 2090 nm here is the copper film grown by using DC alone, not the composite film with HIPIMS. The entire copper plating layer has reached an extremely excellent level in terms of thickness, uniformity and structural integrity, fully meeting the stringent requirements of the subsequent chemical mechanical polishing process.

[0074] At present, most magnetron sputtering chambers have obvious limitations in application. Their application scenarios are mostly concentrated in planar coating, and they perform poorly in hole filling ability. Especially in application scenarios with high aspect ratios, it is difficult to meet the increasingly strict process requirements. However, this process has successfully broken through these bottlenecks by adopting the switching mode of HIPIMS power supply and DC power supply.

[0075] Due to its unique working mechanism, the HIPIMS power supply greatly improves the ionization rate of sputtered atoms. Attracted by the negative bias voltage on the wafer surface, the collimation of ions is significantly enhanced, and they can reach the trench / hole parts on the wafer surface more accurately. At the same time, sufficient film-forming atoms at the bottom of the through-hole further improve the step coverage rate of the sidewall through backsputtering, showing excellent performance in hole filling.

[0076] When growing copper film, the DC power supply performs excellently in terms of thickness uniformity of the entire wafer, and the deposition rate is greatly improved compared to the HIPIMS power supply. The two complement each other. By first using the HIPIMS mode for hole filling operations to build a good seed layer foundation, and then switching to the DC mode to supplement the thickness, the goal of uniform growth of the entire wafer can be achieved. This not only provides a strong guarantee for the uniformity of the thickness of the entire wafer in subsequent electroplating copper, but also effectively prevents surface copper film residues, dish-shaped defects and other undesirable phenomena during chemical mechanical polishing, and comprehensively improves product quality and production efficiency.

[0077] The technical principle of the present invention is described above in combination with the specific embodiments, which are only preferred implementations of the present invention. The protection scope of the present invention is not limited to the above embodiments, and all technical solutions under the idea of ​​the present invention belong to the protection scope of the present invention. Those skilled in the art can think of other specific implementations of the present invention without creative work, and these methods will fall within the protection scope of the present invention.

Claims

1. A process for growing a sputtered copper film using a high-frequency pulsed power supply, characterized in that, Including the following steps: Step S1: Provide a PVD chamber and a wafer. A target and a heater are arranged in the PVD chamber. The target is provided with a HIPIMS power supply and a DC power supply, and an AC power supply is arranged below the heater; the wafer is located on the heater. Step S2: When the target is under the HIPIMS power supply, control the sputtering parameters of the PVD chamber as follows: Fill Ar under vacuum conditions, set the power to 12 kw, the average pulse current to 500 A, the pulse time to 50 us, the process pressure to 10 mT, and the AC power supply bias power to 150 w. Until the copper film thickness in the grooves / holes of the seed layer reaches the requirement for copper growth in the DC power supply mode, control the deposition rate of the copper film to be 50 - 100 nm / min. Step S3: Switch the power supply of the target to the DC power supply, and control the sputtering parameters of the PVD chamber: Set the DC power supply power to 18 kw and the AC power supply bias power to 200 w until the requirements for chemical mechanical polishing of the copper plating layer are met. Among them, the AC power supply uses a 13.56 MHz AC power supply, which is applied to the heater. By applying back pressure to the heater to cool the wafer in real time, control the deposition rate of the copper film to be greater than 400 nm / min.

2. The process method for growing a sputtered copper film using a high-frequency pulsed power supply as described in claim 1, characterized in that, The target is metallic copper.

3. A process for growing a sputtered copper film using a high-frequency pulsed power supply as described in claim 1, characterized in that, The AC power supply is used to provide a negative bias voltage to attract the ionized sputtered particles.

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