Grid-connected inverter transient synchronous stability control method based on frequency compensation

Abstract

The invention relates to a grid-connected inverter transient synchronous stability control method based on frequency compensation, belongs to the technical field of power electronics, and aims to solve the transient stability problem of a grid-connected inverter caused by synchronization loss of a phase-locked loop when the voltage of a power grid is seriously failed. According to the method, the phase angle of the grid-connected point voltage is obtained through a phase-locked loop, the difference value between the output frequency of the phase-locked loop and the rated frequency of a power grid is calculated, the difference value is input into a low-pass filter for filtering processing, and the difference value is multiplied by K for gain. And feeding back to the phase-locked loop, and controlling the output frequency of the grid-connected inverter to be synchronous with the frequency of the power grid. The method can effectively improve the transient synchronization stability of the grid-connected inverter when the voltage of the power grid is seriously faulted, and ensures the safe and reliable operation of a grid-connected system.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics and relates to a transient synchronization stability control method of a grid-connected inverter based on frequency compensation. Background Art

[0002] With the rapid development of new energy, grid-connected inverters are being used more and more widely in power systems.

[0003] Grid-connected inverters can convert distributed energy or renewable energy into high-quality AC power, and connect it to the power grid to provide power support for the grid.

[0004] However, the power grid operating environment is complex and there are various failure risks, such as voltage drops and frequency fluctuations.

[0005] These faults will affect the operational stability of the grid-connected inverter and may even cause the grid-connected inverter to become unstable, posing a threat to the safety of the power grid.

[0006] Therefore, it is of great significance to study the transient synchronization stability control method of grid-connected inverters during power grid faults.

[0007] The existing grid-connected inverter transient synchronization stability control methods mainly have the following problems:

[0008] Direct freezing of the phase-locked loop control method: This method is simple and easy to implement, but it cannot guarantee stable operation of the system when the grid frequency deviates.

[0009] Freezing the integral link of the phase-locked loop method: This method requires pre-setting the parameters of the integral link, and cannot restore the system to synchronous transient stability when there is no static operating point after a fault.

[0010] Frozen phase-locked loop integral link feedforward compensation method: The compensation amount calculation process of this method is complicated, and it is difficult to ensure that the system can maintain stable operation under all fault conditions.

[0011] Voltage adjustment method based on phase-locked loop output: The feedback coefficient design of this method is relatively complex, and it is difficult to effectively suppress the impact of grid voltage drop on the system.

[0012] Voltage normalized phase-locked loop control method: This method can improve the transient synchronization stability of the system, but it still cannot restore the stable state when there is no stable equilibrium point in the system.

[0013] In summary, the existing transient synchronization stability control method of the grid-connected inverter still has certain limitations and cannot effectively solve the system instability problem caused by phase-locked loop loss of synchronization when the grid voltage fails seriously.

[0014] Therefore, the present invention aims to provide a method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation to solve the problems existing in the prior art. Summary of the invention

[0015] In view of this, the purpose of the present invention is to provide a method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation. The present invention establishes a transient synchronization stability model of a grid-connected inverter, analyzes the relationship between the steady-state point and the output frequency of the grid-connected system, and the influence of the steady-state point on the synchronization stability of the transient system, and proposes a method for improving transient synchronization stability with output frequency compensation. In view of the problem of transient system instability caused by the lack of a steady-state point, an FC-PLL control method based on frequency compensation is proposed. At the output frequency, feedback is introduced through a low-pass filter (LPF) to effectively increase the output frequency of the original system, so that the system that originally could not reach the preset frequency at the maximum allowable deviation angle can reach the preset frequency at this point, and then the system maintains stable operation. At the same time, this article also designs the cutoff frequency of the LPF and the gain coefficient of the feedback system.

[0016] In order to achieve the above object, the present invention provides the following technical solutions:

[0017] A method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation comprises the following steps:

[0018] Step 1: Obtain the phase angle of the grid connection point voltage through a phase-locked loop;

[0019] Step 2: Calculate the difference between the phase-locked loop output frequency and the grid rated frequency;

[0020] Step 3: Input the difference obtained in step 2 into a low-pass filter for filtering;

[0021] Step 4: Add the filtered result of step 3 to the phase-locked loop output frequency to obtain the compensated output frequency;

[0022] Step 5: Feedback the compensated output frequency obtained in step 4 to the phase-locked loop to control the output frequency of the grid-connected inverter to be synchronized with the grid frequency.

[0023] Furthermore, the low-pass filter is a low-pass filter with an adjustable cut-off frequency.

[0024] Furthermore, the phase-locked loop is a synchronous reference frame phase-locked loop SRF-PLL.

[0025] Furthermore, the difference obtained in step 2 is further multiplied by a preset gain coefficient.

[0026] Furthermore, the preset gain coefficient is a positive value or a negative value.

[0027] A grid-connected inverter, comprising:

[0028] Phase-locked loop, used to obtain the phase angle of the grid connection point voltage;

[0029] The frequency compensation module is used to calculate the difference between the phase-locked loop output frequency and the rated frequency of the power grid, and input the difference into a low-pass filter for filtering to obtain a compensated output frequency;

[0030] The feedback module is used to feed back the compensated output frequency to the phase-locked loop to control the output frequency of the grid-connected inverter to keep synchronization with the grid frequency.

[0031] Furthermore, the low-pass filter is a low-pass filter with an adjustable cut-off frequency.

[0032] Furthermore, the phase-locked loop is a synchronous reference frame phase-locked loop SRF-PLL.

[0033] Furthermore, the frequency compensation module further includes a multiplier for multiplying the difference obtained in step 2 by a preset gain coefficient.

[0034] Furthermore, the preset gain coefficient is a positive value or a negative value.

[0035] The beneficial effects of the present invention are:

[0036] (1) Frequency compensation can prevent the phase-locked loop from losing synchronization when the grid voltage fails seriously, thereby ensuring that the output frequency of the grid-connected inverter remains synchronized with the grid frequency and improving the transient synchronization stability of the system.

[0037] (2) This method enables the grid-connected inverter to maintain stable operation when the grid voltage drops below 0.5pu, effectively improving its low voltage ride-through capability.

[0038] (3) By improving the transient synchronization stability of the grid-connected inverter, the instability of the grid-connected system caused by power grid failure can be effectively avoided, thereby improving the reliability of the grid-connected system.

[0039] (4) This method only requires adding a frequency compensation module at the output end of the phase-locked loop. The control method is simple and easy to implement in engineering.

[0040] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

[0042] Figure 1 This is the structure diagram of the grid-connected inverter;

[0043] Figure 2 is the equivalent circuit of the grid-connected inverter;

[0044] Figure 3 is the equivalent block diagram of SRF-PLL;

[0045] Figure 4 When the grid voltage drops, δ and U g sinδ curve;

[0046] Figure 5 It is the phase angle difference and output frequency when the grid voltage drops to 0.2pu;

[0047] Figure 6 The grid current and grid voltage when the grid voltage drops to 0.2pu;

[0048] Figure 7 It is the phase angle difference and output frequency when the grid voltage drops to 0.3pu;

[0049] Figure 8 The grid current and grid voltage when the grid voltage drops to 0.3pu;

[0050] Fig. 9 It is the control block diagram of the transient synchronization stability improvement method;

[0051] Fig.10 A simplified block diagram of the transient synchronization stability improvement method is provided;

[0052] Fig.11 is the phase trajectory of the transient model under different K values;

[0053] Fig.12 is the PLL output frequency in the simulation model;

[0054] Fig.13 To maintain the grid voltage at 1pu, Lg = 8mH, grid voltage Vpcc waveform;

[0055] Fig.14 The grid voltage is kept at 1pu, Lg = 8mH, and the grid current Ipcc waveform;

[0056] Fig.15 To keep the grid voltage at 1pu, Lg = 8mH, the phase-locked loop output frequency f waveform;

[0057] Fig.16The grid voltage drops to 0.2pu at 0.5s, Lg = 8mH, and the grid voltage Vpcc waveform;

[0058] Fig.17 The grid voltage drops to 0.2pu at 0.5s, Lg = 8mH, and the grid voltage Ipcc waveform;

[0059] Fig.18 The grid voltage drops to 0.2pu at 0.5s, Lg = 8mH, and the phase-locked loop output frequency f waveform;

[0060] Fig.19 The grid voltage drops to 0.2pu at 0.5s, Lg = 8mH, and the grid voltage Vpcc waveform;

[0061] Fig. 20 The grid voltage drops to 0.2pu at 0.5s, Lg = 8mH, and the grid voltage Ipcc waveform;

[0062] Fig.21 The grid voltage drops to 0.2pu at 0.5s, Lg=8mH, and the phase-locked loop outputs the frequency f waveform. DETAILED DESCRIPTION

[0063] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0064] Among them, the drawings are only used for illustrative explanations, and they only represent schematic diagrams rather than actual pictures, and should not be understood as limitations on the present invention. In order to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.

[0065] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "front", "rear", etc. indicate the orientation or position relationship, they are based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0066] 1 Analysis of transient synchronization stability of grid-connected inverter

[0067] 1.1 Grid-connected inverter transient model

[0068] The structural block diagram and control block diagram of the grid-connected inverter are as follows: Figure 1 As shown in the figure: U g ∠U g Indicates the grid voltage; U pcc ∠U pcc Indicates the grid connection point voltage; I pcc Indicates the grid-connected point current; Z∠θ Z Indicates the grid impedance (Z∠θ Z =R g +jX g ), where R g Indicates the grid resistance (Z g cosθ Z ), X g Indicates the grid inductive reactance (Z g sinθ Z );L f Inductance measurement for inverter; L g ′ is the grid-connected inductance; C represents the filter capacitor; U dc The inverter collects the phase angle θ of the grid-connected voltage through the synchronous reference frame PLL (SRF-PLL). PLL , the block diagram of SRF-PLL is as follows Figure 1 As shown in the blue box. P Represents the proportional gain of the PI controller; K i Indicates the integral gain of the PI controller; U pccd Represents the d-axis component of the grid-connected point voltage; U pccq Represents the q-axis component of the grid-connected point voltage; ω g Indicates the rated angular frequency; I dq It represents the current obtained by dq transformation of the grid-connected point current; Idq * It indicates the current reference value obtained by dq transformation of the grid-connected point current.

[0069] The current loop bandwidth is relatively higher than the phase-locked loop bandwidth, usually several dozen times higher. Therefore, the transient stability of the grid-connected inverter is determined by the characteristics of the phase-locked loop, and the current loop can be regarded as a unit gain in the entire system. Figure 2 As shown, where: It represents the power factor angle, and also represents the angle difference between the voltage and current at the PCC point. When the grid-connected inverter is in stable operation, the output angle of the phase-locked loop is equal to the voltage angle at the grid-connected point, that is, θ PLL =θ pcc .

[0070] according to Figure 1 From the SRF-PLL block diagram in the figure, we can get the output angle of the phase-locked loop:

[0071] θ PLL =∫((K p +K i ∫)(V pccq )+ω g ) (1)

[0072] Let the difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage be δ, then:

[0073] δ=θ PLL -θ g (2)

[0074] according to Figure 2 The equivalent block diagram can be obtained:

[0075]

[0076] Combining equations (1), (2), and (3), we can obtain:

[0077]

[0078] Substituting the impedance Z = R + jωL into (4), we can obtain:

[0079] δ=∫(K p +K i ∫)(I d ω g L g +I d ΔωL g +I q R g -U g sinδ) (5)

[0080] According to formula (5), the equivalent block diagram of SRF-PLL can be obtained as follows: Figure 3 shown.

[0081] If the grid-connected system is to remain stable, it needs to have:

[0082] I d ω g L g +I q R g =V g sinδ (6)

[0083] The steady-state value δ0 of the grid-connected system can be obtained from equation (6):

[0084]

[0085] 1.2 Impact of grid voltage drop on grid-connected systems

[0086] When the grid voltage drops, the working point of the grid-connected system moves from point a to point b. Figure 4 shown.

[0087] Figure 4 The blue line in the middle shows the relationship between δ and U before the grid voltage drops. g The corresponding curve of sinδ, the red line shows the relationship between δ and U after the grid voltage drops g When the grid-connected inverter is running stably, the entire grid-connected system is at the steady-state point a, where I d =I m , I q =0, the phase angle difference between PLL and the power grid is δ0,

[0088]

[0089] When the grid voltage drops (assuming it drops below 0.5 pu), the system operating point moves from point a to point b, I d =0,I q =-I m ; At this time -I m R g gfault sinδ0, the output frequency decreases and the phase difference decreases.

[0090] When it reaches point c, U gfault sinδ=-I m R g ; At this time, the phase-locked loop output frequency is lower than the grid frequency, and the phase difference δ continues to decrease;

[0091] Between points c and d, -I m R g >U​gfault sinδ, the output frequency starts to increase, and two situations will occur:

[0092] 1. There is a point e, which makes the output frequency of the phase-locked loop equal to the grid frequency. After several cycles of oscillation, the system finally reaches stability.

[0093] 2. Until the working point moves to point d, there is still no working point where the phase-locked loop output frequency is equal to the grid frequency. After exceeding point d, there is -I m R g gfault sinδ, the output frequency will continue to decrease and the system will eventually become unstable.

[0094] From the above analysis, we can see that when the working point reaches point c, there exists:

[0095]

[0096] The symmetry of trigonometric functions can give the angle difference at point d:

[0097] δ d = -pi - δ c (10)

[0098] Based on the above analysis, simulation modeling is carried out with the following parameters: the grid impedance is L g =8mH, R g =2.5Ω; proportional gain K of the phase-locked loop PI controller p =0.2; integral gain K of the phase-locked loop PI controller i =57.1; AC side voltage U g =110*sqrt(2). The grid voltage is simulated to drop from 1pu to 0.2pu and 0.3pu respectively:

[0099] Through Figure 5 and Figure 6 Through analysis, it can be found that at point d of the system (i.e., the maximum angle difference allowed for the system to reach a steady state), the output frequency of the PLL still fails to follow the grid, and the output frequency continues to decrease, and the grid-connected system eventually becomes unstable. Figure 7 and Figure 8 After analysis, the system has a steady-state operating point at an angle difference of -1.15 and an output frequency of 50Hz, and the grid-connected system can finally operate stably. Through the above theoretical and simulation results analysis, it can be found that whether there is a steady-state point has a great impact on the grid-connected system facing a serious drop in grid voltage. If there is a steady-state point, the grid-connected system can eventually reach a steady state; if there is no steady-state point, the grid-connected system will eventually become unstable. Whether the output frequency can reach the rated frequency of the grid is a very critical factor here.

[0100] ​2 Methods to improve transient synchronization stability

[0101] According to the description in Section 1.2, changing the PLL structure and adding frequency compensation at the output frequency can help improve the transient synchronization stability of the grid-connected system. Based on the above content, this paper proposes a PLL control method based on frequency compensation, where LPF represents a low-pass filter and M represents a gain coefficient. Fig. 9 shown.

[0102] 2.1 System Modeling

[0103] Through Fig. 9 After analysis, there are:

[0104]

[0105] Since in formula (11) is a constant; Will Fig. 9 The structural block diagram is simplified, the feedback point is moved, and the angular frequency difference Δω is used as the feedback amount to obtain a simplified block diagram, as shown in Fig.10 shown.

[0106] according to Fig.10 The dynamic equation based on the frequency compensated phase-locked loop can be obtained.

[0107] δ=∫(K p +K i ∫)(V pccq )+∫X (12)

[0108] In the figure, X can be expressed as:

[0109]

[0110] By transforming (13), we can obtain:

[0111]

[0112] Differentiating equation (14), we can obtain:

[0113]

[0114] Depend on Figure 3 It can be seen that:

[0115]

[0116] Combining equations (5), (15), and (16), we can obtain

[0117]

[0118] 2.2 Transient Synchronization Model

[0119] When the line impedance is purely inductive, let R g =0,I d =I m ,I q =0; Formula (17) can be expressed as:

[0120]

[0121] Simplifying formula (18), we can get The expression is:

[0122]

[0123] 2.3 Transient stability analysis

[0124] In order to study the influence of the phase-locked loop control method based on frequency compensation on transient stability, the steady-state value of the grid voltage at the moment of severe fault is taken as the initial value of the system. Equations (15), (16) and (19) are solved simultaneously to obtain the differential equations. The phase trajectory diagram after the grid voltage drops is plotted based on the obtained data solution.

[0125] To verify the above theory, a grid-connected inverter model is built to simulate the grid voltage dropping from 1pu to 0.2pu. The system parameters are as follows: The grid impedance (here only the inductance is used as an example) is L g =8mH; other circuit parameters are the same as above. According to the above parameters, solve the differential equations established by combining equations (15), (16) and (19); we can get the phase trajectory diagram corresponding to different K values ​​under the condition that the filter cutoff frequency is 1Hz, as shown in Fig.11 As shown. Figure 7 The following conclusions can be drawn: Without frequency compensation (K = 0), δ will not converge, the phase-locked loop output frequency will diverge, and it will not reach the steady-state value, and the grid-connected system will eventually become unstable. When K takes an appropriate value (for example, K = -1.5, K = -3), the phase-locked loop structure based on frequency compensation control can enable the grid-connected system to maintain steady-state operation when the power grid drops severely.

[0126] To further verify the reliability of the theory, a simulation model was built according to the model parameters, and the filter cutoff frequency was also set to 1 Hz. Different K values ​​were selected, and the output frequency diagram of the phase-locked loop in the simulation model was finally obtained, as shown in Figure 2. Fig.12 shown.

[0127] Through Fig.12From the analysis, it can be found that the PLL output results of the simulation model are consistent with the theoretical analysis results of the frequency-compensated phase-locked loop structure, which further verifies the effectiveness of the proposed frequency-compensated phase-locked loop structure. In summary, in the case of severe grid voltage failure, the reasonable selection of the feedback loop gain K and the filter cutoff frequency α can effectively improve the synchronization stability of the grid-connected system.

[0128] 3 Experimental verification

[0129] In order to verify the effectiveness and reliability of the theoretical analysis, a simulation experiment was carried out. Figure 1 The grid-connected inverter model shown has the following system parameters: AC side voltage U grate =110*sqrt(2)V; DC side voltage U dcrate =400V; LCL filter parameters: inverter side inductor L f =3.5e-3H;;Filter capacitor C=50e-6F;Grid-connected inductor L g′ =1.75e-3H; rated angular frequency ω g =100πrad / s; proportional gain K of the phase-locked loop PI controller p =0.2; integral gain K of the phase-locked loop PI controller i =57.1, the grid impedance is L g =8mH.

[0130] Purely inductive grid impedance experiment:

[0131] When the grid voltage drops from 1pu to 0.2pu, the experimental results are as follows Figures 13 to 21 As shown in the figure: Ipcc, Vpcc, and f represent the grid-connected current, grid-connected voltage, and output frequency, respectively. Figure 13 to Figure 15 There is no voltage drop. Figure 16 to Figure 18 There is a voltage drop, and there is no method in the present invention. Figure 19 to Figure 21 In order to prevent voltage drop, there is a method in the present invention.

[0132] Figure 13 to Figure 18 It is a waveform generated by traditional SRF-PLL. It can be found that when the grid voltage does not drop, the grid-connected inverter can be stably connected to the grid, the grid voltage can be stabilized at around 155V, the grid current is stable at 10A, and the phase-locked loop output frequency can be stably output at 50Hz. When the grid voltage drops to 0.2pu at 0.5s, it can be observed that the grid current and grid voltage cannot be stabilized, the phase-locked loop output frequency diverges, and the grid-connected inverter cannot be stably connected to the grid.

[0133] Figure 19 to Figure 21It is a waveform generated by FC-PLL (K=-3, α=3 is selected in the experiment). It can be found that when the grid voltage does not drop, the grid-connected inverter can be stably connected to the grid, the grid voltage can be stabilized at around 30V, the grid current can be stabilized at 10A, and the phase-locked loop output frequency can be stably output at 50Hz.

[0134] By comparing the output waveforms in different situations, when SRF-PLL cannot achieve transient stability, FC-PLL can maintain transient stability and effectively improve transient stability, further verifying the effectiveness of the proposed FC-PLL.

[0135] 4 Conclusion

[0136] This paper analyzes the dynamic process of phase angle difference and output frequency of the grid-connected inverter when the grid fails, and based on this, establishes a phase-locked loop control structure based on frequency compensation. The proposed FC-PLL can provide a suitable gain coefficient and filter cutoff frequency to ensure the system continues to operate stably when the grid fails seriously and the system does not have a steady-state operating point. Finally, a simulation experiment is carried out to verify the results of theoretical analysis and simulation.

[0137] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the present invention.

Claims

1. A method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation, characterized in that: The following steps are involved: Step 1: Obtain the phase angle of the grid connection point voltage through a phase-locked loop; Step 2: Calculate the difference between the phase-locked loop output frequency and the grid rated frequency; Step 3: Input the difference obtained in step 2 into a low-pass filter for filtering; Step 4: Add the filtered result of step 3 to the phase-locked loop output frequency to obtain the compensated output frequency; Step 5: Feedback the compensated output frequency obtained in step 4 to the phase-locked loop to control the output frequency of the grid-connected inverter to be synchronized with the grid frequency.

2. The method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation according to claim 1, characterized in that: The low-pass filter is a low-pass filter with adjustable cut-off frequency.

3. The method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation according to claim 1, characterized in that: The phase-locked loop is a synchronous reference frame phase-locked loop SRF-PLL.

4. The method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation according to claim 1, characterized in that: The difference obtained in step 2 is further multiplied by a preset gain coefficient.

5. The method for controlling transient synchronization stability of a grid-connected inverter based on frequency compensation according to claim 4, characterized in that: The preset gain coefficient is a positive value or a negative value.

6. A grid-connected inverter, characterized in that: include: Phase-locked loop, used to obtain the phase angle of the grid connection point voltage; The frequency compensation module is used to calculate the difference between the phase-locked loop output frequency and the rated frequency of the power grid, and input the difference into a low-pass filter for filtering to obtain a compensated output frequency; The feedback module is used to feed back the compensated output frequency to the phase-locked loop to control the output frequency of the grid-connected inverter to keep synchronization with the grid frequency.

7. The grid-connected inverter according to claim 6, characterized in that: The low-pass filter is a low-pass filter with adjustable cut-off frequency.

8. The grid-connected inverter according to claim 6, characterized in that: The phase-locked loop is a synchronous reference frame phase-locked loop SRF-PLL.

9. The grid-connected inverter according to claim 6, characterized in that: The frequency compensation module further includes a multiplier for multiplying the difference obtained in step 2 by a preset gain coefficient.

10. The grid-connected inverter according to claim 9, characterized in that: The preset gain coefficient is a positive value or a negative value.

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