DSOGI phase-locked loop control method, system and device and storage medium

Abstract

The invention discloses a DSOGI phase-locked loop control method, system and device and a storage medium, and the method comprises the steps: converting an obtained three-phase power grid voltage signal into a two-phase quadrature voltage signal, processing the two-phase quadrature voltage signal through SOGI, generating a plurality of quadrature components, carrying out the positive and negative sequence separation of the quadrature components, and carrying out the phase-locked loop control. And obtaining separated positive and negative sequence components. Then, receiving two-phase orthogonal voltage signals, a positive sequence component, a negative sequence component and the angular velocity of a DSOGI phase-locked loop through a positive and negative phase sequence switching selection unit; based on a preset judgment condition, the unit can select one of a two-phase orthogonal voltage signal, a positive-sequence component and a negative-sequence component to execute closed-loop phase locking operation, self-adaption of positive and negative phase sequences is achieved, and the unit can adapt to a wide frequency range and adapt to the situation that unbalanced power grid voltage contains higher harmonics.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic converter control, and in particular to a DSOGI phase-locked loop control method, system, device and storage medium. Background Art

[0002] In single-phase and three-phase AC power systems, in order to simplify control, closed-loop control is usually performed in the dq coordinate system, which requires accurate grid phase information. The accuracy of phase locking affects the accuracy of loop control, which also puts higher requirements on the phase-locked loop.

[0003] The commonly used three-phase phase-locked loop structure is the synchronous coordinate system software phase-locked loop (SRF-PLL). This phase-locked loop structure has simple control, fast response speed, and can adapt to a wide frequency range. However, when the grid voltage is unbalanced and the grid voltage contains high-order harmonics, the phase-locked result of the SRF-PLL has a large error.

[0004] In order to overcome the problem of inaccurate phase locking of SRF-PLL when the grid voltage is unbalanced and the grid voltage contains high-order harmonics, a dual second-order generalized integrator phase-locked loop (DSOGI-PLL) is usually used to achieve phase locking. This SOGI-based phase-locked method separates the positive and negative sequence voltage vectors in the grid voltage and extracts the positive sequence component, thereby removing the influence of grid voltage imbalance and high-order harmonics. However, this phase-locked loop structure cannot be applied when the grid voltage phase sequence is negative, and the second-order generalized integrator structure is equivalent to a bandpass filter with a variable center frequency on the loop, which has a certain impact on the bandwidth. Summary of the invention

[0005] The purpose of the present invention is to address the technical problems existing in the background technology and to propose a DSOGI phase-locked loop control method, system, device and storage medium.

[0006] In order to achieve the above technical objectives, the technical solution adopted by the present invention is as follows:

[0007] A first implementation of the first aspect of the present invention provides a DSOGI phase-locked loop control method, which includes a SOGI and a positive and negative phase sequence switching selection unit. The DSOGI phase-locked loop control method includes:

[0008] S101, obtaining a three-phase grid voltage signal, and converting the three-phase grid voltage signal into a two-phase orthogonal voltage signal;

[0009] S102, using SOGI to receive and process two-phase orthogonal voltage signals to obtain multiple orthogonal components;

[0010] S103, performing positive-sequence and negative-sequence separation on the orthogonal components to obtain positive-sequence components and negative-sequence components;

[0011] S104, using the positive and negative phase sequence switching selection unit to receive the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop, and based on the preset judgment conditions, select one between the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component for performing closed-loop phase locking.

[0012] Optionally, in a second implementation of the first aspect of the present invention, a collection circuit and a Clark change unit are further included, and S101 includes:

[0013] The three-phase grid voltage signal is acquired by using an acquisition circuit, wherein the three-phase grid voltage signal includes a voltage signal Ua, a voltage signal Ub and a voltage signal Uc;

[0014] The three-phase grid voltage signal is transmitted to the Clark transformation unit, and is processed and transformed by the Clark transformation unit to obtain a two-phase orthogonal voltage signal, wherein the two-phase orthogonal voltage signal includes a voltage signal V α And the voltage signal V β .

[0015] Optionally, in a third implementation of the first aspect of the present invention, two SOGIs are provided, and S102 includes:

[0016] Two SOGIs are used to receive and process the voltage signal Vα and the voltage signal Vβ respectively to obtain four orthogonal components, wherein the four orthogonal components are v' α 、v' β ,qv' α And qv' β , v' α is the voltage signal V α The first-order voltage hysteresis signal, qv' α v' α The quadrature signal, v' β is the voltage signal V β The first-order voltage hysteresis signal, qv' β v' β orthogonal signals.

[0017] Optionally, in a fourth implementation of the first aspect of the present invention, S103 includes:

[0018] V' α 、v' β ,qv' α And qv' β Separate the positive and negative sequences to obtain positive sequence components and negative sequence components, where the positive sequence component includes the positive phase sequence component. and positive phase sequence components Negative sequence components include negative phase sequence components and negative phase sequence component

[0019] Optionally, in a fifth implementation of the first aspect of the present invention, SOGI is also used to receive and process the angular velocity of a DSOGI phase-locked loop, wherein the angular velocity of the DSOGI phase-locked loop entering SOGI for processing takes an absolute value.

[0020] Optionally, in a sixth implementation of the first aspect of the present invention, the transfer function of SOGI is:

[0021]

[0022] Where k is the damping factor, ω' is the estimated value of the grid voltage, and s is the Laplace operator.

[0023] Optionally, in a seventh implementation of the first aspect of the present invention, the judgment condition in S104 includes:

[0024] Determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0025] If the angular velocity of the DSOGI phase-locked loop is stable, the voltage signal V α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0026] If the angular velocity of the DSOGI phase-locked loop is not stable, determine whether the angular velocity of the DSOGI phase-locked loop is greater than 0;

[0027] If the angular velocity of the DSOGI phase-locked loop is greater than 0, the voltage signal V α With positive phase sequence component Whether the phase error between them is lower than the stable value;

[0028] If the voltage signal V α With positive phase sequence component If the phase error between α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0029] If the voltage signal V α With positive phase sequence component If the phase error between And the positive phase sequence component Execute phase-locked loop;

[0030] If the angular velocity of the DSOGI phase-locked loop is less than 0, the voltage signal V α With negative phase sequence component Whether the phase error between them is lower than the stable value;

[0031] If the voltage signal V α With negative phase sequence component If the phase error between α And the voltage signal V β Perform closed-loop phase-locked loop closure and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0032] If the voltage signal V α With negative phase sequence component If the phase error between And the negative phase sequence component Perform phase-locked loop closure.

[0033] A first implementation of the second aspect of the present invention provides a DSOGI phase-locked loop control system, which includes a SOGI and a positive and negative phase sequence switching selection unit, and the DSOGI phase-locked loop control system also includes:

[0034] A conversion module is used to obtain a three-phase grid voltage signal and convert the three-phase grid voltage signal into a two-phase orthogonal voltage signal;

[0035] A SOGI processing module, used for receiving and processing two-phase orthogonal voltage signals using SOGI to obtain a plurality of orthogonal components;

[0036] A separation module is used to separate the positive and negative sequences of the orthogonal components to obtain positive sequence components and negative sequence components;

[0037] The closed-loop module is used to receive the two-phase orthogonal voltage signal, the positive-sequence component, the negative-sequence component and the angular velocity of the DSOGI phase-locked loop using the positive-negative phase sequence switching selection unit, and based on preset judgment conditions, select one between the two-phase orthogonal voltage signal, the positive-sequence component and the negative-sequence component for executing closed-loop phase locking.

[0038] A first implementation of the third aspect of the present invention provides a DSOGI phase-locked loop control device, the DSOGI phase-locked loop control device comprising: a memory and at least one processor, the memory storing instructions, the memory and the at least one processor being interconnected via a line;

[0039] The at least one processor calls the instruction in the memory so that the DSOGI phase-locked loop control device executes the DSOGI phase-locked loop control method as described in any one of the first aspects of the present invention.

[0040] A first implementation method of the fourth aspect of the present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the DSOGI phase-locked loop control method as described in any one of the first aspects of the present invention is implemented.

[0041] Compared with the prior art, the present invention has the following beneficial technical effects: by converting the acquired three-phase grid voltage signal into a two-phase orthogonal voltage signal, using SOGI to process the two-phase orthogonal voltage signal, generating multiple orthogonal components, and performing positive and negative sequence separation on these orthogonal components, the separated positive and negative sequence components are obtained. Then, the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop are received through the positive and negative phase sequence switching selection unit. Based on the preset judgment conditions, the unit will select one from the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component to perform a closed-loop phase-locked operation, realize adaptive positive and negative phase sequence, adapt to a wide frequency range, and adapt to the situation where the grid voltage is unbalanced and contains high-order harmonics. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A schematic diagram of a first embodiment of a DSOGI phase-locked loop control method according to an embodiment of the present invention;

[0043] Figure 2 Schematic diagram of a second embodiment of a DSOGI phase-locked loop control method in an embodiment of the present invention;

[0044] Figure 3 Schematic diagram of a seventh embodiment of a DSOGI phase-locked loop control method according to an embodiment of the present invention;

[0045] Figure 4 A schematic diagram of an embodiment of a DSOGI phase-locked loop control system in an embodiment of the present invention;

[0046] Figure 5 A schematic diagram of an embodiment of a DSOGI phase-locked loop control device in an embodiment of the present invention;

[0047] Figure 6 It is an overall control block diagram of the DSOGI phase-locked loop control method used in the embodiment of the present invention;

[0048] Figure 7 Schematic diagram of the structure of SOGI in an embodiment of the present invention. DETAILED DESCRIPTION

[0049] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0050] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and the like are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", and the like may explicitly or implicitly include one or more features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0051] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or a specific connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0052] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1-Figure 3 In an embodiment of the present invention, a DSOGI phase-locked loop control method includes a SOGI and a positive and negative phase sequence switching selection unit. The DSOGI phase-locked loop control method includes:

[0053] S101, obtaining a three-phase grid voltage signal, and converting the three-phase grid voltage signal into a two-phase orthogonal voltage signal;

[0054] Furthermore, it also includes a collection circuit and a Clark change unit. S101 can also specifically perform:

[0055] S1011, using an acquisition circuit to obtain a three-phase grid voltage signal, wherein the three-phase grid voltage signal includes a voltage signal Ua, a voltage signal Ub, and a voltage signal Uc;

[0056] S1012, the three-phase grid voltage signal is transmitted to the Clark transformation unit, and the two-phase orthogonal voltage signal is obtained through processing and transformation by the Clark transformation unit, wherein the two-phase orthogonal voltage signal includes a voltage signal V α And the voltage signal V β .

[0057] In this embodiment, the transformation matrix used by the Clark transformation unit is:

[0058]

[0059] The three-phase grid voltage signal is obtained by the system controller through the acquisition circuit, and the three voltage signals Ua, Ub and Uc are sent to the Clark transformation unit for transformation processing to obtain a two-phase orthogonal voltage signal, that is, the voltage signal V α And the voltage signal V β .

[0060] S102, using SOGI to receive and process two-phase orthogonal voltage signals to obtain multiple orthogonal components;

[0061] Furthermore, SOGI has two functions, and S102 can also perform:

[0062] Use two SOGIs to receive and process the voltage signal V α And the voltage signal V β , to obtain four orthogonal components, where the four orthogonal components are v' α 、v' β ,qv' α And qv' β , v' α is the voltage signal V α The first-order voltage hysteresis signal, qv' α v' α The quadrature signal, v' β is the voltage signal V β The first-order voltage hysteresis signal, qv' β v' β orthogonal signals.

[0063] In this embodiment, the voltage signal V α And the voltage signal V β They are sent to two SOGIs for transfer processing respectively. The transfer function of the existing SOGI is:

[0064]

[0065] However, when the grid phase sequence is negative, the angular velocity ω' of the DSOGI phase-locked loop is negative, and ω' must be positive in frequency to be meaningful. Therefore, in order to ensure that the frequency characteristics of the second-order generalized integrator are the same as the positive sequence, the angular velocity ω' of the DSOGI phase-locked loop must be taken in absolute value. SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop, where the angular velocity of the DSOGI phase-locked loop that enters SOGI for processing takes an absolute value. Therefore, the transfer function of SOGI in the DSOGI phase-locked loop control method is:

[0066]

[0067] Among them, k is the damping factor, ω' is the angular velocity of the DSOGI phase-locked loop, and s is the Laplace operator. This ensures that when the grid phase sequence is negative and ω' is negative, it has the same frequency characteristics as the positive sequence. Figure 7 The control block diagram is shown.

[0068] S103, performing positive-sequence and negative-sequence separation on the orthogonal components to obtain positive-sequence components and negative-sequence components;

[0069] Furthermore, S103 may further specifically execute:

[0070] V' α 、v' β ,qv' α And qv' β Separate the positive and negative sequences to obtain positive sequence components and negative sequence components, where the positive sequence component includes the positive phase sequence component. and positive phase sequence components Negative sequence components include negative phase sequence components and negative phase sequence component

[0071] In this embodiment, for the positive and negative sequence separation link, the expression of the positive phase sequence is:

[0072]

[0073] The expression for negative phase sequence is:

[0074]

[0075] Where α and β represent the two output axes α and β of the Clark transform unit respectively. and are the positive sequence components of the α-axis and β-axis respectively, and They represent the negative sequence components of the α-axis and β-axis respectively, as shown in the attached Figure 6In the positive and negative sequence separation control block diagram shown, since ω' takes the absolute value, it is equivalent to the second-order generalized integrator always filtering according to the positive phase sequence. Therefore, ω' is judged and processed to select the corresponding component for closed loop.

[0076] S104, using the positive and negative phase sequence switching selection unit to receive the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop, and based on the preset judgment conditions, select one between the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component for performing closed-loop phase locking.

[0077] Further, as attached Figure 3 As shown, the judgment conditions in S104 specifically include:

[0078] S1041, determining whether the angular velocity of the DSOGI phase-locked loop is stable;

[0079] S1042: If the angular velocity of the DSOGI phase-locked loop is stable, directly select the voltage signal V α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0080] S1043, if the angular velocity of the DSOGI phase-locked loop is not stable, determine whether the angular velocity of the DSOGI phase-locked loop is greater than 0;

[0081] S1044: If the angular velocity of the DSOGI phase-locked loop is greater than 0, determine the voltage signal V α With positive phase sequence component Whether the phase error between them is lower than the stable value;

[0082] If the voltage signal V α With positive phase sequence component If the phase error between α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0083] S1045, if the voltage signal V α With positive phase sequence component If the phase error between And the positive phase sequence component Execute phase-locked loop;

[0084] S1046: If the angular velocity of the DSOGI phase-locked loop is less than 0, determine the voltage signal V α With negative phase sequence component Whether the phase error between them is lower than the stable value;

[0085] If the voltage signal V α With negative phase sequence component If the phase error between α And the voltage signal V β Perform closed-loop phase-locked loop closure and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0086] S1047, if the voltage signal V α With negative phase sequence component If the phase error between And the negative phase sequence component Perform phase-locked loop closure.

[0087] In this embodiment, when the phase-locked angular velocity ω' is not stable and the phase error is large, V α and V β Closed-loop control is performed. After the angular velocity ω' is initially determined, the positive and negative phase sequence is determined based on the positive and negative value of ω'. If ω'>0, then according to V α and The overlap of and Close the loop and complete the switching. If ω'<0, then according to V α and The overlap of and Close the loop and complete the switch.

[0088] See attached Figure 6 It should be noted that after completing the process, the angular velocity of the DSOGI phase-locked loop needs to be returned to each structural unit in the process for reuse. In order to ensure that the angular velocity of the DSOGI phase-locked loop has a small error before and after the execution of the process, it is necessary to judge the stability of the angular velocity of the DSOGI phase-locked loop, where ω is the original value of the angular velocity of the DSOGI phase-locked loop, and ω' is the angular velocity of the DSOGI phase-locked loop that has executed the process at least once. The stability of the angular velocity of the DSOGI phase-locked loop is to compare ω' with ω. The error after comparison is very small and can even be ignored. It can be judged that the angular velocity of the DSOGI phase-locked loop is stable. The error here is determined according to the actual application scenario or needs of the user, and the voltage signal V α Positive phase sequence component And the negative phase sequence component The phase error judgment between them, the stability value obtained is the same as the above, and the stability value is also determined according to the user's actual application scenario or needs.

[0089] For example: take the absolute value of the error between the original value valpha and valphaP, abs(valpha-valphaP), and detect the sliding average filter of this absolute value = 0.9*filter+0.1*abs(valpha-valphaP). If it is lower than 15V (stable value), it is considered stable.

[0090] Specifically, the obtained three-phase grid voltage signal is converted into a two-phase orthogonal voltage signal, and the two-phase orthogonal voltage signal is processed by SOGI to generate multiple orthogonal components, and the positive and negative sequence of these orthogonal components are separated to obtain the separated positive and negative sequence components. Then, the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop are received by the positive and negative phase sequence switching selection unit. Based on the preset judgment conditions, the unit will select one from the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component to perform a closed-loop phase-locked operation, realize adaptive positive and negative phase sequence, adapt to a wide frequency range, and adapt to the situation where the grid voltage is unbalanced and contains high-order harmonics.

[0091] The DSOGI phase-locked loop control method in the embodiment of the present invention is described above. The DSOGI phase-locked loop control system in the embodiment of the present invention is described below. Figure 4 , the DSOGI phase-locked loop control system comprises:

[0092] SOGI and positive and negative phase sequence switching selection unit,

[0093] The conversion module 201 is used to obtain a three-phase grid voltage signal and convert the three-phase grid voltage signal into a two-phase orthogonal voltage signal;

[0094] A SOGI processing module 202, for receiving and processing two-phase orthogonal voltage signals using SOGI to obtain a plurality of orthogonal components;

[0095] A separation module 203 is used to separate the positive sequence and negative sequence of the orthogonal components to obtain positive sequence components and negative sequence components;

[0096] The closed-loop module 204 is used to receive the two-phase orthogonal voltage signal, the positive-sequence component, the negative-sequence component and the angular velocity of the DSOGI phase-locked loop using the positive-negative phase sequence switching selection unit, and select one between the two-phase orthogonal voltage signal, the positive-sequence component and the negative-sequence component for performing closed-loop phase locking based on preset judgment conditions.

[0097] Specifically, the obtained three-phase grid voltage signal is converted into a two-phase orthogonal voltage signal, and the two-phase orthogonal voltage signal is processed by SOGI to generate multiple orthogonal components, and the positive and negative sequence of these orthogonal components are separated to obtain the separated positive and negative sequence components. Then, the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop are received by the positive and negative phase sequence switching selection unit. Based on the preset judgment conditions, the unit will select one from the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component to perform a closed-loop phase-locked operation, realize adaptive positive and negative phase sequence, adapt to a wide frequency range, and adapt to the situation where the grid voltage is unbalanced and contains high-order harmonics.

[0098] The conversion module 201 also includes a collection circuit and a Clark change unit, and can be specifically used for:

[0099] The three-phase grid voltage signal is acquired by using an acquisition circuit, wherein the three-phase grid voltage signal includes a voltage signal Ua, a voltage signal Ub and a voltage signal Uc;

[0100] The three-phase grid voltage signal is transmitted to the Clark transformation unit, and is processed and transformed by the Clark transformation unit to obtain a two-phase orthogonal voltage signal, wherein the two-phase orthogonal voltage signal includes a voltage signal V α And the voltage signal V β .

[0101] There are two SOGIs, and the SOGI processing module 202 can also be specifically used for:

[0102] Two SOGIs are used to receive and process the voltage signal Vα and the voltage signal Vβ respectively to obtain four orthogonal components, wherein the four orthogonal components are v' α 、v' β ,qv' α And qv' β , v' α is the voltage signal V α The first-order voltage hysteresis signal, qv' α v' α The quadrature signal, v' β is the voltage signal V β The first-order voltage hysteresis signal, qv' β v' β orthogonal signals.

[0103] The separation module 203 may also be specifically used for:

[0104] V' α 、v' β ,qv' α And qv' βSeparate the positive and negative sequences to obtain positive sequence components and negative sequence components, where the positive sequence component includes the positive phase sequence component. and positive phase sequence components Negative sequence components include negative phase sequence components and negative phase sequence component

[0105] SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop, wherein the angular velocity of the DSOGI phase-locked loop that enters SOGI for processing takes an absolute value;

[0106] The transfer function of SOGI is:

[0107]

[0108]

[0109] Where k is the damping factor, ω' is the estimated value of the grid voltage, and s is the Laplace operator.

[0110] The judgment conditions in the closed-loop module 204 include:

[0111] Determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0112] If the angular velocity of the DSOGI phase-locked loop is stable, the voltage signal V α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0113] If the angular velocity of the DSOGI phase-locked loop is not stable, determine whether the angular velocity of the DSOGI phase-locked loop is greater than 0;

[0114] If the angular velocity of the DSOGI phase-locked loop is greater than 0, the voltage signal V α With positive phase sequence component Whether the phase error between them is lower than the stable value;

[0115] If the voltage signal V α With positive phase sequence component If the phase error between α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0116] If the voltage signal V α With positive phase sequence component If the phase error between And the positive phase sequence component Execute phase-locked loop;

[0117] If the angular velocity of the DSOGI phase-locked loop is less than 0, the voltage signal V α With negative phase sequence component Whether the phase error between them is lower than the stable value;

[0118] If the voltage signal V α With negative phase sequence component If the phase error between α And the voltage signal V β Perform closed-loop phase-locked loop closure and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable;

[0119] If the voltage signal V α With negative phase sequence component If the phase error between And the negative phase sequence component Perform phase-locked loop closure.

[0120] above Figure 4 The DSOGI phase-locked loop control system in the embodiment of the present invention is described in detail from the perspective of modular functional entities. The DSOGI phase-locked loop control device in the embodiment of the present invention is described in detail from the perspective of hardware processing.

[0121] Figure 5 1 is a schematic diagram of the structure of a DSOGI phase-locked loop control device provided by an embodiment of the present invention. The DSOGI phase-locked loop control device 300 may have relatively large differences due to different configurations or performances, and may include one or more processors (central processing units, CPU) 310 (for example, one or more processors) and a memory 320, and one or more storage media 330 (for example, one or more mass storage devices) storing application programs 333 or data 332. Among them, the memory 320 and the storage medium 330 may be temporary storage or permanent storage. The program stored in the storage medium 330 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations in the DSOGI phase-locked loop control device 300. Furthermore, the processor 310 may be configured to communicate with the storage medium 330 to execute a series of instruction operations in the storage medium 330 on the DSOGI phase-locked loop control device 300.

[0122] The DSOGI-based phase-locked loop control device 300 may also include one or more power supplies 340, one or more wired or wireless network interfaces 350, one or more input and output interfaces 360, and / or one or more operating systems 331, such as Windows Serve, Mac OS X, Unix, Linux, FreeBSD, etc. Those skilled in the art will appreciate that Figure 5 The DSOGI phase-locked loop control device structure shown does not constitute a limitation on the communication protocol device based on LAN screen projection, and may include more or fewer components than shown in the figure, or a combination of certain components, or a different arrangement of components.

[0123] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. Instructions are stored in the computer-readable storage medium. When the instructions are executed on a computer, the computer executes the steps of the DSOGI phase-locked loop control method.

[0124] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program codes.

[0125] The above is a DSOGI phase-locked loop control method or multiple implementations provided in combination with specific content, and it is not intended that the specific implementation of the present invention is limited to these descriptions. Any method, structure, etc. similar to or identical to the present invention, or any technical deduction or replacement based on the concept of the present invention, shall be deemed to be within the protection scope of the present invention.

Claims

1. A DSOGI phase-locked loop control method, characterized in that: Including SOGI and a positive and negative phase sequence switching selection unit, the DSOGI phase-locked loop control method includes: S101, obtaining a three-phase grid voltage signal, and converting the three-phase grid voltage signal into a two-phase orthogonal voltage signal; S102, using the SOGI to receive and process the two-phase orthogonal voltage signal to obtain a plurality of orthogonal components; S103, performing positive-sequence and negative-sequence separation on the orthogonal components to obtain positive-sequence components and negative-sequence components; S104, using the positive and negative phase sequence switching selection unit to receive the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop, and based on a preset judgment condition, selecting one among the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component for performing closed-loop phase locking.

2. A DSOGI phase-locked loop control method according to claim 1, characterized in that: It also includes a collection circuit and a Clark change unit, and the S101 includes: The acquisition circuit is used to acquire a three-phase grid voltage signal, wherein the three-phase grid voltage signal includes a voltage signal Ua, a voltage signal Ub and a voltage signal Uc; The three-phase grid voltage signal is transmitted to the Clark variation unit, and is processed and transformed by the Clark variation unit to obtain a two-phase orthogonal voltage signal, wherein the two-phase orthogonal voltage signal includes a voltage signal V α And the voltage signal V β .

3. A DSOGI phase-locked loop control method according to claim 2, characterized in that: The SOGI is provided with two, and the S102 comprises: The two SOGIs are used to receive and process the voltage signal Vα and the voltage signal Vβ respectively to obtain four orthogonal components, wherein the four orthogonal components are v' α 、v' β ,qv' α And qv' β , the v' α is the voltage signal V α The first-order voltage hysteresis signal, the qv' α For the v' α The quadrature signal, the v' β is the voltage signal V β The first-order voltage hysteresis signal, the qv' β For the v' β orthogonal signals.

4. A DSOGI phase-locked loop control method according to claim 3, characterized in that: The S103 includes: The v' α 、The v' β 、The qv' α And the qv' β Separate the positive and negative sequences to obtain positive sequence components and negative sequence components, wherein the positive sequence component includes a positive phase sequence component. and positive phase sequence components The negative sequence component includes a negative phase sequence component and negative phase sequence component 5. A DSOGI phase-locked loop control method according to claim 4, characterized in that: The SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop, wherein the angular velocity of the DSOGI phase-locked loop that enters the SOGI for processing takes an absolute value.

6. A DSOGI phase-locked loop control method according to claim 5, characterized in that: The transfer function of the SOGI is: Wherein, k is a damping factor, ω' is an estimated value of a grid voltage, and s is a Laplace operator.

7. A DSOGI phase-locked loop control method according to claim 5, characterized in that: The judgment conditions in S104 include: Determine whether the angular velocity of the DSOGI phase-locked loop is stable; If the angular velocity of the DSOGI phase-locked loop is stable, the voltage signal V α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable; If the angular velocity of the DSOGI phase-locked loop is not stable, determine whether the angular velocity of the DSOGI phase-locked loop is greater than 0; If the angular velocity of the DSOGI phase-locked loop is greater than 0, the voltage signal V α With positive phase sequence component Is the phase error between them lower than the stable value? If the voltage signal V α With positive phase sequence component If the phase error between α And the voltage signal V β Execute the phase-locked loop and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable; If the voltage signal V α With positive phase sequence component If the phase error between And the positive phase sequence component Execute phase-locked loop; If the angular velocity of the DSOGI phase-locked loop is less than 0, the voltage signal V α With negative phase sequence component Is the phase error between them lower than the stable value? If the voltage signal V α With negative phase sequence component If the phase error between α And the voltage signal V β Perform closed-loop phase-locked loop closure and return to determine whether the angular velocity of the DSOGI phase-locked loop is stable; If the voltage signal V α With negative phase sequence component If the phase error between And the negative phase sequence component Perform phase-locked loop closure.

8. A DSOGI phase-locked loop control system, characterized in that: Including SOGI and a positive and negative phase sequence switching selection unit, the DSOGI phase-locked loop control system also includes: A conversion module, used for acquiring a three-phase grid voltage signal and converting the three-phase grid voltage signal into a two-phase orthogonal voltage signal; A SOGI processing module, configured to receive and process the two-phase orthogonal voltage signal using the SOGI to obtain a plurality of orthogonal components; A separation module, used for performing positive-sequence and negative-sequence separation on the orthogonal components to obtain positive-sequence components and negative-sequence components; The closed-loop module is used to receive the two-phase orthogonal voltage signal, the positive-sequence component, the negative-sequence component and the angular velocity of the DSOGI phase-locked loop by using the positive-negative phase sequence switching selection unit, and based on a preset judgment condition, select one between the two-phase orthogonal voltage signal, the positive-sequence component and the negative-sequence component for performing closed-loop phase locking.

9. A DSOGI phase-locked loop control device, characterized in that: The DSOGI phase-locked loop control device comprises: a memory and at least one processor, the memory stores instructions, and the memory and the at least one processor are interconnected via a line; The at least one processor calls the instruction in the memory to enable the DSOGI phase-locked loop control device to execute the DSOGI phase-locked loop control method according to any one of claims 1-7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the DSOGI phase-locked loop control method according to any one of claims 1 to 7 is implemented.

Images