Wafer and method for adjusting wafer warpage

Abstract

The present invention provides a wafer and a method for regulating the warpage of the wafer. The method includes: forming a first film layer having a first-direction stress on the surface of the wafer, forming a second film layer having a second-direction stress on the surface of the first film layer, and forming a third film layer having a first-direction stress. The first-direction stress is a tensile stress and the second-direction stress is a compressive stress, or the first-direction stress is a compressive stress and the second-direction stress is a tensile stress. The second film layer and the third film layer are at least partially non-overlapping in the longitudinal direction. The second film layer includes an alternately formed silicon nitride film having a tensile stress and a silicon oxide film serving as a buffer. The present invention can adjust the warpage of the wafer in different directions, which helps to improve the production yield. The present invention regulates the film thickness of different regions of the wafer without etching to remove the already formed thin film, and the entire process can be completed on a deposition device, which helps to shorten the process time and reduce the production cost. Using the wafer of the present invention helps to improve the production yield.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit manufacturing, and particularly to a wafer and a method for regulating the warpage of a wafer. Background Art

[0002] During the front-end processing of a wafer, three-dimensional abnormal warpage (bow) may be caused by mechanical stress changes. When the warpage exceeds the threshold, various defects will be triggered. For example, according to the measured data of WLCSP packaging, in the packaging process, if the alignment deviation between the bottom of the chip and the substrate due to excessive warpage is >5μm, the solder joint fracture rate will increase to 12%, resulting in the failure of the packaging process. During the device manufacturing process, excessive wafer warpage will cause the threshold voltage of FinFET transistors to shift >0.1V and the crosstalk of 3D NAND memory cells to increase by 20%, significantly deteriorating the device performance. Experimental data also shows that when the ΔBow of the tensile stress silicon nitride film >300μm, it will crack, resulting in a cavity pollution rate as high as 8%.

[0003] In the prior art, there are many methods to prevent excessive warpage of wafers caused by stress, but these methods have different defects respectively. For example, in the traditional double-sided coating method, wet etching / grinding is required to remove the front film, and the process cycle is long, resulting in an increase in production cost by more than 30%; the flip-type PECVD method is prone to wafer damage during the flipping operation (the edge crack rate >0.5%), and this method cannot achieve local stress regulation; the single-layer stress compensation film method cannot solve the extreme warpage of ΔBow>500μm, and the combined regulation efficiency of the compressive stress / tensile stress film <60%; the layered dielectric layer scheme is only applicable to saddle-shaped / wavy warpage, and the regulation accuracy for three-dimensional abnormal warpage is poor.

[0004] It should be noted that the above introduction of the technical background is only for the convenience of clearly and completely explaining the technical solution of the present invention and facilitating the understanding of those skilled in the art. It cannot be considered that the above technical solutions are well-known to those skilled in the art just because these solutions are described in the background art part of the present invention. Summary of the Invention

[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a wafer and a method for regulating the warpage of a wafer, so as to solve the problems existing in the existing methods for regulating the warpage of wafers, such as low efficiency, easy wafer damage, and difficulty in improving three-dimensional abnormal warpage.

[0006] To achieve the above object and other related objects, the present invention provides a method for regulating the warpage of a wafer, including:

[0007] Forming a first film layer with stress in a first direction on the surface of the wafer;

[0008] Form a second film layer with second-direction stress on the surface of the first film layer;

[0009] Form a third film layer with first-direction stress;

[0010] Wherein, the first-direction stress is tensile stress and the second-direction stress is compressive stress, or the first-direction stress is compressive stress and the second-direction stress is tensile stress. The second film layer and the third film layer do not overlap at least partially in the longitudinal direction, and the second film layer includes alternately formed silicon nitride films with tensile stress and silicon oxide films for buffering.

[0011] In an alternative embodiment, the wafer has opposite front and back sides. The first film layer is formed on the entire back side of the wafer, the second film layer is formed on a partial back side of the wafer, and the third film layer is formed on a partial front side of the wafer.

[0012] In another alternative embodiment, the first film layer, the second film layer, and the third film layer are sequentially formed on the back side of the wafer.

[0013] Optionally, the method for regulating the wafer warpage includes at least repeating the steps of forming the second film layer and the third film layer once.

[0014] Optionally, the second film layer is distributed along the X direction, the third film layer is distributed along the Y direction, and the X direction and the Y direction are perpendicular to each other.

[0015] More optionally, both the second film layer and the third film layer are film layers including two symmetrically distributed fan-shaped regions, and the projections of the second film layer and the third film layer on the same horizontal plane are alternately distributed.

[0016] Optionally, the thickness of the first film layer is 150 nm - 400 nm. The second film layer includes 2 - 6 stacks each containing a silicon nitride film and a silicon oxide film. The thickness of the silicon nitride film in each stack is 500 Å - 1000 Å, and the thickness of the silicon oxide film is 200 Å - 300 Å.

[0017] Optionally, the formation method of the silicon nitride film and the silicon oxide film is ALD or PECVD method.

[0018] Optionally, during the formation of the second film layer, it includes the steps of monitoring the wafer warpage using a laser interferometer and adjusting the process parameters according to the warpage.

[0019] Optionally, during the formation of the first film layer and / or the third film layer, the stress direction of the film layer is monitored by monitoring the refractive index of the corresponding film layer.

[0020] Optionally, both the first film layer and the third film layer are silicon nitride layers rich in silicon and / or nitrogen.

[0021] Optionally, both the first film layer and the third film layer are formed by PECVD process. During the formation of the silicon nitride layer, the reaction gases include multiple ones among silane, ammonia, nitrogen and argon. Among them, the gas flow rate of silane is 50 sccm - 1000 sccm, the gas flow rate of ammonia is 0 - 1000 sccm, the gas flow rate of nitrogen is 0 - 20000 sccm, the gas flow rate of argon is 0 - 20000 sccm, the reaction pressure is 1.0 torr - 10 torr, the reaction temperature is 300 °C - 550 °C, the power of the high-frequency power supply for the reaction is 100 W - 2000 W, and the power of the low-frequency power supply is 100 W - 1000 W. By adjusting several of the high-frequency power supply power, low-frequency power supply power, reaction temperature, reaction pressure and ammonia flow rate, the first film layer and the third film layer can have stresses in corresponding directions.

[0022] The present invention also provides a wafer, and the wafer is processed by using the method for regulating the warpage of the wafer as described in any of the above solutions.

[0023] As described above, the wafer and the method for regulating the warpage of the wafer provided by the present invention have the following beneficial effects: The method for regulating the warpage of the wafer provided by the present invention improves the rupture threshold of the tensile stress film layer by setting a buffer layer and optimizes the stress distribution and transfer through the gradient adjustment of the film thickness, and can adjust the warpage of the wafer in different directions so that the wafer meets the requirements of subsequent processes, which helps to improve the production yield. And the present invention regulates the film thickness of different regions of the wafer without etching to remove the already formed thin film, and the entire process can be completed on the deposition equipment, which helps to shorten the process time and reduce the production cost. Using the wafer processed by the present invention helps to improve the production yield and reduce the production cost. Description of the Drawings

[0024] Figure 1 It shows an exemplary flowchart of the method for regulating the warpage of the wafer provided by the present invention.

[0025] Figure 2 It shows a schematic diagram of partitioned deposition in an example of the method for regulating the warpage of the wafer provided by the present invention.

[0026] Figure 3 and Figure 4 It shows a schematic diagram of the improvement effect on wafers with different warpage degrees by using the method for regulating the warpage of the wafer provided by the present invention. Detailed Embodiments

[0027] The following describes the embodiments of the present invention through specific examples. Those skilled in the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. When detailing the embodiments of the present invention, for ease of explanation, the cross-sectional views showing the device structure will be enlarged locally out of the general proportion, and the schematic diagrams are only examples and should not limit the scope of protection of the present invention here. In addition, in actual production, three-dimensional spatial dimensions including length, width, and depth should be included.

[0028] For convenience of description, spatial relationship terms such as "below", "beneath", "lower than", "under", "above", "on" etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relationship terms are intended to encompass other directions of the device in use or operation in addition to the directions depicted in the drawings. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers.

[0029] In the context of the present invention, the structure in which the first feature is "above" the second feature described may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0030] It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex. To make the diagrams as concise as possible, not all structures are labeled in each drawing.

[0031] The present invention provides a method for regulating the warpage of a wafer. The general steps can be referred to Figure 1 as shown. This method can be used to improve the warpage of the wafer surface, especially for improving the three-dimensional non-uniform warpage of the wafer. Next, the present invention will be further described with reference to the drawings.

[0032] First, perform step S1 to form a first film layer with a first-direction stress on the surface of the wafer.

[0033] The material of the wafer can be any one of the following materials: crystalline silicon (such as Si<100> or Si<111>), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers and patterned or non-patterned wafers, silicon on insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass or sapphire. The wafer can be a bare wafer without any layer fabricated on its surface, or a device wafer with a layer already fabricated on its surface. The wafer can be of any size, such as a 200mm or 300mm diameter wafer, or a rectangular or square panel. In particular, the larger the wafer size, the more film layers are formed on its surface, and the more serious the surface warping of the wafer due to stress accumulation will be, and the more suitable it is to adopt the method of the present invention for warping improvement.

[0034] The wafer has two opposite surfaces, and the surface for fabricating devices is usually defined as the front side, and the opposite surface is usually defined as the back side. According to different needs, the first film layer can be formed on the front side or the back side of the wafer. During the film formation process, stress will be generated in the film due to reasons such as crystal defects, lattice mismatch, and differences in thermal expansion coefficients between different materials. Usually, stress can be divided into tensile stress and compressive stress according to the different directions of the force. Tensile stress is the reaction force of an object to an external force that tends to stretch the object, and compressive stress is the stress that makes the object tend to be compressed. By adjusting the parameters during the film preparation process, the fabricated film layer can have compressive stress or tensile stress. For example, in a preferred example provided by the present invention, the first film layer is formed on the back side of the wafer and has compressive stress.

[0035] Specifically, the wafer after cleaning treatment can be transferred into the processing chamber by a robotic arm, and the deposition gas is supplied to the reaction chamber in a mixed gas or in an alternating pulse manner. By adjusting several process parameters, such as gas flow rate, pressure, temperature, etc., after reacting for a period of time, a thin film with high compressive stress is plated on the entire surface of the wafer, that is, the first film layer is formed.

[0036] Then, step S2 is executed to form a second film layer with second-direction stress on the surface of the first film layer. That is, the second film layer and the first film layer are formed on the same side of the wafer, for example, both are formed on the back side of the wafer. However, the second film layer has a stress in the opposite direction to that of the first film layer. That is to say, if the first film layer has compressive stress, the second film layer has tensile stress, and vice versa. In this embodiment, the example where the first film layer has compressive stress and the second film layer has tensile stress is mainly taken. Preferably, the second film layer is only formed on a partial surface of the wafer, or in other words, its film area is smaller than the surface area of the wafer. For example, in some examples, the surface area of the second film layer does not exceed one-half of the surface area of the wafer. That is, there is a half area on the wafer where the second film layer is not formed. Preferably, there is at least one same element between the first film layer and the second film layer, which helps to improve the interface characteristics and enables better adhesion between the two.

[0037] After that, step S3 is executed to form a third film layer with first-direction stress. The third film layer can be on the same side as the second film layer, that is, it is also formed on the back side of the wafer. For example, if devices are fabricated on the front side of the wafer, the third film layer is fabricated on the back side of the wafer. If the wafer is a bare wafer, the third film layer can be formed on the front side of the wafer, but it is preferably formed on the back side of the wafer. Similarly, the third film layer is preferably only formed on a partial surface of the wafer, or in other words, its film area is smaller than the surface area of the wafer. For example, the surface area of the third film layer does not exceed one-half of the surface area of the wafer. In a preferred example, there is at least one same element between the third film layer and the second film layer, which can also play the role of improving the interface characteristics and enabling better adhesion between the two. That is, both the first film layer and the third film layer have at least one same element as the second film layer. Preferably, these three film layers have at least one same element, such as silicon and / or nitrogen elements.

[0038] In this embodiment, the second film layer and the third film layer at least partially do not overlap longitudinally, or in other words, their projections on the same plane do not completely coincide or do not coincide at all. Therefore, when viewed longitudinally, the thickness of the wafer in each region (the sum of the thickness of the wafer itself and the thickness of the deposited film in the corresponding region) is not completely the same, or in other words, the thickness of the wafer has a gradient in different regions. By regulating the formation regions and thicknesses of the second film layer and the third film layer, and in addition, by adjusting the flow rate of the reaction gas during the preparation process, the second film layer and / or the third film layer can have a film thickness gradient (the film layer has an inclined surface) at its own edge, thereby optimizing the film thickness distribution on the wafer surface and optimizing the stress transfer through the gradient film. In addition, the second film layer in this embodiment includes an alternately formed silicon nitride film with tensile stress and a silicon oxide film for buffering. The second film layer can not only enhance the adhesion between the first film layer and the third film layer, but also be used to improve the film layer with tensile stress, including improving the rupture threshold of its own silicon nitride film and the first film layer or the third film layer. For example, in some examples, inserting a 5 nm - 20 nm silicon oxide buffer layer during the preparation of the tensile stress film in each deposition cycle can increase the rupture threshold of the tensile stress film from 300 μm to 700 μm.

[0039] The method for regulating the warpage of a wafer provided by the present invention improves the rupture threshold of the film layer with tensile stress by setting a second film layer with a stack of a silicon nitride film and a buffering silicon oxide film, and adjusts the gradient of the film thickness through the cooperation of the first film layer and the third film layer. Through the mutual cooperation of these three film layers, the distribution and transfer of stress are optimized, and the warpage of the wafer in different directions can be adjusted. For example, the warpage of the wafer in the horizontal and vertical directions greater than 700 μm can be reduced to within 50 μm, so that the wafer meets the requirements of subsequent processes and helps to improve the production yield. By improving the rupture threshold of the stress film, the present invention is particularly suitable for improving the three-dimensional abnormal warpage of the wafer surface. In addition, the present invention can increase the convergence speed of the wafer warpage deviation by 40% and shorten the process time by 90 seconds. And the present invention regulates the film thickness in different regions of the wafer during the thin film deposition process without etching to remove the already formed thin film. The entire process can be completed on the deposition equipment, which can avoid the contamination of the wafer during the transfer process, help to shorten the process time, and reduce the production cost. The distribution of the second film layer and the third film layer can be determined as needed, for example, adjusted according to the warpage value measured in advance on the wafer surface. Due to the accumulation of thermal stress in the wafer through multiple processes, saddle-shaped warpage is likely to occur. Therefore, in a preferred example, the second film layer can be distributed along the X direction, and the third film layer can be distributed along the Y direction, where the X direction and the Y direction are perpendicular to each other. For example, the X direction is Figure 2 the horizontal direction shown in region A in Figure 2 and the Y direction is Figure 2In the scheme shown, both the second film layer and the third film layer are film layers that include two symmetrically distributed fan-shaped areas. That is, the second film layer and the third film layer do not overlap at all in the same longitudinal direction (in the actual deposition process, due to gas diffusion, there may be a small amount of local overlap in the boundary area between the two), and the projections of the two on the same horizontal plane are arranged alternately. That is, when viewed from the same direction, the second film layer and the third film layer fall on the same plane. This structure can be used to improve the saddle-shaped warping and bowl-shaped warping that are common in current wafers. And from a process perspective, the film layer distribution of this structure is easy to control, and its preparation is relatively simple. For example, under the premise that the second film layer and the third film layer do not completely overlap in the same longitudinal direction, the formation area of ​​each film layer can be effectively controlled with the help of a mask or by controlling the partitioned gas flow rate. For example, in some examples, a method similar to Figure 2 The structure has four fan-shaped areas of equal area, and the film layer of the desired structure is obtained by adjusting the spray gas in each area. If a similar multi-zoned shower head is used, the formation process of the second film layer and the third film layer can be partially synchronized. In other examples, according to the different warpage distribution of the wafer surface, the second film layer and the third film layer can also be semicircular or distributed in other shapes, and there is no strict restriction on this.

[0040] The thickness of each film layer not only concerns the process time but also has a significant impact on the effect of stress regulation. For example, in this case, the silicon oxide film mainly serves as a buffer, so the smaller its own stress, the better. Ideally, the silicon oxide film has no internal stress, so its thickness needs to be carefully controlled. Through experiments, it is found that the thickness of the first film layer is preferably 150 nm - 400 nm, such as 150, 200, 250, 300 or any value within this range. The second film layer preferably includes 2 - 6 stacks each containing a silicon nitride film and a silicon oxide film. The thickness of the silicon nitride film in each stack is 500 Å - 1000 Å, and the thickness of the silicon oxide film is 200 Å - 300 Å. And preferably, during the formation of each stack of the second film layer, the silicon nitride film is formed first, and then the silicon oxide film is formed. The formation methods of the silicon nitride film and the silicon oxide film can be the PECVD method or the ALD method, and each of these two methods has its own advantages. For example, using the ALD method can more precisely control the film thickness of each stack and further optimize the stress distribution. The two can be continuously formed in the same ALD chamber by switching the reaction gases, which helps to enhance the adhesion between the films, avoid film delamination, and improve the film deposition quality and production efficiency. In some examples, by gradually reducing the nitrogen-containing gas and gradually increasing the oxygen-containing gas (with the silicon-containing gas flow rate remaining unchanged), a silicon oxynitride film can be formed between the silicon nitride film and the silicon oxide film, which helps to further enhance the adhesion between the films and further optimize the mechanical properties and stress distribution of the film. Using the PECVD method, the first film layer, the second film layer, and the third film layer can be continuously formed in the same PECVD chamber, which helps to improve the deposition efficiency and yield.

[0041] In some examples, during the formation of the second film layer, a laser interferometer can be used to monitor the warpage of the wafer, and the process parameters can be adjusted according to the warpage. For example, if it is monitored that the warpage of the wafer is larger than the preset value, the gas flow rate can be increased to make the deposited film thicker; otherwise, the gas flow rate can be decreased.

[0042] On the premise of meeting the required stress direction and not introducing new process pollution, the first film layer and the third film layer can be selected from the film layers commonly used in the current semiconductor field. For example, silicon oxide or silicon nitride thin films can be used. However, in the case where the second film layer includes alternately formed silicon nitride films with tensile stress and silicon oxide films serving as buffers, considering multiple aspects such as optimizing the film interface characteristics, simplifying the process, and reducing production costs, both the first film layer and the third film layer are preferably silicon nitride film layers, and the first film layer and the third film layer are preferably silicon-rich and / or nitrogen-rich silicon nitride layers, which is more convenient for stress regulation during the preparation process.

[0043] In the case where both the first film layer and the third film layer are silicon nitride layers, it is preferable to form them by PECVD process, which is more convenient to adjust process parameters during deposition to regulate the stress distribution of the thin film. The deposition parameters of the first film layer and the third film layer are generally the same. For example, the reaction gases all include multiple of silane, ammonia, nitrogen and argon. Among them, the gas flow rate of silane is 50 sccm - 1000 sccm, and the optimal value can be selected as 200 sccm; the gas flow rate of ammonia is 0 - 1000 sccm, and the optimal value can be selected as 600 sccm; the gas flow rate of nitrogen is 0 - 20000 sccm, and the optimal value can be selected as 2000 sccm; the gas flow rate of argon is 0 - 20000 sccm, and the optimal value can be selected as 1000 sccm; the reaction pressure is 1.0 torr - 10 torr, and the optimal value can be selected as 1.5 torr; the reaction temperature can be selected between 300 °C and 550 °C, and the optimal value can be selected as 500 °C; the high-frequency power of the reaction can be selected between 100 W and 2000 W, and the optimal value can be selected as 750 W. The frequency of the high-frequency power supply can be selected between 13.56 MHz and 21.12 MHz, and the most preferred is 21.12 MHz; the low-frequency power can be selected between 100 W and 1000 W, and the optimal value can be selected as 150 W, and the frequency of the low-frequency power supply is selected as 400 kHz. By adjusting several of the high-frequency power, low-frequency power, reaction temperature, reaction pressure and ammonia flow rate, the first film layer and the third film layer can have stress in the corresponding direction. For example, by increasing the high-frequency power and appropriately reducing the ammonia feed ratio, the thin film can have compressive stress. A higher power can dissociate the nitrogen-hydrogen bonds of silane more fully, thereby increasing the film density and reducing the dangling H bonds of the N-H bonds in silicon nitride, which helps to improve the mechanical properties of the compressive stress silicon nitride thin film. The high tensile stress thin film can be achieved by reducing the H% of SIN by lowering the reaction temperature. The specific principle is that the nitrogen radicals in the plasma can extract H bonds and release ammonia, leaving the SI-N bonds hanging separated by voids, and these stretched SI-N bonds are constrained by the surrounding materials and cannot relax, resulting in tensile stress. Therefore, reducing the H% content can increase the tensile stress of silicon nitride.

[0044] In the prior art, the non-destructive detection method of film stress is mainly deduced by measuring its bending degree. For example, it is measured by using a film stress meter, or by using methods such as the cantilever beam method and the Newton's ring method. These methods are currently offline detection methods. That is to say, in the prior art, when using these methods, the wafer deposited with the film needs to be transferred to a measuring instrument outside the deposition chamber for measurement. This will lead to the complication of the process, and the wafer is prone to contamination or damage during the transfer process between the measuring device and the deposition chamber. In a preferred example provided by the present invention, during the preparation process of the first film layer and / or the third film layer, an online instrument can be used to monitor the film refractive index of the first film layer and / or the third film layer to monitor the stress direction of the film in real time online, and the process parameters can be adjusted according to the monitoring results. For example, an optical measuring instrument can be integrated into the deposition chamber, and the film refractive index is measured at the end of each deposition cycle to judge the film stress direction. If it is monitored that the film refractive index has an increasing trend, it means that the compressive stress of the film is increasing, and vice versa, the tensile stress is increasing. Compared with the offline detection method, the method of monitoring film stress by monitoring the film refractive index can realize online non-destructive detection, which helps to improve the production yield and efficiency.

[0045] Next, the solution of the present invention will be further described in combination with specific embodiments.

[0046] This experiment was carried out on two wafers (wafer 1 and wafer 2) with different initial warpage pre-values. The first deposited film layer has compressive stress, and the third film layer has compressive stress.

[0047] Step 1: Whole-surface compressive stress film pre-deposition

[0048] A compressive stress silicon nitride film with a thickness of 300±10 nm is deposited on the back of the wafer by PECVD process, and the stress value is -1.2 GPa by controlling the SiH4 / NH3 flow ratio and the radio frequency power (800 W).

[0049] Step 2: Preparation of vertical direction gradient buffer layer

[0050] A silicon nitride film and a silicon oxide film are alternately deposited on the back of the wafer through a four-zone independent gas supply nozzle. Among them, a 5-15 nm silicon oxide buffer layer is inserted at the interface between the tensile stress silicon nitride film and the wafer. The ALD technology is used to achieve atomic-level thickness control. This gradient buffer layer can absorb the stress concentration energy and increase the tensile stress film rupture threshold from 300μm to 700μm.

[0051] Step 3: Deposition of horizontal direction compressive stress film

[0052] Deposit a compressive stress silicon nitride film on the back of the wafer through a four-zone independent gas supply nozzle. Each zone can independently adjust the gas composition (SiH4 / NH3 = 50:50) and RF power (1200 W) to achieve a zoning control accuracy of ±10 μm.

[0053] Step 4: Multi-directional stress iterative control

[0054] Repeat steps 2 - 3 for multiple cycles. After each cycle, use a laser interferometer (λ = 633 nm) to monitor the ΔBow value in real time. Terminate the process when Δ|Bow_X - Bow_Y| ≤ 50 μm.

[0055] Figure 3 and Figure 4 This is the experimental result of this embodiment for two wafers with different initial warpage values. The numerical units in the figure are all μm. Among them, Figure 3 and Figure 4 In, the value before warping refers to the warpage value of the two wafers before being processed by the method of this embodiment, while the measured warpage value is the latest wafer warpage value measured by an instrument after the film deposition of each step. The value corresponding to depositing the compressive stress film for 100 s refers to the improved warpage value after depositing the first film layer. These values are the differences between the measured warpage value and the previous warpage value, such as the difference from the value before warping, and are obtained by calculation rather than instrument measurement. Depositing the Y-direction stress film 6 times means depositing a tensile stress silicon nitride film in the Y direction, where the tensile stress film is deposited by cycling the silicon oxide film and the silicon nitride film 6 times (i.e., (SiO2 + Si3N4)×6), and the other meanings are similar. From Figure 3 and Figure 4 It can be seen that as the control progresses step by step, the warpage difference between the X direction and the Y direction of the wafer continuously decreases, and finally this difference can be controlled within the target range, for example, within 50 μm. For example Figure 4 As shown in, by using the method of the present invention, the warpage of a wafer with an initial warpage difference of 736 μm can be adjusted to 30 μm, which will significantly improve the yield of subsequent processes.

[0056] In other experiments, the thickness of each film layer was adjusted accordingly for wafers with different values before warping, and the improvement effects were similar, which will not be elaborated one by one here.

[0057] If a spray head with other structures is used to change the gas distribution, thereby preparing second and third film layers with other structures, it can be used to control the three-dimensional non-uniform warpage of the wafer to meet more diverse production requirements.

[0058] The present invention can dynamically adjust the gas composition in combination with an AI algorithm to adjust the film thickness and stress, thereby achieving precise control of multi-directional non-uniform warpage. The deposited film can be used without high-temperature treatments such as annealing, avoiding film damage.

[0059] The present invention also provides a wafer, which is processed by the method for regulating the wafer warpage degree as described in any of the above solutions, and thus the foregoing content can be incorporated herein by reference in its entirety.

[0060] As described above, the surface of the wafer in this embodiment has a first film layer, a second film layer and a third film layer. The wafer can be made of common semiconductor materials such as silicon, silicon-on-insulator, silicon carbide, sapphire, etc. It can be a bare wafer without any patterns fabricated on its surface, or a wafer with some patterns already fabricated on its surface. The first film layer is, for example, a silicon nitride layer with compressive stress, which is formed on the entire back surface of the wafer; the second film layer is formed on a partial surface of the first film layer, and it includes alternately formed silicon nitride films with tensile stress and silicon oxide films serving as buffers; the third film layer is, for example, a silicon nitride film with tensile stress, which is formed on the front surface of the wafer or on the same side of the wafer as the second film layer, but it does not overlap or does not completely overlap with the second film layer longitudinally. In the case where the second film layer and the third film layer do not overlap at all and are formed on the same side of the wafer, the second film layer and the third film layer can have substantially the same horizontal plane. For example, in the structure as shown in Figure 2 , the two are formed on the same circular horizontal plane in an alternating distribution manner. The thickness of the first film layer is 150 nm - 400 nm, the second film layer includes 2 - 6 stacks each containing a silicon nitride film and a silicon oxide film, the thickness of the silicon nitride film in each stack is 500 Å - 1000 Å, and the thickness of the silicon oxide film is 200 Å - 300 Å. In some examples, a silicon oxynitride film can also be formed between the silicon nitride film and the silicon oxide film in each stack structure of the second film layer. In some examples, the silicon oxide film can be a porous silicon oxide film, which helps to further optimize the thin film stress distribution. The second film layer and the third film layer can also have more than two alternating stacks. The wafer can also have some other characteristics, which depend on the specific way of stress adjustment for it. For this, reference can be made to the foregoing content, and for the sake of brevity, it will not be elaborated herein.

[0061] Due to being processed by the method for regulating the wafer warpage degree of the present invention, the warpage degree of the wafer of the present invention can be greatly improved, which helps to improve the subsequent process yield, and the wafer processed by the method of the present invention is relatively more advantageous in terms of cost.

[0062] In summary, the method for regulating the warpage of a wafer provided by the present invention forms a first film layer with stress in a first direction on the surface of the wafer, forms a second film layer with stress in a second direction on the surface of the first film layer, and forms a third film layer with stress in the first direction. The stress in the first direction is tensile stress and the stress in the second direction is compressive stress, or the stress in the first direction is compressive stress and the stress in the second direction is tensile stress. The second film layer and the third film layer at least partially do not overlap longitudinally, and the second film layer includes an alternately formed silicon nitride film with tensile stress and a silicon oxide film serving as a buffer. The present invention improves the rupture threshold of the tensile stress film layer by providing the second film layer with an alternately stacked silicon nitride film and a silicon oxide film serving as a buffer, and forms a gradient adjustment of the film thickness through the cooperation of the first film layer and the third film layer. Through the mutual cooperation of these three film layers, the distribution and transfer of stress are optimized, the warpage of the wafer in different directions can be adjusted, and the production yield can be improved. At the same time, the present invention regulates the film thickness of different regions of the wafer during the deposition process without etching the already formed film, and the entire process can be completed on the deposition equipment, which helps to shorten the process time and reduce the production cost. The wafer processed by the present invention helps to improve the production yield and reduce the production cost.

[0063] Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.

[0064] The above embodiments are only illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A method for regulating the warpage of a wafer, characterized in that, Including: Forming a first film layer with first-direction stress on the surface of the wafer; Forming a second film layer with second-direction stress on the surface of the first film layer; Forming a third film layer with first-direction stress; The first-direction stress is tensile stress and the second-direction stress is compressive stress, or the first-direction stress is compressive stress and the second-direction stress is tensile stress. The second film layer and the third film layer do not overlap at least partially in the longitudinal direction. The second film layer includes an alternately formed silicon nitride film with tensile stress and a silicon oxide film for buffering.

2. The method for regulating the warpage of a wafer according to claim 1, wherein The wafer has opposite front and back sides. The first film layer is formed on the entire back side of the wafer, the second film layer is formed on a partial back side of the wafer, and the third film layer is formed on a partial front side of the wafer; or the first film layer, the second film layer, and the third film layer are sequentially formed on the back side of the wafer.

3. The method for regulating the warpage of a wafer according to claim 1, wherein The method for regulating the warpage of the wafer includes at least repeating the steps of forming the second film layer and the third film layer once.

4. The method for regulating the warpage of a wafer according to claim 1, wherein Both the second film layer and the third film layer are film layers including two symmetrically distributed fan-shaped regions, and the projections of the second film layer and the third film layer on the same horizontal plane are alternately distributed.

5. The method for regulating the warpage of a wafer according to claim 1, characterized in that, The thickness of the first film layer is 150 nm - 400 nm. The second film layer includes 2 - 6 stacks each containing a silicon nitride film and a silicon oxide film. The thickness of the silicon nitride film in each stack is 500 Å - 1000 Å, and the thickness of the silicon oxide film is 200 Å - 300 Å.

6. The method for regulating the warpage of a wafer according to claim 1, wherein The formation methods of the silicon nitride film and the silicon oxide film are the ALD method or the PECVD method.

7. The method for regulating the warpage of a wafer according to claim 1, wherein During the process of forming the second film layer, it includes the steps of monitoring the warpage of the wafer using a laser interferometer and adjusting process parameters according to the warpage; and / or during the process of forming the first film layer and / or the third film layer, monitoring the stress direction of the film layer by monitoring the refractive index of the corresponding film layer.

8. The method for regulating the warpage of a wafer according to any one of claims 1 to 7, characterized in that, Both the first film layer and the third film layer are silicon-rich and / or nitrogen-rich silicon nitride layers.

9. The method for regulating the warpage of a wafer according to claim 8, wherein Both the first film layer and the third film layer are formed by the PECVD process. During the process of forming the silicon nitride layer, the reaction gases include multiple ones among silane, ammonia, nitrogen, and argon. Among them, the gas flow rate of silane is 50 sccm - 1000 sccm, the gas flow rate of ammonia is 0 - 1000 sccm, the gas flow rate of nitrogen is 0 - 20000 sccm, the gas flow rate of argon is 0 - 20000 sccm, the reaction pressure is 1.0 torr - 10 torr, the reaction temperature is 300 °C - 550 °C, the power of the high-frequency power supply for the reaction is 100 W - 2000 W, and the power of the low-frequency power supply is 100 W - 1000 W; by adjusting several of the high-frequency power supply power, low-frequency power supply power, reaction temperature, reaction pressure, and ammonia flow rate, the first film layer and the third film layer have corresponding-direction stress.

10. A wafer, characterized in that, The wafer is processed by the method for regulating the warpage of the wafer according to any one of claims 1 - 9.

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