Product for silicon through hole treatment and preparation method and application thereof
By coating the filler material in the through-silicon processing and performing gradient heating treatment, the problem of low electroplating filling quality is solved, effective isolation of the reverse deposition layer is achieved, and the accuracy and reliability of FIB processing and image characterization are improved.
Patent Information
- Application Number
- CN202510053955.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-14
- Publication Date
- 2025-05-27
AI Technical Summary
When the prior art uses electroplating filling in through-silicon hole treatment, it is easy to cause the problem of low filling quality, especially when the depth and aspect ratio are large, the bottom is not completely filled, resulting in low filling quality for hollow samples.
By coating the filler material and performing gradient heating treatment, the filler material is cured and fluidized at different temperatures to ensure that the filler material can effectively fill the through holes of the sample and isolate the counterdeposition layer.
By effectively isolating the counterdeposition layer, clearer and more accurate information on sidewall roughness, pore perpendicularity and layer thickness can be obtained during FIB processing and image characterization, reducing errors in measurement and analysis and improving data reliability.
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Figure CN120048739A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of advanced semiconductor packaging technology, and in particular to a product for through silicon via processing, a preparation method and an application thereof. Background Art
[0002] With the rapid development of information technology, electronic products are moving towards high performance, miniaturization and low power consumption. In order to meet the needs of chip computing power and data storage, the integration and complexity of integrated circuits continue to increase. As the chip manufacturing process gradually approaches the physical bottleneck, heterogeneous chip integration and interconnection technology may be an effective means to continue and break through Moore's Law. Silicon-Through Vias (TSV) or glass through-hole technology is a vertical interconnection technology that can realize vertical interconnection between chips or between chips and substrates, with the advantages of high integration, low power consumption and good signal transmission performance.
[0003] The samples processed by silicon via are typical hollow blind hole structures before electroplating filling and thinning. In the process of manufacturing hollow blind hole structure samples, large side wall roughness and SiO 2 The insulating layer is too thin, the copper seed layer is defective or broken, etc. These process defects will lead to a decrease in the yield of the subsequent chip heterogeneous integration process, so it is necessary to strictly control the process parameters of each step of the processing link. Focused ion beam scanning technology (FIB) is a typical semiconductor precision processing technology. It mainly uses accelerated ion beams to cut and etch products in the processing process, achieve efficient micro-nano processing and high-precision imaging, deeply analyze the inside of the chip, accurately locate defects, and analyze the cause of failure.
[0004] When a focused ion beam scanning electron microscope is used to process hollow samples with a long aspect ratio, the vapor of the etched sample bottom material will be redeposited on the sample surface (i.e., an anti-deposition layer will be formed on the sample surface), especially deposited inside the hollow sample, thereby covering the SiO 2 The thickness and continuity of the insulating layer, dielectric layer and seed layer are the desired information. In order to overcome these difficulties, the samples treated with through silicon vias are electroplated and filled, which can effectively reduce the problem of the internal morphology being covered by the anti-deposition layer. However, electroplating cannot always completely fill the interior of hollow samples. The larger the aspect ratio, the more difficult the electroplating filling is. It is often the case that the bottom is not fully filled, resulting in poor filling quality of hollow samples. Moreover, the cost of electroplating filling is not low, and the chemical composition of the electroplating solution may cause corrosion and decomposition to the sample.
[0005] Therefore, the prior art still needs to be improved and developed. Summary of the invention
[0006] In view of the above-mentioned deficiencies in the prior art, the present invention provides a product for through silicon via processing and a preparation method and application thereof, so as to solve the problem of low sample filling quality that is easily caused when the product for through silicon via processing is filled by electroplating.
[0007] The technical solution adopted by the present invention to solve the above technical problems is as follows:
[0008] A first aspect of the present invention provides a method for preparing a product for through silicon via processing, the method comprising the following steps:
[0009] Apply a layer of filler material to the surface of the sample;
[0010] Under an inert atmosphere, the sample coated with the filling material is subjected to a gradient heating treatment, wherein the gradient heating treatment specifically comprises: heating the sample coated with the filling material at a first temperature for a first time, then heating it to a second temperature, heating it at the second temperature for a second time, then heating it to a third temperature, and heating it at the third temperature for a third time;
[0011] Cooling the sample after the gradient heating treatment to a fourth temperature, and then performing focused ion beam treatment to complete cutting and etching of the sample after the gradient heating treatment to obtain the product for through silicon via processing;
[0012] Among them, the first temperature is 40-45°C, the first time is 1 hour, the second temperature is 70-80°C, the second time is 1 hour, the third temperature is 100-105°C, and the third time is 0.5 hour.
[0013] Preferably, the filling material is epoxy resin A glue.
[0014] Preferably, the thickness of the layer of filling material coated on the surface of the sample does not exceed 0.5 mm.
[0015] Preferably, the first temperature is 45°C, the second temperature is 80°C, and the third temperature is 100°C.
[0016] Preferably, the fourth temperature is 40-45°C.
[0017] Preferably, the fourth temperature is 45°C.
[0018] Preferably, after cooling the sample after the gradient heating treatment to the fourth temperature, the method further includes wiping the sample after the gradient heating treatment with a dust-free cloth dipped in anhydrous ethanol to remove excess filling material on the surface of the sample.
[0019] Preferably, before coating a layer of filling material on the surface of the sample, the method further comprises the step of: performing a purging treatment on the sample to ensure that the surface of the sample remains clean.
[0020] A second aspect of the present application provides a sample for through silicon via processing, wherein the product for through silicon via processing is prepared by the above-mentioned preparation method.
[0021] A third aspect of the present application provides application of the above-mentioned product for through silicon via processing in through silicon via processing.
[0022] Beneficial effects:
[0023] The present invention discloses a product for through silicon via processing and its preparation method and application. The product for through silicon via processing prepared by the preparation method of the present invention can obtain clearer and more accurate high-precision information of side wall roughness, small hole verticality and thickness of each layer during FIB processing and image characterization because its anti-deposition layer is effectively isolated (i.e., effectively filled); it avoids the masking of key information by the anti-deposition layer, thereby reducing errors in measurement and analysis and improving data reliability; in addition, the filling materials and equipment used in the preparation method of the product for through silicon via processing provided by the present invention are conventional and economical, without adding additional expensive costs, and have good economic benefits and market competitiveness. In addition, the entire preparation method process is reasonably designed, simple and easy to operate, does not require complex equipment and highly professional technicians, and is convenient for large-scale promotion and application. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 This is a SEM image of a cross section of the product prepared in Example 1 at a magnification of 2000x;
[0025] Figure 2 The SEM image of the cross section of the insulating layer, dielectric layer and seed layer structure of the product prepared in Example 1 at a magnification of 15000x;
[0026] Figure 3 The SEM image of the cross section of the insulating layer, dielectric layer and seed layer structure of the product prepared in Example 1 at a magnification of 35000x;
[0027] Figure 4 This is a diagram of the swing processing process of directly using FIB cutting in Comparative Example 1;
[0028] Figure 5 This is a SEM image of the pore sidewall of the product prepared in Comparative Example 1 at a magnification of 15000x;
[0029] Figure 6 This is a SEM image of the product prepared in Comparative Example 2 at a magnification of 2145x;
[0030] Figure 7 This is a SEM image of the product prepared in Comparative Example 2 at a magnification of 6129x;
[0031] Figure 8 This is the SEM image of the product prepared in Comparative Example 3. DETAILED DESCRIPTION
[0032] The present invention provides a product for through silicon via processing and a preparation method and application thereof. In order to make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail below. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0033] An embodiment of the present invention provides a method for preparing a product for through silicon via processing, the method comprising the following steps:
[0034] Apply a layer of filler material to the surface of the sample;
[0035] Under an inert atmosphere, the sample coated with the filling material is subjected to a gradient heating treatment, wherein the gradient heating treatment specifically comprises: heating the sample coated with the filling material at a first temperature for a first time, then heating it to a second temperature, heating it at the second temperature for a second time, then heating it to a third temperature, and heating it at the third temperature for a third time;
[0036] Cooling the sample after the gradient heating treatment to a fourth temperature, and then performing focused ion beam treatment to complete cutting and etching of the sample after the gradient heating treatment to obtain the product for through silicon via processing;
[0037] Among them, the first temperature is 40-45°C, the first time is 1 hour, the second temperature is 70-80°C, the second time is 1 hour, the third temperature is 100-105°C, and the third time is 0.5 hour.
[0038] The preparation method adopted in the embodiment of the present invention has the following advantages: 1. Rapid processing and significant improvement in processing efficiency: The preparation method of the present invention is simple and fast, which greatly shortens the product preparation time and improves the overall work efficiency; through effective filling treatment (i.e. coating the filling material and performing gradient heating treatment), the interference in the FIB processing process is reduced, making the processing process smoother and significantly improving the processing efficiency. 2. High-precision information acquisition and error reduction: Since the anti-deposition layer is effectively isolated, clearer and more accurate high-precision information on the sidewall roughness, small hole verticality and thickness of each layer can be obtained during FIB processing and image characterization; the anti-deposition layer is avoided from covering up key information, thereby reducing errors in measurement and analysis and improving data reliability. Specifically, the preparation method adopted in the embodiment of the present invention is to first heat the sample coated with the filling material at the first temperature for the first time to promote the initial solidification of the filling material and enhance its bonding force with the sample surface, and at the same time use the heat generated by heating to drive out the bubbles in the filling material to ensure the quality of the glue filling; then heat it to the second temperature and heat it at the second temperature for the second time, at which time the filling material is further solidified, the fluidity is reduced, but the internal activity is still maintained to a certain extent; finally heat it to the third temperature and heat it at the third temperature for the third time, and the filling material completes the final solidification. In the above-mentioned gradient heating process, the filling material can effectively fill the through hole on the sample under the combined action of thermal stress and fluidity. At this time, the anti-deposition layer is effectively isolated outside the small hole, and will not interfere with the characterization of the inside of the small hole, so as to achieve a comprehensive and uniform potting effect. The higher the temperature, the better the fluidity of the filling material, but if the temperature is too high, it is easy to cause changes to the original structure of the sample, so it is only heated to the third temperature at most. 3. Wide applicability and strong versatility: This preparation method is not only applicable to products processed with hollow blind silicon vias, but can also be promoted and applied to other hollow blind via products with similar structures, and has a wide range of applicability. 4. Low cost and good economy: The filling materials and equipment used are conventional and economical, without adding extra expensive costs, and have good economic benefits and market competitiveness. 5. Simple operation and easy implementation: The entire preparation method process is reasonably designed, simple and easy to operate, does not require complex equipment and highly professional technicians, and is easy to promote and apply on a large scale. 6. Improve product quality and ensure yield rate: By accurately controlling and optimizing each link, it helps to improve the quality and yield rate of the final product and meet the increasingly stringent industry standards.
[0039] In summary, the preparation method provided in the embodiments of the present invention has significant advantages in terms of efficiency, accuracy, scope of application and cost, and has important practical value and promotion significance.
[0040] In some embodiments, the filling material is epoxy resin A glue or other glue with good fluidity and stable chemical properties.
[0041] The above-mentioned filling material has good fluidity and filling properties, can completely fill the small holes of the sample, and remain stable during the subsequent FIB processing.
[0042] In some embodiments, the thickness of the filling material coated on the sample surface is no more than 0.5 mm to prevent the glue surface at the hole from being pressed against by the air pressure in the hole, so that the glue cannot flow in.
[0043] In some embodiments, the first temperature is 45°C, the second temperature is 80°C, and the third temperature is 100°C.
[0044] In some embodiments, the fourth temperature is 40-45°C.
[0045] In some preferred embodiments, the fourth temperature is 45°C.
[0046] In some embodiments, after cooling the sample after the gradient heating treatment to the fourth temperature, the method further includes wiping the sample after the gradient heating treatment with a dust-free cloth dipped in anhydrous ethanol to remove excess filling material on the surface of the sample.
[0047] In some embodiments, before coating a layer of filling material on the surface of the sample, the method further includes the step of: performing a purge treatment on the sample to ensure that the surface of the sample remains clean.
[0048] An embodiment of the present invention provides a sample for through silicon via processing, and the product for through silicon via processing is prepared by the above-mentioned preparation method.
[0049] The embodiment of the present invention provides the application of the above-mentioned product for through silicon via processing in through silicon via processing
[0050] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments, and are only for illustrating the present invention but not limiting the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention.
[0051] Example 1
[0052] A preparation of a product for through silicon via processing and subsequent through silicon vias, comprising the following steps:
[0053] Take a small sample (a wafer crack with a size not exceeding 20mm×20mm×0.5mm), transfer the sample, heating table, epoxy resin A glue, toothpick and tweezers to a glove box filled with nitrogen atmosphere. The nitrogen atmosphere can ensure that the sample is not further oxidized during the heating process; use a toothpick to apply an appropriate amount of epoxy resin A glue and evenly apply it on the surface of the sample with a thickness of no more than 0.5mm; after applying epoxy resin A glue, place the sample on the heating table with tweezers, and gradually heat the sample to 45℃ under the protection of nitrogen, and keep it at this temperature for half an hour, continue to heat it to 80℃, and keep it warm for 1 hour. At this temperature, epoxy resin A glue is in the form of droplets. Keep stirring the epoxy resin A glue on the surface of the sample with a toothpick, which is conducive to better filling the tiny through holes inside the sample. Continue to heat it to 100℃ and keep it warm for 0.5 hours. At this temperature, the fluidity of epoxy resin A glue continues to increase, but the insulation time should not be too long to avoid changes to the original structure of the sample.
[0054] Then cool down to 45℃, keep warm for half an hour, turn off the heating stage, and wait for the sample to return to room temperature. Use tweezers to hold the sample and remove the sample stage. After this series of heating and insulation processes, epoxy resin A glue can effectively fill the through holes of the sample and form a solid support structure inside it. After taking the sample out of the glove box, wipe the surface with a dust-free cloth dipped in anhydrous ethanol to wipe off excess residual glue and ensure that the sample surface is dust-free and oil-free.
[0055] The sample was fixed on the pre-tilted sample stage of the FIB using conductive carbon glue. The sample stage has micron-level adjustment accuracy. After being firmly fixed, the sample surface was at an angle of 36° to the horizontal plane. The sample was then sent into the FIB sample chamber and the sample chamber was evacuated to a vacuum level of less than or equal to 1×10 -4 Pa, the vacuum degree of the electron beam chamber is less than or equal to 5×10 -8 Pa.
[0056] Turn on the electron beam and ion beam, and focus and image the edge of the sample by adjusting the electron beam voltage, current, Focus, astigmatism, brightness, contrast and other parameters. The edge of the sample after splitting has a clear top-down columnar structure. Select the upper surface position of the edge of the sample, adjust it until the image is clear, gradually link the height of the sample stage to the working distance of the equipment, and readjust the parameters until the image is clear. Rotate the sample stage so that its angle with the normal direction of the Z axis is 2°. Use the electron beam to observe whether the position of the sample at the center of the field of view changes before and after rotation. If the deviation is too large, it is necessary to adjust the height of the sample stage to pull the original sample position back to the center of the field of view. Continue to rotate the sample stage to an angle of 5° with the normal direction of the Z axis, and repeat the above operation until it is rotated to 16°, and the deviation distance of the sample position before and after rotation does not exceed 1um.
[0057] The sample stage is rotated to 16° so that the angle between the sample surface and the horizontal plane is 52° and it is parallel to the ion gun. The gas injection system module of the FIB equipment is used to deposit a W or C protective layer above the target pinhole area. The ion beam voltage for depositing the protective layer is 30KV, the ion beam current is 9.3nA, the area of the protective layer is 40um×15um, and the thickness of the protective layer is 3um. In the subsequent ion beam cutting process, the protective layer can protect the sample surface to prevent the ion beam from damaging it and losing the real information of the sample surface.
[0058] Activate the ion beam window, select the cutting parameters for the first rough machining, refresh the ion beam imaging interface, select the area directly below the protective layer, and the upper surface of the machining area does not exceed the diameter of the TSV hole in the protective layer. Considering that the ion beam under a large beam current may scrape other areas, the top of the rough machining area can only select the position that just touches the TSV columnar structure. Keep refreshing the electron beam interface during the machining process, and stop the ion beam machining immediately when the TSV hole is slightly exposed.
[0059] After the first rough machining is completed, adjust the ion beam to the cutting parameters of the second rough machining, refresh the ion beam imaging interface, select the processing area, continue to cut the slightly exposed TSV hole structure until it is completely exposed, and stop the ion beam processing immediately. Generally, in this step, if it is observed that the top and bottom of the TSV hole structure are exposed for too long, it is considered that the sample surface is not parallel to the ion beam, and the sample stage needs to be adjusted to rotate ±4° until the top and bottom of the TSV hole structure are exposed together during processing.
[0060] A marking area is selected near the protective layer, and an "×"-shaped groove is etched with a depth of 5um. After the marking area is completed, the target processing area and the marking area are adjusted to be in the center of the ion beam field of view (marking processing process). The exposed TSV hole structure is selected as the processing area, and the target is processed to the position of the small hole diameter. During the swinging processing, the system automatically positions according to the mark and cuts according to the set parameters. In this embodiment, the ion beam voltage of the swinging processing is 30KV, the ion beam current is 9.3nA, the step length between every two knives is 10nm, the angle of each rotation is ±8°, and an electron beam image is automatically taken every four knives. After the operator observes that the TSV hole structure is completely exposed in the electron beam imaging, the swinging processing (swinging processing process) is immediately stopped.
[0061] The above ion beam processing parameters are as follows Table 1
[0062] First roughing Second roughing Marking Processing Swing processing Ion beam voltage 30kV 30kV 30 30kV Ion beam current 0.1uA 9.3nA 2.1nA 9.3nA Cutting Depth 100um 60um 5um 60um Processing Angle 52° 53°~55° 53°~55° 52°
[0063] Comparative Example 1
[0064] This comparative example is basically the same as Example 1, except that the sample is not coated with a filling material and is not subjected to a gradient heating treatment.
[0065] Comparative Example 2
[0066] This comparative example is basically the same as Example 1, except that: the sample is electroplated and filled: copper is gradually deposited in the TSV hole by using a copper system electroplating solution and additives in an electroplating machine.
[0067] Comparative Example 3
[0068] This comparative example is basically the same as Example 1, except that after the sample is coated with epoxy resin A glue, tweezers are used to place the sample on a heating table, and under the protection of nitrogen, the sample is gradually heated to 45° C. and maintained at this temperature for 3 hours.
[0069] Performance testing experiment
[0070] The products prepared in Example 1 and Comparative Examples 1-3 were subjected to scanning electron imaging.
[0071] Specifically, the product prepared in Example 1 was analyzed for the intra-hole structure: the diameter of the TSV pore was 2.7um, the depth was 43.2um, and the aspect ratio was 1:16. After the ion beam processing was completed, the sample stage was further tilted to 36° to make the TSV hole perpendicular to the electron beam. The SEM image of the cross-section of the TSV hole structure formed after processing at a magnification of 2000x was as follows: Figure 1 As shown, the SEM image of the cross section of the insulating layer, dielectric layer and seed layer structure at 15000x magnification is as follows Figure 2 As shown in the SEM image at 35000x magnification Figure 3 shown.
[0072] The product prepared in Comparative Example 1 is cut directly using FIB and the swing processing process is shown in the figure. Figure 4 As shown, Figure 5 This is a SEM image of the hole sidewall at 15000x magnification after the swing process. It can be seen that the anti-deposition layer adheres to the inside of the hollow hole. Due to structural limitations, it is impossible to use an ion beam to clean or process only the anti-deposition layer inside the hole.
[0073] The product prepared in Comparative Example 2 has a SEM image as shown in Figure 6 and Figure 7 As shown in the figure, it can be seen that the difficulty of electroplating filling is that the bottom of the through hole cannot be filled well.
[0074] The product prepared in Comparative Example 3 has a SEM image as shown in Figure 8 As shown in the figure, it can be seen that the temperature is not enough and only a depth-to-width ratio filling of 1:4 can be achieved.
[0075] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.
Claims
1. A method for preparing a product for through silicon via processing, characterized in that: The preparation method comprises the following steps: Apply a layer of filler material to the surface of the sample; Under an inert atmosphere, the sample coated with the filling material is subjected to a gradient heating treatment, wherein the gradient heating treatment specifically comprises: heating the sample coated with the filling material at a first temperature for a first time, then heating it to a second temperature, heating it at the second temperature for a second time, then heating it to a third temperature, and heating it at the third temperature for a third time; Cooling the sample after the gradient heating treatment to a fourth temperature, and then performing focused ion beam treatment to complete cutting and etching of the sample after the gradient heating treatment to obtain the product for through silicon via processing; Among them, the first temperature is 40-45°C, the first time is 1 hour, the second temperature is 70-80°C, the second time is 1 hour, the third temperature is 100-105°C, and the third time is 0.5 hour.
2. The method for preparing a product for through silicon via processing according to claim 1, characterized in that: The filling material is epoxy resin A glue.
3. The method for preparing a product for through silicon via processing according to claim 1, characterized in that: The thickness of the filling material coated on the surface of the sample does not exceed 0.5 mm.
4. The method for preparing a product for through silicon via processing according to claim 1, characterized in that: The first temperature is 45°C, the second temperature is 80°C, and the third temperature is 100°C.
5. The method for preparing a product for through silicon via processing according to claim 1, characterized in that: The fourth temperature is 40-45°C.
6. The method for preparing a product for through silicon via processing according to claim 5, characterized in that: The fourth temperature is 45°C.
7. The method for preparing a product for through silicon via processing according to claim 1, characterized in that: After cooling the sample after the gradient heating treatment to the fourth temperature, the method further includes the step of wiping the sample after the gradient heating treatment with a dust-free cloth dipped in anhydrous ethanol to remove excess filling material on the surface of the sample.
8. The method for preparing a product for through silicon via processing according to claim 1, characterized in that: Before coating a layer of filling material on the surface of the sample, the method further includes the step of: performing a purging treatment on the sample to ensure that the surface of the sample remains clean.
9. A product for through silicon via processing, characterized in that: The product for through silicon via processing is prepared by the preparation method according to any one of claims 1 to 8.
10. Use of the product for through silicon via processing according to claim 9 in through silicon via processing.
Citation Information
Patent Citations
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