Method and apparatus for screening semiconductor processes

By constructing a simulation model library and a process database, and combining simulation circuit modules and user weights, multi-dimensional simulation evaluation is carried out, which solves the standardization problem of semiconductor process selection, improves the accuracy and efficiency of process selection, reduces the accumulation of chip design errors, and lowers costs.

CN120068376BActive Publication Date: 2026-02-10HANGZHOU ZHAOZAI YONGXIN NETWORK TECHNOLOGY CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202411996168.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2026-02-10
Estimated Expiration
2044-12-31

AI Technical Summary

Technical Problem

In the existing technology, the selection of semiconductor processes lacks standardized and specific evaluation methods, which leads to extended design cycles, low efficiency, and the accumulation of small errors in individual device parameters into huge errors in chip function and performance as the number of these errors increases.

Method used

We construct a simulation model library and a process database. By combining the performance data of simulation circuit modules and process platform devices with user attention weights, we conduct multi-dimensional simulation evaluation and deviation analysis to provide a reference for process selection decisions.

Benefits of technology

Multi-dimensional simulation evaluation reduces the cumulative impact of individual device parameter errors, improves the accuracy and efficiency of process selection, shortens the design cycle, and reduces the probability of tape-out failure and production costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120068376B_ABST
    Figure CN120068376B_ABST
Patent Text Reader

Abstract

The application discloses a method and device for screening semiconductor process, and takes typical circuit module as the minimum unit of simulation evaluation, so that the problem that the tiny error of single device parameter is continuously accumulated under the increase of device quantity and becomes the huge error influencing the overall function and performance of the chip can be avoided as far as possible, and the process platform evaluation is closer to the production practice.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of semiconductor simulation application technology, and in particular to a method and apparatus for screening semiconductor processes. Background Technology

[0002] Currently, in the professional field, manufacturing plants perform various physical tests on basic components such as resistors, capacitors, inductors, CMOS transistors, diodes, and transistors, and compile the test results into document formats and PCELL individual component simulation models. When selecting a manufacturing process, designers typically consult process manuals or conduct performance simulations of individual components. Subjectively, they consider past experience, market factors, product direction, and other factors to decide which process to use for the design.

[0003] Based on the existing methods described above, designers find it difficult to fully and deeply understand the specific differences between various processes, and there is no concrete method to standardize and concretize the process selection. Relying solely on document content and subjective judgment to make process selections prolongs the product development cycle and is inefficient, which to some extent increases the probability of tape-out failures and production costs.

[0004] Currently, the parameters provided by process manufacturers are generally those of individual devices—the basic components that make up the circuit, such as the threshold voltage of a CMOS transistor and the resistance value of a resistor. To avoid errors, manufacturers often provide conservative values ​​and round them to two decimal places. This introduces extremely small errors. However, chip design often involves hundreds of thousands or even millions of components. These tiny errors in individual device parameters accumulate as the number of components increases, becoming significant errors that affect the overall functionality and performance of the chip. Chip design engineers can only select a process based on the parameters of the underlying components or their own experience. Summary of the Invention

[0005] This invention provides a method and apparatus for screening semiconductor processes, aiming to overcome the shortcomings of existing technologies that use the performance of basic devices as process evaluation indicators.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] This application discloses a method for screening semiconductor processes, the method comprising the following steps:

[0008] Step 1: Construct a simulation model library, which includes simulation circuit modules that users can select, and a preset simulation scheme corresponding to each simulation circuit module; Construct a process database, which includes device performance data of process platforms that users can select.

[0009] Step 2: Based on the user's selection, load the simulation circuit module and the performance data of multiple candidate process platform devices;

[0010] Step 3: Based on the preset simulation scheme, obtain the simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module;

[0011] Step 4: Obtain the user's attention weight, and statistically analyze the simulation evaluation results of each process platform based on the attention weight to obtain the final process evaluation result, providing a decision reference for the user's semiconductor process selection.

[0012] Preferably, the simulation scheme includes simulation state parameters, simulation strategy, and performance evaluation parameters.

[0013] Preferably, the simulation state parameters include state parameters in at least two dimensions, and each dimension of state parameters includes one typical state parameter and multiple atypical state parameters.

[0014] Preferably, the simulation strategy is constructed in a manner that further includes:

[0015] All state parameters across all dimensions are arranged and combined to form a series of simulation schemes, and the simulation results for evaluating performance parameters are recorded.

[0016] The simulation results when the state parameters of each dimension are typical state parameters are extracted and used as typical values ​​for evaluating performance parameters.

[0017] Based on the principle of controlled variables, the simulation results of the evaluation performance parameters of each dimension state parameter in atypical state parameters are extracted as the first atypical value.

[0018] The simulation results of the evaluation performance parameters of the remaining simulation schemes are used as the second atypical values;

[0019] Calculate the deviation values ​​of the first and second atypical values ​​and the typical values ​​of the state parameters for each dimension;

[0020] Preferably, step 4 further includes:

[0021] Step 401, obtaining the user's attention weight, specifically refers to the weight data of the user for each dimension state parameter;

[0022] Step 402: Calculate the process evaluation result for a candidate process platform based on the weighted data and the deviation values ​​of atypical and typical values ​​of each dimension state parameter.

[0023] Step 403: Compare the process evaluation results of each candidate process platform to provide decision-making reference for users' semiconductor process selection;

[0024] Preferably, the step of statistically analyzing the deviation between the atypical and typical values ​​of each dimension's state parameter further includes:

[0025] Find the maximum and minimum values ​​among the first and second atypical values;

[0026] The maximum and minimum values ​​in the first atypical values ​​are compared with the typical values ​​of the same performance parameter to obtain multiple first deviation values, and the first deviation values ​​correspond to each state parameter dimension.

[0027] The maximum and minimum values ​​in the first atypical value are compared with the typical values ​​of the same performance parameter to obtain the second deviation value, which represents the overall deviation.

[0028] Preferably, the state parameters include at least process angle, voltage, and temperature.

[0029] This application also provides an apparatus for screening semiconductor processes, including:

[0030] The simulation model library includes simulation circuit modules that users can select, as well as preset simulation schemes for each simulation circuit module.

[0031] A process database, which includes device performance data for process platforms that can be selected by the user;

[0032] The user selection module is used to load the simulation circuit module and the performance data of multiple candidate process platform devices.

[0033] The simulation module is used to obtain simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module based on a preset simulation scheme.

[0034] The process evaluation module is used to obtain the user's attention weight, and to obtain the final process evaluation result by statistically analyzing the simulation evaluation results of each process platform based on the attention weight, so as to provide a decision reference for the user's semiconductor process selection.

[0035] The proposed solution uses typical circuit modules as the smallest unit for simulation evaluation, thereby minimizing the accumulation of small errors in individual device parameters as the number of devices increases, which can lead to huge errors affecting the overall function and performance of the chip, making the process platform evaluation closer to actual production. Attached Figure Description

[0036] Figure 1 This is a flowchart of the present invention.

[0037] Figure 2 This is a logic block diagram of the present invention.

[0038] Figure 3 This is an example diagram of the simulation circuit module in this invention. Detailed Implementation

[0039] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0040] The present invention provides a method for screening semiconductor processes, the method comprising the following steps:

[0041] Step 1: Construct a simulation model library, which includes simulation circuit modules that users can select, and preset simulation schemes corresponding to each simulation circuit module; construct a process database, which includes device performance data of process platforms that users can select.

[0042] The simulation scheme includes simulation state parameters, simulation strategy, and performance evaluation parameters.

[0043] The simulation state parameters include state parameters in at least two dimensions, and each dimension of state parameters includes one typical state parameter and multiple atypical state parameters.

[0044] For example, commonly used state parameters include at least process angle, voltage, and temperature.

[0045] Step 2: Based on the user's selection, load the simulation circuit module and the performance data of multiple candidate process platform devices;

[0046] Step 3: Based on the preset simulation scheme, obtain the simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module.

[0047] This step is performed according to the simulation strategy in the simulation scheme corresponding to the simulation circuit module.

[0048] The simulation strategy is further constructed by including:

[0049] All state parameters across all dimensions are arranged and combined to form a series of simulation schemes, and the simulation results for evaluating performance parameters are recorded.

[0050] The simulation results when the state parameters of each dimension are typical state parameters are extracted and used as typical values ​​for evaluating performance parameters.

[0051] Based on the principle of controlled variables, the simulation results of the evaluation performance parameters of each dimension state parameter in atypical state parameters are extracted as the first atypical value.

[0052] The simulation results of the evaluation performance parameters of the remaining simulation schemes are used as the second atypical values;

[0053] The deviation values ​​of the first and second atypical values ​​and the typical values ​​of each dimension's state parameter are calculated separately.

[0054] Step 4: Obtain the user's attention weight, and statistically analyze the simulation evaluation results of each process platform based on the attention weight to obtain the final process evaluation result, providing a decision reference for the user's semiconductor process selection.

[0055] Step 4 further includes:

[0056] Step 401, obtaining the user's attention weight, specifically refers to the weight data of the user for each dimension state parameter;

[0057] Step 402: Calculate the process evaluation result for a candidate process platform based on the weighted data and the deviation values ​​of atypical and typical values ​​of each dimension state parameter.

[0058] The deviation between atypical and typical values ​​of each dimension's state parameter is statistically analyzed, further including:

[0059] Step 4021: Obtain the maximum and minimum values ​​among the first and second atypical values;

[0060] Step 4022: Compare the maximum and minimum values ​​in the first atypical values ​​with the typical values ​​of the same performance parameter to obtain multiple first deviation values, and the first deviation values ​​correspond to each state parameter dimension.

[0061] Step 4023: Compare the maximum and minimum values ​​in the first atypical values ​​with the typical values ​​of the same performance parameter to obtain the second deviation value, which represents the overall deviation.

[0062] Step 403: Compare the process evaluation results of each candidate process platform to provide decision-making reference for users' semiconductor process selection.

[0063] This application also provides an apparatus for screening semiconductor processes, specifically including:

[0064] Simulation model library 1, which includes simulation circuit modules that users can select, and a preset simulation scheme corresponding to each simulation circuit module;

[0065] Process database 2, which includes device performance data for process platforms that can be selected by the user;

[0066] User selection module 3 is used to load the simulation circuit module and the performance data of multiple candidate process platform devices;

[0067] Simulation module 4 is used to obtain simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module based on a preset simulation scheme.

[0068] The process evaluation module 5 is used to obtain the user's attention weight, and to obtain the final process evaluation result by statistically analyzing the simulation evaluation results of each process platform based on the attention weight, so as to provide a decision reference for the user's semiconductor process selection.

[0069] like Figure 3 As shown below, a specific example will be used to further illustrate the solution of this application.

[0070] Here, we take the performance differences of a D flip-flop circuit module under different process platforms as an example:

[0071] First, set up the same POR structure and change the circuit diagram to POR. The POR should explain the disappearance of vth during the design process, and consistency should be maintained.

[0072] The simulation environment standards for various POR indicators have been standardized. The purpose of this standardization is to unify the variables, so that the simulation results can be compared and referenced under the same variables.

[0073] The main factors affecting circuit performance parameters are process angle, voltage, and temperature.

[0074] The simulation environment standard is set as follows:

[0075] Process angles: tt, ss, ff, sf, fs, where tt refers to typical, i.e., typical state.

[0076] Voltage: Rated voltage (3.3V for this module), 0.9 * rated voltage, 1.1 * rated voltage

[0077] Temperature: -40℃, 25℃ (normal temperature), 125℃

[0078] Each factor is simulated at three fixed points, resulting in a total of 5*3*3=45 cases. The parameter range under this simulation includes all values ​​of the circuit's performance parameters.

[0079] The typical state is defined as tt (typical, typical), rated voltage (3.3V for this module), and 25℃ (room temperature) among the 45 states. The performance parameters of the circuit under this state are called typical values.

[0080] Simulations were performed on three processes A / B / C. The table below shows the proposed results, not the simulation results.

[0081] Process A

[0082] 45 corners

[0083]

[0084] The process angle remains constant at tt, the power supply voltage remains constant at 3.3V, and the temperatures are -40℃, 25℃, and 125℃.

[0085]

[0086] With the temperature remaining constant at 25℃ and the power supply voltage remaining constant at 3.3V, the process angles tt, ss, ff, sf, fs are...

[0087]

[0088] The process angle remains constant at tt, the temperature remains constant at 25℃, and the power supply voltage is 3.63V, 3.3V, and 2.97V.

[0089]

[0090] Process B

[0091] 45 corners

[0092]

[0093] The process angle remains constant at tt, the power supply voltage remains constant at 3.3V, and the temperatures are -40℃, 25℃, and 125℃.

[0094]

[0095] With the temperature remaining constant at 25℃ and the power supply voltage remaining constant at 3.3V, the process angles tt, ss, ff, sf, fs are...

[0096]

[0097] The process angle remains constant at tt, the temperature remains constant at 25℃, and the power supply voltage is 3.63V, 3.3V, and 2.97V.

[0098]

[0099] C process

[0100] 45 corners

[0101]

[0102] The process angle remains constant at tt, the power supply voltage remains constant at 3.3V, and the temperatures are -40℃, 25℃, and 125℃.

[0103]

[0104] With the temperature remaining constant at 25℃ and the power supply voltage remaining constant at 3.3V, the process angles tt, ss, ff, sf, fs are...

[0105]

[0106] The process angle remains constant at tt, the temperature remains constant at 25℃, and the power supply voltage is 3.63V, 3.3V, and 2.97V.

[0107]

[0108] The deviation of the maximum value from the typical value under all corners is Ax (percentage value);

[0109] The deviation of the minimum value from the typical value under the full corner is An (percentage value);

[0110] With the process angle tt constant and the power supply voltage 3.3V, the deviation of the maximum value from the typical value under temperature variation is Tx (percentage value).

[0111] With the process angle tt constant and the power supply voltage 3.3V, the deviation of the minimum value from the typical value under temperature change is Tn (percentage value).

[0112] With the temperature constant at 25℃ and the power supply voltage at 3.3V, the deviation of the maximum value from the typical value under process angle variation is Px (percentage value).

[0113] With the temperature constant at 25℃ and the power supply voltage at 3.3V, the deviation of the minimum value from the typical value under process angle variation is Pn (percentage value).

[0114] With the process angle tt and temperature 25℃ constant, the deviation of the maximum value from the typical value under varying power supply voltage is Vx (percentage value).

[0115] With the process angle tt and temperature 25℃ constant, the deviation of the minimum value from the typical value under power supply voltage variation is Vn (percentage value).

[0116] By comparing the performance parameters under different process platforms, engineers are very clear about which aspects of the module's performance they are more concerned about when selecting a process before designing the module.

[0117] This embodiment provides weight data.

[0118] Very important: a=1.5

[0119] Highly valued: b=1.25

[0120] As long as it's normal: c=1

[0121] It can be slightly worse: d=0.75

[0122] It can't be too bad: e=0.5

[0123] Suppose that the designer places great importance on Ax and An when selecting processes, pays more attention to Tx, thinks that Tn, Px, and Pn are fine as long as they are normal, and that the performance of Vx and Vn can be slightly worse.

[0124] He can then substitute the values ​​into the formula a*Ax+a*An+b*Tx+c*Tn+c*Px+c*Pn+d*Vx+d*Vn for calculation (or assign weights to each value in the software for calculation). The process that yields the minimum value is the one that best meets the engineer's design expectations. When the engineer's priorities change (i.e., the weights of each item change), the optimal process may also differ.

Claims

1. A method for screening semiconductor processes, characterized in that, The method includes the following steps: Step 1: Construct a simulation model library, which includes simulation circuit modules that users can select, and a preset simulation scheme corresponding to each simulation circuit module; Construct a process database, which includes device performance data of process platforms that users can select. Step 2: Based on the user's selection, load the simulation circuit module and the performance data of multiple candidate process platform devices; Step 3: Based on the preset simulation scheme, obtain the simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module; Step 4: Obtain the user's attention weight, and based on the attention weight, calculate the simulation evaluation results of each process platform to obtain the final process evaluation result, providing a decision reference for the user's semiconductor process selection. The simulation scheme includes simulation state parameters, simulation strategy, and performance evaluation parameters; The simulation state parameters include state parameters in at least two dimensions, and each dimension of state parameters includes one typical state parameter and multiple atypical state parameters; The simulation strategy is further constructed by including: All state parameters across all dimensions are arranged and combined to form a series of simulation schemes, and the simulation results for evaluating performance parameters are recorded. The simulation results when the state parameters of each dimension are typical state parameters are extracted and used as typical values ​​for evaluating performance parameters. Based on the principle of controlled variables, the simulation results of the evaluation performance parameters of each dimension state parameter in atypical state parameters are extracted as the first atypical value. The simulation results of the evaluation performance parameters of the remaining simulation schemes are used as the second atypical values; Calculate the deviation values ​​of the first and second atypical values ​​and the typical values ​​of the state parameters for each dimension; Step 4 further includes: Step 401, obtaining the user's attention weight, specifically refers to the weight data of the user for each dimension state parameter; Step 402: Calculate the process evaluation result for a candidate process platform based on the weighted data and the deviation values ​​of atypical and typical values ​​of each dimension state parameter. Step 403: Compare the process evaluation results of each candidate process platform to provide decision-making reference for users' semiconductor process selection; The deviation between atypical and typical values ​​of each dimension's state parameter is statistically analyzed, further including: Find the maximum and minimum values ​​among the first and second atypical values; The maximum and minimum values ​​in the first atypical values ​​are compared with the typical values ​​of the same performance parameter to obtain multiple first deviation values, and the first deviation values ​​correspond to each state parameter dimension. The maximum and minimum values ​​in the second atypical values ​​are compared with the typical values ​​of the same performance parameter to obtain the second deviation value, which represents the overall deviation.

2. The method for screening semiconductor processes according to claim 1, characterized in that, The state parameters include at least process angle, voltage, and temperature.

3. An apparatus for screening semiconductor processes, characterized in that, The apparatus is used to perform a method for screening semiconductor processes as described in claim 1, comprising: The simulation model library includes simulation circuit modules that users can select, as well as preset simulation schemes for each simulation circuit module. A process database, which includes device performance data for process platforms that can be selected by the user; The user selection module is used to load the simulation circuit module and the performance data of multiple candidate process platform devices. The simulation module is used to obtain simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module based on a preset simulation scheme. The process evaluation module is used to obtain the user's attention weight, and to obtain the final process evaluation result by statistically analyzing the simulation evaluation results of each process platform based on the attention weight, so as to provide a decision reference for the user's semiconductor process selection.

Citation Information

Patent Citations

  • Semiconductor process corner scanning and simulating method based on numerical value selection function

    CN103440391A