High electron mobility transistor
By doping carbon and iron in the buffer layer of a high electron mobility transistor, a multi-layer structure is formed, and the impact of gradually reducing iron doping concentration on two-dimensional electron gas is solved, and the problem of improving the voltage withstand capacity of the component in the prior art affects the operating efficiency is achieved, and efficient voltage withstand capacity and operating efficiency maintenance is achieved.
Patent Information
- Application Number
- CN202311545754.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-20
- Publication Date
- 2025-05-30
AI Technical Summary
Existing high-electron mobility transistors can easily affect operating performance when improving component voltage resistance.
By doping carbon and iron into the buffer layer, a multi-layer structure is formed, wherein the iron doping concentration of the third buffer gradually decreases from the second buffer toward the channel layer to improve the component's voltage resistance and maintain operational efficiency.
It effectively improves the component voltage resistance of high electron mobility transistors, while maintaining operating efficiency, and reduces the impact on two-dimensional electron gas through gradually decreasing iron doping concentration.
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Figure CN120076388A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to high electron mobility transistors; in particular, it relates to a high electron mobility transistor with carbon and iron doping. Background Art
[0002] It is known that a High Electron Mobility Transistor (HEMT) has a structure in which a heterojunction is formed on a substrate, and a two-dimensional electron gas (2-DEG) is formed at the heterojunction between two materials with different energy gaps. The high electron mobility transistor uses the two-dimensional electron gas with high electron mobility as the carrier channel of the transistor, and thus has characteristics such as high breakdown voltage, high electron mobility, low on-resistance, and low input capacitance, and can thus be widely applied to high-power semiconductor devices.
[0003] Generally, in order to improve the breakdown voltage of the device, doping is usually performed on the buffer layer of the high electron mobility transistor. For example, doping carbon into the buffer layer can effectively improve the breakdown voltage of the high electron mobility transistor. However, carbon doping will also affect the operating performance of the high electron mobility transistor at the same time. Therefore, how to provide a high electron mobility transistor that can improve the breakdown voltage of the device without affecting the operating performance is an urgent problem to be solved. Summary of the Invention
[0004] In view of this, an object of the present invention is to provide a high electron mobility transistor that can improve the breakdown voltage of the device without affecting the operating performance.
[0005] To achieve the above object, a high electron mobility transistor provided by the present invention includes a substrate, a nucleation layer, a buffer layer, a channel layer, and a barrier layer. The nucleation layer is disposed on the substrate. The buffer layer includes a first buffer zone, a second buffer zone, and a third buffer zone. The first buffer zone includes a first nitride stack layer and a second nitride stack layer. The first nitride stack layer is disposed on the nucleation layer, and the second nitride stack layer is disposed on the first nitride stack layer. The second buffer zone is disposed on the first buffer zone and has carbon and iron doping; the third buffer zone is disposed on the second buffer zone and has carbon and iron doping. The channel layer is disposed on the buffer layer. The barrier layer is disposed on the channel layer. The third buffer zone is located between the second buffer zone and the channel layer, the carbon doping concentration of the third buffer zone is greater than the iron doping concentration, and the iron doping concentration of the third buffer zone gradually decreases in the direction from the second buffer zone to the channel layer. The average aluminum composition of the first nitride stack layer is greater than the average aluminum composition of the second nitride stack layer. The second nitride stack layer has carbon and iron doping, and the carbon doping concentration of the second nitride stack layer is greater than the iron doping concentration.
[0006] In an embodiment of the present invention, the second buffer layer includes a first buffer sub-layer, and the carbon doping concentration of the first buffer sub-layer is greater than the iron doping concentration.
[0007] In an embodiment of the present invention, the second buffer layer includes at least one second buffer sub-layer and at least one third buffer sub-layer stacked on top of each other. In at least one second buffer sub-layer, the carbon doping concentration is greater than the iron doping concentration, and in at least one third buffer sub-layer, the iron doping concentration is greater than the carbon doping concentration.
[0008] In an embodiment of the present invention, the thickness of at least one second buffer sub-layer is greater than the thickness of at least one third buffer sub-layer.
[0009] In an embodiment of the present invention, the carbon doping concentration of at least one third buffer sub-layer is less than 1E17 cm -3 and the iron doping concentration is greater than 1E17 cm -3 .
[0010] In an embodiment of the present invention, the carbon doping concentration of at least one second buffer sub-layer is greater than 5E18 cm -3 .
[0011] In an embodiment of the present invention, the second nitride stack layer is located between the first nitride stack layer and the second buffer layer, and the average aluminum composition of the first nitride stack layer is greater than 25%, and the average aluminum composition of the second nitride stack layer is less than 25%.
[0012] In an embodiment of the present invention, the first nitride stack layer and the second nitride stack layer each include at least one nitride semiconductor layer, and the composition is Al X G a1-X N(1≤X≤0).
[0013] In an embodiment of the present invention, the channel layer has iron doping, and the iron doping concentration of the channel layer decreases in the direction away from the buffer layer.
[0014] In an embodiment of the present invention, the thickness of the third buffer layer is 1 nm to 1000 nm.
[0015] In an embodiment of the present invention, the iron doping concentration of the third buffer layer adjacent to the channel layer is between 1E18 cm -3 and 1E17 cm -3 .
[0016] In an embodiment of the present invention, a two-dimensional electron gas (2DEG) is formed at the interface between the channel layer and the barrier layer, and the iron doping concentration at the interface between the channel layer and the barrier layer is less than 5E17 cm -3 .
[0017] The effect of the present invention is that by doping carbon and iron in the buffer layer, the breakdown voltage and operating efficiency of the high electron mobility transistor device can be improved. In addition, by means of the technical measure that the iron doping concentration in the third buffer layer gradually decreases from the junction with the second buffer layer to the junction with the channel layer, the influence of the iron doping in the third buffer layer on the carrier concentration of the two-dimensional electron gas in the channel layer can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 Cross-sectional view of a high electron mobility transistor according to a first embodiment of the present invention.
[0019] Figure 2 For Figure 1 Schematic diagram of the carbon and iron doping concentrations of the high electron mobility transistor structure.
[0020] Figure 3 Schematic diagram of the carbon and iron doping concentrations of the high electron mobility transistor structure according to a second embodiment of the present invention.
[0021] DESCRIPTION OF REFERENCE NUMERALS:
[0022] 1: High electron mobility transistor
[0023] 10: Substrate
[0024] 20: Nucleation layer
[0025] 30: Buffer layer
[0026] 40: Channel layer
[0027] 50: Barrier layer
[0028] D: Thickness direction
[0029] 2DEG: Two-dimensional electron gas
[0030] 32: First buffer
[0031] 34: Second buffer
[0032] 36: Third buffer
[0033] 321: First nitride stack
[0034] 322: Second nitride stack
[0035] 341: First buffer sublayer
[0036] 342: Second buffer sublayer
[0037] 343: Third buffer sublayer DETAILED DESCRIPTION OF THE INVENTION
[0038] To more clearly illustrate the present invention, preferred embodiments are given below in conjunction with the accompanying drawings for detailed description. Please refer to Figures 1 to 2 As shown, the high electron mobility transistor 1 of a first embodiment of the present invention can be an enhancement-mode high electron mobility transistor or a depletion-mode high electron mobility transistor. The above-mentioned high electron mobility transistor 1 includes a substrate 10, a nucleation layer 20, a buffer layer 30, a channel layer 40, and a barrier layer 50. The substrate 10, the nucleation layer 20, the buffer layer 30, the channel layer 40, and the barrier layer 50 are sequentially stacked along a thickness direction D.
[0039] A two-dimensional electron gas (2DEG) 2DEG is formed at the interface between the channel layer 40 adjacent to the barrier layer 50. In addition, the channel layer 40 has iron doping. In this embodiment, the iron doping concentration of the channel layer 40 gradually decreases from the junction of the channel layer 40 and the buffer layer 30 in a direction away from the buffer layer 30. In other embodiments, the iron doping concentration of the channel layer 40 is substantially maintained at a constant value. In this embodiment, the iron doping concentration at the interface between the channel layer 40 adjacent to the barrier layer 50 is less than 5E17 cm -3 . In this embodiment, the thickness of the barrier layer 50 is 20 nm, and the thickness of the channel layer 40 is 300 nm.
[0040] In this embodiment, the substrate 10 can be a silicon (Si) substrate, a gallium nitride (GaN) substrate, a silicon carbide (SiC) substrate, or a sapphire (Al 2 O 3 ) substrate. The nucleation layer 20 can be an aluminum nitride (AlN) layer. The channel layer 40 can be an undoped gallium nitride (uGaN) channel layer. The barrier layer 50 can be, for example, an aluminum gallium nitride (AlGaN), aluminum nitride (AlN), aluminum indium nitride (AlInN), or aluminum indium gallium nitride (AlInGaN) barrier layer.
[0041] The nucleation layer 20 is disposed on the substrate 10, and the buffer layer 30 is disposed on the nucleation layer 20. The buffer layer 30 includes a first buffer zone 32, a second buffer zone 34, and a third buffer zone 36. The first buffer zone 32, the second buffer zone 34, and the third buffer zone 36 are sequentially stacked along the thickness direction D. The first buffer zone 32 includes a first nitride stack layer 321 and a second nitride stack layer 322. The first nitride stack layer 321 is disposed on the nucleation layer 20. The second nitride stack layer 322 is disposed on the first nitride stack layer 321.
[0042] The second nitride stack layer 322 is located between the first nitride stack layer 321 and the second buffer layer 34. The average aluminum composition of the first nitride stack layer 321 is greater than that of the second nitride stack layer 322. The average aluminum composition is the atomic percentage of the entire nitride stack layer. The average aluminum composition of the first nitride stack layer 321 is greater than 25%, and the average aluminum composition of the second nitride stack layer 322 is less than 25%. The first nitride stack layer 321 and the second nitride stack layer 322 each include at least one nitride semiconductor layer, and the composition of at least one nitride semiconductor layer is Al X Ga1-XN (0 ≤ X ≤ 1).
[0043] In this embodiment, the second nitride stack layer 322 has carbon and iron doping, and the carbon doping concentration of the second nitride stack layer 322 is greater than the iron doping concentration. The thickness of the second nitride stack layer 322 is greater than that of the first nitride stack layer 321. The thickness of the first nitride stack layer 321 can be 400 nm to 600 nm, and the thickness of the second nitride stack layer 322 can be 3500 nm to 5000 nm. The first nitride stack layer 321 can be formed by stacking multiple nitride semiconductor layers, and the number of multiple nitride semiconductor layers can be 20 to 50 layers. When the number of multiple nitride semiconductor layers is less than or equal to 50 layers, the thickness of each layer is about 2 to 40 nm. In this embodiment, the first nitride stack layer 321 is formed by stacking 20 nitride semiconductor layers and has a thickness of 500 nm; the second nitride stack layer 322 can be formed by stacking multiple nitride semiconductor layers, and the number of multiple nitride semiconductor layers can be 130 to 230 layers. When the number of multiple nitride semiconductor layers is less than or equal to 200 layers, the thickness of each layer is about 2 to 40 nm. In this embodiment, the second nitride stack layer 322 is formed by stacking 130 nitride semiconductor layers and has a thickness of 4000 nm.
[0044] Furthermore, in this embodiment, the carbon doping concentration and the iron doping concentration of the second nitride stack layer 322 are respectively maintained at constant values in the thickness direction D, where the carbon doping concentration is preferably greater than or equal to 5E18 cm -3 and the iron doping concentration is preferably greater than or equal to 1E17 cm -3 .
[0045] The above-mentioned second buffer layer 34 is disposed on the first buffer layer 32, and the second buffer layer 34 has carbon and iron doping. In this embodiment, the second buffer layer 34 can be a doped gallium nitride (doped GaN) layer. In this embodiment, the thickness of the second buffer layer 34 is 2800 nm to 3200 nm. In this embodiment, the carbon doping concentration and the iron doping concentration of the second buffer layer 34 are respectively maintained at a constant value in the thickness direction D. In this embodiment, the second buffer layer 34 includes a first buffer sub-layer 341, and the first buffer sub-layer 341 can be a gallium nitride (GaN) layer. The carbon doping concentration of the first buffer sub-layer 341 is greater than the iron doping concentration, wherein the carbon doping concentration is preferably greater than or equal to 5E18 cm -3 , and the iron doping concentration is preferably greater than or equal to 1E17 cm -3 . In addition, in this embodiment, the carbon doping concentration of the second nitride stack layer 322 is substantially equal to the carbon doping concentration of the first buffer sub-layer 341, and the iron doping concentration of the second nitride stack layer 322 is substantially equal to the iron doping concentration of the first buffer sub-layer 341.
[0046] Please continue to refer to Figure 1 and Figure 2 , a third buffer layer 36 is disposed on the second buffer layer 34, and the third buffer layer 36 has carbon and iron doping. The third buffer layer 36 can be gallium nitride (GaN). The channel layer 40 is disposed on the third buffer layer 36. The barrier layer 50 is disposed on the channel layer 40, and the third buffer layer 36 is located between the second buffer layer 34 and the channel layer 40.
[0047] In this embodiment, the iron element of the third buffer layer 36 is formed by the diffusion of the iron doping of the second buffer layer 34, that is, the iron doping of the third buffer layer 36 is non-intentionally doped. As Figure 2 shown, the carbon doping concentration of the third buffer layer 36 is greater than the iron doping concentration. The carbon doping concentration of the third buffer layer 36 is substantially maintained at a constant value in the thickness direction D, and the carbon doping concentration of the third buffer layer 36 is substantially equal to the carbon doping concentration of the second buffer layer 34. The carbon doping concentration of the third buffer layer is preferably greater than or equal to 5E18cm -3 . In summary, through the carbon and iron doping in the buffer layer 30, the element breakdown voltage and operation efficiency of the high electron mobility transistor 1 can be effectively improved.
[0048] In this embodiment, the iron doping concentration of the third buffer layer 36 gradually decreases from the second buffer layer 34 towards the channel layer 40, that is, the iron doping concentration of the third buffer layer 36 gradually decreases from the junction of the second buffer layer 34 and the third buffer layer 36 to the junction of the third buffer layer 36 and the channel layer 40. The iron doping concentration of the third buffer layer 36 adjacent to the channel layer 40 is between 1E18cm -3 and 1E17 cm -3Therefore, it is possible to reduce the influence of iron doping in the third buffer layer 36 on the carrier concentration of the two-dimensional electron gas in the channel layer 40. Further, the thickness of the third buffer layer 36 is 1 nm to 1000 nm. In some embodiments, the thickness of the third buffer layer 36 is 5 nm to 15 nm.
[0049] Please cooperate with Figure 3 , which is a schematic diagram of the carbon doping concentration and iron doping concentration distribution of the high electron mobility transistor in the second embodiment of the present invention. The high electron mobility transistor in the second preferred embodiment has substantially the same structure as the high electron mobility transistor 1 in the above first embodiment. The difference is that in the above first embodiment, the carbon doping concentration in the second buffer layer 34 is maintained at a constant value in the thickness direction D. In this embodiment, the second buffer layer 34 may also include at least one second buffer sub-layer 342 and at least one third buffer sub-layer 343 stacked on each other. That is, the second buffer sub-layer 342 is disposed on the third buffer sub-layer 343 to form a stacked layer, and one or more stacked layers may be included in the second buffer layer 34.
[0050] The second buffer sub-layer 342 and the third buffer sub-layer 343 may be gallium nitride (GaN) layers. The carbon doping concentration in at least one second buffer sub-layer 342 is greater than the iron doping concentration, and the iron doping concentration in at least one third buffer sub-layer 343 is greater than the carbon doping concentration. The thickness of at least one second buffer sub-layer 342 is greater than the thickness of at least one third buffer sub-layer 343. In this embodiment, the thickness of at least one second buffer sub-layer 342 is 2 to 10 times the thickness of at least one third buffer sub-layer 343. In addition, the carbon doping concentration of at least one second buffer sub-layer 342 is greater than 5E18 cm -3 and the iron doping concentration is greater than 1E17 cm -3 . The carbon doping and iron doping concentrations in at least one second buffer sub-layer 342 are substantially maintained at a constant value in the thickness direction D. The carbon doping concentration of the second buffer sub-layer 342 is substantially equal to the carbon doping concentration of the first buffer layer 32. The carbon doping concentration of at least one third buffer sub-layer 343 is less than 1E17 cm -3 and the iron doping concentration is greater than 1E17 cm -3 . The carbon doping and iron doping concentrations in at least one third buffer sub-layer 343 are substantially maintained at a constant value in the thickness direction D. Therefore, by alternately stacking at least one second buffer sub-layer 342 and at least one third buffer sub-layer 343 with different carbon doping concentrations, the technical effect of adjusting the structural stress of the high electron mobility transistor can be achieved.
[0051] In summary, through the carbon and iron doping in the buffer layer 30, the breakdown voltage and operating efficiency of the high electron mobility transistor can be improved. In addition, by means of the technical measure that the iron doping concentration in the third buffer layer 36 gradually decreases from the junction of the third buffer layer 36 and the second buffer layer 34 to the junction of the third buffer layer 36 and the channel layer 40, the influence of the iron doping in the third buffer layer 36 on the carrier concentration of the two-dimensional electron gas (2DEG) in the channel layer 40 can be reduced.
[0052] The above are only the preferred and feasible embodiments of the present invention. Any equivalent changes made by applying the description and claims of the present invention should be included within the scope of the claims of the present invention.
Claims
1. A high electron mobility transistor, characterized in that, it comprises: a substrate; a nucleation layer disposed on the substrate; a buffer layer, comprising: a first buffer region, comprising a first nitride stack layer and a second nitride stack layer, wherein the first nitride stack layer is disposed on the nucleation layer, and the second nitride stack layer is disposed on the first nitride stack layer; a second buffer region disposed on the first buffer region and doped with carbon and iron; and a third buffer region disposed on the second buffer region and doped with carbon and iron; a channel layer disposed on the buffer layer; and a barrier layer disposed on the channel layer, wherein, the third buffer region is located between the second buffer region and the channel layer, the carbon doping concentration of the third buffer region is greater than the iron doping concentration, the iron doping concentration of the third buffer region gradually decreases in the direction from the second buffer region to the channel layer, and the average aluminum composition of the first nitride stack layer is greater than the average aluminum composition of the second nitride stack layer; wherein, the second nitride stack layer is doped with carbon and iron, and the carbon doping concentration of the second nitride stack layer is greater than the iron doping concentration.
2. The high electron mobility transistor according to claim 1, characterized in that, wherein the second buffer region comprises a first buffer sub-layer, and the carbon doping concentration of the first buffer sub-layer is greater than the iron doping concentration.
3. The high electron mobility transistor according to claim 1, characterized in that, wherein the second buffer region comprises at least one second buffer sub-layer and at least one third buffer sub-layer stacked on top of each other, the carbon doping concentration in the at least one second buffer sub-layer is greater than the iron doping concentration, and the iron doping concentration in the at least one third buffer sub-layer is greater than the carbon doping concentration.
4. The high electron mobility transistor according to claim 3, characterized in that, wherein the thickness of the at least one second buffer sub-layer is greater than the thickness of the at least one third buffer sub-layer.
5. The high electron mobility transistor according to claim 3, characterized in that, wherein the carbon doping concentration of the at least one third buffer sublayer is less than 1E17 cm -3 and the iron doping concentration is greater than 1E17 cm -3 .
6. The high electron mobility transistor according to claim 3, characterized in that, wherein the carbon doping concentration of the at least one second buffer sublayer is greater than 5E18 cm -3 .
7. The high electron mobility transistor according to claim 1, characterized in that, wherein the second nitride stack layer is located between the first nitride stack layer and the second buffer region, and the average aluminum composition of the first nitride stack layer is greater than 25%, and the average aluminum composition of the second nitride stack layer is less than 25%.
8. The high electron mobility transistor according to claim 1, characterized in that, Wherein the first nitride stack layer and the second nitride stack layer each include at least one nitride semiconductor layer, and the composition is Al X Ga 1-X N (0 ≤ X ≤ 1).
9. The high electron mobility transistor according to claim 1, characterized in that, wherein the channel layer is doped with iron, and the iron doping concentration of the channel layer decreases in the direction away from the buffer layer.
10. The high electron mobility transistor according to claim 1, characterized in that, wherein the thickness of the third buffer region is 1 nm to 1000 nm.
11. The high electron mobility transistor according to claim 1, characterized in that, wherein the iron doping concentration of the third buffer adjacent to the channel layer is between 1E18 cm -3 and 1E17 cm -3 .
12. The high electron mobility transistor according to claim 1, characterized in that, A two-dimensional electron gas (2DEG) is formed at an interface between the channel layer and the barrier layer, and an iron doping concentration at the interface between the channel layer and the barrier layer is less than 5E17 cm -3 .