Wafer groove defect detection method and system

Abstract

The invention provides a wafer groove defect detection method and system. The method comprises the following steps: acquiring standard wafer groove contour data; acquiring groove contour data of the wafer to be detected; registering the contour of the groove to be detected and the contour of the standard groove by using an optimization algorithm; and calculating the point-to-point distance between the contour of the groove to be detected and the contour of the standard groove, and carrying out defect identification. According to the method, through optimization algorithm registration, measurement errors are effectively eliminated, groove defect judgment is accurate to the micron level in cooperation with precise calculation, the high-end chip manufacturing requirement is met, and the detection precision is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip manufacturing, and particularly, to a method and system for detecting groove defects of a wafer. Background Art

[0002] In the process of chip manufacturing, the quality of the wafer notch is crucial. The notch is usually V-shaped or U-shaped and is located at the outer edge of the silicon wafer. It is mainly used to identify the crystal orientation of the wafer, ensuring the correct orientation and alignment accuracy of the wafer during the processing. In addition, the notch also helps the automated equipment to more stably identify the wafer orientation in the processes of lithography, etching, doping, etc., reducing human errors and improving production efficiency. In a complex manufacturing environment, it is an urgent problem to efficiently and accurately detect the notch defects of the wafer, including small changes such as the notch shape, position, and magnitude.

[0003] However, when detecting notch defects, the existing technologies have problems such as inaccurate detection and low efficiency, and cannot meet the strict quality requirements of advanced chip production. For example, the traditional method may only rely on manual visual judgment, which is prone to misjudgment and missed judgment. And some methods based on simple image comparison on the market cannot cope with complex actual situations such as subtle changes in the notch shape.

[0004] Patent document CN117252861A discloses a method, device, and system for detecting surface defects of a wafer, belonging to the technical field of semiconductor manufacturing, including: acquiring a plurality of images of wafers to be detected; for each image of the wafer to be detected, acquiring a plurality of first connected regions of surface defects in each image of the wafer to be detected; obtaining corresponding second connected regions by performing morphological dilation on each first connected region; forming a region of interest for defects based on the first connected regions corresponding to the second connected regions; and identifying the defect category based on the region of interest for defects. Determining the final region of interest for defects according to the relationship between the connected regions of the surface defects before and after dilation in the surface image of the wafer to be detected; and identifying the defect category based on the finally determined region of interest for defects.

[0005] However, patent document CN117252861A has the disadvantage of being unable to detect the deformation of the groove notch. The shape of the groove notch is not a standard circle or arc and may be composed of multiple arc segments. Summary of the Invention

[0006] Aiming at the defects in the prior art, the purpose of the present invention is to provide a method and system for detecting groove defects of a wafer.

[0007] According to a method for detecting groove defects of a wafer provided by the present invention, it includes:

[0008] Step S1: Acquiring standard wafer groove contour data;

[0009] Step S2: Obtain the groove profile data of the wafer to be detected;

[0010] Step S3: Use an optimization algorithm to register the groove profile to be detected and the standard groove profile;

[0011] Step S4: Calculate the distance between the points of the groove profile to be detected and the standard groove profile and perform defect identification.

[0012] Preferably, in step S2, the groove part of the wafer to be detected in on-line production is scanned or photographed by the same or compatible acquisition method as the standard wafer to obtain the contour data to be detected;

[0013] The standard wafer groove profile data and the wafer groove profile data to be detected are represented as point sets.

[0014] Preferably, the registration in step S3 is to eliminate the coordinate system differences between the groove profile to be detected and the standard groove profile by introducing an optimization algorithm;

[0015] The coordinate differences include offsets in the horizontal and vertical directions and rotation angles;

[0016] The optimization algorithms include BFGS algorithm, genetic algorithm, particle swarm optimization algorithm, and optimization algorithms in deep learning;

[0017] Adjust the parameters of the optimization algorithm for wafers of different sizes and materials, including: according to the number of points forming the wafer profile, making the parameters of the points of the standard profile and the profile to be detected the same by sampling or interpolation, and then adjusting the number of points according to actual needs.

[0018] Preferably, step S4 includes:

[0019] Step S4.1: Select point sets on the groove profile to be detected and the standard groove profile after registration respectively;

[0020] Step S4.2: Calculate the distance difference d(P t ,S) between the points on the groove profile to be detected after registration and the standard groove profile line, and the calculation formula is as follows:

[0021]

[0022] S = {P s (x s ,y s )}

[0023] T = {P t (x t ,y t )}

[0024] Among them, S represents the set of standard groove contour points, T represents the set of groove contour points to be detected after registration, and P t represents the points on the groove contour to be detected;

[0025] Step S4.3: Determine whether the distance difference exceeds a preset threshold. If so, it is determined that there is a defect in the groove of the wafer to be detected, mark the position of the defect and generate a detailed detection report; if not, it is considered that the groove of the wafer is normal and marked as a qualified product.

[0026] Preferably, it further includes: annotating the type and position of the detected defect, and generating and outputting a report of the detection result for prompting or recording;

[0027] The types include groove chipping and groove deformation.

[0028] According to a groove defect detection system for wafers provided by the present invention, it includes:

[0029] Module M1: Obtain standard wafer groove contour data;

[0030] Module M2: Obtain the groove contour data of the wafer to be detected;

[0031] Module M3: Use an optimization algorithm to register the groove contour to be detected and the standard groove contour;

[0032] Module M4: Calculate the distance between the points of the groove contour to be detected and the standard groove contour and perform defect identification.

[0033] Preferably, the Module M2 uses the same or compatible acquisition method as the standard wafer to scan or photograph the groove part of the wafer to be detected on the production line to obtain the contour data to be detected;

[0034] The standard wafer groove contour data and the groove contour data of the wafer to be detected are represented as point sets.

[0035] Preferably, the registration in the Module M3 is to eliminate the coordinate system differences between the groove contour to be detected and the standard groove contour by introducing an optimization algorithm;

[0036] The coordinate differences include offsets in the horizontal and vertical directions and rotation angles;

[0037] The optimization algorithms include BFGS algorithm, genetic algorithm, particle swarm optimization algorithm, and optimization algorithms in deep learning;

[0038] Adjust the parameters of the optimization algorithm for wafers of different sizes and materials, including: according to the number of points forming the wafer contour, by sampling or interpolation, making the parameters of the points of the standard contour and the contour to be detected the same, and then adjusting the number of points according to actual needs.

[0039] Preferably, the module M4 comprises:

[0040] Module M4.1: Selecting point sets on the registered groove contour to be detected and the standard groove contour respectively;

[0041] Module M4.2: Calculate the distance difference d (P t ,S), the calculation formula is as follows:

[0042]

[0043] S={P s (x s ,y s )}

[0044] T={P t (x t ,y t )}

[0045] Among them, S represents the standard groove contour point set, T represents the groove contour point set to be detected after registration, and P t represents the point on the contour of the groove to be detected;

[0046] Module M4.3: Determine whether the distance difference exceeds a preset threshold. If so, determine that there is a defect in the groove of the wafer to be inspected, mark the location of the defect and generate a detailed inspection report; if not, it is considered that there is no abnormality in the groove of the wafer and it is marked as a normal product.

[0047] Preferably, the method further comprises: marking the type and location of the detected defects, and generating a report of the detection results and outputting the report for prompting or recording;

[0048] The types include groove chipping and groove deformation.

[0049] Compared with the prior art, the present invention has the following beneficial effects:

[0050] 1. The present invention effectively eliminates measurement errors by optimizing algorithm registration, and accurately determines groove defects to the micron level with precise calculations, meeting the requirements of high-end chip manufacturing and improving detection accuracy.

[0051] 2. The present invention automates comparison and calculation. In the field inspection of the production line, the processing time of the notch of a single wafer is shortened to milliseconds, which is compatible with batch inspection requirements and improves inspection efficiency.

[0052] 3. The present invention adjusts and optimizes algorithm parameters and threshold settings for wafers of different sizes and materials to adapt to a wide range of chip manufacturing scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0054] Figure 1 It is a schematic diagram of the working method flow of the present invention;

[0055] Figure 2 It is an effect diagram of the notch of the complete wafer groove in the present invention;

[0056] Figure 3 It is an effect diagram of the notch of the defective wafer groove in the present invention. Detailed implementation manners

[0057] The present invention will be described in detail below with reference to specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that those of ordinary skill in the art can make several changes and improvements without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0058] The present invention obtains the notch profiles of the standard wafer and the wafer to be detected, uses an optimization algorithm for profile registration, and then judges the presence state of notch defects by calculating the distances between the points on the notch profile of the wafer to be detected and the standard wafer.

[0059] Embodiment 1

[0060] According to a method for detecting notch defects of a wafer provided by the present invention, as Figure 1 shown, it includes:

[0061] Step S1: Obtain and store the complete profile data of the notch part of the standard wafer. The obtaining methods include technologies such as CCD imaging and digital image processing.

[0062] Step S2: Obtain the notch profile data of the wafer to be detected. In step S2, the same or compatible scanning and imaging technologies as those of the standard wafer are used to scan or photograph the notch part of the wafer to be detected in on-line production, and the profile data to be detected is obtained. The notch profiles of the standard wafer and the wafer to be detected can be represented as point sets.

[0063] Step S3: Use an optimization algorithm to register the groove profile to be detected and the standard groove profile. Compare the groove profile to be detected with the standard groove profile, and introduce an optimization algorithm to eliminate the influence of coordinate system differences and reduce measurement errors between the two, so as to achieve accurate profile registration, enabling comparison and analysis of the two under the same benchmark and improving the accuracy of subsequent defect judgment. Using an optimization algorithm to register the two profiles can identify deviations of three or more pixels. The coordinate differences include horizontal and vertical offsets and rotation angles. The optimization algorithm includes but is not limited to the BFGS algorithm, genetic algorithm, particle swarm optimization algorithm, optimization algorithms in deep learning, etc. Among them, the BFGS algorithm is a gradient-based optimization method that iteratively updates parameters to minimize the objective function (i.e., the cost function), and is used in this algorithm to optimize the parameters (rotation angle, translation x, translation y) of profile registration to achieve the best match between the notch profile of the wafer to be detected and the notch profile of the standard wafer.

[0064] For wafers of different sizes and materials, the parameters of the optimization algorithm can be adjusted, including: according to the number of points that make up the wafer profile, by sampling or interpolation, making the parameters of the points of the standard profile and the profile to be detected the same, and then adjusting the number of points according to actual needs.

[0065] Step S4: Calculate the distance between points on the groove profile to be detected and the standard groove profile and perform defect identification. Step S4 includes:

[0066] Step S4.1: Select point sets on the groove profile to be detected and the standard groove profile after registration respectively;

[0067] Step S4.2: Calculate the distance difference d(P t , S) between the points on the groove profile to be detected after registration and the standard groove profile line, and the calculation formula is as follows:

[0068]

[0069] S = {P s (x s , y s )}

[0070] T = {P t (x t , y t )}

[0071] Among them, S represents the standard groove profile point set, T represents the groove profile point set to be detected after registration, and P t represents the point on the groove profile to be detected.

[0072] Step S4.3: Determine whether the distance difference exceeds a preset threshold. If so, it is determined that there is a defect in the groove of the wafer to be detected, mark the position of the defect and generate a detailed inspection report; if not, it is considered that the groove of the wafer is normal and marked as a qualified product. The threshold can be flexibly set according to factors such as different wafer manufacturing processes and quality requirements, and the optimal value is determined after experimental verification. For example, according to the process requirements, the threshold ranges for chipping and deformation are set, and the actual size needs to be converted into pixels. In the present invention, if the set threshold exceeds 3 pixels, it is considered an abnormal product.

[0073] In addition, the present invention also includes annotating the type and position of the detected defects, such as notch chipping, notch deformation, etc. And generating a report on the detection results and outputting it for prompting or recording.

[0074] The purpose of the present invention is to efficiently and accurately detect wafer notch defects, including small changes in the notch shape, position, magnitude, etc., in a complex manufacturing environment, avoid misjudgment, and ensure the quality of chip production.

[0075] Further, taking the application of wafer groove defect detection in an advanced logic chip production line as an example, as Figure 2 and 3 shown, Figure 2 is a complete wafer groove, Figure 3 is a defective groove, where Figure 3 the boxed part is the defective part, and the present invention is specifically described as follows:

[0076] First, obtain the standard wafer groove profile. Use a CCD to capture the wafer image, and input the wafer image into an edge detection program to obtain a point set of the standard wafer profile.

[0077] Then, obtain the profile of the groove of the wafer to be detected. On the production line, the wafer to be detected is transferred to the detection position by an automated manipulator, and the same CCD is activated to capture the notch part, obtain the image of the wafer to be detected, and input the image into an edge detection program to obtain a point set of the profile of the image of the wafer to be detected.

[0078] Next, perform contour registration optimization. First, set the initial guess parameters, including the rotation angle, translation x coordinate, and y coordinate, with initial values all being 0, i.e., initial_params = [0, 0, 0]. These parameters will be used in the subsequent contour registration process, representing the rotation and translation transformation amounts of the contour to be detected relative to the standard contour. Then, call the optimization function minimize, with the cost function cost_function as the optimization objective, taking the initial parameters initial_params and the two contour data L1 (standard contour) and L2 (contour to be detected) as input parameters, and using the BFGS (Broyden Fletcher Goldfarb Shanno) optimization algorithm for parameter optimization. During the optimization process, the algorithm will continuously adjust the rotation angle and translation parameters to minimize the value of the cost function, thereby finding the parameter combination that best matches the two contours. The optimization result is stored in the variable result. Then, extract the finally optimized parameters from the optimization result result, including the optimal rotation angle optimal_angle, the optimal translation x coordinate optimal_tx, and the optimal translation y coordinate optimal_ty, i.e., optimal_angle, optimal_tx, optimal_ty = result.x. Finally, construct the rotation matrix R_optimal based on the extracted optimal parameters. The construction of the rotation matrix is based on the optimal rotation angle, and the element values of the rotation matrix are calculated using trigonometric functions. Specifically:

[0079] R_optimal = np.array([[np.cos(optimal_angle), -np.sin(optimal_angle)], [np.

[0080] sin(optimal_angle), np.cos(optimal_angle)]])

[0081] Finally, calculate the Euclidean distance between the points on the detected contour after registration and the standard contour; in this embodiment, it is set that when the distance exceeds 1 micron, it is considered that the notch has defects (such as notch chipping, notch deformation, etc.).

[0082] Through the above steps, accurately identify the wafer notch defects, generate the detection results, and feedback them to the production line control center for operations such as rejecting defective wafers and adjusting manufacturing processes, which helps to improve the yield and quality of chip manufacturing. And it takes 3 - 5 ms to run the algorithm of the present invention on C++.

[0083] Embodiment 2

[0084] The present invention also provides a system for detecting groove defects of a wafer. The system for detecting groove defects of the wafer can be implemented by executing the process steps of the method for detecting groove defects of the wafer. That is, those skilled in the art can understand the method for detecting groove defects of the wafer as a preferred embodiment of the system for detecting groove defects of the wafer.

[0085] A system for detecting groove defects of a wafer according to the present invention includes:

[0086] Module M1: Obtain standard wafer groove profile data.

[0087] Module M2: Obtain the groove profile data of the wafer to be detected. The module M2 uses the same or compatible acquisition method as the standard wafer to scan or photograph the groove part of the wafer to be detected in-line production, and obtains the profile data to be detected. The standard wafer groove profile data and the profile data of the wafer to be detected are represented as point sets.

[0088] Module M3: Use an optimization algorithm to register the groove profile to be detected and the standard groove profile. The registration in the module M3 eliminates the coordinate system differences between the groove profile to be detected and the standard groove profile by introducing an optimization algorithm. The coordinate differences include offsets in the horizontal and vertical directions and rotation angles. The optimization algorithms include BFGS algorithm, genetic algorithm, particle swarm optimization algorithm, and optimization algorithms in deep learning. Adjust the parameters of the optimization algorithm for wafers of different sizes and materials, including: according to the number of points forming the wafer profile, by sampling or interpolation, make the parameters of the points of the standard profile and the profile to be detected the same, and then adjust the number of points according to actual needs.

[0089] Module M4: Calculate the distance between the points of the groove profile to be detected and the standard groove profile and perform defect identification. The module M4 includes: Module M4.1: Select point sets on the groove profile to be detected and the standard groove profile after registration respectively. Module M4.2: Calculate the distance difference d(P t , S) between the points on the groove profile to be detected after registration and the standard groove profile line. The calculation formula is as follows:

[0090]

[0091] S = {P s (x s , y s )}

[0092] T = {P t (x t , y t )}

[0093] where S represents the standard groove profile point set, T represents the groove profile point set to be detected after registration, and Pt Represents a point on the groove contour to be detected. Module M4.3: Determine whether the distance difference exceeds a preset threshold. If so, determine that there is a defect in the groove of the wafer to be detected, mark the position of the defect and generate a detailed detection report. If not, consider that the groove of the wafer is normal and mark it as a qualified product.

[0094] The present invention also includes annotating the type and position of the detected defects, and generating and outputting a report of the detection results for prompting or recording. The types include groove chipping and groove deformation.

[0095] Those skilled in the art know that in addition to implementing the system and its various devices, modules, and units provided by the present invention in the form of pure computer-readable program code, the method steps can be logically programmed to enable the system and its various devices, modules, and units provided by the present invention to be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers, etc. to achieve the same functions. Therefore, the system and its various devices, modules, and units provided by the present invention can be considered as a hardware component, and the devices, modules, and units included therein for implementing various functions can also be regarded as the structure within the hardware component; the devices, modules, and units for implementing various functions can also be regarded as either software modules for implementing the method or the structure within the hardware component.

[0096] The specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Without conflict, the embodiments of the present application and the features in the embodiments can be arbitrarily combined with each other.

Claims

1. A method for detecting groove defects of a wafer, characterized in that: include: Step S1: Acquire standard wafer groove profile data; Step S2: Acquire the contour data of the wafer groove to be inspected; Step S3: using an optimization algorithm to align the groove profile to be detected with the standard groove profile; Step S4: Calculate the distance between the points of the groove profile to be detected and the standard groove profile and perform defect recognition.

2. The method for detecting groove defects of a wafer according to claim 1, characterized in that: The step S2 uses the same or compatible acquisition method as that of the standard wafer to scan or photograph the groove portion of the wafer to be inspected produced online to obtain the contour data to be inspected; The standard wafer groove profile data and the wafer groove profile data to be detected are represented as point sets.

3. The method for detecting groove defects of a wafer according to claim 1, characterized in that: The registration in step S3 is to eliminate the difference in coordinate system between the groove profile to be detected and the standard groove profile by introducing an optimization algorithm; The coordinate differences include horizontal and vertical offsets and rotation angles; The optimization algorithms include BFGS algorithm, genetic algorithm, particle swarm optimization algorithm, and optimization algorithm in deep learning; The algorithm parameters are adjusted and optimized for wafers of different sizes and materials, including: according to the number of points that make up the wafer contour, the parameters of the points of the standard contour and the contour to be detected are made the same through sampling or interpolation, and then the number of points is adjusted according to actual needs.

4. The method for detecting groove defects of a wafer according to claim 1, characterized in that: The step S4 comprises: Step S4.1: Selecting point sets on the registered groove contour to be detected and the standard groove contour respectively; Step S4.2: Calculate the distance difference d (P t ,S), the calculation formula is as follows: S={P s (x s ,y s )} T={P t (x t ,y t )} Among them, S represents the standard groove contour point set, T represents the groove contour point set to be detected after registration, and P t represents the point on the contour of the groove to be detected; Step S4.3: Determine whether the distance difference exceeds a preset threshold. If so, determine that there is a defect in the groove of the wafer to be inspected, mark the location of the defect and generate a detailed inspection report; if not, it is considered that there is no abnormality in the groove of the wafer and it is marked as a normal product.

5. The method for detecting groove defects of a wafer according to claim 1, characterized in that: It also includes: marking the type and location of the detected defects, and generating a report of the test results and outputting it for prompting or recording; The types include groove chipping and groove deformation.

6. A wafer groove defect detection system, characterized in that: include: Module M1: Obtain standard wafer groove profile data; Module M2: Acquire the profile data of the wafer groove to be inspected; Module M3: Use optimization algorithm to align the groove profile to be detected with the standard groove profile; Module M4: Calculate the distance between the points of the groove profile to be detected and the standard groove profile and perform defect identification.

7. The wafer groove defect detection system according to claim 6, characterized in that: The module M2 uses the same or compatible acquisition method as the standard wafer to scan or photograph the groove part of the wafer to be inspected produced online to obtain the contour data to be inspected; The standard wafer groove profile data and the wafer groove profile data to be detected are represented as point sets.

8. The wafer groove defect detection system according to claim 6, characterized in that: The registration in the module M3 is to eliminate the difference in coordinate system between the groove profile to be detected and the standard groove profile by introducing an optimization algorithm; The coordinate differences include horizontal and vertical offsets and rotation angles; The optimization algorithms include BFGS algorithm, genetic algorithm, particle swarm optimization algorithm, and optimization algorithm in deep learning; The algorithm parameters are adjusted and optimized for wafers of different sizes and materials, including: according to the number of points that make up the wafer contour, the parameters of the points of the standard contour and the contour to be detected are made the same through sampling or interpolation, and then the number of points is adjusted according to actual needs.

9. The wafer groove defect detection system according to claim 6, characterized in that: The module M4 comprises: Module M4.1: Selecting point sets on the registered groove contour to be detected and the standard groove contour respectively; Module M4.2: Calculate the distance difference d (P t ,S), the calculation formula is as follows: S={P s (x s ,y s )} T={P t (x t ,y t )} Among them, S represents the standard groove contour point set, T represents the groove contour point set to be detected after registration, and P t represents the point on the contour of the groove to be detected; Module M4.3: Determine whether the distance difference exceeds a preset threshold. If so, determine that there is a defect in the groove of the wafer to be inspected, mark the location of the defect and generate a detailed inspection report; if not, it is considered that there is no abnormality in the groove of the wafer and it is marked as a normal product.

10. The wafer groove defect detection system according to claim 6, characterized in that: It also includes: marking the type and location of the detected defects, and generating a report of the test results and outputting it for prompting or recording; The types include groove chipping and groove deformation.

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