An optical waveguide pre-transmission system with deterministic delay and a transmission method

Abstract

The present invention relates to the field of electronic information technology, and particularly relates to an optical pre-transmission system with a deterministic delay and a transmission method. The reference clock generation module serves as the overall reference clock source of the optical pre-transmission system and generates the reference clock of the optical pre-transmission system; the clock distribution module distributes the reference clock to each node in the phased array system for clock fan-out and distribution; the optical pre-generation module directly generates an optical pre-signal based on the reference clock as the synchronous trigger signal when the optical pre-transmission system operates; the optical pre-power splitting module distributes the optical pre-signal to each node in the phased array system; each node in the phased array system receives the optical pre-signal sent by the optical pre-power splitting module and performs logical processing on the optical pre-signal to obtain the required optical reception recovery clock phase; the technical solution provided by the present invention can overcome the defect that it is difficult to effectively trigger the deterministic time delay between multiple nodes in the transceiver in a large array system existing in the prior art.

Description

Technical Field

[0001] The present invention relates to the field of electronic information technology, and particularly relates to an optical pre-transmission system with deterministic delay and a transmission method thereof. Background Art

[0002] Digital phased array systems have the capabilities of beam electronic scanning and adaptability, being flexible and fast, and can achieve multi-target interception and tracking. Currently, the scale of digital phased array systems is getting larger and larger, and the flexibility of their beam scheduling is also getting better and better.

[0003] For digital phased array systems, due to the large number of nodes, a definite timing relationship is required between each transmitting unit during beamforming transmission, so that the beam can be synthesized in space when controlling the initial phase of each unit's transmission, and then the electronic scanning of the beam can be completed. To maintain the above-mentioned definite timing relationship, generally two methods of electrical signal triggering or optical signal triggering are adopted. Among them, electrical signal triggering is vulnerable to interference, with low transmission distance and fault tolerance, and is only used in small phased array systems. In large phased array systems, optical signal triggering has been increasingly widely used. Optical signal triggering has the advantages of good electromagnetic compatibility, stability, and no need for a large number of cable devices. In addition, this method not only transmits optical trigger signals but also transmits protocol information, and is a transmission of optical pre (fiber-optic transmission trigger timing) together with data, with obvious advantages.

[0004] The existing optical transmission method is relatively rough. The optical transmission delay each time when going online is variable, and there is no effective control over the optical transmission delay triggered each time when powering on, with strong uncertainty. After each power-on, the arrival time of the optical trigger signal received by each node in the phased array system is variable relative to the previous power-on. Therefore, the system needs to be calibrated each time when powering on, and this part of the trigger delay change is converted into the channel delay change. Through transceiver calibration, the delays and phases of each node and each channel are scanned out. After the delay and phase compensation are completed, the system can work normally.

[0005] The above solution is the current mainstream solution, but this solution also has its disadvantages. For example, the system needs to be configured with a calibration system, including transceiver channel calibration, network calibration, and time-consuming calibration, and may fail in a strong interference environment. In addition, with the solution of the transceiver deterministic delay problem by intermediate frequency transceiver ADC, DAC, FPGA, etc., the uncertainty of the power-on delay of the analog transceiver channel can be considered to have been solved for all channels within a single node, but in an array system, the transceiver deterministic delay between multiple nodes needs to achieve deterministic delay triggering of optical pre, especially in a large array system. Summary of the Invention

[0006] In view of the above-mentioned disadvantages of the prior art, the present invention provides an optical pre-transmission system and a transmission method with deterministic delay, which can effectively overcome the defect that it is difficult to effectively trigger the deterministic time delay between multiple nodes in a large array system existing in the prior art.

[0007] To achieve the above objectives, the present invention is realized through the following technical solutions:

[0008] An optical pre-transmission system with deterministic delay includes a reference clock generation module, a clock distribution module, an optical pre-generation module, an optical pre-power splitting module, and a phased array system;

[0009] The reference clock generation module, as the overall reference clock source of the optical pre-transmission system, generates the reference clock of the optical pre-transmission system;

[0010] The clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system for clock fan-out and distribution;

[0011] The optical pre-generation module receives the reference clock sent by the reference clock generation module and directly generates an optical pre-signal based on the reference clock as the synchronous trigger signal when the optical pre-transmission system operates;

[0012] The optical pre-power splitting module receives the optical pre-signal sent by the optical pre-generation module and distributes the optical pre-signal to each node in the phased array system;

[0013] The phased array system, in which each node receives the optical pre-signal sent by the optical pre-power splitting module and performs logical processing on the optical pre-signal to obtain the required optical reception recovery clock phase.

[0014] Preferably, the clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system through a clock sharding network for clock fan-out and distribution;

[0015] Among them, the reference clock does not need to be distributed to each node in the phased array system after being of equal length, equal phase, power splitting and amplification, and there are no requirements for time delay and phase.

[0016] Preferably, the period of the optical pre-signal directly generated by the optical pre-generation module based on the reference clock is an integer multiple of the reference clock.

[0017] Preferably, the optical pre-power splitting module receives the optical pre-signal sent by the optical pre-generation module and distributes the optical pre-signal to each node in the phased array system through a single-mode passive optical power splitting network;

[0018] Among them, the optical path of the single-mode passive optical power splitting network is relatively fixed, and the optical time delay is relatively stable. The single-mode passive optical power splitting network has no requirement for equal length and equal phase.

[0019] Preferably, each node in the phased array system receives the pre-optical-guide signal sent by the pre-optical-guide power splitting module and performs logical processing on the pre-optical-guide signal to obtain the required optical reception recovery clock phase, including:

[0020] The optical receiving end of each node converts the pre-optical-guide signal into an electrical signal through an optical module and sends it to its respective FPGA;

[0021] The GTX end of the FPGA of each node restores the clock of the data stream to obtain the optical reception recovery clock;

[0022] The phase difference between the optical reception recovery clock and the reference clock is measured by the TDC. If the phase difference is within the preset range, it is considered consistent; otherwise, the optical reception logic of the optical receiving end of the corresponding node is reset, and S1 is returned until the phase difference meets the requirements to obtain the required optical reception recovery clock phase;

[0023] Among them, the above process is completed during the power-on initialization stage of the pre-optical-guide transmission system. The state of the optical reception recovery clock phase is a finite state. By resetting the optical reception logic of the optical receiving end of the node multiple times, the required optical reception recovery clock phase is obtained;

[0024] The optical reception logic of the optical receiving end of each node cancels the unnecessary FIFO buffer.

[0025] Preferably, the sampling clock required in the pre-optical-guide transmission system is generated by further multiplying the frequency of the reference clock after entering the clock management.

[0026] An optical pre-optical-guide transmission method with deterministic delay includes the following steps:

[0027] S1. The reference clock generation module serves as the overall reference clock source of the pre-optical-guide transmission system and generates the reference clock of the pre-optical-guide transmission system;

[0028] S2. The clock distribution module distributes the reference clock to each node in the phased array system for clock fan-out and distribution;

[0029] S3. The pre-optical-guide generation module directly generates a pre-optical-guide signal based on the reference clock as the synchronous trigger signal when the pre-optical-guide transmission system is working;

[0030] S4. The pre-optical-guide power splitting module distributes the pre-optical-guide signal to each node in the phased array system;

[0031] S5. Each node in the phased array system receives the pre-optical-guide signal sent by the pre-optical-guide power splitting module, and performs logical processing on the pre-optical-guide signal to obtain the required optical receive recovery clock phase.

[0032] Preferably, the clock distribution module receives the reference clock sent by the reference clock generation module, and distributes the reference clock to each node in the phased array system through the clock sharding network for clock fan-out and distribution.

[0033] Among them, the reference clock does not need to be distributed to each node in the phased array system after equal length, equal phase, power splitting and amplification, and there are no requirements for delay and phase.

[0034] Preferably, the pre-optical-guide power splitting module receives the pre-optical-guide signal sent by the pre-optical-guide generation module, and distributes the pre-optical-guide signal to each node in the phased array system through the single-mode passive optical power splitting network.

[0035] Among them, the optical path of the single-mode passive optical power splitting network is relatively fixed, and the optical delay is relatively stable. The single-mode passive optical power splitting network has no requirements for equal length and equal phase.

[0036] Preferably, in S5, each node in the phased array system receives the pre-optical-guide signal sent by the pre-optical-guide power splitting module, and performs logical processing on the pre-optical-guide signal to obtain the required optical receive recovery clock phase, including:

[0037] S51. The optical receiving end of each node converts the pre-optical-guide signal into an electrical signal through an optical module and sends it to its own FPGA.

[0038] S52. The GTX end of the FPGA of each node restores the clock of the data stream to obtain the optical receive recovery clock.

[0039] S53. Use the TDC to measure the phase difference between the optical receive recovery clock and the reference clock. If the phase difference is within the preset range, it is considered consistent; otherwise, reset the optical receive logic of the optical receiving end of the corresponding node and return to S1 until the phase difference meets the requirements to obtain the required optical receive recovery clock phase.

[0040] Among them, the above process is completed in the power-on initialization stage of the pre-optical-guide transmission system. The state of the optical receive recovery clock phase is a finite state. By resetting the optical receive logic of the optical receiving end of the node multiple times, the required optical receive recovery clock phase is obtained.

[0041] The optical receive logic of the optical receiving end of each node cancels the unnecessary FIFO buffer.

[0042] Compared with the prior art, the present invention addresses the problem that it is difficult to effectively trigger the deterministic time delay in transceiver between multiple nodes in an existing large-scale array system, and proposes a solution with a simple architecture, stable and reliable performance, good fault tolerance, and strong universality. The present invention does not require a complex frequency synthesizer, only a reference clock with a single frequency, does not require complex equal-delay and equal-phase clock distribution, and has no requirement for equal length and equal phase for a single-mode passive optical power splitting network. Through a clever processing method, the equivalent high-speed synchronous frequency division ability of the optical receiving end of each node is realized, so as to achieve the determinacy of the phase of the optical receiving recovered clock. The delay between the reference clock received by this node and the recovered clock reaches a definite characteristic. The present invention has good flexibility, can greatly save the debugging and assembly cost, and at the same time the system hardware cost is also relatively low. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0044] Figure 1 is a schematic diagram of the system of the present invention;

[0045] Figure 2 is a schematic diagram of the array structure of the phased array system in the present invention;

[0046] Figure 3 is a schematic diagram of the process of gradually aligning the phase of the optical receiving recovered clock and the reference clock in the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0047] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0048] An optical pre-transmission system with deterministic delay, as Figure 1 shown, includes a reference clock generation module, a clock distribution module, an optical pre-generation module, an optical pre-power splitting module, and a phased array system;

[0049] The reference clock generation module, as the overall reference clock source of the optical pre-transmission system, generates the reference clock of the optical pre-transmission system;

[0050] A clock distribution module that receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system for clock fan-out and distribution;

[0051] An optical pre-generator module that receives the reference clock sent by the reference clock generation module and directly generates an optical pre-signal based on the reference clock as a synchronous trigger signal when the optical pre-transmission system is working;

[0052] An optical pre-power splitting module that receives the optical pre-signal sent by the optical pre-generator module and distributes the optical pre-signal to each node in the phased array system;

[0053] A phased array system, where each node receives the optical pre-signal sent by the optical pre-power splitting module and performs logical processing on the optical pre-signal to obtain the required optical receive recovery clock phase.

[0054] ① The clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system through a clock sharding network for clock fan-out and distribution;

[0055] Among them, the reference clock does not need to be distributed to each node in the phased array system after equal length, equal phase, power splitting and amplification, and there are no requirements for delay and phase.

[0056] ② The period of the optical pre-signal directly generated by the optical pre-generator module based on the reference clock is an integer multiple of the reference clock.

[0057] ③ The optical pre-power splitting module receives the optical pre-signal sent by the optical pre-generator module and distributes the optical pre-signal to each node in the phased array system through a single-mode passive optical power splitting network;

[0058] Among them, the optical path of the single-mode passive optical power splitting network is relatively fixed, and the optical delay is relatively stable. There are no requirements for equal length and equal phase for the single-mode passive optical power splitting network.

[0059] ④ As Figure 2 and Figure 3 shown, each node in the phased array system receives the optical pre-signal sent by the optical pre-power splitting module and performs logical processing on the optical pre-signal to obtain the required optical receive recovery clock phase, including:

[0060] The optical receiving end of each node converts the optical pre-signal into an electrical signal through an optical module and sends it to its own FPGA;

[0061] The GTX end of the FPGA of each node restores the clock of the data stream to obtain the optical receive recovery clock;

[0062] Use the TDC to measure the phase difference between the optical reception recovery clock and the reference clock. If the phase difference is within the preset range, it is considered consistent; otherwise, reset the optical reception logic of the optical reception end of the corresponding node and return to S1 until the phase difference meets the requirements to obtain the required optical reception recovery clock phase;

[0063] Among them, the above process is completed during the power-on initialization stage of the pre-optical transmission system. The state of the optical reception recovery clock phase is a finite state. By resetting the optical reception logic of the optical reception end of the node multiple times, the required optical reception recovery clock phase can be obtained;

[0064] The optical reception logic of the optical reception end of each node cancels the unnecessary FIFO buffer.

[0065] In the technical solution of this application, the sampling clocks (such as ADC, DAC, etc.) required in the pre-optical transmission system are generated by further entering the clock management and frequency doubling of the reference clock.

[0066] In the technical solution of this application, on the basis of the above-mentioned pre-optical transmission system with deterministic delay being disclosed, a pre-optical transmission method with deterministic delay is also disclosed, including the following steps:

[0067] S1. The reference clock generation module serves as the overall reference clock source of the pre-optical transmission system and generates the reference clock of the pre-optical transmission system;

[0068] S2. The clock distribution module distributes the reference clock to each node in the phased array system for clock fan-out and distribution;

[0069] S3. The pre-optical generation module directly generates a pre-optical signal based on the reference clock as the synchronous trigger signal when the pre-optical transmission system is working;

[0070] S4. The pre-optical power splitting module distributes the pre-optical signal to each node in the phased array system;

[0071] S5. Each node in the phased array system receives the pre-optical signal sent by the pre-optical power splitting module and performs logical processing on the pre-optical signal to obtain the required optical reception recovery clock phase.

[0072] ① The clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system through the clock sharding network for clock fan-out and distribution;

[0073] Among them, the reference clock does not need to be distributed to each node in the phased array system after equal length, equal phase, power splitting and amplification, and there are no requirements for delay and phase.

[0074] ② The optical pre-power splitting module receives the optical pre-signal sent by the optical pre-generation module and distributes the optical pre-signal to each node in the phased array system through a single-mode passive optical power splitting network;

[0075] Among them, the optical path of the single-mode passive optical power splitting network is relatively fixed, and the optical time delay is relatively stable. The single-mode passive optical power splitting network has no requirement for equal length and equal phase.

[0076] ③ Each node in the phased array system in S5 receives the optical pre-signal sent by the optical pre-power splitting module and performs logical processing on the optical pre-signal to obtain the required optical reception recovery clock phase, including:

[0077] S51. The optical receiving end of each node converts the optical pre-signal into an electrical signal through an optical module and sends it to its respective FPGA;

[0078] S52. The GTX end of the FPGA of each node restores the clock of the data stream to obtain the optical reception recovery clock;

[0079] S53. Use the TDC to measure the phase difference between the optical reception recovery clock and the reference clock. If the phase difference is within the preset range, it is considered consistent; otherwise, reset the optical reception logic of the optical receiving end of the corresponding node and return to S1 until the phase difference meets the requirements to obtain the required optical reception recovery clock phase;

[0080] Among them, the above process is completed during the power-on initialization stage of the optical pre-transmission system. The state of the optical reception recovery clock phase is a finite state. By resetting the optical reception logic of the optical receiving end of the node multiple times, the required optical reception recovery clock phase is obtained;

[0081] The optical reception logic of the optical receiving end of each node cancels the unnecessary FIFO buffer.

[0082] In the technical solution of this application, the optical receiving recovery clock phase that affects the uncertainty of the optical transmission time delay is dexterously controlled by using pre-optical-guide transmission, so as to obtain the required optical receiving recovery clock phase. Since the reference clock and the pre-optical-guide signal are asynchronously allocated, the phase is uncertain every time the device is powered on. However, the state of the optical receiving recovery clock phase is a finite state. For example, for an optical transmission system with a speed of 5 Gbps, if the optical receiving end is configured in a 32-bit width mode, the recovery clock frequency of the optical receiving end can be calculated as 5 Gbps * 8 / 10 / 32 = 125 MHz. There are theoretically 40 states for this 125 MHz recovery clock. Here, a TDC (a relatively simple multi-phase TDC can be used) is used to measure the phase of the reference clock arriving at this node and the above-mentioned recovery clock. If the phase difference is within the preset range, it is considered consistent; if the phase difference exceeds the preset range, the optical receiving logic of the optical receiving end of the corresponding node is reset, so as to obtain a new recovery clock, and the above measurement process is repeated until the optical receiving recovery clock phase is consistent with the reference clock phase and enters the next working state.

[0083] The core of the above technical solution is that for the uncertainty of the optical receiving recovery clock phase, through multiple resets and measurements until the required optical receiving recovery clock phase is obtained. Since this step is completed during the power-on initialization stage of the pre-optical-guide transmission system and the possibilities of the optical receiving recovery clock phase are limited, theoretically, by continuously resetting the optical receiving logic within a short period of time, a suitable optical receiving recovery clock phase can definitely be obtained, thus realizing the certainty of the optical receiving recovery clock phase. Through simulation and actual testing, it is found that within a few seconds after power-on, the optical receiving ends of all nodes can obtain the required optical receiving recovery clock phase, and the whole process is very short, with almost no additional time overhead for the system.

[0084] The technical solution of this application performs TDC measurement on the optical receiving recovery clock phase and the reference clock phase after each asynchronous allocation. If the requirements are not met, asynchronous allocation is performed again, and the above TDC measurement is repeated until the optical receiving recovery clock phase after asynchronous allocation meets the requirements. This mainly utilizes the characteristic that the state of the optical receiving recovery clock phase is a finite state. For the optical receiving logic of the FPGA, thousands of asynchronous resets can be achieved within the time unit of seconds, and the required optical receiving recovery clock phase can surely be found among dozens of recovery clock states, thus achieving an effect similar to synchronous frequency division.

[0085] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. An optical waveguide pre-transmission system with a deterministic delay, characterized in that: It includes a reference clock generation module, a clock distribution module, a pre-optical-guide generation module, a pre-optical-guide power splitting module, and a phased array system; The reference clock generation module, as the overall reference clock source of the pre-optical-guide transmission system, generates the reference clock of the pre-optical-guide transmission system; The clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system for clock fan-out and distribution; The pre-optical-guide generation module receives the reference clock sent by the reference clock generation module and directly generates a pre-optical-guide signal based on the reference clock as the synchronous trigger signal when the pre-optical-guide transmission system operates; The pre-optical-guide power splitting module receives the pre-optical-guide signal sent by the pre-optical-guide generation module and distributes the pre-optical-guide signal to each node in the phased array system; The phased array system, where each node receives the pre-optical-guide signal sent by the pre-optical-guide power splitting module and performs logical processing on the pre-optical-guide signal to obtain the required optical receive recovery clock phase; Each node in the phased array system receives the pre-optical-guide signal sent by the pre-optical-guide power splitting module and performs logical processing on the pre-optical-guide signal to obtain the required optical receive recovery clock phase, including: The optical receive end of each node converts the pre-optical-guide signal into an electrical signal through an optical module and sends it to its respective FPGA; The GTX end of the FPGA of each node restores the clock of the data stream to obtain the optical receive recovery clock; Use a TDC to measure the phase difference between the optical receive recovery clock and the reference clock. If the phase difference is within the preset range, it is considered consistent; otherwise, reset the optical receive logic of the optical receive end of the corresponding node and return to the step of generating the reference clock of the pre-optical-guide transmission system until the phase difference meets the requirements to obtain the required optical receive recovery clock phase; Among them, the above process is completed during the power-on initialization stage of the pre-optical-guide transmission system. The state of the optical receive recovery clock phase is a finite state, and the optical receive logic of the optical receive end of the node is reset multiple times to obtain the required optical receive recovery clock phase; The optical receive logic of the optical receive end of each node cancels unnecessary FIFO buffers.

2. The optical waveguide pre-transmission system with a deterministic delay according to claim 1, characterized in that: The clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system through a clock sharding network for clock fan-out and distribution; Among them, the reference clock does not need to be distributed to each node in the phased array system after equal length, equal phase, power splitting and amplification, and there are no requirements for delay and phase.

3. The optical waveguide pre-transmission system with a deterministic delay according to claim 1, characterized in that: The period of the pre-optical-guide signal directly generated by the pre-optical-guide generation module based on the reference clock is an integer multiple of the reference clock.

4. The optical waveguide pre-transmission system with deterministic delay according to claim 1, characterized in that: The pre-optical-guide power splitting module receives the pre-optical-guide signal sent by the pre-optical-guide generation module and distributes the pre-optical-guide signal to each node in the phased array system through a single-mode passive optical power splitting network; Among them, the optical path of the single-mode passive optical power splitting network is relatively fixed, and the optical delay is relatively stable. The single-mode passive optical power splitting network has no requirements for equal length and equal phase.

5. The optical waveguide pre-transmission system with a deterministic delay according to any one of claims 1-4, characterized in that: The sampling clock required in the pre-optical-guide transmission system is generated by further entering the clock management and frequency doubling of the reference clock.

6. A method for optical waveguide pre - transmission with deterministic delay, applied to the optical waveguide pre - transmission system with deterministic delay described in claim 1, characterized in that: It includes the following steps: S1. The reference clock generation module serves as the overall reference clock source for the optical pre-transmission system, generating the reference clock for the optical pre-transmission system. S2. The clock distribution module distributes the reference clock to each node in the phased array system for clock fan-out and distribution. S3. The optical pre-generation module directly generates the optical pre-signal based on the reference clock, serving as the synchronous trigger signal when the optical pre-transmission system operates. S4. The optical pre-power splitting module distributes the optical pre-signal to each node in the phased array system. S5. Each node in the phased array system receives the optical pre-signal sent by the optical pre-power splitting module and performs logical processing on the optical pre-signal to obtain the required optical receive recovery clock phase.

7. The optical waveguide pre-transmission method with a deterministic delay according to claim 6, characterized in that: The clock distribution module receives the reference clock sent by the reference clock generation module and distributes the reference clock to each node in the phased array system through the clock sharding network for clock fan-out and distribution. Among them, the reference clock does not need to be distributed to each node in the phased array system after equal length, equal phase, power splitting and amplification, and there are no requirements for delay and phase.

8. The optical waveguide pre-transmission method with a deterministic delay according to claim 6, characterized in that: The optical pre-power splitting module receives the optical pre-signal sent by the optical pre-generation module and distributes the optical pre-signal to each node in the phased array system through the single-mode passive optical power splitting network. Among them, the optical path of the single-mode passive optical power splitting network is relatively fixed, and the optical delay is relatively stable. The single-mode passive optical power splitting network has no requirements for equal length and equal phase.

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